TWI813328B - OLED pixel circuit structure, OLED display device and information processing device - Google Patents

Abstract

An OLED pixel circuit architecture, which includes a voltage source switch and at least one OLED pixel circuit. Each OLED pixel circuit has an NMOS transistor, an OLED element, a storage capacitor and a switch combination composed of three switches; During operation, the OLED pixel circuit structure presents a reset phase, a sampling phase and a holding phase by controlling the switching state combination of the voltage source switch and the switch combination, so that the output terminal of each OLED pixel circuit outputs A data voltage is applied to the OLED element to determine the conduction current of the OLED element.

Description

OLED pixel circuit architecture, OLED display device and information processing device

The present invention relates to OLED pixel circuits, and in particular to an OLED pixel circuit that can support a wide range of display data voltages.

Generally, the threshold voltage of the current driving transistor in the OLED (organic light emitting diode) pixel circuit will vary due to process factors, causing the mura phenomenon in the OLED display screen. In order to compensate for this variation, it is known that OLED pixel circuits using 6T1C (6 transistors and 1 capacitor) or 7T1C (7 transistors and 1 capacitor) are used. Please refer to Figure 1, which illustrates a circuit diagram of an existing OLED pixel circuit using 6T1C. As shown in Figure 1, the existing OLED pixel circuit has a first PMOS transistor 11, a second PMOS transistor 12, a third PMOS transistor 13, a fourth PMOS transistor 14, and a fifth PMOS transistor. 15. A sixth PMOS transistor 16, a storage capacitor 17 and an OLED element 18, wherein the first PMOS transistor 11, the second PMOS transistor 12, the fourth PMOS transistor 14, the fifth PMOS transistor 15 and The sixth PMOS transistor 16 functions as a switch combination to perform a driving current generation operation according to a switching sequence, which includes: causing the switching signals (SW1, SW2, SW3) to appear (active, inactive, inactive) to enable storage Capacitor 17 stores V _DD -V _INIT , where V _DD is the DC supply voltage and V _INIT is an initialization voltage; the switching signals (SW1, SW2, SW3) are presented (inactive, active, inactive) so that the storage capacitor 17 stores V _DD -V _DATA +V _TH , where V _TH is the threshold voltage of the third PMOS transistor 13; and causing the switching signals (SW1, SW2, SW3) to appear (inactive, inactive, active) so that the third PMOS transistor 13 The source and gate voltage difference of the crystal 13 is equal to V _DD - V _DATA to determine the driving current of the OLED element 18 . Accordingly, the driving current of the OLED element 18 can be made independent of the threshold voltage of the third PMOS transistor 13 .

However, since the driving current of the OLED element 18 is determined by the third PMOS transistor 13, that is, the OLED pixel circuit in Figure 1 adopts the current driving mode, the range of the source and gate voltage difference of the third PMOS transistor 13 is not the same. Not much. Generally speaking, the display data signal V _DATA ranges from about 1V to 4V. Therefore, taking 10-bit display data as an example, the V _DATA of 1V will become less than 1mV after being divided into 1024 levels and is likely to be covered by offset voltage or noise, resulting in a sudden reduction in the number of effective bits. This phenomenon increases the design difficulty of the front-end source driver IC, especially in the low-gray-scale driver part. The general solution is to add complex optical compensation modes, such as BC (brightness control; brightness control) dimming or PWM (pulse width modulation; pulse width modulation) dimming. However, this will increase the development time and circuit costs.

In order to solve the above problems, a novel OLED pixel circuit is urgently needed in this field.

One purpose of the present invention is to disclose an OLED pixel circuit architecture that can output a corresponding data voltage to each OLED element to modulate the conduction voltage of each OLED element and determine the conduction current of each OLED element, thereby providing good low voltage. Grayscale display effect.

Another object of the present invention is to disclose an OLED pixel circuit architecture that can avoid leakage current during the reset phase to ensure the black display effect of the OLED element with a data voltage of zero, thereby providing good display contrast.

Another object of the present invention is to disclose an OLED pixel circuit architecture that can support a wide range of data voltages, thereby providing good display screen uniformity without using BC dimming or PWM dimming.

Another object of the present invention is to disclose an OLED display device that can provide good low-grayscale display effects and good display contrast through the above-mentioned OLED pixel circuit structure.

Another object of the present invention is to disclose an OLED display device that can provide good display screen uniformity through the above-mentioned OLED pixel circuit structure.

Another object of the present invention is to disclose an information processing device that can improve the low grayscale display effect and display contrast of its OLED display screen by using the above-mentioned OLED pixel circuit structure.

Another object of the present invention is to disclose an information processing device that can improve the picture uniformity of its OLED display screen by using the above-mentioned OLED pixel circuit structure.

To achieve the above purpose, an OLED pixel circuit architecture is proposed, which includes: a first switch, coupled between a supply voltage and a power supply node, and controlling the on and off of its channel according to a first switch signal. ; And at least one pixel circuit, each pixel circuit has: an NMOS transistor with a drain, a gate and a source; an OLED element coupled between the source and a negative reference voltage; A storage capacitor, coupled between the gate and a reference ground; a second switch, coupled between the power supply node and the drain, controls the conduction and disconnection of its channel according to a second switch signal ; A third switch, coupled between the power supply node and the gate, controls the conduction and disconnection of its channel according to a third switch signal; and A fourth switch is coupled between the source and a data voltage, and controls the conduction and disconnection of its channel according to a fourth switch signal; during operation, the OLED pixel circuit structure has a reset phase, a A sampling phase and a holding phase, wherein in the reset phase, the first switch signal, the second switch signal, the third switch signal and the fourth switch signal respectively present an active state, an inactive state, and an active state. and inactive state; in the sampling stage, the first switch signal, the second switch signal, the third switch signal and the fourth switch signal respectively present the inactive state, the active state, the active state and the active state; and In the holding phase, the first switch signal, the second switch signal, the third switch signal and the fourth switch signal respectively assume an active state, an active state, an inactive state and an inactive state.

In possible embodiments, the first switch may include an NMOS transistor, a PMOS transistor or a CMOS circuit.

In possible embodiments, the second switch may include an NMOS transistor, a PMOS transistor or a CMOS circuit.

In possible embodiments, the third switch may include an NMOS transistor, a PMOS transistor or a CMOS circuit.

In possible embodiments, the fourth switch may include an NMOS transistor, a PMOS transistor or a CMOS circuit.

In order to achieve the above object, the present invention further proposes an OLED display device, which has an OLED module and a driving circuit for driving the OLED module. The OLED module has a plurality of OLED pixel circuit structures, and each of the OLED The pixel circuit architecture includes: a first switch, coupled between a supply voltage and a power supply node, which controls the on and off of its channel according to a first switch signal; and At least one pixel circuit, each pixel circuit has: an NMOS transistor with a drain, a gate and a source; an OLED element coupled between the source and a negative reference voltage; a storage a capacitor, coupled between the gate and a reference ground; a second switch, coupled between the power supply node and the drain, controlling the conduction and disconnection of its channel according to a second switch signal; A third switch is coupled between the power supply node and the gate, and controls the conduction and disconnection of its channel according to a third switch signal; and a fourth switch is coupled between the source and a data voltage. During this time, a fourth switch signal is used to control the on and off of its channel; during operation, the OLED pixel circuit structure has a reset phase, a sampling phase and a holding phase, wherein, in the reset phase, The first switch signal, the second switch signal, the third switch signal and the fourth switch signal respectively present an active state, an inactive state, an active state and an inactive state; in the sampling phase, the first switch signal , the second switch signal, the third switch signal and the fourth switch signal respectively present an inactive state, an active state, an active state and an active state; and in the holding phase, the first switch signal, the second switch The signal, the third switch signal and the fourth switch signal respectively present an active state, an active state, an inactive state and an inactive state.

In possible embodiments, the first switch may be an NMOS transistor, a PMOS transistor or a CMOS circuit.

In possible embodiments, the second switch may be an NMOS transistor, a PMOS transistor or a CMOS circuit.

In possible embodiments, the third switch may be an NMOS transistor, a PMOS transistor or a CMOS circuit.

In possible embodiments, the fourth switch may be an NMOS transistor, a PMOS transistor or a CMOS circuit.

To achieve the above object, the present invention further proposes an information processing device, which has a central processing unit and the aforementioned OLED display device, wherein the central processing unit is used to communicate with the OLED display device.

In possible embodiments, the information processing device may be a smart handheld device, a portable computer, a wearable device or a television.

In order to enable the review committee to further understand the structure, characteristics and purpose of the present invention, drawings and detailed descriptions of preferred embodiments are attached as follows.

11:The first PMOS transistor

12: The second PMOS transistor

13: The third PMOS transistor

14: The fourth PMOS transistor

15: The fifth PMOS transistor

16: The sixth PMOS transistor

17:Storage capacitor

18:OLED components

100:OLED pixel circuit architecture

110:First switch

120:Pixel circuit

121:NMOS transistor

122:Second switch

123:Third switch

124:Fourth switch

125:Storage capacitor

126:OLED components

200:OLED display device

210:OLED module

211:OLED pixel circuit architecture

220: Drive circuit

300:Information processing device

310:Central processing unit

320:OLED display device

Figure 1 shows a circuit diagram of an existing OLED pixel circuit using 6T1C.

FIG. 2 shows a circuit diagram of an embodiment of the OLED pixel circuit architecture of the present invention.

FIG. 3a is a schematic diagram of the OLED pixel circuit architecture of FIG. 2 operating in the reset stage.

FIG. 3b is a schematic diagram of the OLED pixel circuit architecture of FIG. 2 operating in the sampling stage.

FIG. 3c is a schematic diagram of the OLED pixel circuit structure of FIG. 2 operating in the holding phase.

FIG. 4 is a block diagram of an embodiment of the OLED display device of the present invention.

FIG. 5 is a block diagram of an embodiment of the information processing device of the present invention.

The principle of the present invention is: by changing the on and off states of four switches, an OLED pixel circuit structure sequentially presents a reset phase, a sampling phase and a holding phase, so that the output terminals of the OLED pixel circuit structure can Each voltage is equal to a data voltage, and the conduction current of the corresponding OLED element is determined by modulating the conduction voltage of a corresponding OLED element. That is to say, the present invention determines the conduction current of an OLED element by modulating the conduction voltage of the OLED element, so it can support a wide range of data voltage signals, and can therefore be used in situations where BC dimming or PWM dimming is not used. It produces good low-grayscale display effect and good display contrast, and provides good display screen uniformity.

Please refer to FIG. 2 , which illustrates a circuit diagram of an embodiment of the OLED pixel circuit architecture of the present invention. As shown in FIG. 2 , an OLED pixel circuit structure 100 has a first switch 110 and at least one pixel circuit 120 , wherein each pixel circuit 120 has an NMOS transistor 121 , a second switch 122 , and a third switch 123 , a fourth switch 124, a storage capacitor 125 and an OLED element 126. In addition, the OLED pixel circuit structure 100 can be provided on a semiconductor substrate or a wafer.

The first switch 110 can be an NMOS transistor, a PMOS transistor or a CMOS circuit, is coupled between a supply voltage V _DD and a power supply node X, and controls its channel according to a first switch signal SW1 On and off.

In addition, in each pixel circuit 120, the NMOS transistor 121 has a drain, a gate and a source; the OLED element 126 is coupled between the source and a negative reference voltage V _SS ; the storage capacitor 125 is coupled between the gate and a reference ground; the second switch 122, which can be an NMOS transistor, a PMOS transistor or a CMOS circuit, is coupled between the power supply node X and the drain, and It controls the on and off of its channel according to a second switch signal SW2; the third switch 123 can be an NMOS transistor, a PMOS transistor or a CMOS circuit, and is coupled between the power supply node X and the gate. time, and controls the on and off of its channel according to a third switch signal SW3; and the fourth switch 124, which can be an NMOS transistor, a PMOS transistor or a CMOS circuit, is coupled to the source and A data voltage V _DATA (j), j is between 1 and n, j and n are both positive integers, and a fourth switch signal SW4 is used to control the on and off of the channel.

During operation, the OLED pixel circuit structure 100 has a reset phase, a sampling phase and a holding phase. In the reset phase, the first switching signal SW1, the second switching signal SW2, and the third switching signal SW3 and the fourth switch signal SW4 correspond to the active state, the inactive state, the active state and the inactive state; in this sampling stage, the first switch signal SW1, the second switch signal SW2, the third switch signal SW3 and the fourth switch signal SW4 corresponds to the inactive state, the active state, the active state and the active state; and in the holding phase, the first switch signal SW1, the second switch signal SW2, the third switch signal SW3 and the fourth switch signal SW4 respectively exhibit the active state. , active state, inactive state and inactive state.

Please refer to FIGS. 3a to 3c together, wherein FIG. 3a is a schematic diagram of the OLED pixel circuit architecture of FIG. 2 operating in the reset stage; FIG. 3b is a schematic diagram of the OLED pixel circuit architecture of FIG. 2 operating in the sampling stage; and FIG. 3c is a schematic diagram of the OLED pixel circuit structure of Figure 2 operating in the holding stage. As shown in Figures 3a to 3c, during the reset phase, the supply voltage V _DD charges each storage capacitor 125 through the first switch 110 and each third switch 123 so that the voltage of each storage capacitor 125 is V _DD ; in In this sampling stage, the storage capacitor 125 in each pixel circuit 120 is coupled to the data voltage V _DATA (j) through the third switch 123, the second switch 122, the NMOS transistor 121 and the fourth switch 124 to discharge to reduce the voltage. to V _DATA (j) + V _TH , where V _TH is the threshold voltage of the NMOS transistor 121 ; and in this holding phase, the supply voltage V _DD is passed through the first switch 110 and the second switch 122 in each pixel circuit 120 And the NMOS transistor 121 provides power to the OLED element 126 in each pixel circuit 120, and the voltage of the storage capacitor 125 in each pixel circuit 120 will be maintained at V _DATA (j) + V _TH so that the source of the NMOS transistor 121 The voltage is maintained at V _DATA (j), thereby modulating the conduction voltage of the OLED element 126 to determine the conduction current of the OLED element 126 .

It is worth mentioning that during the reset phase, since the second switch 122 is turned off, the conduction current of the OLED element 126 is zero, thus ensuring the operation of a pixel circuit 120 when the data voltage V _DATA (j) is zero. Black display effect, thereby improving the display contrast of the OLED pixel circuit structure 100.

In addition, according to the above description, the present invention further provides an OLED display device. Please refer to FIG. 4 , which illustrates a block diagram of an embodiment of the OLED display device of the present invention. As shown in Figure 4, an OLED display device 200 has an OLED module 210 and a driving circuit 220 for driving the OLED module 210. The OLED module 210 has a plurality of OLED pixel circuit structures 211, and the OLED pixel circuit The architecture 211 is implemented by the OLED pixel circuit architecture 100, that is, the OLED module 210 can be implemented on a semiconductor substrate or a wafer; and the driving circuit 220 is used to provide the first switching signal SW1 and the second switching signal SW2, the third switching signal SW3, the fourth switching signal SW4 and the data voltage V _DATA (j), j is between 1 and n. The driving circuit 220 can be integrated with the OLED module 210 on a semiconductor substrate or a on the wafer. In addition, although the present invention can improve the low grayscale display effect of each OLED element 126 by supporting a wide range of data voltage V _DATA (j), in some applications, the present invention can also make the first switching signal SW1 A PWM pulse is provided during the holding phase to further improve the gray scale accuracy of each OLED element 126 .

According to the above description, the present invention further provides an information processing device. Please refer to FIG. 5 , which illustrates a block diagram of an embodiment of the information processing device of the present invention. As shown in Figure 5, an information processing device 300 has a central processing unit 310 and an OLED display device 320 such as the aforementioned OLED display device 320, wherein the OLED display device 320 is implemented by the OLED display device 200, and the central The processing unit 310 is used to communicate with the OLED display device 320 . In addition, the information processing device 300 may be a smart handheld device, a portable computer, a wearable device or a television.

Through the design disclosed above, the present invention has the following advantages:

1. The OLED pixel circuit structure of the present invention can output a corresponding data voltage to each OLED element to modulate the conduction voltage of each OLED element and determine the conduction current of each OLED element, thereby providing a good low-grayscale display effect.

2. The OLED pixel circuit structure of the present invention can avoid leakage current during the reset phase to ensure the black display effect of the OLED element with zero data voltage, thereby providing good display contrast.

3. The OLED pixel circuit architecture of the present invention can support a wide range of data voltages, thereby providing good display uniformity without using BC dimming or PWM dimming.

4. The OLED display device of the present invention can provide good low-grayscale display effects and good display contrast through the above-mentioned OLED pixel circuit structure.

5. The OLED display device of the present invention can provide good display screen uniformity through the above-mentioned OLED pixel circuit structure.

6. The information processing device of the present invention can use the above-mentioned OLED pixel circuit structure to improve the low-grayscale display effect and display contrast of its OLED display screen.

7. The information processing device of the present invention can improve the picture uniformity of its OLED display screen through the above-mentioned OLED pixel circuit structure.

What is disclosed in this case is a preferred embodiment. Any partial changes or modifications derived from the technical ideas of this case and easily inferred by those familiar with the art will not deviate from the scope of the patent rights of this case.

In summary, regardless of the purpose, means and effects of this case, it shows that it is completely different from the conventional technology, and that the invention is first of all practical, and indeed meets the patent requirements for inventions. Please clarify this to the examiner. It is our best prayer to investigate and grant patents as soon as possible to benefit society.

100:OLED pixel circuit architecture

110:First switch

120:Pixel circuit

121:NMOS transistor

122:Second switch

123:Third switch

124:Fourth switch

125:Storage capacitor

126:OLED components

Claims (12)

An OLED pixel circuit architecture, which includes: a first switch, coupled between a supply voltage and a power supply node, and controlling the on and off of its channel according to a first switch signal; and at least one pixel circuit, each The pixel circuits each have: an NMOS transistor with a drain, a gate and a source; an OLED element coupled between the source and a negative reference voltage; a storage capacitor coupled to the Between the gate and a reference ground; a second switch, coupled between the power supply node and the drain, controls the conduction and disconnection of its channel according to a second switch signal; a third switch, coupled Between the power supply node and the gate, a third switch signal is used to control the conduction and disconnection of the channel; and a fourth switch is coupled between the source and a data voltage, and is controlled according to a first Four switch signals control the on and off of its channel; during operation, the OLED pixel circuit structure has a reset phase, a sampling phase and a holding phase, wherein, in the reset phase, the first switch signal, The second switch signal, the third switch signal and the fourth switch signal respectively present an active state, an inactive state, an active state and an inactive state; in the sampling phase, the first switch signal, the second switch signal , the third switch signal and the fourth switch signal respectively present an inactive state, an active state, an active state and an active state; and in the holding phase, the first switch signal, the second switch signal, the third switch The signal and the fourth switch signal respectively present an active state, an active state, an inactive state and an inactive state. In the OLED pixel circuit structure described in claim 1 of the patent application, the first switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. In the OLED pixel circuit structure described in item 1 of the patent application, the second switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. In the OLED pixel circuit structure described in item 1 of the patent application, the third switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. In the OLED pixel circuit structure described in claim 1 of the patent application, the fourth switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. An OLED display device, which has an OLED module and a drive circuit for driving the OLED module. The OLED module has a plurality of OLED pixel circuit structures, and each of the OLED pixel circuit structures includes: a first A switch, coupled between a supply voltage and a power supply node, controls the on and off of its channel according to a first switch signal; and at least one pixel circuit, each pixel circuit has: an NMOS transistor, having A drain, a gate and a source; an OLED component coupled between the source and a negative reference voltage; a storage capacitor coupled between the gate and a reference ground; A second switch, coupled between the power supply node and the drain, controls the conduction and disconnection of its channel according to a second switch signal; a third switch, coupled between the power supply node and the gate time, controlling the conduction and disconnection of its channel according to a third switch signal; and a fourth switch, coupled between the source and a data voltage, controlling the conduction and disconnection of its channel according to a fourth switch signal. Disconnected; during operation, the OLED pixel circuit structure has a reset phase, a sampling phase and a holding phase, wherein, in the reset phase, the first switch signal, the second switch signal, the third The switch signal and the fourth switch signal respectively present an active state, an inactive state, an active state and an inactive state; in the sampling phase, the first switch signal, the second switch signal, the third switch signal and the third switch signal The four switch signals respectively present an inactive state, an active state, an active state and an active state; and in the holding phase, the first switch signal, the second switch signal, the third switch signal and the fourth switch signal respectively present Active state, active state, inactive state and inactive state. In the OLED display device described in claim 6 of the patent application, the first switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. In the OLED display device described in claim 6 of the patent application, the second switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. In the OLED display device described in claim 6 of the patent application, the third switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. In the OLED display device described in claim 6 of the patent application, the fourth switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS circuit. An information processing device having a central processing unit and the OLED display device as described in any one of items 6 to 10 of the patent application scope, wherein the central processing unit is used to communicate with the OLED display device. The information processing device described in Item 11 of the patent application is an electronic device selected from the group consisting of a smart handheld device, a portable computer, a wearable device and a television.