TWI804827B - Physical vapor deposition chamber and method of using the same - Google Patents
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本揭露是關於一種物理氣相沉積反應室及其使用方法。The present disclosure relates to a physical vapor deposition reaction chamber and a method for using the same.
物理氣相沉積(Physical vapor deposition; PVD)或濺射為用於製造電子元件之製程。PVD為在真空腔室中執行之電漿製程,其中負偏壓之靶材暴露於具有相對重原子之惰性氣體(例如,氬氣(Ar))或包含此種惰性氣體之氣體混合物的電漿。惰性氣體之離子對靶之轟擊導致靶材之原子的噴射。所噴射之原子作為沉積膜累積在基板上,此基板係放置在設置於腔室內之基板支撐底座上。Physical vapor deposition (PVD) or sputtering is a process used in the manufacture of electronic components. PVD is a plasma process performed in a vacuum chamber in which a negatively biased target is exposed to a plasma of an inert gas with relatively heavy atoms, such as argon (Ar) or a gas mixture containing such an inert gas . Bombardment of the target by ions of the noble gas results in the ejection of atoms of the target. The ejected atoms are accumulated as a deposited film on a substrate placed on a substrate support base provided in the chamber.
本揭露的實施例為一種物理氣相沉積反應室的使用方法,包含將基板移動至半導體處理腔室的基板支撐件上方,其中基板支撐件被沉積環環繞;執行沉積製程,沉積製程藉由轟擊半導體處理腔室內的靶材,使靶材的材料沉積至基板上方,其中在沉積製程期間,靶材的材料沉積至沉積環的沉積槽內,其中沉積材料與沉積環的底表面的最小垂直距離為約1.78mm至約1.82mm;以及停止沉積製程以及將基板移出半導體處理腔室。An embodiment of the present disclosure is a method for using a physical vapor deposition reaction chamber, including moving a substrate above a substrate support in a semiconductor processing chamber, wherein the substrate support is surrounded by a deposition ring; performing a deposition process, the deposition process is carried out by bombardment A target in a semiconductor processing chamber for depositing material of the target onto a substrate, wherein during a deposition process, material of the target is deposited into a deposition slot of a deposition ring, wherein the deposition material has a minimum vertical distance from the bottom surface of the deposition ring from about 1.78 mm to about 1.82 mm; and stopping the deposition process and removing the substrate from the semiconductor processing chamber.
本揭露的實施例為一種物理氣相沉積反應室的使用方法,包含將基板移動至半導體處理腔室的基板支撐件上方,其中基板支撐件被沉積環環繞;執行沉積製程,沉積製程藉由轟擊半導體處理腔室內的靶材,使靶材的材料沉積至基板上方,其中在沉積製程期間,靶材的材料具有第一部份沉積至基板的側表面,以及第二部分沉積至沉積環的沉積槽內;調整半導體處理腔室上方的RF源的功率,其中在功率大於約2000千瓦時,材料的第一部分與第二部分仍保持分離;以及停止沉積製程以及將基板移出半導體處理腔室。An embodiment of the present disclosure is a method for using a physical vapor deposition reaction chamber, including moving a substrate above a substrate support in a semiconductor processing chamber, wherein the substrate support is surrounded by a deposition ring; performing a deposition process, the deposition process is carried out by bombardment A target within a semiconductor processing chamber for depositing a material of the target onto a substrate, wherein during a deposition process, the material of the target has a first portion deposited to a side surface of the substrate and a second portion deposited to a deposition ring within the tank; adjusting the power of the RF source above the semiconductor processing chamber, wherein the first portion of material remains separated from the second portion at powers greater than about 2000 kilowatts; and stopping the deposition process and removing the substrate from the semiconductor processing chamber.
本揭露的實施例為一種物理氣相沉積反應室,包含處理腔室;基板支撐件,配置於處理腔室內,並用於支撐基板;沉積環,配置於在沉積製程期間環繞基板支撐件,沉積環具有內周邊表面,其中內周邊表面的內直徑為約294.10mm至約294.20mm,沉積環還包含至少一延伸部,延伸部徑向地向內延伸,並配置於嵌合基板支撐件的凹陷,其中延伸部的厚度為約1.9mm至約2.1mm;以及RF源,配置於處理腔室的上方。An embodiment of the present disclosure is a physical vapor deposition reaction chamber, including a processing chamber; a substrate support configured in the processing chamber and used to support the substrate; a deposition ring configured to surround the substrate support during the deposition process, the deposition ring having an inner peripheral surface, wherein the inner diameter of the inner peripheral surface is from about 294.10 mm to about 294.20 mm, the deposition ring further includes at least one extension extending radially inwardly and configured to engage the recess of the substrate support, Wherein the thickness of the extension part is about 1.9 mm to about 2.1 mm; and the RF source is arranged above the processing chamber.
以下揭露內容提供許多不同實施例或實例,用於實施提供的標的的不同特徵。以下描述組件及配置的具體實例以簡化本揭露內容。當然,此等僅為實例,且並不意欲為限制性。舉例而言,在接下來的描述中,第一特徵在第二特徵上方或上的形成可包括第一與第二特徵直接接觸地形成的實施例,且亦可包括額外特徵可形成於第一與第二特徵之間使得第一與第二特徵可不直接接觸的實施例。此外,在各種實例中,本揭露內容可重複參考數字及/或字母。此重複係為了簡單且清晰的目的,且自身並不規定論述的各種實施例及/或組態之間的關係。The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and configurations are described below to simplify the present disclosure. Of course, these are examples only, and are not intended to be limiting. For example, in the ensuing description, the formation of a first feature over or on a second feature may include embodiments where the first feature is formed in direct contact with the second feature, and may also include that additional features may be formed on the first feature. An embodiment in which the first and second features may not be in direct contact with the second feature. Additionally, in various instances, the present disclosure may repeat reference numbers and/or letters. This repetition is for simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
另外,為了易於描述,諸如「在……之下(beneath)」、「在……下方(below)」、「下部(lower)」、「在……上方(above)」及「上部(upper)」及類似者的空間相對術語可在本文中用以描述如在圖中圖示的一個元件或特徵與另一元件或特徵的關係。除了圖中描繪的定向之外,該些空間相對術語意欲亦涵蓋在使用或操作中的元件的不同定向。可將設備以其他方式定向(旋轉90度或以其他定向),且同樣地可將本文中使用的空間相對描述詞相應地作出解釋。In addition, for ease of description, words such as "beneath", "below", "lower", "above" and "upper" ” and the like may be used herein to describe the relationship of one element or feature to another element or feature as illustrated in the figures. These spatially relative terms are intended to encompass different orientations of elements in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
本揭露之實施方式大致提供一種處理腔室,及一種用於執行物理氣相沉積(PVD)製程之基板處理方法。處理腔室為真空腔室,其包含靜電吸盤(electrostatic chuck, ESC)以支撐並保持基板,藉由靶材之轟擊而噴射之原子在PVD處理期間沉積在此些基板上。靜電吸盤包含陶瓷球,此陶瓷球在其中具有一或更多個電極。向電極施加夾持電壓以便以靜電方式將基板保持至靜電吸盤。PVD製程可導致再沉積,且再沉積材料(例如,AlO)在沉積環上之量可能影響PVD沉積的品質。Embodiments of the present disclosure generally provide a processing chamber and a substrate processing method for performing a physical vapor deposition (PVD) process. The processing chamber is a vacuum chamber that includes an electrostatic chuck (ESC) to support and hold substrates on which atoms ejected by bombardment of targets are deposited during PVD processing. An electrostatic chuck contains a ceramic ball that has one or more electrodes therein. A clamping voltage is applied to the electrodes to electrostatically hold the substrate to the electrostatic chuck. The PVD process can cause redeposition, and the amount of redeposited material (eg, AlO) on the deposition ring can affect the quality of the PVD deposition.
覆蓋環、沉積環及接地屏蔽係設置在真空腔室中,以在真空腔室內相對於基板來界定處理區域。接地屏蔽與覆蓋環交錯以限制電漿。限制至處理區域之電漿及噴射原子限制了靶材在腔室中之其他部件上的沉積,並促成更高效地使用靶材,因為相對較高百分比之噴射原子被沉積在基板上。A cover ring, a deposition ring, and a ground shield are disposed in the vacuum chamber to define a processing area within the vacuum chamber relative to the substrate. Ground shields are interleaved with cover rings to confine plasma. Confining the plasma and ejected atoms to the processing region limits the deposition of the target on other components in the chamber and enables more efficient use of the target because a relatively higher percentage of the ejected atoms are deposited on the substrate.
靜電吸盤(ESC)支撐沉積環且藉由升舉機構耦接至真空腔室之底部,此升舉機構用以使靜電吸盤(ESC)及沉積環在上部與下部位置之間移動。在操作期間,覆蓋環亦被升高及降低。當升高時,覆蓋環與接地屏蔽垂直分離開。當降低時,覆蓋環的部分被接收在接地屏蔽的部分內。An electrostatic chuck (ESC) supports the deposition ring and is coupled to the bottom of the vacuum chamber by a lift mechanism for moving the electrostatic chuck (ESC) and deposition ring between upper and lower positions. During operation, the cover ring is also raised and lowered. When raised, the cover ring separates vertically from the ground shield. When lowered, portions of the cover ring are received within portions of the ground shield.
當靜電吸盤處於上升位置時,覆蓋環及接地屏蔽彼此垂直地分離。在處理操作期間,來自靶材之沉積材料亦沉積在沉積環上。電弧(arcing)效應可能不經意地發生在基板與半導體處理腔室的其他組件之間,且發生的條件有許多種。舉例來說,電弧可能發生在當沉積環上的沉積材料滿出並接觸到基板。並造成局部大電流。電弧可能對製程的品質是有害的,因此,如何降低或消除PVD製程中的電弧效應,是必須解決的問題。When the electrostatic chuck is in the raised position, the cover ring and the ground shield are vertically separated from each other. During processing operations, deposition material from the target is also deposited on the deposition ring. Arcing effects can inadvertently occur between a substrate and other components of a semiconductor processing chamber and under a variety of conditions. For example, arcing may occur when the deposition ring is full of deposition material and contacts the substrate. And cause a local large current. Arcing may be detrimental to the quality of the process. Therefore, how to reduce or eliminate the arcing effect in the PVD process is a problem that must be solved.
第1圖繪示半導體處理腔室100,其包含一片式接地屏蔽160及覆蓋環170。接地屏蔽160及覆蓋環170包含用以處理設置在處理區域110或電漿區域中之基板105的處理套組,其亦包含支撐在底座組件120上之沉積環180。在一些實施方式中,半導體處理腔室100包含用於在基板105上沉積來自靶材132之單一成分或多成分材料之濺射腔室,亦稱為物理氣相沉積或PVD腔室。半導體處理腔室100亦可用以沉積鋁、銅、鎳、鉑、鉿、銀、鉻、金、鉬、矽、釕、鉭、氮化鉭、碳化鉭、氮化鈦、鎢、氮化鎢、鑭、氧化鋁、氧化鑭、鎳鉑合金,及鈦,及/或其組合。預期其他處理腔室亦可適於受益於所揭露實施方式。沉積環180具有環繞基板支撐件126之環形形狀,並將在後續作更深入討論。在部分實施例中,沉積環180可由陶瓷或金屬材料製成,像是,石英、氧化鋁、不銹鋼、鈦或其他適當材料。覆蓋環170由抗濺射電漿的侵蝕之材料製成,例如,金屬材料或陶瓷材料。FIG. 1 shows a
半導體處理腔室100包含腔室主體101,其具有封閉處理區域110之側壁104、底壁106及上部處理組件108。將處理區域110定義為在處理期間在基板支撐件126上方之區域(例如,當處於處理位置時在靶材132與基板支撐件126之間)。藉由機械加工及焊接不銹鋼板或藉由機械加工單個鋁塊來製造腔室主體101。在一個實施方式中,側壁104包含鋁或電鍍有鋁,且底壁106包含或電鍍有不銹鋼。側壁104通常含有狹縫閥,以提供基板105自半導體處理腔室100進出。與接地屏蔽160、底座組件120及覆蓋環170協作之在半導體處理腔室100之上部處理組件108中的部件將在處理區域110中形成之電漿限制在基板105上方的區域中。The
自半導體處理腔室100之底壁106支撐底座組件120。底座組件120在處理期間支撐沉積環180連同基板105。底座組件120藉由升舉機構122耦接至半導體處理腔室100之底壁106,此升舉機構122用以在基板105上之靶材在沉積期間的上部處理位置與基板105被傳送至底座組件120上的下部傳送位置之間升高及降低底座組件120。另外,在下部傳送位置處,升舉銷123移動經過底座組件120,以使基板105與底座組件120分隔開,以便於藉由設置在半導體處理腔室100外部之基板傳送機構(像是,單片機器人)來交換基板105。波紋管124通常設置在底座組件120與底壁106之間,以將腔室主體101之處理區域110與底座組件120之內部及腔室之外部隔離開。The
底座組件120包含密封地耦接至平臺外殼128之基板支撐件126。平臺外殼128通常由金屬材料製成,像是,不銹鋼或鋁。冷卻板通常設置在平臺外殼128內以熱調節基板支撐件126。基板支撐件126由鋁或陶瓷製成。基板支撐件126具有基板接收表面127,其在處理期間接收並支撐基板105,此基板接收表面127大體上平行於靶材132之濺射表面133。基板支撐件126亦具有周邊邊緣129,此周邊邊緣129在基板105之伸出邊緣之前終止。The
在一些實施方式中,基板支撐件126為靜電吸盤、陶瓷主體、加熱器或其組合。在一個實施方式中,基板支撐件126為包含介電主體之靜電吸盤,此介電主體具有內嵌於其中之電極126A或導電層。介電主體由高熱導率之介電材料製成,像是,熱解氮化硼、氮化鋁、氮化矽、氧化鋁或均等材料。在一些實施方式中,電極126A經配置以使得當藉由靜電吸盤電源143將DC電壓施加至電極126A時,設置在基板接收表面127上之基板105將以靜電方式夾持至此些電極126A,以提高基板105與基板支撐件126之間的傳熱。在其他實施方式中,阻抗控制器141亦耦接至電極(導電層)126A,以使得可在處理期間維持基板上之電壓以影響與基板105之表面的電漿相互作用。In some embodiments, the
在一些實施方式中,平臺外殼128包含具有適當地與上覆基板支撐件126之熱性質匹配的材料。舉例來說,平臺外殼128包含陶瓷與金屬之複合物(像是,鋁矽碳化物),其與陶瓷相比提供了改良的強度及耐久性,且亦具有改良的傳熱性質。複合材料具有與基板支撐件126的材料匹配之熱膨脹係數,以減少熱膨脹失配。在一些實施方式中,複合材料包含具有被金屬滲透之孔的陶瓷,此金屬至少部分地填充此些孔以形成複合材料。陶瓷包含例如碳化矽、氮化鋁、氧化鋁或堇青石中之至少一者。陶瓷包含為總體積的約20體積%至約80體積%之孔體積,其餘體積屬於滲透金屬。滲透金屬包含添加有矽的鋁,且亦含有銅。在一些實施方式中,複合物包含陶瓷及金屬之不同成分,像是,具有分散的陶瓷顆粒之金屬,或平臺外殼128可僅由金屬製成,像是,不銹鋼或鋁。冷卻板設置在平臺外殼128內以熱調節基板支撐件126。In some embodiments, the
半導體處理腔室100受系統控制器190控制,此系統控制器190促進半導體處理腔室100之控制及自動化,且通常包含中央處理單元(CPU)、記憶體及支援電路(或I/O)。CPU可為用於工業設置中之任何形式的電腦處理器中之一者,用於控制各種系統功能、基板移動、腔室處理及支援硬體(例如,感測器、機器人、馬達等)並監控製程(例如,基板支持溫度、電源變量、腔室製程時間、I/O信號,等等)。記憶體連接至CPU,且可為易獲記憶體中之一或更多者,像是,隨機存取記憶體(RAM)、唯讀記憶體(ROM)、軟碟、硬碟,或任何其他形式之數位儲存器,本端的或遠端的。軟體指令及資料可被編碼並儲存在記憶體內,用於指示CPU。支援電路亦連接至CPU,用於以習知方式支援處理器。支援電路包含快取記憶體、電源、時鐘電路、輸入/輸出電路系統、子系統,及其類似者。可由系統控制器190讀取之程式(或電腦指令)決定在基板上執行哪些任務。此程式為可由系統控制器190讀取之軟體,其包含用以執行與運動之監控、執行及控制有關的任務之代碼,及要在半導體處理腔室100中執行之各種製程配方任務及配方步驟。舉例來說,系統控制器190包含程式碼,其包含:基板定位指令集,用以操作底座組件120;氣體流量控制指令集,用以操作氣體流量控制閥以設定至半導體處理腔室100之濺射氣體的流量;氣體壓力控制指令集,用以操作節流閥或閘閥以維持半導體處理腔室100中之壓力;溫度控制指令集,用以控制在底座組件120或側壁104中之溫度控制系統以分別設定基板或側壁104之溫度;及製程監控指令集,用以監控半導體處理腔室100中之製程。
上部處理組件108包含射頻(Radio frequency;RF)源181、直流(DC)源182、配接器102、馬達193及蓋組件130。蓋組件130包含靶材132、磁控系統189及蓋殼191。如第1圖中所示,當處於關閉位置時,上部處理組件108由側壁104支撐。陶瓷靶材隔離件136設置在靶材132與蓋組件130的配接器102之間,以限制其間之真空洩漏。配接器102密封地耦接至側壁104,且用以幫助移除上部處理組件108。The
靶材132被設置成與配接器相鄰,且暴露於半導體處理腔室100之處理區域110。靶材132提供了在PVD製程期間沉積於基板上之材料。The
在處理期間,藉由設置在RF源181及/或DC源182中之功率源140相對於地(例如,腔室主體101)用RF及/或DC功率將靶材132偏壓。在一個實施方式中,RF源181包含RF功率源181A及RF匹配器181B,其用以高效地將RF能量傳遞至靶材132。During processing,
在處理期間,自氣源142經由導管144將氣體(例如,氬氣)供應至處理區域110。在部分實施例中,氣源142包含像是氬氣或氙氣之非反應性氣體,其能夠以能量的方式撞擊靶材132並自靶材132濺射材料。氣源142亦包含反應性氣體(例如,含氧氣體、含氮氣體、含甲烷氣體中之一或更多者),其與濺射材料反應以在基板上形成層。廢製程氣體及副產物經由排氣埠146自半導體處理腔室100排出,此些排氣埠146接收廢製程氣體並將廢製程氣體導向至排氣導管148,此些排氣導管148具有可調整位置之閘閥147以控制半導體處理腔室100中之處理區域110中的壓力。排氣導管148連接至一或更多個排氣泵149。通常,將半導體處理腔室100中之濺射氣體的壓力設定為次大氣壓水平(像是,真空環境),例如,約0.6 毫托至約400毫托之壓力。由基板105與靶材132之間的氣體形成電漿。電漿內之離子朝向靶材132加速,並導致材料自靶材132脫落。脫落之靶材料沉積在基板105上。During processing, a gas (eg, argon) is supplied to the
蓋殼191包含導電壁185、中心饋電184及屏蔽罩186。在此配置中,導電壁185、中心饋電184、靶材132及馬達193的一部分封閉並形成背面區域134。背面區域134係設置在靶材132之背側上的密封區域,且在處理期間通常填充有流動液體以移除處理期間在靶材132處所產生之熱。在一個實施方式中,導電壁185及中心饋電184用以支持馬達193及磁控系統189,以使得馬達193可在處理期間使磁控系統189旋轉。在一些實施方式中,馬達193與自電源傳遞之RF或DC功率電隔離。屏蔽罩186包含一或更多種介電材料,其被定位成封閉並限制傳遞至靶材132之RF能量以免干擾並影響設置在群集工具103中之其他處理腔室。The
接地屏蔽160由腔室主體101支撐,並圍繞面向基板支撐件126之濺射靶材132的濺射表面133。接地屏蔽160亦環繞基板支撐件126之周邊邊緣129。接地屏蔽160覆蓋半導體處理腔室100的側壁104,以減少源自濺射靶材132之濺射表面133的濺射沉積物至接地屏蔽160背後之部件及表面上的沉積。A
當基板支撐件126處於下部的裝載位置(如第1圖中所繪示)時,覆蓋環170靠在接地屏蔽160上。當基板支撐件126處於上部(升高的)沉積位置時,覆蓋環170緊鄰沉積環180並與其分離。在沉積位置處,覆蓋環170保護基板支撐件126免於濺射沉積。The
半導體處理腔室100亦包含RF感應器300。在部分實施例中,RF感應器300耦接至基板支撐件126,並偵測施加至基板支撐件126周圍的電壓變化或是電流變化。在部分實施例中,RF感應器300可用於感應RF電壓或是RF電流,並產生一電壓訊號。此電壓訊號可以透過如系統控制器190處理,並產生一輸出訊號。系統控制器190可進一步地將輸出訊號與一參考訊號進行比較。此參考訊號可為預設的參考電壓或是預設的參考電流。若輸出訊號大於參考訊號,例如偵測到的電壓(或電流)大於參考電壓(或電流),則系統控制器190輸出電弧警報(arcing alarm)。在部分實施例中,若出現電弧警報,則系統控制器190將會自動關閉半導體處理腔室100內的主動元件,例如DC電源182A,或其他電源產生裝置。The
第2A圖為第1圖中所示之沉積環180的俯視圖。沉積環180包含為環形或圈形之主體200。舉例來說,主體200可以視為內部具有一圓形開口的一環型結構。主體200包含內直徑210及外直徑220。此處,內直徑可視為為主體200可以視為內部的圓型開口的直徑,或可視為主體200環狀結構的內圓周直徑。另一方面,外直徑可是為主體200的環狀結構外圓周的直徑。在部分實施例中,內直徑210的長度範圍約自294.10mm至約294.20mm。例如,在部分實施例中直徑210的長度為294.15mm。在部分實施例中,內直徑210的長度至少小於約294.488mm。若內直徑210的寬度過大,例如大於294.488mm,或者大於約294.20mm,沉積環180與基板支撐件126之間的空隙將會過大,使得在製程期間的震動將會導致沉積品質不佳。本揭露提供一種減少沉積環180的主體200之內直徑210的設計,使得沉積環180與基板支撐件126之間的空隙減少,進而增加震動時的穩定度,並可有效地減少製程期間沉積環180晃動的狀況。FIG. 2A is a top view of the
在部分實施例中,內直徑210的長度可略小於基板105(請參閱第1圖)之直徑。在部分實施例中,主體200可由陶瓷材料(像是,氧化鋁(Al
2O
3))製成,且藉由燒結製程形成。
In some embodiments, the length of the
主體200包含一或更多個延伸部230A、230B及230C。延伸部230A至230C可作為主體200之內直徑210徑向地向內延伸的定位結構。在一個實施方式中,延伸部230A至230C可分別嵌入在基板支撐件126上的凹陷中,可進一步穩定沉積環180與基板支撐件126的接合。在部分實施例中,延伸部230A至230C相對於基板支撐件126以特定定向設置沉積環180之主體200。此可允許將沉積環180自基板支撐件126移除以進行清潔或替換,且在保證沉積環180與基板支撐件126之間的正確對準的同時安裝在基板支撐件126上。The
在一些實施方式中,延伸部230A至230C中之每一者沿主體200以相等之角度間隔(例如,約120度)放置。在其他實施方式中,延伸部230A至230C以不規則的角度間隔間距放置。舉例來說,角度α可為約90度至約100度,而角度β可為約130度至約135度。延伸部230A至230C被用作分度特徵,以確保沉積環180相對於基板支撐件126處於特定定向。In some embodiments, each of the
延伸部230A至230C中之每一者包含圓周面235,此圓周面235自主體200之內周邊表面240徑向地向內延伸。圓周面235藉由在圓周面235之每一側上的過渡表面245與主體200介面連接。過渡表面245可為尖角或輪廓表面,像是,斜面、圓形或錐形表面。延伸部230A至230C中之每一者亦可包含與沉積環180之主體200共面的上部表面250。上部表面250為大體上平坦的,且圓周面235自上部表面250之平面向下地(在Z方向上)延伸約90度。在部分實施例中,圓周面235為圓弧形的,也就是說,圓周面235上之任一點至主體200的圓心為等距。在其他實施例中,圓周面235在過渡表面245之間為平直的或平面的。Each of the
在部分實施例中,基板支撐件126之周邊邊緣129的直徑約為294mm。在部分實施例中,基板支撐件126具有足夠大的高度,以將基板105與沉積環180之水平表面垂直地分隔開(如第5A圖所示)。In some embodiments, the diameter of the
請參照第2B圖,第2B圖為第2A圖的沉積環180與基板支撐件126的局部放大圖。詳細而言,第2B圖圖示了延伸部230B與基板支撐件126之間的相對關係。Please refer to FIG. 2B , which is a partially enlarged view of the
第2B圖中,基板支撐件126具有一凹陷126R,其中凹陷126R可以視為自基板支撐件126的外圓周向基板支撐件126的的圓心方向延伸的一缺口。在部分實施例中,凹陷126R的形狀實質上和延伸部230B的形狀吻合,以穩定地將延伸部230B固定在基板支撐件126的凹陷126R中。In FIG. 2B , the
在部分實施例中,延伸部230B具有一厚度T1。此處,「厚度」可定義為,在通過主體200的直徑方向上,圓周面235與主體200的內直徑210(如虛線所示)的水平距離。在部分實施例中,厚度T1的範圍約自1.9mm至約2.1mm。例如,在部分實施例中厚度T1為2.0mm。在部分實施例中,厚度T1的長度至少大於約1.45mm。此厚度可以確保延伸部230B(亦包括延伸部230A與230C)更穩固地和基板支撐件126的凹陷126R嵌合,並降低沉積環180在製程期間的晃動,以提升沉積品質。若厚度T1過小,例如小於1.45mm,則延伸部230B(亦包括延伸部230A與230C)與基板支撐件126的凹陷126R之間的距離可能過大,使得沉積環180在製程期間產生較劇烈的晃動,因而降低沉積品質。In some embodiments, the
應了解,第2A圖中的延伸部230A與230C和第2B圖所討論的延伸部230B具有類似的結構,為簡化起見,本為僅以延伸部230B作為範例進行討論。It should be understood that the
請參照第2C圖,第2C圖為沿著第2A圖的C-C線的剖面圖。如圖所示,在靠近沉積環180的主體200的內周邊表面240處,有一沉積槽260。沉積槽260的用途為,在處理操作期間,來自靶材之沉積材料可堆積在沉積槽260內,以限制沉積材料的移動。Please refer to FIG. 2C, which is a cross-sectional view along line C-C of FIG. 2A. As shown, near the inner
沉積槽260靠近內周邊表面240處的最上緣261與內周邊表面240具有一水平距離D1。在部分實施例中,水平距離D1的範圍約自1.60mm至約1.64mm。例如,在部分實施例中水平距離D1為1.62mm。在部分實施例中,水平距離D1的長度至少大於約1.45mm。此處,「水平距離D1」亦可以視為沉積環180的「內圈厚度」。如前述所提及,本揭露提供一種減少沉積環180的內直徑210的設計,而足夠厚大的「內圈厚度」可以確保在製程期間,晶圓的背面不會有過多的部分延伸到沉積槽260的上方,以降低沉積槽260內的沉積材料黏附在晶圓的背面的風險。若水平距離D1過小,例如小於1.45mm,則意味著沉積槽260的邊緣會更靠內周邊表面240,使得晶圓的背面會有過多的部分曝露於沉積槽260上方,進而增加黏片的風險。The
在部分實施例中,沉積槽260的底部具有實質上水平的表面262,此水平底表面262大致上與沉積環180的主體200的底表面202平行。沉積槽260從靠近內周邊表面240處的最上緣261垂直向下延伸形成一垂直表面263,此垂直表面263大致上與沉積環180的主體200的內周邊表面240平行,或者與與沉積環180的主體200的底表面202垂直。此外,沉積槽260的垂直表面263和水平底表面262透過一圓弧形表面264連接。In some embodiments, the bottom of the
在部分實施例中,水平底表面262和主體200的底表面202之間具有一垂直距離D2。在部分實施例中,垂直距離D2的範圍約自1.78mm至約1.82mm。例如,在部分實施例中垂直距離D2為1.8mm。在部分實施例中,垂直距離D2至少小於約2.24mm。此處,垂直距離D2可以視為主體200在沉積槽260處的厚度。本揭露提供了一種減少主體200在沉積槽260處的厚度的設計,可以增加沉積槽260的容量,進而增加容納製程期間沉積材料的空間,以避免沉積材料自沉積槽260中滿出而造成電弧效應(Arcing)。若垂直距離D2太大,例如大於於約2.24mm,則製程期間可能因為沉積槽260太淺使得沉積材料自沉積槽260中滿出而產生電弧效應,因而降低沉積品質。In some embodiments, there is a vertical distance D2 between the
圓弧形表面264具有一曲率半徑R以及一曲率中心C。在部分實施例中,曲率半徑R的範圍約自2.65mm至約2.75mm。例如,曲率半徑R可為約2.7mm。以曲率中心C為基準,向下延伸有一垂直線(如虛線所示),而在曲率半徑R和此垂直線的夾角θ處,曲率半徑R和圓弧形表面264具有一交點。交點和主體200的底表面202之間具有一垂直距離D3。在部分實施例中, 夾角θ的範圍約為27度至約30度。在部分實施例中,垂直距離D3的範圍約為2.40mm至約2.41mm。此處,垂直距離D3可以視為主體200在圓弧形表面264的該交點處的厚度。若曲率半徑R太小(例如小於約2.24mm),則會間接造成垂直距離D3(或交點處的厚度)降低,進而增加製程期間破損的風險。若曲率半徑R太大,則會間接減少沉積槽260內的空間,進而減少沉積槽260容納沉積材料的量。The arc-shaped
第3圖為本揭露之部分實施例之覆蓋環的剖面圖。覆蓋環170包含內環151及外環152。內環151及外環152向下延伸並相互分離以界定一狹槽,以便允許與處理腔室之沉積屏蔽的端部接合。覆蓋環170進一步包含座154及錐形部分156。錐形部分156確保了覆蓋環170與沉積環180之間的正確對準。覆蓋環170包含徑向地向內延伸之唇部171,唇部171包含呈弧形之內部表面162。FIG. 3 is a cross-sectional view of a cover ring according to some embodiments of the present disclosure. The
第4圖示出了根據本揭示的一些實施例的操作半導體處理腔室的方法M1。儘管將方法M1示出及/或描述為一系列動作或事件,將瞭解方法不限於所示出的次序或動作。因此,在一些實施例中,動作可以與所示出者不同的次序執行、及/或可同時執行。另外,在一些實施例中,所示出的動作或事件可分為多個動作或事件,此等動作或事件可分多次執行或與其他動作或子動作同時。在一些實施例中,一些示出的動作或事件可省去,並且其他未示出的動作或事件可包括在內。FIG. 4 illustrates a method M1 of operating a semiconductor processing chamber in accordance with some embodiments of the present disclosure. Although method M1 is shown and/or described as a series of acts or events, it is to be understood that the method is not limited to the shown order or acts. Accordingly, in some embodiments, acts may be performed in an order different from that shown, and/or may be performed concurrently. In addition, in some embodiments, the illustrated actions or events can be divided into multiple actions or events, and these actions or events can be performed multiple times or simultaneously with other actions or sub-actions. In some embodiments, some illustrated acts or events may be omitted, and other not-illustrated acts or events may be included.
請參照第4圖及第1圖及第5A圖,其中第5A圖半導體處理腔室的元件相對位置的剖面圖。詳細而言,第5A圖繪示了在製程期間,基板105、基板支撐件126、沉積環180,以及覆蓋環170之間的相對位置。應了解,第4圖的剖面相同於第2C圖之剖面。Please refer to FIG. 4 , FIG. 1 and FIG. 5A , wherein FIG. 5A is a cross-sectional view of relative positions of components in a semiconductor processing chamber. In detail, FIG. 5A illustrates the relative positions of the
方法M1開始於操作S101,將基板傳送至半導體處理腔室。如圖所示,基板105被傳送至半導體處理腔室中(如第1圖之半導體處理腔室100)。基板105置放於基板支撐件126上方,沉積環180耦接並環繞基板支撐件126。在部分實施例中,基板105的端部延伸至沉積環180的沉積槽260上方。在部分實施例中,基板105的端部在垂直方向上至少與沉積槽260的一部份重疊。接地屏蔽160的端部嵌入至覆蓋環170的內環151及外環152之間的狹槽。在部分實施例中,覆蓋環170的唇部171至少部分延伸至沉積槽260上方。The method M1 begins with operation S101 of transferring a substrate to a semiconductor processing chamber. As shown, the
請參照第4圖及第1圖及第5B圖。方法M1執行至操作S102,執行沉積製程。詳細而言,操作S102為執行一物理氣相沉積製程,在此步驟中,藉由開啟如第1圖所示的RF源181及/或DC源182,用RF及/或DC功率將靶材132偏壓。同一時間,自氣源142經由導管144將氣體(例如,氬氣)供應至處理區域110。在部分實施例中,氣源142包含像是氬氣或氙氣之非反應性氣體,其能夠以能量的方式撞擊靶材132並自靶材132濺射材料,使得濺射材料得以沉積在基板105上方。在部分實施例中,靶材132的材料可為鋁銅,而沉積在基板105上方的材料可為鋁銅,其中鋁的比例約為99.5%,而銅的比例約為0.5%。在部分實施例中,RF功率源181A的範圍約0千瓦(kWh)與約2000千瓦(kWh)之間。在部分實施例中,DC源182中之DC電源182A傳遞約0千瓦(kWh)與約50千瓦(kWh)之間的DC功率。Please refer to Figure 4, Figure 1 and Figure 5B. The method M1 is executed to operation S102 to perform a deposition process. In detail, operation S102 is to perform a physical vapor deposition process. In this step, by turning on the
第5B圖圖示當RF功率約在2000千瓦下的狀態。如圖所示,濺射材料具有第一部份400A沉積在基板105上方,以在基板105上形成材料層。另一方面,濺射材料亦可能有第二部分400B沉積至基板105的側表面,以及第三部分400C沉積至沉積環180的沉積槽260中。在部分實施例中,在高RF功率的條件下(例如大於約2000千瓦),沉積的速度將會增加,使得沉積環180的沉積槽260將會快速地被濺射材料填補。然而,如第2A圖至第2C圖所討論,根據本揭露所設計的沉積環180,沉積環180的沉積槽260具有更多的容納空間,使得在高RF功率的條件下,沉積槽260並未完全被濺射材料(例如,第三部分400C)填滿。詳細而言,在高RF功率(例如大於約2000千瓦)的條件下,由於濺射材料的第三部分400C並未完全填滿沉積槽260,因此濺射材料的第三部分400C並不會滿出並與第二部分400B接觸。在部分實施例中,若沉積環180並未依據本揭露之設計,則在高RF功率(例如大於約1760千瓦)的條件下,濺射材料的第三部分400C將會滿出並與第二部分400B接觸而造成電弧,進而降低沉積的品質。因此,根據本揭露所提供的實施例,在高RF功率(例如大於約2000千瓦)的條件下,製程期間將不會產生電弧警報。FIG. 5B illustrates the state when the RF power is about 2000 kilowatts. As shown, the sputtered material has a
在部分實施例中,若濺射材料的第三部分400C接近填滿沉積槽260的狀態下,第三部分400C與沉積環180的底表面202的最小垂直距離相當於距離D2。第三部分400C與沉積環180的內周邊表面240的最小水平距離相當於距離D1。此外,以沉積槽260的圓弧形表面263的曲率中心C為基準,向下延伸有一垂直線(如虛線所示),而在曲率半徑R和此垂直線的夾角為θ處,曲率半徑R和圓弧形表面264具有一交點。第三部分400C在交點處和沉積環180的的底表面202之間的垂直距離相當於距離D3。In some embodiments, if the
請參照第4圖及第1圖。方法M1執行至操作S103,停止沉積製程,並清洗沉積環。舉例來說,可關閉如第1圖所示的RF源181及/或DC源182。接著,可將基板105移出半導體處理腔室100。最後,可將沉積環180自半導體處理腔室100卸下,並清理沉積環180。在部分實施例中,清理沉積環180包括自沉積環260的沉積槽260中移除濺射材料的第三部分400C。Please refer to Figure 4 and Figure 1. The method M1 is executed to operation S103, the deposition process is stopped, and the deposition ring is cleaned. For example,
第6A圖為用作控制器(例如,系統控制器190)之電腦系統的示意圖,此控制器用於執行與運動的監控、執行及控制有關之任務,以及在半導體處理腔室100中執行之各種製程配方任務及配方步驟。可使用電腦硬體及在其上執行之電腦程式實現前述實施方式。在第6A圖中,電腦系統600具備電腦601,此電腦601包含光碟唯讀記憶體(例如,CD-ROM或DVD-ROM)驅動器(光碟機)605及磁碟驅動器(磁碟機)606、鍵盤602、滑鼠603及顯示器604。FIG. 6A is a schematic diagram of a computer system used as a controller (e.g., system controller 190) for performing tasks related to the monitoring, execution, and control of motion and various other tasks performed in
第6B圖為繪示電腦系統600之內部配置的圖式。在第6B圖中,除了光碟機605及磁碟機606以外,電腦601還具備一或更多個處理器611,像是,微處理單元(micro processing unit; MPU);ROM 612,其中儲存有像是啟動程式之程式;隨機存取記憶體(random access memory; RAM)613,其連接至MPU 611且其中臨時儲存應用程式之命令並提供臨時儲存區域;硬碟614,其中儲存有應用程式、系統程式及資料;及匯流排615,其連接MPU 611、ROM 612等。應注意,電腦601可包含用於提供與LAN之連接的網路卡(未繪示)。FIG. 6B is a diagram illustrating the internal configuration of the
用於使電腦系統600執行前述實施方式中所論述之操作/任務的程式碼可被儲存在光碟621或磁碟622中,其被插入至光碟機605或磁碟機606中並被傳輸至硬碟614。或者,可經由網路(未繪示)將程式傳輸至電腦601並將其儲存在硬碟614中。在執行時,程式被加載至RAM 613中。可自光碟621或磁碟622或直接自網路加載程式。The program code for causing the
在程式中,程式所實現之功能不包含在一些實施方式中可僅藉由硬體實現之功能。舉例來說,在藉由上述程式所實現之功能中不包含在獲取資訊之獲取單元或輸出資訊之輸出單元中可僅藉由硬體(像是,網路介面)實現的功能。另外,執行程式之電腦可為單個電腦或可為多個電腦。In the program, the functions realized by the program do not include the functions that can be realized only by hardware in some embodiments. For example, functions that can be realized only by hardware (such as a network interface) in an acquisition unit that acquires information or an output unit that outputs information are not included in the functions realized by the above-mentioned programs. In addition, the computer that executes the program may be a single computer or multiple computers.
本揭露的實施例為一種物理氣相沉積反應室的使用方法,包含將基板移動至半導體處理腔室的基板支撐件上方,其中基板支撐件被沉積環環繞;執行沉積製程,沉積製程藉由轟擊半導體處理腔室內的靶材,使靶材的材料沉積至基板上方,其中在沉積製程期間,靶材的材料沉積至沉積環的沉積槽內,其中沉積材料與沉積環的底表面的最小垂直距離為約1.78mm至約1.82mm;以及停止沉積製程以及將基板移出半導體處理腔室。An embodiment of the present disclosure is a method for using a physical vapor deposition reaction chamber, including moving a substrate above a substrate support in a semiconductor processing chamber, wherein the substrate support is surrounded by a deposition ring; performing a deposition process, the deposition process is carried out by bombardment A target in a semiconductor processing chamber for depositing material of the target onto a substrate, wherein during a deposition process, material of the target is deposited into a deposition slot of a deposition ring, wherein the deposition material has a minimum vertical distance from the bottom surface of the deposition ring from about 1.78 mm to about 1.82 mm; and stopping the deposition process and removing the substrate from the semiconductor processing chamber.
在部分實施例中,其中沉積材料與沉積環的內周邊表面的最小水平距離為約1.60mm至約1.64mm。In some embodiments, the minimum horizontal distance between the deposition material and the inner peripheral surface of the deposition ring is about 1.60 mm to about 1.64 mm.
在部分實施例中,其中沉積環的沉積槽具有一圓弧形表面,圓弧形表面具有一曲率半徑以及一曲率中心,以曲率中心為基準,向下延伸有一垂直線,在曲率半徑和垂直線的夾角為約為27度至約30度處,曲率半徑和圓弧形表面具有一交點,其中沉積材料在交點處與沉積環的底表面的一垂直距離為約2.40mm至約2.41mm。In some embodiments, the deposition groove of the deposition ring has an arc-shaped surface, the arc-shaped surface has a radius of curvature and a center of curvature, and a vertical line extends downwards based on the center of curvature, and the radius of curvature and the vertical The lines have an included angle of about 27 degrees to about 30 degrees, the radius of curvature and the arcuate surface have an intersection, wherein the deposition material is at a perpendicular distance from the bottom surface of the deposition ring of about 2.40 mm to about 2.41 mm at the intersection.
在部分實施例中,其中曲率半徑為約2.65mm至約2.75mm。In some embodiments, the radius of curvature is about 2.65 mm to about 2.75 mm.
本揭露的實施例為一種物理氣相沉積反應室的使用方法,包含將基板移動至半導體處理腔室的基板支撐件上方,其中基板支撐件被沉積環環繞;執行沉積製程,沉積製程藉由轟擊半導體處理腔室內的靶材,使靶材的材料沉積至基板上方,其中在沉積製程期間,靶材的材料具有第一部份沉積至基板的側表面,以及第二部分沉積至沉積環的沉積槽內;調整半導體處理腔室上方的RF源的功率,其中在功率大於約2000千瓦時,材料的第一部分與第二部分仍保持分離;以及停止沉積製程以及將基板移出半導體處理腔室。An embodiment of the present disclosure is a method for using a physical vapor deposition reaction chamber, including moving a substrate above a substrate support in a semiconductor processing chamber, wherein the substrate support is surrounded by a deposition ring; performing a deposition process, the deposition process is carried out by bombardment A target within a semiconductor processing chamber for depositing a material of the target onto a substrate, wherein during a deposition process, the material of the target has a first portion deposited to a side surface of the substrate and a second portion deposited to a deposition ring within the tank; adjusting the power of the RF source above the semiconductor processing chamber, wherein the first portion of material remains separated from the second portion at powers greater than about 2000 kilowatts; and stopping the deposition process and removing the substrate from the semiconductor processing chamber.
在部分實施例中,還包含使用一RF感應器量測基板支撐件周圍的一RF電壓或一RF電流;將量測到的RF電壓或RF電流與一RF參考電壓或一RF參考電流進行比較,若RF電壓或RF電流大於RF參考電壓或RF參考電流,則輸出一電弧警報,其中在功率大於約2000千瓦時,並未出現電弧警報。In some embodiments, further comprising measuring an RF voltage or an RF current around the substrate support using an RF sensor; comparing the measured RF voltage or RF current to an RF reference voltage or an RF reference current , if the RF voltage or RF current is greater than the RF reference voltage or RF reference current, an arc alarm is output, wherein the arc alarm does not occur when the power is greater than about 2000 kW.
在部分實施例中,其中沉積槽的具有一水平底表面及一垂直側表面,水平底表面與與沉積環的一底表面的一垂直距離小於2.24mm,而垂直側表面與沉積環的內周邊表面的水平距離大於1.45mm。In some embodiments, wherein the deposition tank has a horizontal bottom surface and a vertical side surface, the vertical distance between the horizontal bottom surface and a bottom surface of the deposition ring is less than 2.24mm, and the vertical side surface and the inner periphery of the deposition ring The horizontal distance of the surface is greater than 1.45mm.
本揭露的實施例為一種物理氣相沉積反應室,包含處理腔室;基板支撐件,配置於處理腔室內,並用於支撐基板;沉積環,配置於在沉積製程期間環繞基板支撐件,沉積環具有內周邊表面,其中內周邊表面的內直徑為約294.10mm至約294.20mm,沉積環還包含至少一延伸部,延伸部徑向地向內延伸,並配置於嵌合基板支撐件的凹陷,其中延伸部的厚度為約1.9mm至約2.1mm;以及RF源,配置於處理腔室的上方。An embodiment of the present disclosure is a physical vapor deposition reaction chamber, including a processing chamber; a substrate support configured in the processing chamber and used to support the substrate; a deposition ring configured to surround the substrate support during the deposition process, the deposition ring having an inner peripheral surface, wherein the inner diameter of the inner peripheral surface is from about 294.10 mm to about 294.20 mm, the deposition ring further includes at least one extension extending radially inwardly and configured to engage the recess of the substrate support, Wherein the thickness of the extension part is about 1.9 mm to about 2.1 mm; and the RF source is arranged above the processing chamber.
在部分實施例中,其中沉積環具有一沉積槽,沉積槽具有水平底表面及垂直側表面,水平底表面與與沉積環的底表面的最小垂直距離為約1.78mm至約1.82mm,而垂直側表面與沉積環的內周邊表面的一最小水平距離為約1.60mm至約1.64mm。In some embodiments, wherein the deposition ring has a deposition groove, the deposition groove has a horizontal bottom surface and vertical side surfaces, the minimum vertical distance between the horizontal bottom surface and the bottom surface of the deposition ring is about 1.78mm to about 1.82mm, and the vertical A minimum horizontal distance of the side surfaces from the inner peripheral surface of the deposition ring is about 1.60 mm to about 1.64 mm.
在部分實施例中,其中沉積環的沉積槽具有一圓弧形表面,圓弧形表面連接水平底表面及垂直側表面,圓弧形表面具有一曲率半徑以及一曲率中心,以曲率中心為基準,向下延伸有一垂直線,在曲率半徑和垂直線的夾角為約為27度至約30度處,曲率半徑和圓弧形表面具有一交點,其中交點處與沉積環的底表面的一垂直距離約為2.40mm至約2.41mm,且曲率半徑約為2.65mm至約2.75mm。In some embodiments, the deposition tank of the deposition ring has an arc-shaped surface, the arc-shaped surface connects the horizontal bottom surface and the vertical side surface, and the arc-shaped surface has a radius of curvature and a center of curvature, and the center of curvature is used as a reference , extending down a vertical line, where the angle between the radius of curvature and the vertical line is about 27 degrees to about 30 degrees, the radius of curvature and the arcuate surface have an intersection point, wherein the intersection point is perpendicular to a bottom surface of the deposition ring The distance is about 2.40 mm to about 2.41 mm, and the radius of curvature is about 2.65 mm to about 2.75 mm.
前文概括了若干實施例的特徵,使得熟習此項技術者可更好地理解本揭露內容的態樣。熟習此項技術者應瞭解,其可易於將本揭露內容用作用於設計或修改其他處理程序及結構以用於實行相同目的及/或達成本文中介紹的實施例的相同優勢的基礎。熟習此項技術者亦應認識到,此等等效構造不脫離本揭露內容的精神及範疇,且在不脫離本揭露內容的精神及範疇的情況下,其可進行各種改變、取代及更改。The foregoing summarizes features of several embodiments so that those skilled in the art may better understand aspects of the present disclosure. Those skilled in the art should appreciate that this disclosure may be readily utilized as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions and alterations without departing from the spirit and scope of the present disclosure.
100:半導體處理腔室 101:腔室主體 102:配接器 103:群集工具 104:側壁 105:基板 106:底壁 108:上部處理組件 110:處理區域 120:底座組件 122:升舉機構 123:升舉銷 124:波紋管 126:基板支撐件 126A:電極 126R:凹陷 127:基板接收表面 128:平臺外殼 129:周邊邊緣 130:蓋組件 132:靶材 133:濺射表面 134:背面區域 136:陶瓷靶材隔離件 140:功率源 141:阻抗控制器 142:氣源 143:靜電吸盤電源 144:導管 146:排氣埠 147:閘閥 148:排氣導管 149:排氣泵 151:內環 152:外環 154:座 156:錐形部分 157:內圓周端部 159:外圓周表面 160:接地屏蔽 162:內部表面 170:交錯覆蓋環 171:唇部 173:塗層 180:沉積環 181:RF源 181A:RF功率源 181B:RF匹配器 182:DC源 182A:DC電源 184:中心饋電 185:導電壁 186:屏蔽罩 189:磁控系統 190:系統控制器 191:蓋殼 193:馬達 200:主體 202:底表面 210:內直徑 220:外直徑 230A,230B,230C:延伸部 235:圓周面 240:內周邊表面 245:過渡表面 250:上部表面 260:沉積槽 261:上緣 262:表面 263:表面 264:表面 300: RF感應器 400A,400B,400C:部分 600:電腦系統 601:電腦 602:鍵盤 603:滑鼠 604:顯示器 605:光碟機 606:磁碟機 611:MPU 612:ROM 613:RAM 614:硬碟 615:匯流排 621:光碟 622:磁碟 X,Y,Z:方向 α,β:角度 θ:夾角 C-C:線 C:曲率中心 D1,D2,D3:距離 T1:厚度 R:曲率半徑 100: Semiconductor processing chamber 101: Chamber body 102: Adapter 103:Cluster tools 104: side wall 105: Substrate 106: bottom wall 108: Upper handling assembly 110: Processing area 120: base assembly 122: Lifting mechanism 123:Lift pin 124: Bellows 126: substrate support 126A: electrode 126R: concave 127: substrate receiving surface 128: Platform shell 129: Perimeter edge 130: cover assembly 132: target 133:Sputter surface 134: back area 136: ceramic target spacer 140: Power source 141: Impedance controller 142: gas source 143: Electrostatic chuck power supply 144: Conduit 146: exhaust port 147: gate valve 148:Exhaust duct 149: exhaust pump 151: inner ring 152: outer ring 154: seat 156: tapered part 157: Inner circumference end 159: Outer circumference surface 160: Ground shield 162: Internal surface 170:Staggered coverage ring 171: lips 173: coating 180: deposition ring 181: RF source 181A: RF power source 181B: RF matcher 182: DC source 182A:DC power supply 184: Center feed 185: conductive wall 186: shielding cover 189: Magnetic control system 190: System controller 191: cover shell 193: motor 200: subject 202: bottom surface 210: inner diameter 220: outer diameter 230A, 230B, 230C: extension 235: Circumferential surface 240: inner peripheral surface 245: transition surface 250: upper surface 260: deposition tank 261: upper edge 262: surface 263: surface 264: surface 300: RF sensor 400A, 400B, 400C: part 600: Computer system 601: computer 602: keyboard 603: mouse 604: display 605:CD player 606:Disk drive 611: MPU 612:ROM 613: RAM 614: hard disk 615: busbar 621:CD 622:Disk X, Y, Z: direction α, β: angle θ: included angle C-C: line C: Center of curvature D1, D2, D3: distance T1: Thickness R: radius of curvature
當藉由附圖閱讀時,自以下詳細描述,最佳地理解本揭露內容的態樣。注意,根據該行業中的標準實務,各種特徵未按比例繪製。事實上,為了論述的清晰起見,可任意地增大或減小各種特徵的尺寸。 第1圖為本揭露之部分實施例之半導體處理腔室的示意圖。 第2A圖為本揭露之部分實施例之半導體處理腔室的組件的俯視圖。 第2B圖為本揭露之部分實施例之半導體處理腔室的組件的放大圖。 第2C圖為本揭露之部分實施例之半導體處理腔室的組件的剖面圖。 第3圖為本揭露之部分實施例之半導體處理腔室的組件的剖面圖。 第4圖為本揭露之部分實施例之操作半導體處理腔室的方法。 第5A圖至第5B圖為本揭露之部分實施例之半導體處理腔室的組件在不同製程步驟下的剖面圖。 第6A圖及第6B圖為本揭露之部分實施例之電腦系統的示意圖。 Aspects of the present disclosure are best understood from the following Detailed Description when read with the accompanying figures. Note that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. FIG. 1 is a schematic diagram of a semiconductor processing chamber according to some embodiments of the present disclosure. FIG. 2A is a top view of components of a semiconductor processing chamber according to some embodiments of the present disclosure. FIG. 2B is an enlarged view of components of a semiconductor processing chamber according to some embodiments of the present disclosure. FIG. 2C is a cross-sectional view of components of a semiconductor processing chamber according to some embodiments of the present disclosure. FIG. 3 is a cross-sectional view of components of a semiconductor processing chamber according to some embodiments of the present disclosure. FIG. 4 illustrates a method of operating a semiconductor processing chamber according to some embodiments of the present disclosure. 5A to 5B are cross-sectional views of components of a semiconductor processing chamber according to some embodiments of the present disclosure under different process steps. FIG. 6A and FIG. 6B are schematic diagrams of computer systems of some embodiments of the present disclosure.
126:基板支撐件 126: substrate support
180:沉積環 180: deposition ring
200:主體 200: subject
202:底表面 202: bottom surface
240:內周表面 240: inner peripheral surface
260:沉積槽 260: deposition tank
261:上緣 261: upper edge
262:表面 262: surface
263:表面 263: surface
264:表面 264: surface
θ:夾角 θ: included angle
C:曲率中心 C: Center of curvature
D1,D2,D3:距離 D1, D2, D3: distance
R:曲率半徑 R: radius of curvature
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Citations (5)
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TW201216404A (en) * | 2010-08-20 | 2012-04-16 | Applied Materials Inc | Extended life deposition ring |
TWI365487B (en) * | 2006-03-07 | 2012-06-01 | Applied Materials Inc | Notched deposition ring |
TW201225205A (en) * | 2010-10-29 | 2012-06-16 | Applied Materials Inc | Deposition ring and electrostatic chuck for physical vapor deposition chamber |
TWM431893U (en) * | 2012-02-10 | 2012-06-21 | Well Thin Technology Ltd | Deposition ring |
CN109402593A (en) * | 2018-11-02 | 2019-03-01 | 上海华力微电子有限公司 | A kind of method and deposition ring preventing deposition ring arc discharge |
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Publication number | Priority date | Publication date | Assignee | Title |
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TWI365487B (en) * | 2006-03-07 | 2012-06-01 | Applied Materials Inc | Notched deposition ring |
TW201216404A (en) * | 2010-08-20 | 2012-04-16 | Applied Materials Inc | Extended life deposition ring |
TW201225205A (en) * | 2010-10-29 | 2012-06-16 | Applied Materials Inc | Deposition ring and electrostatic chuck for physical vapor deposition chamber |
TWM431893U (en) * | 2012-02-10 | 2012-06-21 | Well Thin Technology Ltd | Deposition ring |
CN109402593A (en) * | 2018-11-02 | 2019-03-01 | 上海华力微电子有限公司 | A kind of method and deposition ring preventing deposition ring arc discharge |
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