TWI801084B - 用於靜態時序分析的餘量校正方法及餘量校正系統 - Google Patents

用於靜態時序分析的餘量校正方法及餘量校正系統 Download PDF

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Publication number
TWI801084B
TWI801084B TW111100661A TW111100661A TWI801084B TW I801084 B TWI801084 B TW I801084B TW 111100661 A TW111100661 A TW 111100661A TW 111100661 A TW111100661 A TW 111100661A TW I801084 B TWI801084 B TW I801084B
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TW
Taiwan
Prior art keywords
margin
margin calibration
timing analysis
static timing
calibration method
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Application number
TW111100661A
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English (en)
Other versions
TW202328965A (zh
Inventor
陳英傑
余美儷
羅幼嵐
Original Assignee
瑞昱半導體股份有限公司
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Application filed by 瑞昱半導體股份有限公司 filed Critical 瑞昱半導體股份有限公司
Priority to TW111100661A priority Critical patent/TWI801084B/zh
Priority to US18/150,767 priority patent/US20230222277A1/en
Application granted granted Critical
Publication of TWI801084B publication Critical patent/TWI801084B/zh
Publication of TW202328965A publication Critical patent/TW202328965A/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3315—Design verification, e.g. functional simulation or model checking using static timing analysis [STA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/3312—Timing analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/12—Timing analysis or timing optimisation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW111100661A 2022-01-07 2022-01-07 用於靜態時序分析的餘量校正方法及餘量校正系統 TWI801084B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW111100661A TWI801084B (zh) 2022-01-07 2022-01-07 用於靜態時序分析的餘量校正方法及餘量校正系統
US18/150,767 US20230222277A1 (en) 2022-01-07 2023-01-05 Margin calibration method and margin calibration system for static timing analysis

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW111100661A TWI801084B (zh) 2022-01-07 2022-01-07 用於靜態時序分析的餘量校正方法及餘量校正系統

Publications (2)

Publication Number Publication Date
TWI801084B true TWI801084B (zh) 2023-05-01
TW202328965A TW202328965A (zh) 2023-07-16

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ID=87069735

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Application Number Title Priority Date Filing Date
TW111100661A TWI801084B (zh) 2022-01-07 2022-01-07 用於靜態時序分析的餘量校正方法及餘量校正系統

Country Status (2)

Country Link
US (1) US20230222277A1 (zh)
TW (1) TWI801084B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117787202A (zh) * 2023-12-22 2024-03-29 上海交通大学 跨工艺角的签核级时序预测方法及系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101344898A (zh) * 2007-07-11 2009-01-14 恩益禧电子股份有限公司 半导体集成电路的生产方法、设计方法和设计系统
CN101765822A (zh) * 2007-07-26 2010-06-30 高通股份有限公司 基于指令使用的自适应电压缩放的方法和设备
US20100306724A1 (en) * 2009-05-26 2010-12-02 Postech Academy-Industry Foundation Method of incremental statistical static timing analysis based on timing yield
TW201839641A (zh) * 2017-04-28 2018-11-01 南韓商三星電子股份有限公司 設計積體電路的方法及其系統
CN113343629A (zh) * 2021-06-25 2021-09-03 海光信息技术股份有限公司 集成电路验证方法、代码生成方法、系统、设备和介质

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101344898A (zh) * 2007-07-11 2009-01-14 恩益禧电子股份有限公司 半导体集成电路的生产方法、设计方法和设计系统
CN101765822A (zh) * 2007-07-26 2010-06-30 高通股份有限公司 基于指令使用的自适应电压缩放的方法和设备
US20100306724A1 (en) * 2009-05-26 2010-12-02 Postech Academy-Industry Foundation Method of incremental statistical static timing analysis based on timing yield
TW201839641A (zh) * 2017-04-28 2018-11-01 南韓商三星電子股份有限公司 設計積體電路的方法及其系統
CN113343629A (zh) * 2021-06-25 2021-09-03 海光信息技术股份有限公司 集成电路验证方法、代码生成方法、系统、设备和介质

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US20230222277A1 (en) 2023-07-13
TW202328965A (zh) 2023-07-16

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