TWI800118B - 用於融合乘加運算的系統、裝置及方法 - Google Patents

用於融合乘加運算的系統、裝置及方法 Download PDF

Info

Publication number
TWI800118B
TWI800118B TW110143839A TW110143839A TWI800118B TW I800118 B TWI800118 B TW I800118B TW 110143839 A TW110143839 A TW 110143839A TW 110143839 A TW110143839 A TW 110143839A TW I800118 B TWI800118 B TW I800118B
Authority
TW
Taiwan
Prior art keywords
apparatuses
systems
methods
fused multiply
multiply add
Prior art date
Application number
TW110143839A
Other languages
English (en)
Other versions
TW202217603A (zh
Inventor
密林德 吉卡
羅柏 瓦倫泰
澤夫 史博柏
馬克 查尼
亞米特 葛雷斯坦
吉瑟斯 柯柏
西蒙 路邦諾維奇
艾蒙斯特阿法 歐德亞麥德維爾
加林娜 芮夫琴
皮歐特 梅奇爾
Original Assignee
美商英特爾股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商英特爾股份有限公司 filed Critical 美商英特爾股份有限公司
Publication of TW202217603A publication Critical patent/TW202217603A/zh
Application granted granted Critical
Publication of TWI800118B publication Critical patent/TWI800118B/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443Sum of products
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018Bit or string instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30105Register structure
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3818Decoding for concurrent execution
TW110143839A 2016-10-20 2017-09-04 用於融合乘加運算的系統、裝置及方法 TWI800118B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/US2016/057991 WO2018075052A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
WOPCT/US16/57991 2016-10-20

Publications (2)

Publication Number Publication Date
TW202217603A TW202217603A (zh) 2022-05-01
TWI800118B true TWI800118B (zh) 2023-04-21

Family

ID=62019029

Family Applications (3)

Application Number Title Priority Date Filing Date
TW112108762A TW202326409A (zh) 2016-10-20 2017-09-04 用於融合乘加運算的系統、裝置及方法
TW110143839A TWI800118B (zh) 2016-10-20 2017-09-04 用於融合乘加運算的系統、裝置及方法
TW106130175A TWI761367B (zh) 2016-10-20 2017-09-04 用於融合乘加運算的系統、裝置及方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW112108762A TW202326409A (zh) 2016-10-20 2017-09-04 用於融合乘加運算的系統、裝置及方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW106130175A TWI761367B (zh) 2016-10-20 2017-09-04 用於融合乘加運算的系統、裝置及方法

Country Status (5)

Country Link
US (7) US11169802B2 (zh)
EP (7) EP3971710A1 (zh)
CN (4) CN109716290B (zh)
TW (3) TW202326409A (zh)
WO (1) WO2018075052A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109716290B (zh) 2016-10-20 2023-12-19 英特尔公司 用于经融合的乘加的系统、装置和方法
US10483981B2 (en) * 2016-12-30 2019-11-19 Microsoft Technology Licensing, Llc Highspeed/low power symbol compare
CN111133452A (zh) * 2017-05-19 2020-05-08 莫维迪乌斯有限公司 用于提高卷积效率的方法、系统和装置
US10514924B2 (en) 2017-09-29 2019-12-24 Intel Corporation Apparatus and method for performing dual signed and unsigned multiplication of packed data elements
US11256504B2 (en) 2017-09-29 2022-02-22 Intel Corporation Apparatus and method for complex by complex conjugate multiplication
US10802826B2 (en) * 2017-09-29 2020-10-13 Intel Corporation Apparatus and method for performing dual signed and unsigned multiplication of packed data elements
US11409525B2 (en) 2018-01-24 2022-08-09 Intel Corporation Apparatus and method for vector multiply and accumulate of packed words
US11403097B2 (en) * 2019-06-26 2022-08-02 Intel Corporation Systems and methods to skip inconsequential matrix operations
KR20210034999A (ko) * 2019-09-23 2021-03-31 에스케이하이닉스 주식회사 Aim 장치 및 aim 장치에서의 곱셈-누산 연산 방법
CN112434256B (zh) * 2020-12-03 2022-09-13 海光信息技术股份有限公司 矩阵乘法器和处理器

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW242678B (en) * 1994-05-03 1995-03-11 Advanced Risc Mach Ltd Multiple instruction set mapping
US5862067A (en) * 1995-12-29 1999-01-19 Intel Corporation Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations
TW201523439A (zh) * 2013-06-28 2015-06-16 Intel Corp 模式相依的頻寬負載至較寬暫存器處理器,方法和系統

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5784305A (en) * 1995-05-01 1998-07-21 Nec Corporation Multiply-adder unit
US5953241A (en) * 1995-08-16 1999-09-14 Microunity Engeering Systems, Inc. Multiplier array processing system with enhanced utilization at lower precision for group multiply and sum instruction
US7395298B2 (en) * 1995-08-31 2008-07-01 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US6385634B1 (en) * 1995-08-31 2002-05-07 Intel Corporation Method for performing multiply-add operations on packed data
US5880984A (en) 1997-01-13 1999-03-09 International Business Machines Corporation Method and apparatus for performing high-precision multiply-add calculations using independent multiply and add instruments
US6014684A (en) * 1997-03-24 2000-01-11 Intel Corporation Method and apparatus for performing N bit by 2*N-1 bit signed multiplication
US7430578B2 (en) * 2001-10-29 2008-09-30 Intel Corporation Method and apparatus for performing multiply-add operations on packed byte data
US6944747B2 (en) * 2002-12-09 2005-09-13 Gemtech Systems, Llc Apparatus and method for matrix data processing
FR2853425B1 (fr) 2003-04-07 2006-01-13 Atmel Corp Sequence de multiplication efficace pour operandes a grands nombres entiers plus larges que le materiel multiplicateur
US9465611B2 (en) * 2003-10-02 2016-10-11 Broadcom Corporation Processor execution unit with configurable SIMD functional blocks for complex number operations
US8122078B2 (en) 2006-10-06 2012-02-21 Calos Fund, LLC Processor with enhanced combined-arithmetic capability
US20080252652A1 (en) 2007-04-13 2008-10-16 Guofang Jiao Programmable graphics processing element
TW200910779A (en) 2007-08-31 2009-03-01 Univ Nat Taipei Technology Fast calculation method for characteristic value of software-based wireless decoder
US8316071B2 (en) 2009-05-27 2012-11-20 Advanced Micro Devices, Inc. Arithmetic processing unit that performs multiply and multiply-add operations with saturation and method therefor
US9104510B1 (en) * 2009-07-21 2015-08-11 Audience, Inc. Multi-function floating point unit
US8458442B2 (en) * 2009-08-26 2013-06-04 International Business Machines Corporation Method and structure of using SIMD vector architectures to implement matrix multiplication
US8990282B2 (en) * 2009-09-21 2015-03-24 Arm Limited Apparatus and method for performing fused multiply add floating point operation
CN101751244B (zh) 2010-01-04 2013-05-08 清华大学 微处理器
GB2478731B (en) 2010-03-15 2013-08-21 Advanced Risc Mach Ltd Operand size control
WO2013101010A1 (en) * 2011-12-28 2013-07-04 Intel Corporation Floating point scaling processors, methods, systems, and instructions
WO2013101018A1 (en) * 2011-12-29 2013-07-04 Intel Corporation Dot product processors, methods, systems, and instructions
EP2798464B8 (en) * 2011-12-30 2019-12-11 Intel Corporation Packed rotate processors, methods, systems, and instructions
US10095516B2 (en) * 2012-06-29 2018-10-09 Intel Corporation Vector multiplication with accumulation in large register space
US9626184B2 (en) 2013-06-28 2017-04-18 Intel Corporation Processors, methods, systems, and instructions to transcode variable length code points of unicode characters
US9417843B2 (en) * 2013-08-20 2016-08-16 Apple Inc. Extended multiply
KR101893814B1 (ko) * 2014-03-26 2018-10-04 인텔 코포레이션 3 소스 피연산자 부동 소수점 가산 프로세서, 방법, 시스템, 및 명령어
US9766888B2 (en) * 2014-03-28 2017-09-19 Intel Corporation Processor instruction to store indexes of source data elements in positions representing a sorted order of the source data elements
US10001995B2 (en) * 2015-06-02 2018-06-19 Intel Corporation Packed data alignment plus compute instructions, processors, methods, and systems
US11023231B2 (en) * 2016-10-01 2021-06-01 Intel Corporation Systems and methods for executing a fused multiply-add instruction for complex numbers
CN109716290B (zh) 2016-10-20 2023-12-19 英特尔公司 用于经融合的乘加的系统、装置和方法
US10146535B2 (en) * 2016-10-20 2018-12-04 Intel Corporatoin Systems, apparatuses, and methods for chained fused multiply add
US10489063B2 (en) * 2016-12-19 2019-11-26 Intel Corporation Memory-to-memory instructions to accelerate sparse-matrix by dense-vector and sparse-vector by dense-vector multiplication
WO2018174933A1 (en) * 2017-03-20 2018-09-27 Intel Corporation Systems, methods, and apparatuses for tile load
US11768681B2 (en) * 2018-01-24 2023-09-26 Intel Corporation Apparatus and method for vector multiply and accumulate of packed bytes
US11409525B2 (en) * 2018-01-24 2022-08-09 Intel Corporation Apparatus and method for vector multiply and accumulate of packed words

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW242678B (en) * 1994-05-03 1995-03-11 Advanced Risc Mach Ltd Multiple instruction set mapping
US5862067A (en) * 1995-12-29 1999-01-19 Intel Corporation Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations
TW201523439A (zh) * 2013-06-28 2015-06-16 Intel Corp 模式相依的頻寬負載至較寬暫存器處理器,方法和系統

Also Published As

Publication number Publication date
CN113885833A (zh) 2022-01-04
CN109716290A (zh) 2019-05-03
CN116009814A (zh) 2023-04-25
US11526354B2 (en) 2022-12-13
US20200026515A1 (en) 2020-01-23
US20220012057A1 (en) 2022-01-13
EP3529695A1 (en) 2019-08-28
US20220050678A1 (en) 2022-02-17
TW201823973A (zh) 2018-07-01
US11507369B2 (en) 2022-11-22
CN115480730A (zh) 2022-12-16
US20230418602A1 (en) 2023-12-28
US11782709B2 (en) 2023-10-10
EP3529695B1 (en) 2023-10-11
US20220012056A1 (en) 2022-01-13
EP3971711A1 (en) 2022-03-23
EP3989062A1 (en) 2022-04-27
US20230048998A1 (en) 2023-02-16
US20210406011A1 (en) 2021-12-30
US11544058B2 (en) 2023-01-03
WO2018075052A1 (en) 2018-04-26
US11526353B2 (en) 2022-12-13
EP3529695A4 (en) 2020-07-15
TW202311986A (zh) 2023-03-16
TWI761367B (zh) 2022-04-21
EP4148563A1 (en) 2023-03-15
EP4198718A1 (en) 2023-06-21
TW202326409A (zh) 2023-07-01
EP3971709A1 (en) 2022-03-23
TW202217603A (zh) 2022-05-01
CN109716290B (zh) 2023-12-19
EP3971710A1 (en) 2022-03-23
US11169802B2 (en) 2021-11-09

Similar Documents

Publication Publication Date Title
EP3513265A4 (en) SYSTEMS AND METHODS FOR DETERMINING ALMOST COLLISIONS
TWI800118B (zh) 用於融合乘加運算的系統、裝置及方法
EP3435848A4 (en) SYSTEMS AND METHODS FOR INTERCONNECTING COMMUNICATION
EP3516920A4 (en) METHOD AND SYSTEM FOR SELECTING USER PLAN PATH
EP3468729A4 (en) SYSTEMS AND METHODS FOR ARC AND KNOT DESIGN AND MANUFACTURE
EP3320420A4 (en) Systems and methods for recommending recommended service location
EP3563235A4 (en) HETEROGENEOUS ELECTRONIC COMPUTING SYSTEMS, METHODS AND APPARATUS
EP3532902A4 (en) PATH DETERMINATION SYSTEMS AND METHODS
EP3386734A4 (en) SYSTEMS, DEVICES AND METHODS FOR DEPOSIT-BASED THREE DIMENSIONAL PRINTING
EP3160220A4 (en) Agronomic system, methods and apparatuses
EP3294503A4 (en) Systems, methods and apparatus for guided tools
EP3224815A4 (en) Geolocation bracelet, systems, and methods
EP3157696A4 (en) Apparatuses, systems and methods for three-dimensional printing
EP3284178A4 (en) Systems and methods for constellation superposition
EP3090239A4 (en) Spectrometry systems, methods, and applications
EP3417314A4 (en) GEOLOCATION SYSTEMS, METHODS AND DEVICES
EP3248360A4 (en) Systems and methods for trusted path secure communication
EP3259386A4 (en) Systems and methods for performing immunoassays
EP3103038A4 (en) Systems, apparatuses and methods for communication flow modification
EP3141073A4 (en) Methods, apparatus, and systems for determining communication priority
EP3230132A4 (en) Smartkey apparatuses, methods and systems
EP3122408A4 (en) Pressurizing masks, systems and methods
EP3655873A4 (en) SYSTEMS AND PROCEDURES FOR BLOCKCHAIN-DEPENDENT SURGICAL SETS
EP3461078A4 (en) METHOD, DEVICE, AND PATH DETERMINATION SYSTEM
EP3326025A4 (en) VARIABLE FOCAL LENS DEVICES, SYSTEMS AND ASSOCIATED METHODS