TWI799401B - Methods of etching conductive features, and related devices and systems - Google Patents

Methods of etching conductive features, and related devices and systems Download PDF

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Publication number
TWI799401B
TWI799401B TW106143295A TW106143295A TWI799401B TW I799401 B TWI799401 B TW I799401B TW 106143295 A TW106143295 A TW 106143295A TW 106143295 A TW106143295 A TW 106143295A TW I799401 B TWI799401 B TW I799401B
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TW
Taiwan
Prior art keywords
systems
methods
conductive features
related devices
etching conductive
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TW106143295A
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Chinese (zh)
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TW201828358A (en
Inventor
娜法 施巴斯曼
莫許 弗蘭克
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美商凱特伊夫公司
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Publication of TWI799401B publication Critical patent/TWI799401B/en

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TW106143295A 2016-12-12 2017-12-07 Methods of etching conductive features, and related devices and systems TWI799401B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201662432710P 2016-12-12 2016-12-12
US62/432,710 2016-12-12

Publications (2)

Publication Number Publication Date
TW201828358A TW201828358A (en) 2018-08-01
TWI799401B true TWI799401B (en) 2023-04-21

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TW112135058A TW202401560A (en) 2016-12-12 2017-12-07 Methods of etching conductive features
TW111105647A TWI819494B (en) 2016-12-12 2017-12-07 Methods of etching conductive features, and related devices and systems
TW106143295A TWI799401B (en) 2016-12-12 2017-12-07 Methods of etching conductive features, and related devices and systems

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TW112135058A TW202401560A (en) 2016-12-12 2017-12-07 Methods of etching conductive features
TW111105647A TWI819494B (en) 2016-12-12 2017-12-07 Methods of etching conductive features, and related devices and systems

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040079729A1 (en) * 2002-10-25 2004-04-29 Nanya Technology Corporation Process for etching metal layer
US20040245213A1 (en) * 2003-06-09 2004-12-09 Shinko Electric Industries Co., Ltd. Process for making circuit board or lead frame
US20140252571A1 (en) * 2013-03-06 2014-09-11 Maxim Integrated Products, Inc. Wafer-level package mitigated undercut
TW201534756A (en) * 2014-03-10 2015-09-16 Nat Univ Tsing Hua Method for manufacturing silicon carbide thin film
WO2016193978A2 (en) * 2015-06-04 2016-12-08 Jet Cu Pcb Ltd. Methods for producing an etch resist pattern on a metallic surface

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040079729A1 (en) * 2002-10-25 2004-04-29 Nanya Technology Corporation Process for etching metal layer
US20040245213A1 (en) * 2003-06-09 2004-12-09 Shinko Electric Industries Co., Ltd. Process for making circuit board or lead frame
US20140252571A1 (en) * 2013-03-06 2014-09-11 Maxim Integrated Products, Inc. Wafer-level package mitigated undercut
TW201534756A (en) * 2014-03-10 2015-09-16 Nat Univ Tsing Hua Method for manufacturing silicon carbide thin film
WO2016193978A2 (en) * 2015-06-04 2016-12-08 Jet Cu Pcb Ltd. Methods for producing an etch resist pattern on a metallic surface

Also Published As

Publication number Publication date
TWI819494B (en) 2023-10-21
TW202224013A (en) 2022-06-16
TW202401560A (en) 2024-01-01
TW201828358A (en) 2018-08-01

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