TWI796190B - Voltage control circuit for adjusting reference voltage signal of memory device - Google Patents

Abstract

A voltage control circuit is provided. The voltage control circuit is used for adjusting a reference voltage signal of a memory device. A voltage value of the reference voltage signal has a negative slope corresponding to temperature. The voltage control circuit includes a first translation circuit, an adjustment circuit and a second translation circuit. The first shift circuit receives the reference voltage signal, and shifts a voltage level of the reference voltage signal downward based on a high temperature voltage value of the reference voltage signal to generate the first voltage signal having the negative slope. The adjustment circuit adjusts the negative slope of the first voltage signal to a default negative slope according to a first trimming value corresponding to a low temperature voltage value of the reference voltage signal and a second trimming value corresponding to the high temperature voltage value, thereby generating a second voltage signal. The second shift circuit shifts the voltage level of the second voltage signal upward based on the reference voltage value to generate an adjusted reference voltage signal.

Description

Voltage control circuit for adjusting reference voltage signal of memory device

The present invention relates to a voltage control circuit, and in particular to a voltage control circuit for adjusting a reference voltage signal of a memory device.

In terms of the performance of the memory device, the reference voltage signal of the memory device needs to have temperature dependence. For example, memory devices require high operating voltages in low-temperature environments based on stringent write time requirements. Based on the specifications of reliability and low leakage current, memory devices require low operating voltages at high temperatures in high temperature environments. Therefore, the low temperature voltage value of the reference voltage signal in the low temperature environment is designed to be higher than the high temperature voltage value in the high temperature environment. The voltage value of the reference voltage signal has a negative slope based on temperature.

However, based on differences in manufacturing processes, the negative slopes of the reference voltage signals of different memory devices may vary. Differences in reference voltage signals may cause differences in the operations of different electronic devices equipped with different memory devices.

The invention provides a voltage control circuit capable of adjusting the negative slope of a reference voltage signal of a memory device to a preset negative slope.

The voltage control circuit of the present invention is used for adjusting the reference voltage signal of the memory device. The voltage value of the reference voltage signal has a negative slope corresponding to the temperature. The voltage control circuit includes a first translation circuit, an adjustment circuit and a second translation circuit. The first shift circuit receives the reference voltage signal, and shifts the voltage level of the reference voltage signal downward based on the high temperature voltage value of the reference voltage signal to generate the first voltage signal with the negative slope. The adjustment circuit is coupled to the first translation circuit. The adjusting circuit receives the first voltage signal, the first trimming value corresponding to the low temperature voltage value of the reference voltage signal, and the second trimming value corresponding to the high temperature voltage value, and adjusts the negative slope according to the first trimming value and the second trimming value is a preset negative slope, thereby generating a second voltage signal. The second translation circuit is coupled to the adjustment circuit. The second shifting circuit shifts up the voltage level of the second voltage signal based on the reference voltage value to generate an adjusted reference voltage signal.

Based on the above, the voltage control circuit of the present invention can shift the reference voltage signal downward based on the high-temperature voltage value of the reference voltage signal to generate the first voltage signal, and can shift the reference voltage signal based on the high-temperature voltage value and the low-temperature voltage value of the reference voltage signal. The negative slope is adjusted to a preset negative slope to generate a second voltage signal. Next, the voltage control circuit also shifts the second voltage signal up based on the reference voltage value to generate an adjusted reference voltage signal. The voltage control circuit can adjust multiple reference voltage signals with different negative slopes to multiple reference voltage signals with the same preset negative slope pressure signal. In this way, the temperature dependence of the reference voltage signal can be consistent.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

100, 200: voltage control circuit

110, 210: the first translation circuit

120, 220: adjustment circuit

130, 230: the second translation circuit

211: Analog subtractor

221: Operation circuit

222: Gain circuit

231: Analog Adder

ADJ: Adjustment value

AMP: Amplifier

C1, C2, C3, C4: waveform diagram

CP1, CP2: Comparator

DSL: preset negative slope

G: Gain

LDO1, LDO2: regulator circuit

M1, M2: Transistor

ND1, ND2: Node

R11~R1m: the first resistor

R21~R2n: the second resistor

R31~R34: The third resistor

RS1, RS2: resistor string

S: sum

SC1, SC2: selection circuit

SL: negative slope

SSC1, SSC2: select signal

TH: high temperature

TL: low temperature

TRIM1: first trimming value

TRIM2: Second trimming value

V11~V1m: the first voltage value

V21~V2n: second voltage value

VA, VA1, VA2, VA3: the first voltage signal

VB, VB1, VB2, VB3: second voltage signal

VBEREF, VBEREF1~VBEREF3: reference voltage signal

VBEREF': adjusted reference voltage signal

VD: adjustable voltage divider circuit

VH: high voltage source

VR: reference voltage value

VS1: The first selected voltage value

VS2: The second selected voltage value

VT1~VT5: voltage value

VTH, VTH1, VTH2, VTH3: high temperature voltage value

VTL1, VTL2, VTL3: low temperature voltage value

△V: The difference between the first selected voltage value and the second selected voltage value

△V': Adjusted difference

FIG. 1 is a schematic diagram of a voltage control circuit according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating adjustment of a reference voltage signal according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of a voltage control circuit according to a second embodiment of the present invention.

FIG. 4 is a schematic diagram of a sensing circuit according to an embodiment of the invention.

5 is a schematic diagram of adjusting the negative slope according to the low-temperature voltage value and the high-temperature voltage value according to an embodiment of the present invention.

Parts of the embodiments of the present invention will be described in detail with reference to the accompanying drawings. For the referenced reference symbols in the following description, when the same reference symbols appear in different drawings, they will be regarded as the same or similar components. These embodiments are only a part of the present invention, and do not reveal all possible implementation modes of the present invention. Rather, these embodiments are only examples within the scope of the patent application of the present invention.

Please refer to FIG. 1 , which is a schematic diagram of a voltage control circuit according to a first embodiment of the present invention. The voltage control circuit 100 is used for adjusting the reference voltage signal VBEREF of the memory device. In this embodiment, the voltage value of the reference voltage signal VBEREF has a negative slope SL corresponding to the temperature. Generally, the voltage value of the reference voltage signal VBEREF in a low temperature environment is higher than the voltage value of the reference voltage signal VBEREF in a high temperature environment. In addition, the negative slope SL is designed as a single slope. In this embodiment, the voltage control circuit 100 includes a first translation circuit 110 , an adjustment circuit 120 and a second translation circuit 130 . The first shift circuit 110 receives the reference voltage signal VBEREF, and shifts the voltage level of the reference voltage signal VBEREF downward based on the high temperature voltage value VTH of the reference voltage signal VBEREF to generate the first voltage signal VA. The first voltage signal VA also has the same negative slope SL.

In this embodiment, the adjustment circuit 120 is coupled to the first translation circuit 110 . The adjusting circuit 120 receives the first voltage signal VA, the first trimming value TRIM1 corresponding to the low temperature voltage value of the reference voltage signal VBEREF, and the second trimming value TRIM2 corresponding to the high temperature voltage value VTH, and based on the first trimming value TRIM1 and the second The trimming value TRIM2 adjusts the negative slope SL of the first voltage signal VA to a preset negative slope DSL, thereby generating the second voltage signal VB. Therefore, the second voltage signal VB has a negative slope DSL.

In this embodiment, the second translation circuit 130 is coupled to the adjustment circuit 120 . The second shifting circuit 130 shifts up the voltage level of the second voltage signal VB based on the reference voltage value VR to generate an adjusted reference voltage signal VBEREF'.

It is worth mentioning that the voltage control circuit 100 can make the reference voltage The signal VBEREF is converted into a reference voltage signal VBEREF' with a predetermined negative slope DSL. In this way, based on the same preset negative slope DSL, the temperature dependencies of the reference voltage signals inside different memory devices can be consistent.

Please refer to FIG. 1 and FIG. 2 at the same time. FIG. 2 is a schematic diagram illustrating adjustment of a reference voltage signal according to an embodiment of the present invention. Waveform diagram C1 shows three reference voltage signals VBEREF1~VBEREF3. In this embodiment, the reference voltage signals VBEREF1 - VBEREF3 have different negative slopes, for example. In this embodiment, the reference voltage signal VBEREF1 has a low temperature voltage value VTL1 at the low temperature TL. The reference voltage signal VBEREF1 has a high temperature voltage value VTH1 under the high temperature TH. In this embodiment, the low temperature TL is, for example, -20°C. The high temperature TH is, for example, 100°C. The reference voltage signal VBEREF2 has a low temperature voltage value VTL2 at the low temperature TL. The reference voltage signal VBEREF2 has a high temperature voltage value VTH2 under the high temperature TH. The reference voltage signal VBEREF3 has a low temperature voltage value VTL3 at the low temperature TL. The reference voltage signal VBEREF3 has a high temperature voltage value VTH3 under the high temperature TH.

The waveform diagram C2 shows the result of the first shift circuit 110 shifting down the reference voltage signals VBEREF1 - VBEREF3 with different negative slopes. In this embodiment, when the first translation circuit 110 receives the reference voltage signal VBEREF1 , the first translation circuit 110 translates the voltage level of the reference voltage signal VBEREF1 downward based on the high temperature voltage value VTH1 to generate the voltage signal VA1 . The negative slope of the voltage signal VA1 is the same as the negative slope of the reference voltage signal VBEREF1. When the first shift circuit 110 receives the reference voltage signal VBEREF2, the first shift circuit 110 shifts the voltage of the reference voltage signal VBEREF2 downward based on the high temperature voltage value VTH2. Voltage level to generate voltage signal VA2. The negative slope of the voltage signal VA2 is the same as the negative slope of the reference voltage signal VBEREF2. When the first shift circuit 110 receives the reference voltage signal VBEREF3 , the first shift circuit 110 shifts the voltage level of the reference voltage signal VBEREF3 downward based on the high temperature voltage value VTH3 to generate the voltage signal VA3 . The negative slope of the voltage signal VA3 is the same as the negative slope of the reference voltage signal VBEREF3. Therefore, the first voltage signals VA1 - VA3 have the same high temperature voltage value (for example, 0 volts) at the high temperature TH.

The waveform diagram C3 shows the adjustment result of the adjustment circuit 120 on different negative slopes of the first voltage signals VA1 - VA3 . In this embodiment, the adjusting circuit 120 converts the first voltage signals VA1 - VA3 into the second voltage signals VB1 - VB3 .

Specifically, the adjusting circuit 120 adjusts the first voltage signal VA1 according to the first trimming value TRIM1 corresponding to the low temperature voltage value VTL1 of the reference voltage signal VBEREF1 and the second trimming value TRIM2 corresponding to the high temperature voltage value VTH1 of the reference voltage signal VBEREF1. The negative slope of DSL is adjusted to the preset negative slope DSL, thereby generating the second voltage signal VB1. The adjusting circuit 120 adjusts the negative slope of the first voltage signal VA2 according to the first trimming value TRIM1 corresponding to the low temperature voltage value VTL2 of the reference voltage signal VBEREF2 and the second trimming value TRIM2 corresponding to the high temperature voltage value VTH2 of the reference voltage signal VBEREF2. The preset negative slope DSL is used to generate the second voltage signal VB2. In addition, the adjusting circuit 120 adjusts the negative value of the first voltage signal VA3 according to the first trimming value TRIM1 corresponding to the low temperature voltage value VTL3 of the reference voltage signal VBEREF3 and the second trimming value TRIM2 corresponding to the high temperature voltage value VTH3 of the reference voltage signal VBEREF3. The slope is adjusted to a preset negative slope DSL, Thus, the second voltage signal VB3 is generated.

It should be noted that because the second voltage signals VB1 - VB3 have the same preset negative slope DSL and the same high temperature voltage value (for example, 0V). Therefore, the second voltage signals VB1 - VB3 are similar or identical to each other. That is to say, even when receiving reference voltage signals with different temperature dependencies, the voltage control circuit 100 can generate similar or identical second voltage signals.

The waveform diagram C4 shows the result of shifting the voltage levels of the second voltage signals VB1 - VB3 by the second shifting circuit 130 . In this embodiment, the second shift circuit 130 shifts up the voltage levels of the second voltage signals VB1-VB3 based on the reference voltage value VR to generate the adjusted reference voltage signal VBEREF'. In this embodiment, based on actual usage requirements, the reference voltage VR can be designed as one of the high temperature voltage values VTH1 , VTH2 , VTH3 or other high temperature voltage values. Therefore, even when receiving reference voltage signals with different temperature dependencies, the voltage control circuit 100 will generate the adjusted reference voltage signal VBEREF'.

Please refer to FIG. 3 , which is a schematic diagram of a voltage control circuit according to a second embodiment of the present invention. In this embodiment, the voltage control circuit 200 includes a first translation circuit 210 , an adjustment circuit 220 and a second translation circuit 230 . The first shift circuit 210 shifts the voltage level of the reference voltage signal VBEREF down based on the high temperature voltage value VTH of the reference voltage signal VBEREF to generate the first voltage signal VA. In this embodiment, the first translation circuit 210 includes an analog subtractor 211 . The analog subtractor 211 subtracts the high temperature voltage value from the voltage value of the reference voltage signal VBEREF to generate the first voltage signal VA.

The adjustment circuit 220 is coupled to the first translation circuit 210 . The negative slope SL of the first voltage signal VA is adjusted to a preset negative slope DSL according to the first trimming value TRIM1 and the second trimming value TRIM2 , so as to generate the second voltage signal VB. In this embodiment, the adjustment circuit 220 sums the first trimming value TRIM1 and the second trimming value TRIM2 to generate an adjustment value ADJ, and adjusts the negative slope SL to a preset negative slope DSL according to the adjustment value ADJ.

In this embodiment, the adjustment circuit 220 includes an operation circuit 221 and a gain circuit 222 . The arithmetic circuit 221 receives the first trimming value TRIM1 and the second trimming value TRIM2 . The operation circuit 221 performs logical addition operation on the first trimming value TRIM1 and the second trimming value TRIM2 to generate an adjustment value ADJ. The operation circuit 221 may be implemented by a logic adder.

The gain circuit 222 is coupled to the operation circuit 221 and the first translation circuit 210 . The gain circuit 222 receives the first voltage signal VA, and adjusts the negative slope SL of the first voltage signal VA in response to the adjustment value ADJ provided by the operation circuit 221 . The gain circuit 222 can adjust the negative slope SL of the first voltage signal VA to a preset negative slope DSL based on the adjustment value ADJ, so as to generate the second voltage signal VB.

In this embodiment, the gain circuit 222 includes an amplifier AMP and an adjustable voltage divider circuit VD. The first input terminal of the amplifier AMP is coupled to the first translation circuit 210 . Taking this embodiment as an example, the first input terminal of the amplifier AMP is coupled to the output terminal of the analog subtractor 211 to receive the first voltage signal VA. The adjustable voltage divider circuit VD is coupled to the second input terminal of the amplifier AMP, the output terminal of the amplifier AMP and the operation circuit 221 . The adjustable voltage divider circuit VD responds to the adjustment value ADJ to adjust the position At least one of the first voltage dividing resistance value between the second input terminal of the amplifier AMP and the output terminal of the amplifier AMP and the second voltage dividing resistance value between the second input terminal of the amplifier AMP and the low voltage source one. The amplifier AMP adjusts the negative slope SL based on the first voltage dividing resistor and the second voltage dividing resistor, so as to generate the second voltage signal VB.

In this embodiment, the larger the adjustment value ADJ is, the smaller the negative slope SL is. Therefore, when the negative slope SL is smaller than the predetermined negative slope DSL, the gain circuit 222 responds to the adjustment value ADJ to increase the negative slope SL to generate the predetermined negative slope DSL. On the other hand, the smaller the adjustment value ADJ is, the larger the negative slope SL is. Therefore, when the negative slope SL is greater than the predetermined negative slope DSL, the gain circuit 222 reduces the negative slope SL in response to the adjustment value ADJ to generate the predetermined negative slope DSL.

The second translation circuit 230 is coupled to the adjustment circuit 220 . The second shifting circuit 230 shifts up the voltage level of the second voltage signal VB based on the reference voltage value VR to generate the adjusted reference voltage signal VBEREF'. In this embodiment, the second translation circuit 230 includes an analog adder 231 . The analog adder 231 adds the voltage value of the second voltage signal VB to the reference voltage VR to generate an adjusted reference voltage signal VBEREF'.

In this embodiment, the voltage control circuit 200 further includes a sensing circuit 240 . The sensing circuit 240 is coupled to the adjustment circuit 220 . The sensing circuit 240 provides a first trimming value TRIM1 according to the low temperature voltage value VTL and provides a second trimming value TRIM2 according to the high temperature voltage value VTH. In this embodiment, the low temperature voltage value VTL is negatively correlated with the first trimming value TRIM1. The high temperature voltage value VTH is the same as the second trimming value TRIM2 showing a positive correlation.

The following will describe how the first trimming value TRIM1 and the second trimming value TRIM2 are generated and implementation details of adjusting the negative slope SL by using the first trimming value TRIM1 and the second trimming value TRIM2.

Please refer to FIG. 3 , FIG. 4 and FIG. 5 at the same time. FIG. 4 is a schematic diagram of a sensing circuit according to an embodiment of the present invention. 5 is a schematic diagram of adjusting the negative slope according to the low-temperature voltage value and the high-temperature voltage value according to an embodiment of the present invention. In this embodiment, the sensing circuit 240 includes a resistor string RS1 and selection circuits SC1 and SC2 . The resistor string RS1 is coupled between the high voltage source VH and the low voltage source (such as ground). The resistor string RS1 at least includes first resistors R11 ˜ R1m and second resistors R21 ˜ R2n. The first resistors R11 ˜ R1m are connected in series between the high voltage source VH and the node ND1 . The second resistors R21˜R2n are connected in series between the node ND2 and the low voltage source. In this embodiment, the voltage at the node ND2 is lower than the voltage at the node ND1. In this embodiment, m is equal to n. That is to say, the number of the first resistors R11-R1m is the same as the number of the second resistors R21-R2n. In some embodiments, m is not equal to n. That is to say, the number of the first resistors R11 ˜ R1m is different from the number of the second resistors R21 ˜ R2n.

In this embodiment, the first resistors R11 - R1m collectively provide different first voltage values V11 - V1m. For example, the resistor string RS1 divides the voltage difference between the high voltage source VH and the node ND1. A first terminal of the first resistor R11 provides a first voltage value V11. The first terminal of the first resistor R12 provides the first voltage value V12, and so on. In this embodiment, the second resistors R21~R2n jointly provide Different second voltage values V21˜V2n. For example, the resistor string RS1 divides the voltage difference between the node ND2 and the low voltage source. A second terminal of the second resistor R2n provides a second voltage value V2n. The second terminal of the second resistor R22 provides a second voltage value V22, and so on.

In this embodiment, the multiple input terminals of the selection circuit SC1 are respectively coupled to the first resistors R11 ˜ R1m to receive different first voltage values V11 ˜ V1m. The selection circuit SC1 responds to the selection signal SSC1 to select one of the first voltage values V11˜V1m as the first selected voltage value VS1. The multiple input ends of the selection circuit SC2 are respectively coupled to the second resistors R21 ˜ R2n to receive different second voltage values V21 ˜ V2n. The selection circuit SC2 responds to the selection signal SSC2 to select one of the second voltage values V21-V2n as the second selected voltage value VS2. In this embodiment, the selection circuits SC1 and SC2 may be implemented by multiplexers.

In this embodiment, when the difference ΔV between the first selected voltage value VS1 and the second selected voltage value VS2 is equal to the difference between the low temperature voltage value VTL and the high temperature voltage value VTH, the sensing circuit 240 The digital value of the selection signal SSC1 corresponding to the first selection voltage VS1 is used as the first trimming value TRIM1, and the digital value of the selection signal SSC2 corresponding to the second selection voltage VS2 is used as the second trimming value TRIM2.

In this embodiment, the selection signals SSC1 and SSC2 are respectively multi-bit digital signals. In this embodiment, the larger the digital value of the selection signal SSC1 is, the smaller the first selection voltage VS1 selected by the selection circuit SC1 is. The smaller the digital value of the selection signal SSC1 is, the higher the first selection voltage VS1 selected by the selection circuit SC1 will be. big. Taking this embodiment as an example, the selection signal SSC1 is a 2-bit digital signal. When the digital value of the selection signal SSC1 is equal to 0, the first selection voltage VS1 selected by the selection circuit SC1 is equal to 0.7 volts. When the digital value of the selection signal SSC1 is equal to 1, the first selection voltage VS1 is equal to 0.65 volts. When the digital value of the selection signal SSC1 is equal to 2, the first selection voltage VS1 is equal to 0.6 volts. When the digital value of the selection signal SSC1 is equal to 3, the first selection voltage VS1 is equal to 0.55 volts.

In this embodiment, the larger the digital value of the selection signal SSC2 is, the larger the second selection voltage VS2 selected by the selection circuit SC2 is. The smaller the digital value of the selection signal SSC2 is, the smaller the second selection voltage VS2 selected by the selection circuit SC2 is. Taking this embodiment as an example, the selection signal SSC2 is a 2-bit digital signal. When the digital value of the selection signal SSC2 is equal to 0, the second selection voltage VS2 selected by the selection circuit SC2 is equal to 0.3 volts. When the digital value of the selection signal SSC2 is equal to 1, the second selection voltage VS2 is equal to 0.35 volts. When the digital value of the selection signal SSC2 is equal to 2, the second selection voltage VS2 is equal to 0.4 volts. When the digital value of the selection signal SSC2 is equal to 3, the second selection voltage VS2 is equal to 0.45 volts.

Therefore, the sensing circuit 240 can use the digital value of the selection signal SSC1 and the digital value of the selection signal SSC2 to provide the difference ΔV between the first selected voltage value VS1 and the second selected voltage value VS2 . The sensing circuit 240 uses the difference ΔV to compare with the difference between the low temperature voltage value VTL and the high temperature voltage value VTH. When the difference ΔV is equal to the difference between the low-temperature voltage value VTL and the high-temperature voltage value VTH, the sensing circuit 240 uses the digital value of the selection signal SSC1 as the first trimming value TRIM1 and the digital value of the selection signal SSC2 as the second trimming value. Two trim values TRIM2.

It should be noted that the sum S of the digital values of the selection signal SSC1 and the selection signal SSC2 is related to the difference ΔV between the first selection voltage VS1 and the second selection voltage VS2 . Taking Figure 5 as an example, when the difference ΔV is equal to 0.4 volts, the sum S is 0. The sum S is 1 when the difference ΔV is equal to 0.35 volts. The sum S is 2 when the difference ΔV is equal to 0.3 volts. The sum S is 3 when the difference ΔV is equal to 0.25 volts. When the difference ΔV is equal to 0.2 volts, the sum S is 4. The sum S is 5 when the difference ΔV is equal to 0.15 volts. When the difference ΔV is equal to 0.1 volts, the sum S is 6. Therefore, when the difference ΔV is equal to the difference between the low temperature voltage value VTL and the high temperature voltage value VTH, the sum S is equal to the adjustment value ADJ. The adjustment value ADJ provided by the arithmetic circuit 221 is also related to the difference ΔV.

The gain circuit 222 adjusts the negative slope SL of the first voltage signal VA in response to the adjustment value ADJ. Taking this embodiment as an example, when the adjustment value ADJ is equal to 0, the gain G provided by the gain circuit 222 is equal to 1. That is, when the adjustment value ADJ is equal to 0, the difference ΔV is equal to 0.4 volts. The gain circuit 222 does not adjust the negative slope SL. Therefore, the adjusted difference ΔV' remains equal to 0.4 volts. This means that the difference ΔV' of the second voltage signal VB remains equal to 0.4 volts. Therefore, the difference ΔV' of the adjusted reference voltage signal VBEREF' remains equal to 0.4 volts.

When the adjustment value ADJ is equal to 1, the gain G provided by the gain circuit 222 is equal to 1.143. That is, when the adjustment value ADJ is equal to 1, the difference ΔV is equal to 0.35 volts. The gain circuit 222 multiplies the negative slope SL by 1.143 to generate a preset negative slope DSL. Therefore, the adjusted difference ΔV' is roughly equal to 0.4 (1.143x0.35=0.4) volts. This means that the difference △V' of the second voltage signal VB is large At least 0.4 volts. Therefore, the difference ΔV' of the adjusted reference voltage signal VBEREF' is roughly equal to 0.4 volts.

When the adjustment value ADJ is equal to 2, the gain G provided by the gain circuit 222 is equal to 1.333. That is, when the adjustment value ADJ is equal to 2, the difference ΔV is equal to 0.3 volts. The gain circuit 222 multiplies the negative slope SL by 1.333 to generate a preset negative slope DSL. Therefore, the adjusted difference ΔV' is roughly equal to 0.4 (1.333x0.3=0.4) volts. This means that the difference ΔV' of the second voltage signal VB is roughly equal to 0.4 volts. Therefore, the difference ΔV' of the adjusted reference voltage signal VBEREF' is roughly equal to 0.4 volts.

When the adjustment value ADJ is equal to 3, the gain G provided by the gain circuit 222 is equal to 1.6. That is, when the adjustment value ADJ is equal to 3, the difference ΔV is equal to 0.25 volts. The gain circuit 222 multiplies the negative slope SL by a factor of 1.6 to generate a preset negative slope DSL. Therefore, the adjusted difference ΔV' is approximately equal to 0.4 volts.

When the adjustment value ADJ is equal to 4, the gain G provided by the gain circuit 222 is equal to 2. That is, when the adjustment value ADJ is equal to 4, the difference ΔV is equal to 0.2 volts. The gain circuit 222 multiplies the negative slope SL by 2 to generate a preset negative slope DSL. Therefore, the adjusted difference ΔV' is approximately equal to 0.4 volts.

When the adjustment value ADJ is equal to 5, the gain G provided by the gain circuit 222 is equal to 2.667. That is, when the adjustment value ADJ is equal to 5, the difference ΔV is equal to 0.15 volts. The gain circuit 222 multiplies the negative slope SL by 2.667 to generate a preset negative slope DSL. Therefore, the adjusted difference ΔV' is approximately equal to 0.4 volts.

When the adjustment value ADJ is equal to 6, the gain G provided by the gain circuit 222 equal to 4. That is, when the adjustment value ADJ is equal to 6, the difference ΔV is equal to 0.1 volt. The gain circuit 222 multiplies the negative slope SL by 4 to generate a preset negative slope DSL. Therefore, the adjusted difference ΔV' is approximately equal to 0.4 volts.

It can be seen that even if the negative slope SL of the reference voltage signal VBEREF is different, the adjustment circuit 220 can adjust the negative slope SL to the preset negative slope DSL, thereby generating the second voltage signal VB with the preset negative slope DSL.

In this embodiment, the sensing circuit 240 provides multiple temperature voltage values of the adjusted reference voltage signal VBEREF' at different temperatures. In this embodiment, the sensing circuit 240 further includes a resistor string RS2 and voltage stabilizing circuits LDO1 and LDO2 . The resistor string RS2 includes third resistors R31 - R34 coupled in series with each other. The voltage stabilizing circuit LDO1 is coupled to the output end of the selection circuit SC1 and the first end of the resistor string RS2. The voltage stabilizing circuit LDO2 is coupled to the output end of the selection circuit SC2 and the second end of the resistor string RS2. The voltage stabilizing circuit LDO1 makes the voltage at the first end of the resistor string RS2 substantially equal to the low temperature voltage VTL. The voltage stabilizing circuit LDO2 makes the voltage at the second end of the resistor string RS2 substantially equal to the high temperature voltage VTH. In this embodiment, the third resistors R31 - R34 generate multiple temperature voltage values at different temperatures.

Taking this embodiment as an example, the third resistors R31 - R34 can be designed to have the same resistance value (the present invention is not limited thereto). The low-temperature voltage value VTL is, for example, a voltage value in an environment of -20°C. The high temperature voltage value VTH is, for example, a voltage value in an environment of 100°C. Therefore, based on the voltage dividing operation of the resistor string RS2, the first terminal of the third resistor R31 will provide a low temperature voltage value VTL (ie, the voltage value VT1 under the environment of -20° C.). The second end of the third resistor R31 will provide the voltage value at 10°C environment VT2. The second terminal of the third resistor R32 will provide a voltage value VT3 in an environment of 40°C. The second end of the third resistor R33 will provide a voltage value VT4 in an environment of 70°C. The second terminal of the third resistor R34 provides a high temperature voltage value VTH (ie, a voltage value VT5 in an environment of 100° C.). The voltage control circuit 200 can use the above-mentioned multiple temperature voltage values at different temperatures to obtain the adjusted voltage values of the reference voltage signal VBEREF' at different ambient temperatures and the preset negative slope DSL.

For ease of description, the number of the third resistors in this embodiment is taken as 4, but the present invention is not limited thereto. Based on actual usage requirements, the number of the third resistors can be changed.

In addition, the voltage control circuit 200 recognizes the ambient temperature based on the above-mentioned plurality of temperature voltage values. Taking this embodiment as an example, when the adjusted voltage value of the reference voltage signal VBEREF' is equal to the voltage value VT3, the voltage control circuit 200 will recognize that the ambient temperature is equal to 40°C.

Taking this embodiment as an example, the voltage stabilizing circuits LDO1 and LDO2 are low-dropout linear regulators (Low-dropout, LDO) respectively. The voltage stabilizing circuit LDO1 includes a comparator CP1 and a transistor M1. A first terminal (eg, an inverting input terminal) of the comparator CP1 is coupled to an output terminal of the selection circuit SC1 . A second terminal (eg, a non-inverting input terminal) of the comparator CP1 is coupled to the first terminal of the resistor string RS2. Transistor M1 is a P-type MOSFET. The first end of the transistor M1 is coupled to the high voltage source VH. The second end of the transistor M1 is coupled to the first end of the resistor string RS2. The control terminal of the transistor M1 is coupled to the output terminal of the comparator CP1. The voltage stabilizing circuit LDO2 includes a comparator CP2 and a transistor M2. The first terminal (for example, the inverting input terminal) of the comparator CP2 is coupled to the output of the selection circuit SC2 end. A second terminal (eg, a non-inverting input terminal) of the comparator CP2 is coupled to a second terminal of the resistor string RS2. Transistor M2 is an N-type MOSFET. The first end of the transistor M2 is coupled to the second end of the resistor string RS2. The second end of the transistor M2 is coupled to a low voltage source. The control terminal of the transistor M2 is coupled to the output terminal of the comparator CP2.

To sum up, the voltage control circuit of the present invention can shift the reference voltage signal down to generate the first voltage signal based on the high temperature voltage value of the reference voltage signal, and shift the reference voltage signal based on the high temperature voltage value and the low temperature voltage value of the reference voltage signal. The negative slope of the signal is adjusted to a preset negative slope, thereby generating a second voltage signal with a preset negative slope. Next, the voltage control circuit also shifts the second voltage signal up based on the reference voltage value to generate an adjusted reference voltage signal. The voltage control circuit can adjust multiple reference voltage signals with different negative slopes to multiple reference voltage signals with the same preset negative slope. In this way, the temperature dependence of the reference voltage signal can be consistent based on the operation of the voltage control circuit.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the scope of the appended patent application.

100: voltage control circuit

110: the first translation circuit

120: Adjustment circuit

130: the second translation circuit

DSL: preset negative slope

SL: negative slope

TRIM1: first trimming value

TRIM2: Second trimming value

VA: first voltage signal

VB: Second voltage signal

VBEREF: reference voltage signal

VBEREF': adjusted reference voltage signal

VR: reference voltage value

VTH: high temperature voltage value

Claims (13)

A voltage control circuit for adjusting a reference voltage signal of a memory device, wherein the voltage value of the reference voltage signal has a negative slope corresponding to temperature, wherein the voltage control circuit comprises: a first translation circuit configured to receive a reference voltage signal and to shift the voltage level of the reference voltage signal downward based on a high temperature voltage value of the reference voltage signal to generate a first voltage signal having the negative slope; an adjustment circuit, coupled to the first translation circuit, configured to receive the first voltage signal, a first trimmed value corresponding to a low temperature voltage value of the reference voltage signal, and a first trimmed value corresponding to the high temperature voltage value two trimming values, and adjust the negative slope to a preset negative slope according to the first trimming value and the second trimming value, thereby generating a second voltage signal; and A second shifting circuit, coupled to the adjustment circuit, is configured to shift up the voltage level of the second voltage signal based on a reference voltage value to generate the adjusted reference voltage signal. The voltage control circuit as claimed in claim 1, wherein the first translation circuit comprises: An analog subtractor configured to subtract the high temperature voltage value from the voltage value of the reference voltage signal to generate the first voltage signal. The voltage control circuit as claimed in claim 1, wherein the second translation circuit includes: An analog adder configured to add the voltage value of the second voltage signal to the reference voltage value to generate the adjusted reference voltage signal. The voltage control circuit according to claim 1, wherein the adjustment circuit sums the first trimming value and the second trimming value to generate an adjustment value, and adjusts the negative slope to the predetermined value according to the adjustment value Set a negative slope. The voltage control circuit as claimed in claim 4, wherein the adjustment circuit includes: an arithmetic circuit configured to receive the first trimmed value and the second trimmed value, perform a logical addition operation on the first trimmed value and the second trimmed value to generate the trimmed value; and A gain circuit, coupled to the operation circuit and the first translation circuit, is configured to receive the first voltage signal and adjust the negative slope in response to the adjustment value. The voltage control circuit as claimed in item 5, wherein the gain circuit comprises: an amplifier, the first input terminal of the amplifier is coupled to the first translation circuit; and an adjustable voltage divider circuit coupled to the second input terminal of the amplifier, the output terminal of the amplifier and the operational circuit, configured to adjust the second input terminal of the amplifier and the amplifier in response to the adjustment value at least one of a first voltage dividing resistor value between the output terminals of the amplifier and a second voltage dividing resistor value between the second input terminal of the amplifier and a low voltage source, Wherein the amplifier adjusts the negative slope based on the first voltage dividing resistance and the second voltage dividing resistance. The voltage control circuit as claimed in item 5, wherein: The larger the adjustment value, the smaller the negative slope, When the negative slope is smaller than the preset negative slope, the gain circuit increases the negative slope to generate the preset negative slope, The smaller the adjustment value, the larger the negative slope, and When the negative slope is greater than the preset negative slope, the gain circuit reduces the negative slope to generate the preset negative slope. The voltage control circuit as described in claim 1, further comprising: a sensing circuit, coupled to the adjustment circuit, configured to provide the first trimmed value based on the low temperature voltage value and provide the second trimmed value based on the high temperature voltage value, wherein the low temperature voltage value is negatively correlated with the first trimming value, and Wherein the high temperature voltage value is positively correlated with the second trimmed value. The voltage control circuit as claimed in claim 8, wherein the sensing circuit includes: A first resistor string, coupled between a high voltage source and a low voltage source, includes: a plurality of first resistors connected in series between the high voltage source and a first node; A plurality of second resistors are connected in series with each other between a second node and the low voltage source, wherein the voltage value at the second node is lower than the voltage value at the first node; A first selection circuit, a plurality of input terminals of the first selection circuit are respectively coupled to the first resistors to receive a plurality of different first voltage values, and respond to a first selection signal to select the first voltage values one of the voltage values as a first selected voltage value; and A second selection circuit, the multiple input terminals of the second selection circuit are respectively coupled to the second resistors to receive different multiple second voltage values, and respond to a second selection signal to select the first One of the two voltage values is used as a second selected voltage value. The voltage control circuit of claim 9, wherein when the difference between the first selected voltage value and the second selected voltage value is equal to the difference between the low temperature voltage value and the high temperature voltage value, The sensing circuit uses the digital value of the first selection signal corresponding to the first selected voltage value as the first trimming value, and uses the digital value of the second selection signal corresponding to the second selected voltage value as the second trimmed value. The voltage control circuit as claimed in claim 9, wherein the sensing circuit is further configured to provide a plurality of temperature voltage values of the adjusted reference voltage signal at different temperatures. The voltage control circuit as claimed in claim 11, wherein the sensing circuit further includes: a second resistor string including a plurality of third resistors coupled in series with each other; a first voltage stabilizing circuit, coupled to the output end of the first selection circuit and the first end of the second resistor string; and a second voltage stabilizing circuit, coupled to the output end of the second selection circuit and the second end of the second resistor string, Wherein the first voltage stabilizing circuit sets the voltage value at the first end of the second resistor string substantially equal to the low temperature voltage value, Wherein the second voltage stabilizing circuit sets the voltage value at the second end of the second resistor string substantially equal to the high temperature voltage value, Wherein the third resistors generate the temperature voltage values at different temperatures. The voltage control circuit as claimed in claim 12, wherein the voltage control circuit identifies the ambient temperature based on the temperature voltage values.

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