TWI793854B - Content addressable memory cell, content addressable memory device and operation method thereof, and method for data searching and comparing - Google Patents

Abstract

The application provides a content addressable memory (CAM) cell, a CAM memory device and an operation method thereof, and a method for searching and comparing data. The CAM cell includes a first flash memory cell having a first terminal for receiving a first search voltage; and a second flash memory cell having a first terminal for receiving a second search voltage, a second terminal of the first flash memory cell electrically connected to a second terminal of the second flash memory cell, wherein the first flash memory cell and the second flash memory cell are serially connected, a storage data of the CAM cell is based on a combination of a plurality of threshold voltages of the first flash memory cell and the second flash memory cell.

Description

Content addressable memory cell, content addressable memory device and operation thereof The method of operation and the method of data search and comparison

The present invention relates to a content addressable memory (Content Addressable Memory, CAM) unit cell, a CAM memory device and its operating method, and a method for searching and comparing data, and particularly relates to a method for realizing search ( A CAM unit cell of an In-memory searching (IMS) system, a CAM memory device, an operation method thereof, and a method for searching and comparing data.

With the rise of big data and artificial intelligence (AI) hardware accelerators, data search and data comparison are important functions. Existing Ternary Content Addressable Memory (TCAM) can be used to implement highly parallel searching. Conventional TCAM is usually composed of Static Random Access Memory (SRAM), so memory density is low and access power is high. To save power consumption through dense memory density, TCAM-based non-volatile memory arrays have recently been proposed.

Compared with the SRAM-based TCAM with 16 transistors (16T), a recently developed resistive random access memory (Resistive Random Access Memory, RRAM) with 2 transistors and 2 resistors (2T2R) structure TCAM to reduce the unit cell area. Standby power consumption can also be improved by using RRAM-based non-volatile TCAM. However, the resistivity (R-ratio) of RRAM is limited and it is difficult to distinguish the matching state from the mismatching state, so the RRAM is not enough for parallel searching of a large amount of data. Compared with the 2T2R structure, the TCAM array based on ferroelectric field effect transistor (Ferroelectric FET, FeFET) can provide higher on/off ratio (on/off ratio) and dense memory array, but the on-current of FeFET device The /off current ratio is still not high enough to affect the matching accuracy, so it is not suitable for long character search design.

In addition, in the genome analysis of DNA, the sequence quantity of DNA or RNA is measured by using Next Generation Sequencing (NGS) technology. The genome is cut and sequenced into multiple sets of data fragments (read), and then the multiple sets of data fragments are mapped to the reference genome (called read mapping (read mapping)) for genome matching and positioning. Read mapping is the most time-consuming part of the genome analysis process due to the large amount of memory required for read mapping and the limitations of the communication between memory and computing units (CPU/GPU).

Therefore, there is a need for a content addressable memory (Content Addressable Memory, CAM) unit cell, a content addressable memory device and its operation method, and a method for data search and comparison, when used to realize search in flash memory (In-memory searching, IMS) system and genome analysis, it can provide high matching accuracy and is suitable for long character search design.

According to an example of the present case, a content addressable memory unit cell is proposed, including: a first flash memory unit cell, a first end of the first flash memory unit cell is used to receive a first search voltage; A second flash memory unit cell, a first end of the second flash memory unit cell is used to receive a second search voltage, a second end of the first flash memory unit cell is connected to the first flash memory unit cell A second terminal of two flash memory unit cells is electrically connected; wherein the first flash memory unit cell and the second flash memory unit cell are connected in series, and one of the content addressable memory unit cells is stored Data is determined by a combination of threshold voltages of the first flash memory unit cell and the second flash memory unit cell.

According to another example of the present application, a content-addressable memory device is proposed, including: a plurality of first content-addressable memory unit cell strings, and these first content-addressable memory unit cell series include a plurality of first content-addressable memory unit cells Unit cells, each of the first content-addressable memory unit cells includes a plurality of flash memory unit cells, and the storage data of each of the first content-addressable memory unit cells is determined by each of the first content-addressable memory units A combination of a plurality of critical voltages of the flash memory unit cells of the unit cell; a first word line driver for providing a plurality of first search voltages and a plurality of second search voltages to address the first content memory unit cell; a plurality of first matching lines, coupled to the first content-addressable memory unit cells; a plurality of first sense amplifiers, coupled to the first matching lines; and a decoder, coupled to to those first sense amplifiers device, wherein, when the first search voltages and the second search voltages are applied to the first content-addressable memory cells, the first sense amplifiers sense the plurality of first sense amplifiers on the first match lines matching currents to generate a plurality of first sensing results; according to the first sensing results, the decoder generates a first matching address, and the first matching address indicates that a first search result matches the first contents Individual addresses for addressing memory cells.

According to another example of the present case, a method for operating a content-addressable memory device is proposed, including: programming a plurality of content-addressable memory unit cells, each of which includes a plurality of flash memory unit cells, each The data stored in one of the content-addressable memory cells is determined by a combination of a plurality of threshold voltages of the flash memory cells in each of the content-addressable memory cells, and the content-addressable memory cells are coupled to to a plurality of matching lines; applying a plurality of first search voltages and a plurality of second search voltages to the content-addressed memory cells; inducing a plurality of matching currents on the matching lines to generate a plurality of induction results; and according to the The sensing results generate a matching address indicating individual addresses of the content-addressed memory cells for which a search result matches.

According to another example of this case, a content-addressable memory device is proposed, including: a plurality of content-addressable memory unit cell series, and each of the content-addressable memory unit cell series includes a plurality of content-addressable memory unit cells, each of which These content-addressable memory cells include a plurality of series-connected flash memory unit cells, and the individual storage data of each of the content-addressable memory unit series is related to a part of a reference string (reference string) data; a Word line decoding and driver to provide multiple search voltages For the content-addressable memory unit cells, in a plurality of comparison rounds, the word line decoder and driver determine the search voltages applied to the content-addressable memory unit cells according to a data segment (read); A plurality of matching lines, coupled to the content-addressable memory cells; a plurality of sensing counting circuits, coupled to the matching lines; and a decoder, coupled to the sensing counting circuits, wherein, among the sensing counting circuits In a comparison round, when the search voltages are applied to the content-addressable memory cells, the sensing and counting circuits sense and count a plurality of matching currents on the matching lines to generate a plurality of counting results, and the decoder is based on The counting results of the sensing counting circuits determine whether the data segment matches the reference serial data.

According to another example of this case, a method for data search and comparison is proposed, including: programming a plurality of content-addressable memory cells, each of which includes a plurality of series-connected flash memory unit cells, each of which Individually stored data of the content-addressable memory cell series is related to a portion of a reference serial data, the content-addressable memory unit cells are coupled to a plurality of match lines; a plurality of search voltages are applied to the content Addressing memory cells, during a plurality of comparison rounds, a data segment is used to determine the search voltages applied to the content addressable memory cells; during the comparison rounds, sensing and counting the matches A plurality of matching currents on the line is used to generate a plurality of counting results; and according to the counting results, it is determined whether the data segment matches the reference serial data.

In order to have a better understanding of the above-mentioned and other aspects of the present invention, the following specific examples are given in detail with the accompanying drawings as follows:

100, 200, 300, 400, 504, 604, 704, 804: content-addressable memory cells

500A, 600, 700, 800: content addressable memory devices

502-1~502-n, 602-1~602-2n, 702-1~702-2n, 802: content addressable memory unit cell series

508, 608-1, 608-2, 708-1, 708-2: word line drivers

510-1~510-n, 610-1~610-2n, 710-1~710-2n, 812: matching line

512-1~510-n, 612-1~612-2n, 712-1~712-2n, SA: induction amplifier

514,616,716,816: Decoders

606,704-1,704-2,806,T1,T2: flash memory unit cell

614-1~614n, 714-1~714n: logic gate

808: word line decoding and driver

810: bit line driver

814-1~814-n: induction counting circuit

820A, 820B, 820C, 820D: reference list

820A-1~820A-X,820B-1~820B-X,820C-1~820C-X,820D-1~820D-X: part

822A, 822B, 822C, 822D: fragments of data

822A-1~822A-Y, 822B-1~822A-3, 822C-1~822C-Y, 822D-1~822A-Y: seed information

824,826: area

MA, MB: match address

SL: Search voltage

BL1~BL2n: bit line voltage

SL_1,SL(1)_1,SL(2)_1,...,SL(M)_1,SL(1)_1,SL(2)_1,...,SL(M)_1: first search voltage

SL_2,SL(1)_2,SL(2)_2,...,SL(M)_2,SL(1)_2,SL(2)_2,...,SL(2M)_2: second search voltage

SL(M+1)_1,SL(M+2)_1,...,SL(2M)_1: the third search voltage

SL(M+1)_2,SL(M+2)_2,...,SL(2M)_2: the fourth search voltage

G1, G2: gate

S1, S2: source

C: Counter

1002~1008,1102~1108: steps

FIG. 1 shows a schematic diagram of a content addressable memory (CAM) unit cell and its operation according to the first embodiment of the present invention.

FIG. 2 shows a schematic diagram of a content-addressable memory unit cell and its operation according to the second embodiment of the present invention.

FIG. 3 shows a schematic diagram of a content-addressable memory unit cell and its operation according to a third embodiment of the present invention.

FIG. 4 shows a schematic diagram of a content-addressable memory unit cell and its operation according to a fourth embodiment of the present invention.

FIG. 5A shows a schematic circuit diagram of a content-addressable memory device according to a fifth embodiment of the present invention.

FIG. 5B is a schematic diagram showing the operation of the CAM device according to the fifth embodiment.

FIG. 6A shows a schematic circuit diagram of a content-addressable memory device according to a sixth embodiment of the present invention.

FIG. 6B is a schematic diagram showing the operation of the CAM device according to the sixth embodiment.

FIG. 7 shows a schematic circuit diagram of a content-addressable memory device according to a seventh embodiment of the present application.

FIG. 8A shows a schematic view of the eighth embodiment of the content addressable memory device and its operation.

Figure 8B shows the second operation of the content-addressable memory device of the eighth embodiment schematic diagram.

FIG. 8C shows a schematic diagram of the third operation of the CAM device according to the eighth embodiment.

FIG. 8D shows a schematic diagram of the fourth operation of the CAM device according to the eighth embodiment.

Figure 9 shows a schematic diagram of using wildcards to speed up data search and comparison.

FIG. 10 shows the operation method of the content addressable memory device according to the ninth embodiment of the present application.

Fig. 11 shows the operation method of the content addressable memory device according to the tenth embodiment of the present application.

The technical terms in this specification refer to the customary terms in this technical field. If some terms are explained or defined in this specification, the explanations or definitions of these terms shall prevail. Each embodiment of the disclosure has one or more technical features. On the premise of possible implementation, those skilled in the art may selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.

first embodiment

FIG. 1 shows a content addressable memory (Content Addressable Memory, CAM) unit cell 100 and its operation diagram according to the first embodiment of the present application. As shown in FIG. 1 , the content-addressable memory cell 100 of the first embodiment of the present application is, for example but not limited to, a multi-level CAM (multi-level CAM, MLC) capable of storing two bits.

The content-addressable memory cell 100 includes: two series-connected flash memory cells T1 and T2, wherein the flash memory cells are, for example but not limited to, floating gate memory cells ( floating gate memory cell), silicon-oxide-nitride-oxide-silicon (Silicon-Oxide-Nitride-Oxide-Silicon, SONOS) memory cell, floating dot memory cell, iron Field effect transistor memory cell (Ferroelectric FET (FeFET) memory cell), etc.

The gate G1 of the flash memory cell T1 is used to receive the first search voltage SL_1, the gate G2 of the flash memory cell T2 is used to receive the second search voltage SL_2, and the source of the flash memory cell T1 S1 is electrically connected to the source S2 of the flash memory unit cell T2.

In addition, in the first embodiment of the present case, the critical voltage of the flash memory cell T1 (also referred to as the first critical voltage), the critical voltage of the flash memory cell T2 (also referred to as the second critical voltage) ), the first search voltage SL_1 and the second search voltage SL_2 can have multiple settings. In FIG. 1, the setting of the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can be set as the following table, and the details are omitted here:

In the first embodiment of this case, when the stored data is the first predetermined stored data (00), the first critical voltage is VT1 (also called the minimum critical voltage value), and the second critical voltage is VT4 (also called maximum critical voltage value); when the storage data is the second predetermined storage data (11), the first critical voltage is a maximum critical voltage value, and the second critical voltage is a minimum critical voltage value; when the storage data is the third predetermined storage data data (XX (don't care)), the first threshold voltage and the second threshold voltage are a minimum threshold voltage value; when the storage data is the fourth predetermined storage data (ie invalid data), the first threshold voltage and The second critical voltage is equal to or greater than a maximum critical voltage value. That is, in the first embodiment of the present application, the storage data of the content-addressable memory cell 100 is determined by the combination of the first threshold voltage and the second threshold voltage.

In the first embodiment of this case, when the search data is the first predetermined search data When material (00), the first search voltage SL_1 is VS1 (also called the minimum search voltage value), the second search voltage SL_2 is VS4 (also called the maximum search voltage value), where the search data represents the desired search data; when the search data is the second predetermined search data (11), the first search voltage SL_1 is a maximum search voltage value, and the second search voltage SL_2 is a minimum search voltage value; when the search data is the third predetermined search data When (WC), the first search voltage SL_1 and the second search voltage SL_2 both have a maximum search voltage value.

Therefore, when performing a search, when the search data matches the stored data, both the flash memory cell T1 and the flash memory cell T2 generate a matching current, indicating that the search result is a match; when the search data does not match the stored data When at least one of the flash memory cell T1 and the flash memory cell T2 is non-conductive and does not generate a matching current, it means that the search result is a mismatch; when the search data is a wildcard (wildcard, WC), regardless of the value of the stored data, the flash memory cell T1 and the flash memory cell T2 both generate a matching current, which means that the search result is a match; when the stored data is XX (don't care, not important) , regardless of the value of the search data, the flash memory cell T1 and the flash memory cell T2 both generate matching currents, which means that the search result is a match. For example, when the search data (00) matches the storage data (00), both the flash memory cell T1 and the flash memory cell T2 generate matching currents, indicating that the search result is a match; when the search data (00) is not When matching to store data (01), the flash memory cell T1 is turned off and the flash memory cell T2 is turned on, and no matching current is generated, which means that the search result is a mismatch. Therefore, the matching situation between the search data and the stored data can be shown in the following table, and its details are omitted here:

○: Flash memory cell conduction, X: Flash memory cell not conduction

In another embodiment, the search data will be matched to the least similar stored data, ie, a match is considered when the found stored data is complementary to the search data. Details will now be described. The settings of the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can be set as follows:

For example, if the first threshold voltage and the second threshold voltage are VT1 and VT4 respectively, it is considered that the stored data is 00, then the stored data (00) matches the most dissimilar search data (11) (that is, the first search voltage SL_1 and the second search data The two search voltages SL_2 are respectively VS4 and VS1), so that both the flash memory cell T1 and the flash memory cell T2 are turned on to generate a matching current, which means that the search result is a match; if the search data (11) and the storage data ( 11) (that is, the first critical voltage and the second critical voltage are VT4 and VT1 respectively) to search and compare, if the flash memory cell T1 is turned on and the flash memory cell T2 is turned off, no matching current will be generated, which means The search result is a mismatch; if the search data (11) and the storage data (01) (that is, the first threshold voltage and the second threshold voltage are respectively VT2 and VT3) are searched and compared, the flash memory cell T1 is turned on and fast When the flash memory cell T2 is turned off, no matching current will be generated, which means that the search result is a mismatch. Therefore, the matching situation between the search data and the stored data can be shown in the following table, and its details are omitted here:

In yet another embodiment, the search data will be matched to the least similar (complementary) stored data. Details will now be described. The settings of the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can be set as follows:

For example, the first search voltage SL_1 and the second search voltage SL_2 are VS4 and VS1 (that is, the search data is 00), then the search data (00) matches the most dissimilar (complementary) storage data (11) (that is, the first threshold voltage and the second critical voltage are VT4 and VT1 respectively), so that both the flash memory cell T1 and the flash memory cell T2 are turned on to generate a matching current, which means that the search result is a match; if the search data (00) and the storage Data (00) (that is, the first threshold voltage and the second threshold voltage are VT1 and VT4 respectively) are searched and compared, and the flash memory cell T1 is turned on while the flash memory cell T2 is turned off, no matching current will be generated , which means that the search result does not match; if the search data (00) and the stored data (01) are searched and compared (that is, the first threshold voltage and the second threshold voltage are VT2 and VT3 respectively), the flash memory cell T1 is turned on When the flash memory cell T2 is turned off, no matching current will be generated, which means that the search result is a mismatch. Therefore, the matching situation between the search data and the stored data can be shown in the following table, and its details are omitted here:

second embodiment

Please refer to FIG. 2 , which shows a schematic diagram of a content-addressable memory cell 200 and its operation according to the second embodiment of the present invention. The CAM cell 200 is, for example but not limited to, a triple-level CAM (TLC) capable of storing three bits.

In the second embodiment of the present application, the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can also be set differently. In FIG. 2, the setting of the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can be set as the following table, and the details are omitted here:

In the second embodiment of this case, when the stored data is the first predetermined stored data (000), the first threshold voltage is VT1 (also called the minimum threshold voltage value), and the second threshold voltage is VT8 (also called the minimum threshold voltage value). maximum critical voltage value); when the storage data is the second predetermined storage data (111), the first critical voltage is a maximum critical voltage value, and the second critical voltage is a minimum critical voltage value; when the storage data is the third predetermined storage data (XXX (don't care)), the first threshold voltage and the second threshold voltage are a minimum threshold voltage value; when the storage data is the fourth predetermined storage data (ie invalid data), the first threshold voltage and The second critical voltage is equal to or greater than a maximum critical voltage value. That is, in the second embodiment of the present application, the storage data of the content-addressable memory cell 200 is determined by the combination of the first threshold voltage and the second threshold voltage.

In the second embodiment of the present case, when the search data is the first predetermined search data (000), the first search voltage SL_1 is VS1 (also called the minimum search voltage value), and the second search voltage SL_2 is VS8 (also is called the maximum search voltage value); when the search data is the second predetermined search data (111), the first search voltage SL_1 is a maximum search voltage value, and the second search voltage SL_2 is a minimum search voltage value; when the search data is In the third predetermined search data (WC), both the first search voltage SL_1 and the second search voltage SL_2 are a maximum search voltage value.

Therefore, when performing a search, when the search data matches the stored data, both the flash memory cell T1 and the flash memory cell T2 generate a matching current, indicating that the search result is a match; when the search data does not match the stored data When at least one of the flash memory cell T1 and the flash memory cell T2 is non-conductive and does not generate a matching current, it means that the search result is a mismatch; when the search data is a wildcard (wildcard, WC), regardless of the value of the stored data, the flash memory cell T1 and the flash memory cell T2 both generate a matching current, which means that the search result is a match; when the stored data is XX (don't care, not important) , regardless of the value of the search data, the flash memory cell T1 and the flash memory cell T2 both generate matching currents, which means that the search result is a match. For example, when the search data (000) matches the storage data (000), both the flash memory cell T1 and the flash memory cell T2 generate matching currents, indicating that the search result is a match; when the search data (000) is not When matching to store data (001), the flash memory cell T1 is turned off and the flash memory cell T2 is turned on, and no matching current is generated, which means that the search result is a mismatch. Therefore, the matching situation between the search data and the stored data can be shown in the following table, and its details are omitted here:

third embodiment

Please refer to FIG. 3 , which shows a schematic diagram of a content-addressable memory cell 300 and its operation according to a third embodiment of the present invention. The CAM cell 300 is, for example but not limited to, a quad-level CAM (quad-level CAM, QLC) capable of storing four bits.

In the third embodiment of the present application, the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can also be set differently. In FIG. 3, the setting of the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can be set as the following table, and the details are omitted here:

In the third embodiment of this case, when the stored data is the first predetermined stored data (0000), the first critical voltage is VT1 (also called the minimum critical voltage value), and the second critical voltage is VT16 (also called the minimum critical voltage value). maximum threshold voltage value); when the stored data is the second predetermined storage data (1111), the first critical voltage is a maximum critical voltage value, and the second critical voltage is a minimum critical voltage value; when the stored data is the third predetermined storage data (XXXX (don't care)), the first threshold voltage and the second threshold voltage are a minimum threshold voltage value; when the storage data is the fourth predetermined storage data (ie invalid data), the first threshold voltage and The second critical voltage is equal to or greater than a maximum critical voltage value. That is to say, in the third embodiment of the present application, the storage data of the content-addressable memory cell 300 is determined by the combination of the first threshold voltage and the second threshold voltage.

In the third embodiment of this case, when the search data is the first predetermined search data (0000), the first search voltage SL_1 is VS1 (also called the minimum search voltage value), and the second search voltage SL_2 is VS16 (also is called the maximum search voltage value); when the search data is the second predetermined search data (1111), the first search voltage SL_1 is a maximum search voltage value, and the second search voltage SL_2 is a minimum search voltage value; when the search data is In the third predetermined search data (WC), both the first search voltage SL_1 and the second search voltage SL_2 are a maximum search voltage value.

In the third embodiment of this case, when the search data matches the stored data, both the flash memory cell T1 and the flash memory cell T2 generate a matching current, which means that the search result is a match; when the search data does not match the stored data When data is collected, at least one of the flash memory unit cell T1 and the flash memory unit cell T2 is not conducted and no matching current is generated, which means that the search result is a mismatch. That is to say, the matching conditions of the storage data and the search data in the third embodiment of the present invention are similar to those of the first embodiment and the second embodiment of the present invention, and the details thereof are omitted here.

Fourth embodiment

Please refer to FIG. 4 , which shows a schematic diagram of a content-addressable memory cell 400 and its operation according to a fourth embodiment of the present application. The CAM cell 400 is, for example but not limited to, a penta-level CAM (PLC) capable of storing 5 bits.

In the fourth embodiment of the present application, the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 may also be set differently. In FIG. 4, the setting of the first threshold voltage, the second threshold voltage, the first search voltage SL_1 and the second search voltage SL_2 can be set as the following table, and the details are omitted here:

In the fourth embodiment of the present case, when the stored data is the first predetermined stored data (00000), the first critical voltage is VT1 (also called the minimum critical voltage value), and the second critical voltage is VT32 (also called the minimum critical voltage value). maximum threshold voltage value); when the stored data is the second When the predetermined storage data (11111), the first threshold voltage is a maximum threshold voltage value, and the second threshold voltage is a minimum threshold voltage value; when the storage data is the third predetermined storage data (XXXXX (don't care)), Both the first threshold voltage and the second threshold voltage are a minimum threshold voltage value; when the storage data is the fourth predetermined storage data (ie invalid data), the first threshold voltage and the second threshold voltage are equal to or greater than a maximum threshold voltage value . That is, in the fourth embodiment of the present application, the storage data of the content-addressable memory cell 400 is determined by the combination of the first threshold voltage and the second threshold voltage.

In the fourth embodiment of the present case, when the search data is the first predetermined search data (00000), the first search voltage SL_1 is VS1 (also called the minimum search voltage value), and the second search voltage SL_2 is VS32 (also can be is called the maximum search voltage value); when the search data is the second predetermined search data (11111), the first search voltage SL_1 is a maximum search voltage value, and the second search voltage SL_2 is a minimum search voltage value; when the search data is In the third predetermined search data (WC), both the first search voltage SL_1 and the second search voltage SL_2 are a maximum search voltage value.

In the fourth embodiment of this case, when the search data matches the stored data, both the flash memory cell T1 and the flash memory cell T2 generate a matching current, which means that the search result is a match; when the search data does not match the stored data When data is collected, at least one of the flash memory unit cell T1 and the flash memory unit cell T2 is not conducted and no matching current is generated, which means that the search result is a mismatch. That is to say, the matching conditions of the storage data and the search data in the fourth embodiment of the present case are similar to the first embodiment, the second embodiment of the present case, and the third embodiment of the present case, and the details thereof are omitted here.

fifth embodiment

FIG. 5A shows a schematic circuit diagram of a CAM memory device 500A according to the fifth embodiment of the present application, and FIG. 5B shows a schematic diagram of the operation of the CAM memory device 500A according to the fifth embodiment.

As shown in FIG. 5A, the CAM memory device 500A according to the fifth embodiment includes a plurality of content-addressable memory unit cell series 502-1~502-n, a word line driver 508, and a plurality of matching lines 510-1 ~510-n, a plurality of sense amplifiers 512-1~512-n and a decoder 514.

The content-addressable memory cell series 502 - 1 - 502 - n include a plurality of content-addressable memory cells 504 , and the plurality of content-addressable memory unit cells 504 include a plurality of series-connected flash memory unit cells 506 . Wherein, these content-addressable memory unit cells 504 may be the same as or similar to the content-addressable memory unit cell 100 of the first embodiment, the content-addressable memory unit cell 200 of the second embodiment, and the content-addressable memory unit cell of the third embodiment The bulk cell 300 and the content-addressable memory cell 400 of the fourth embodiment.

The word line driver 508 is used for providing a plurality of first search voltages SL(1)_1, SL(2)_1, . . . , SL(M)_1 and a plurality of second search voltages SL(1)_2, SL( 2)_2, . . . , SL(M)_2 to these contents address the memory cell 504 . Bit line voltages BL1-BLn are applied to the content-addressable memory cell series 502-1-502-n. The matching lines 510-1~510-n are coupled to the content-addressable memory cells 504, the sense amplifiers 512-1~510-n are coupled to the matching lines 510-1~510-n, The decoder 514 is coupled to the sense amplifiers 512-1˜510-n.

In the fifth embodiment of the present case, one of the content addressable memory unit cells 504 The storage data is determined by the combination of multiple threshold voltages of the flash memory cell 506 of the content addressable memory cell 504, and the threshold voltage setting of the content addressable memory cell 504 can be the same as or similar to that of the first embodiment and the second embodiment. embodiment, the third embodiment and the fourth embodiment; and, for the first search voltage SL(1)_1, SL(2)_1, . . . , SL(M)_1 and the second search voltage SL(1) The settings of _2, SL(2)_2, . . . , SL(M)_2 may be the same or similar to those of the first embodiment, the second embodiment, the third embodiment and the fourth embodiment. Therefore, its details are omitted here.

When the first search voltages SL(1)_1, SL(2)_1, . . . , SL(M)_1 and the second search voltages SL(1)_2, SL(2)_2, . . . , when SL(M)_2 is applied to the content-addressable memory cells 504, the sense amplifiers 512-1~510-n sense a plurality of matching currents on the matching lines 510-1~510-n to generate A plurality of first sensing results. According to the first sensing results, the decoder 514 generates a matching address MA, which indicates that the content-addressed memory cell(s) of the series of content-addressed memory cells in which the storage data matches the search data 504 individual addresses.

In FIG. 5A, the search data includes a plurality of search characters, and the stored data of the CAM cells 504 includes a plurality of data characters.

To understand the operation of the fifth embodiment, please refer to FIG. 5B. The threshold voltage setting and search voltage setting are as described in the first embodiment, the search character is [10110001], the first data word (Data word 1) is [10110001], and the second data word (Data word 2) is [10100001], the third data character (Data word 3) is [01001110] as an example for illustration, it should be known that this case is not limited to this.

When searching the CAM cell string 502-1 (storing the first data character [10110001]) with the search character [10110001], all content addressable memory cell strings 502-1 All the flash memory cells of the memory cell 504 are turned on, so a matching current is generated on the associated matching line 510 - 1 . When searching for the first data character [10110001] with the search character [10110001], the search result is a match. Wherein, MA represents the address of the content-addressable memory cell of the content-addressable memory cell string 502-1.

Similarly, when the search character [10110001] is used to search the CAM cell string 502-2 (storing the second data character [10100001]), the CAM cell string 502-2 At least one flash memory cell of the CAM cells 504 is turned off, so no match current is generated on the associated match line 510 - 2 . When searching for the second data character [10100001] with the search character [10110001], the search result is no match.

Similarly, when searching for the third data character [01001110] with the search character [10110001], the search result is no match.

Sixth embodiment

FIG. 6A shows a schematic circuit diagram of a CAM memory device 600 according to the sixth embodiment of the present application, and FIG. 6B shows a schematic diagram of the operation of the CAM memory device 600 according to the sixth embodiment.

As shown in Figure 6A, the CAM memory device 600 according to the sixth embodiment includes a plurality of content-addressable memory cell strings 602-1~602-2n, word line drivers 608-1 and 608-2, a plurality of Matching lines 610-1~610-2n, complex A plurality of sense amplifiers 612 - 1 - 612 - 2 n , a plurality of logic gates 614 - 1 - 614 n and a decoder 616 .

The CAM cell strings 602 - 1 - 602 - 2 n include a plurality of CAM cells 604 , and the CAM cells 604 include a plurality of cascaded flash memory cells 606 . Wherein, these content-addressable memory unit cells 604 may be the same as or similar to the content-addressable memory unit cell 100 of the first embodiment, the content-addressable memory unit cell 200 of the second embodiment, and the content-addressable memory unit cell of the third embodiment The bulk cell 300 and the content-addressable memory cell 400 of the fourth embodiment.

The word line driver 608-1 is used for providing a plurality of first search voltages SL(1)_1, SL(2)_1, . . . , SL(M)_1 and a plurality of second search voltages SL(1)_2, SL(2)_2, . . . , SL(M)_2 through these address the memory cell 604 . The word line driver 608-2 is used for providing a plurality of third search voltages SL(M+1)_1, SL(M+2)_1, . . . , SL(2M)_1 and a plurality of fourth search voltages SL( The contents of M+1)_2, SL(M+2)_2, . . . , SL(2M)_2 address the memory cell 604 .

Bit line voltages BL1˜BL(2n) are applied to the content-addressable memory unit cell series 602-1˜602-2n. The match lines 610 - 1 - 610 - 2n are coupled to the CAM cells 604 .

The sense amplifiers 612-1~612-2n are coupled to the matching lines 610-1~610-2n for sensing the content generated by the content-addressable memory cell strings 602-1~602-2n The matching current.

These logic gates 614-1~614-n receive corresponding sense amplifiers Sensing results of 612-1~612-2n, and output logic operation results to decoder 616. For example, the logic gate 614 - 1 receives the sensing results of the corresponding sense amplifiers 612 - 1 and 612 -(n+1), and outputs the logic operation result to the decoder 616 . The logic gates 614-1˜614-n are, for example but not limited to, AND logic gates.

In the sixth embodiment of the present case, the data stored in the content-addressable memory cell 604 is determined by the combination of multiple threshold voltages of the flash memory unit 606 in the content-addressable memory cell 604, and the content-addressable memory cell The threshold voltage setting of 604 can be the same or similar to the first embodiment, the second embodiment, the third embodiment and the fourth embodiment; and the setting of these search voltages SL(1)_1~SL(2M)_2 It may be the same as or similar to the first embodiment, the second embodiment, the third embodiment and the fourth embodiment, so details thereof are omitted here.

When the first search voltages SL(1)_1, SL(2)_1, . . . , SL(M)_1, the second search voltages SL(1)_2, SL(2)_2, . . . , SL(M)_2, the third search voltages SL(M+1)_1, SL(M+2)_1,..., SL(2M)_1 and the fourth search voltages SL(M+1 )_2, SL(M+2)_2,...,~SL(2M)_2 are applied to the content-addressable memory unit 604, the sense amplifiers 612-1~612-2n sense the matching lines The plurality of matching currents on 610-1˜610-2n generate a plurality of first induction results and second induction results. The logic gates 614-1~614-n are performed according to the first sensing results of the sensing amplifiers 612-1~612-n and the second sensing results of the sensing amplifiers 612-(n+1)~612-2n. Logical operations to generate complex logical operation results. Decoder 616 according to the first sensing results and the second The logical operation results of the sensing results generate matching addresses MA and MB, and the matching addresses MA and MB indicate that the stored data matches the content-addressed memory cell string(s) of the search data Individual address of unit cell 604 .

In FIG. 6A, the search data includes a plurality of search characters, and the storage data of the CAM cells 604 includes a plurality of data characters.

The sixth embodiment is applicable to long search characters. Long characters can be split into two characters (or more characters). It will be explained below.

To understand the operation of the sixth embodiment, please refer to FIG. 6B. The threshold voltage setting and search voltage setting are as described in the first embodiment. Split the long search character into the first search character [10110001] and the second search character [11001010]. The long data characters are disassembled into: the first data word (Data word 1) is [10110001] (stored in the CAM cell string 602-1) and the second data word (Data word 2) is [ 11001010] (stored in CAM cell string 602-(n+1)). Similarly, another long data character is disassembled into: the third data character (Data word 3) is [01001110] (stored in the content addressable memory unit cell string 602-2), the fourth data character (Data word 3) word 4) is [11001010] (stored in the CAM cell string 602-(n+2)). Similarly, another long data character is disassembled into: the fifth data character (Data word 5) is [11011010] (stored in the content addressable memory cell string 602-3), the sixth data character ( Data word 6) is [00110101] (stored in the CAM cell string 602-(n+3)). The above example is for illustration, and it should be understood that this case is not limited thereto.

When the first data character [10110001] is searched with the first search character [10110001], all contents of the content-addressed memory cell string 602-1 All flash memory cells that can accommodate the addressable memory cell 604 are turned on to generate a matching current. Therefore, when the first data character [10110001] is searched with the first search character [10110001], the search result is a match, and the sense amplifier 612-1 senses a matching current to generate a logic value 1 (that is, the first sense result ). Similarly, when the second data character [11001010] is searched with the second search character [11001010], all of the CAM cell string 602-(n+1) CAM cell 604 All of the flash memory cells are turned on to generate a matching current. Therefore, when searching the second data character [11001010] with the second search character [11001010], the search result is a match, and the sense amplifier 612-(n+1) senses a matching current to generate a logic value 1 (ie second induction result). Since both input terminals of the logic gate 614 - 1 are logic 1, the logic gate 614 - 1 outputs a logic 1 to the decoder 616 . The decoder 616 generates matching addresses MA and MB accordingly, wherein the matching address MA represents the addresses of the content-addressed memory cells 604 of the content-addressed memory cell string 602-1; the matching address MB represents The addresses of the CAM cell 604 of the CAM cell string 602 −(n+1).

Similarly, when the first search character [10110001] is used to search the third data character [01001110], the search result is a mismatch, and the sense amplifier 612-2 does not sense the matching current and generates a logic value of 0 (that is, the first an induction result). Similarly, when the second search character [11001010] is used to search the fourth data character [11001010], the search result is a match, and the sense amplifier 612-(n+2) senses a matching current to generate a logic value 1 ( That is, the second induction result). However, since the two input terminals of the logic gate 614 - 2 are not both logic 1, the logic gate 614 - 2 outputs a logic 0 to the decoder 616 .

Similarly, when the first search character [10110001] is used for the fifth data character [11011010] When performing a search, the search result is a mismatch, and the sense amplifier 612-3 does not sense a matching current and generates a logic value of 0 (ie, the first sense result). Similarly, when the second search character [11001010] is used to search the sixth data character [00110101], the search result is a mismatch, and the sense amplifier 612-(n+3) does not sense a matching current to generate a logic value 0 (that is, the second induction result). However, since the two input terminals of the logic gate 614 - 3 are not both logic 1, the logic gate 614 - 3 outputs a logic 0 to the decoder 616 .

In this way, through the CAM memory device 600, long words can be searched to improve the performance of the CAM device. Furthermore, the CAM memory device 600 can further reduce the length of the content-addressable memory cell series (such as NAND series), so as to reduce the RC delay, thereby speeding up the response speed of the content-addressable memory device.

Seventh embodiment

FIG. 7 shows a schematic circuit diagram of a CAM memory device 700 according to a seventh embodiment of the present application.

As shown in FIG. 7, the CAM memory device 700 according to the seventh embodiment includes a plurality of content-addressable memory unit cell series 702-1~702-2n, word line drivers 708-1 and 708-2, a plurality of Matching lines 710-1-710-2n, a plurality of sense amplifiers 712-1-712-2n, a plurality of logic gates 714-1-714n and a decoder 716. Bit line voltages BL1˜BL(2n) are applied to the content-addressable memory unit cell series 702-1˜702-2n. The content-addressable memory cell 704 of the CAM memory device 700 stores data, threshold voltage setting, and matching operation in the same or similar manner as the CAM memory device 600 of the sixth embodiment, and details thereof are omitted here.

In the seventh embodiment, the content-addressable memory cell 704 includes two The flash memory cell is taken as an example, and the two flash memory cells belong to different CAM cell strings respectively. For example, the CAM cell 704 includes two flash memory cells 704-1 and 704-2, and the flash memory cells 704-1 and 704-2 belong to different CAM cell strings respectively. Columns 702-n and 702-2n.

Eighth embodiment

Please refer to FIG. 8A to FIG. 8D , which show the content addressable memory device 800 of the eighth embodiment and four schematic diagrams of its operations.

As shown in FIG. 8A to FIG. 8D, the CAM device 800 includes a plurality of CAM cell series 802, a word line decoding and driver 808, a bit line driver 810, a plurality of matching lines 812, A plurality of induction counting circuits (SC) 814 - 1 ~ 814 - n and a decoder 816 .

The CAM cell strings 802 include a plurality of CAM cells 804 , and the CAM cells 804 include a plurality of flash memory cells 806 . These CAM cells 804 may be the same as or similar to the CAM cell 100 of the first embodiment, the CAM cell 200 of the second embodiment, and the CAM cell of the third embodiment. The CAM cell 300 of the fourth embodiment, the CAM cell 504 of the fifth embodiment, and the CAM cell 604 of the sixth embodiment.

The word line decoder and driver 808 is used to provide a plurality of search voltages SL to the content-addressable memory cells 804 . The match lines 812 are coupled to the content-addressable memory cells 804, and the sensing counting circuits 814-1~814-n are coupled to To the matching lines 812, the decoder 816 is coupled to the sensing and counting circuits 814-1˜814-n.

Each of the sense counting circuits 814-1˜814-n includes a plurality of sense amplifiers SA and a counter C. The sense amplifiers SA are used to sense whether the corresponding content-addressed memory cell string 802 has matching current. For example, the sensing counting circuit 814-1 is coupled to the 1st~6th CAM cell strings 802 to sense the matching current of the 1st~6th CAM cell strings 802; the sensing counting circuit 814 -2 is coupled to the 4th to 9th CAM cell strings 802 to sense the matching current of the 4th to 9th CAM cell strings 802 , and so on.

When the matching current of the corresponding CAM cell string 802 is sensed, the sense amplifiers SA output the sense result to the counter C. The counter C counts the number of sense amplifiers SA outputting the sensing result to become the counting result.

In the eighth embodiment of the present invention, the individual storage data of the CAM cell string 802 is related to a part of a reference string data 820A. Reference string data 820A is, for example but not limited to, a genome. As shown in FIG. 8A, the reference serial data 820A includes a plurality of parts 820A-1~820A-X (X is a positive integer). Reference list 820A includes, for example but not limited to, CAATCCCCATCATCATTAAAGCGATGGCACACACAGCATGCCCAATGACTGATTTAGCA, the first part of reference list 820A 820A-1 includes data bits 1-4 (CAAT) stored in the first CAM cell string 802; the second part 820A-2 of reference serial data 820A includes bits 5-8 data bits (CCCC), stored in the second CAM cell string 802, and so on. Wherein, the Xth part 820A-X of the reference serial data 820A includes the last two data bits (CA), stored in one of the CAM cell serials 802 . When selecting reference series data, it is not selected by sliding, so it can be called a fixed reference series data selection method.

In a plurality of comparison rounds, the word line decoder and driver 808 determines the search voltages SL applied to the CAM cells 804 according to a data segment (read) 822A. Wherein, in each comparison round, the word line decoding and driver 808 selects a seed (seed) data 822A-1~822A-Y from the data segment 822A (Y is a positive integer, in the 8A example, Y=12, But this case is not limited to one of this), the word line decoding and driver 808 determines the search voltages SL applied to the content-addressable memory unit cells 804 according to the selected seed data 822A-1~822A-Y .

As shown in FIG. 8A, the data segment 822A includes a plurality of data bits, such as but not limited to, AAAGCGATGGCACA. The 1st to 4th data bits (AAAG) of the data fragment 822A are used as the seed data 822A-1 of the first comparison round, and the 2nd to 5th data bits (AAGC) of the data fragment 822A are used as the second Compare the seed data 822A-2 of the round, and so on. This is called the sliding seed selection method.

Among them, when the last comparison round or the last few comparison rounds When the number of data bits of the seed data is small, one or several wildcards (WC) X are applied to the seed data with a small number of data bits, so that the last comparison round or the last few comparisons The number of data bits of the seed data of the round is equal to the number of data bits of the seed data of the previous round of comparison. As shown in Figure 8A, the seed data 822A-12 of the last comparison round is the last 3 data bits (ACA) of the data segment 822A, and the number of data bits is relatively small, so a wildcard is added X to the seed data 822A-12 of the last comparison round, so that the number of data bits of the seed data 822A-12 of the last comparison round is equal to the number of data bits of the seed data of the previous round of comparison. By adding the wildcard X to the seed data of the last comparison round or several last comparison rounds, the seed data of each comparison round has the same number of data bits.

In the eighth embodiment, A, T, C and G represent, for example but not limited to, 00, 01, 10, 11. For example, when the content-addressable memory cell 804 is written into A, it means that the storage data 00 is stored in the content-addressable memory cell 804 . Similarly, if the seed data 822A-1 is AAAG, it means that the search voltages are set to 00, 00, 00, 11. The rest can be deduced by analogy. As for the settings of the threshold voltage and the search voltage, reference may be made to the previous embodiments, and the details thereof will not be repeated here.

Therefore, in these comparison rounds, when the search voltages SL are applied to the content-addressable memory cells 804, the sensing and counting circuits 814-1~814-n sense and count the matching lines 812 A plurality of matching currents to generate a plurality of counting results, the decoder 816 determines whether the data segment 822A matches the See Listing 820A.

As shown in FIG. 8A, the individual storage data of the 5th-7th content-addressed memory cell string 802 are respectively matched with the seed data 822A-3 (AGCG) of the 3rd comparison round and the 7th comparison round. The seed data 822A-7 (ATGG) and the seed data 822A-11 (CACA) of the eleventh comparison round generate 3 matching currents. Therefore, the sensing and counting circuit 814-1 corresponding to the 5th-6th content-addressed memory cell series 802 senses and counts 2 matching currents to generate the counting result (2), corresponding to the 5th-7th content-addressed The sensing and counting circuit 814-2 of the memory unit cell series 802 senses and counts 3 matching currents to generate the counting result (3), corresponding to the sensing and counting circuit 814-2 of the seventh content-addressable memory unit series 802 3 Sense and count 1 matching current to generate a count result (1), so the sense count circuit 814 corresponding to the 5th-7th CAM cell string 802 (with the highest count result) is selected as a candidate Inductive counting circuit. The above operation method is called read mapping with a seed and vote strategy.

When the counting results of the candidate sensing counting circuits of the sensing counting circuits 814 are higher than a threshold (for example, 2), it means that the above-mentioned seed and voting strategy are successful, and the decoder 816 determines that the data segment 822A matches the reference serial data 820A . As shown in FIG. 8A, the counting result (3) of the sensing counting circuit 814-2 corresponding to the 5th-7th CAM cell series 802 (that is, the candidate sensing counting circuit) is greater than the threshold (2), Seed with voting strategy succeeds. Therefore, the decoder 816 determines that the data segment 822A matches a part of the reference serial data 820A according to the counting result (3).

As shown in FIG. 8A, when the effective length of one of the seed data 822A-1~822A-Y is less than the number of a content-addressable memory unit cell in the content-addressable memory unit string 802, the content-addressable memory unit string A portion of row 802, shown as region 824, stores don't care storage data such that the content-addressed memory cells 804 in region 824 are turned on no matter what kind of search voltage is received. . Or, when the effective length of one of the seed data 822A-1~822A-Y is less than the number of a content-addressable memory cell in the content-addressable memory cell series 802, these content-addressable memory cells in the area 824 Applying the wildword search voltage to the cell 804 can also make the content-addressable memory cells 804 in the area 824 all be turned on. The effective length refers to the number of data bits of the seed data input to the CAM cell string 802 in each comparison round.

As shown in FIG. 8A, when the parts 820A-1~820A-X of the reference serial data 820A are all stored in the CAM cell strings 802, if there are remaining CAMs The unit cell 804, as shown in the area 826, has not been written into the parts 820A-1~820A-X of the reference serial data 820A, then the remaining contents addressable memory unit cell 804 is written into invalid data ( Such as the first embodiment to the third embodiment). In this way, no current flows through the remaining CAM cells 804 in the region 826 no matter what search voltage is applied.

In one embodiment, if the data segment is longer, it means that there are more seed data. Therefore, when longer data fragments are used for read mapping with reference sequence data, the uncertainty of voting can be reduced to improve the performance of seed and voting strategies.

In this way, through the content addressable memory device 800 of Fig. 8A and its The operation method can correctly match the data segment and the reference serial data, and solve the misalignment problem of the seed data.

Please refer to FIG. 8B, which shows a schematic diagram of the second operation of the content addressable memory device 800 according to the eighth embodiment. The difference in operation of the CAM device 800 in FIG. 8B compared to FIG. 8A is that the sliding reference method is adopted instead of the sliding seed method, and the details will be described below.

As shown in FIG. 8B, the reference serial data 820B includes a plurality of parts 820B-1~820B-X (X is a positive integer). The reference serial data 820B includes: for example but not limited to CAATCCCCATCATCATTAAAGCGATGGCACACAGCATGCCCAATGACTGATTTAGCA, the first part 820A-1 of the reference serial data 820B includes the 1st to 4th data bits (CAAT), stored in the first content address Memory cell string 802; the second part 820A-2 of the reference string data 820B including the 2nd-5 data bits (AATC) is stored in the second content-addressable memory cell string 802 , and so on. Wherein, the Xth part 820B-X of the reference serial data 820B includes the last data bit (A), stored in one of the CAM cell serials 802 . The above-mentioned operation method is called the sliding reference serial data method.

As shown in FIG. 8B, the data segment 822B includes a plurality of data bits, such as but not limited to, AAAGCGATGGCACA. Use the 1st-4th data bits (AAAG) of the data fragment 822B as the seed data of the first comparison round 822B-1, use the 5th to 8th data bits (CGAT) of the data segment 822B as the seed data 822B-2 of the second comparison round, and so on. This is called a fixed seed selection method.

Among them, the seed data 822B-3 of the third comparison round is the last two data bits (GG) of the data segment 822B, and the number of data bits is relatively small, so two wildcard characters XX are added to the third For the seed data 822B-3 of the comparison round, the number of data bits of the seed data 822B-3 of the third round of comparison is equal to the number of data bits of the seed data of the previous round of comparison.

Please refer to FIG. 8C , which shows a schematic diagram of the third operation of the content addressable memory device 800 according to the eighth embodiment. The difference in operation of the CAM device 800 in FIG. 8C compared to FIG. 8A and FIG. 8B is that both the sliding seed method and the sliding reference serial data method are used for read mapping, and the details will be described below.

As shown in FIG. 8C, the reference serial data 820C includes a plurality of parts 820C-1~820C-X (X is a positive integer). The reference serial data 820C includes: for example but not limited to TAATCCCCATCATCATTAAAGCGATGGCACACAGCATGCCCAATGACTGATTTAGCA, the first to third data bits (TAA) of the reference serial data 820C are stored in the first content-addressable memory by adopting a sliding reference serial data method The cell string 802 stores the 2nd to 4th data bits (AAT) of the reference string data 820C in the second CAM cell string 802 , and so on. Wherein, the Xth part 820C-X of the reference list 820C includes The last data bit (A) is stored in one of the CAM cell strings 802 .

As shown in FIG. 8C, the data segment 822C includes a plurality of data bits, such as but not limited to, AAAGCGATG. Adopt the sliding seed method, use the 1st-3rd data bits (AAA) of the data fragment 822C as the seed data 822C-1 of the first comparison round, and the 2nd-4th data bits (AAG) of the data fragment 822C As the seed data 822C-2 of the second comparison round, and so on. Wherein, the seed data 822C-Y of the last comparison round is the last 3 data bits (ATG) of the data segment 822C.

Please refer to FIG. 8D, which shows a schematic diagram of the fourth operation of the content addressable memory device 800 according to the eighth embodiment. The difference in the operation mode of the content-addressable memory device 800 in FIG. 8D compared with FIG. 8A, 8B, and 8C lies in adopting a fixed seed data method and a fixed reference serial data method for read mapping, the details of which will be described below .

As shown in FIG. 8D, the reference serial data 820D includes a plurality of parts 820D-1~820D-X (X is a positive integer). The reference serial data 820D includes, for example but not limited to, CAATCCCCATCATCATTAAAGCGATGGCACACAGCATGCCCAATGACTGATTTAGCA, the first part 820D-1 of the reference serial data 820D includes the 1st-4th data bits (CAAT), stored in the first content-addressed memory Bulk cell string 802; the second part 820D-2 of the reference string data 820D includes the 5th-8th data bits (CCCC), stored in the second content-addressable memory crystal cell series 802, and so on. Wherein, the Xth part 820D-X of the reference serial data 820D includes the last two data bits (CA), stored in one of the CAM cell serials 802 . This method of selecting a part from the reference serial data is called the fixed reference serial data method.

As shown in FIG. 8D, the data segment 822D includes a plurality of data bits, such as but not limited to, AAAGCGATGGCACA. The 1st-4th data bits (AAAG) of the data fragment 822D are used as the seed data 822D-1 of the first comparison round, and the 5th-8th data bits (CGAT) of the data fragment 822D are used as the second comparison round Seed data 822D-2 for the round, and so on. This method of selecting seed data from data fragments is called the fixed seed data method.

Among them, the seed data 822D-Y of the last comparison round is the last 2 data bits (CA) of the data segment 822D, and the number of data bits is relatively small, so two wildcard characters XX are added to the last comparison For the seed data 822D-Y of the round, the number of data bits of the seed data 822D-Y of the last comparison round is equal to the number of data bits of the seed data of the previous round of comparison.

In one embodiment, if the data segment is longer, it means that there are more seed data. Therefore, when longer data fragments are used for read mapping with reference sequence data, the uncertainty of voting can be reduced to improve the performance of seed and voting strategies.

In this way, according to the operations in FIGS. 8A-8D , it can be seen that through the content addressable memory device 800 of the eighth embodiment, the data segment and the reference serial data can be matched more correctly, so as to improve the credibility of the seed and the voting strategy.

In one embodiment of this case, when applying one of the 8A to 8D When performing data search and comparison, if the data search and comparison fails (that is, the counting result of the induction counting circuit is not higher than a threshold), then another one of Figures 8A to 8D can be used for data search and comparison. for optimal read mapping results. This is also within the spirit of this case.

Please refer to Figure 9, which shows a schematic diagram of using wildcards to speed up data search and comparison. As shown in Figure 9, when the stored data is AAA, AAC, AAG, AAT, use "AA* (* represents a wildcard)" to search, all can be matched. That is, a single round of search operation can search multiple pieces of data at the same time. In contrast, if no wildcard is used, when the stored data is AAA, AAC, AAG, AAT, more rounds (4 rounds) of searching are needed to obtain the result. In this way, through the use of Figure 9, the number of rounds when reading the mapping can be reduced, and data search and comparison can be accelerated.

In one embodiment, when the data segment and the reference serial data are read and mapped, if the data search and comparison results in FIG. 8A to FIG. 8D all fail, a graphics processing unit (Graphics Processing Unit, GPU) Or a central processing unit (Central Processing Unit, CPU) to search for data, the details of which are not detailed here.

Fig. 10 shows the operation method of the content-addressable memory device according to the ninth embodiment of the present application, including: in step 1002, programming a plurality of content-addressable memory unit cells, each of which includes a plurality of content-addressable memory unit cells Flash memory unit cells, the data stored in one of the content addressable memory unit cells is determined by the combination of a plurality of threshold voltages of the flash memory unit cells in each of the content addressable memory unit cells, the The content-addressable memory cell is coupled to a plurality of match lines; in step 1004, performing Adding a plurality of first search voltages and a plurality of second search voltages to the content-addressable memory cells; in step 1006, inducing a plurality of matching currents on the matching lines to generate a plurality of induction results; and in step 1008 wherein, according to the sensing results, a matching address is generated, and the matching address indicates the individual addresses of the content-addressed memory unit cells whose search results match.

The details of steps 1002-1008 can be as described in the above-mentioned embodiments, and will not be repeated here. Among them, Fig. 10 can be applied to the fifth embodiment.

Fig. 11 shows the operation method of the content-addressable memory device according to the tenth embodiment of the present application, including: in step 1102, programming a plurality of content-addressable memory unit cells, each of which includes a plurality of content-addressable memory unit cells cascading flash memory cells, each of the content-addressable memory cell series individually storing data related to a portion of a reference serial data, the content-addressable memory cells being coupled to a plurality of match lines ; In step 1104, applying a plurality of search voltages to the content-addressable memory cells, in a plurality of comparison rounds, a data segment is used to determine the search voltages applied to the content-addressable memory cells ; In step 1106, in the comparison rounds, sense and count a plurality of matching currents on the matching lines to generate a plurality of counting results; and in step 1108, determine whether the data segment is based on the counting results Matches the reference list data.

The details of steps 1102-1108 can be as described in the above-mentioned embodiments, and will not be repeated here. Among them, Fig. 11 can be applied to the eighth embodiment.

In the above-mentioned embodiment of this case, the content addressable memory unit cell can be implemented as: a multi-level CAM unit cell (multi-level CAM cell, MLC) that can store two bits, can store Three-bit CAM cell (triple-level CAM cell, TLC), four-bit CAM cell (quad-level CAM cell, QLC), five-bit CAM cell Unit cell (penta-level CAM cell, PLC), etc., are all within the spirit of this case.

In the above embodiments of the present application, the CAM memory device may be a two-dimensional (2D) flash memory structure or a three-dimensional (3D) flash memory structure, which are all within the scope of the present application.

In the embodiment of this case, the 3D-NAND architecture is used for data search and matching, so memory space can be saved, and the density of in-memory searching (IMS) can be improved, and the matching speed and accuracy can be improved.

The embodiment of this case is applicable to long character search design. Therefore, when using the CAM unit cell and the CAM memory device of this embodiment to search for large data, the search density in the memory can be increased.

To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application.

1002-1008: steps

Claims (18)

A content addressable memory unit cell, comprising: a first flash memory unit cell, a first end of the first flash memory unit cell is used to receive a first search voltage; a second flash memory unit cell A unit cell, a first end of the second flash memory unit cell is used to receive a second search voltage, a second end of the first flash memory unit cell is connected to the second flash memory unit cell A second end of the cell is electrically connected; wherein the first flash memory unit cell and the second flash memory unit cell are connected in series, and the multi-bit storage data of the content addressable memory unit cell is determined by The combination of the plurality of threshold voltages of the first flash memory unit cell and the second flash memory unit cell, the first flash memory unit cell and the second flash memory unit cell receive the The first search voltage is independent from the second search voltage. The content-addressable memory cell as described in Claim 1, wherein, when the storage data is a first predetermined storage data, a first threshold voltage of the first flash memory cell is a minimum threshold voltage value , the second critical voltage of the second flash memory unit cell is a maximum critical voltage value; when the storage data is a second predetermined storage data, the first critical voltage is the maximum critical voltage value, the first The second threshold voltage is the minimum threshold voltage value; when the storage data is a third predetermined storage data, the first threshold voltage and the second threshold voltage are both the minimum threshold voltage value; and when the storage data is a first predetermined storage data Four When storing data, the first threshold voltage and the second threshold voltage are equal to or greater than the maximum threshold voltage value. A content-addressable memory device, comprising: a plurality of first content-addressable memory unit cell series, these first content-addressable memory unit cell series include a plurality of first content-addressable memory unit cells, each of the first content-addressable memory unit cells A content-addressable memory unit cell includes a plurality of flash memory unit cells, and the multi-bit storage data of each of the first content-addressable memory unit cells is determined by the data of each of the first content-addressable memory unit cells A combination of multiple threshold voltages of the flash memory cells; a first word line driver for providing multiple first search voltages and multiple second search voltages to the first content-addressable memory cells , the first search voltages are independent from the second search voltages; a plurality of first match lines are coupled to the first content-addressable memory cells; a plurality of first sense amplifiers are coupled to the some first matching lines; and a decoder coupled to the first sense amplifiers; wherein, when the first search voltages and the second search voltages are applied to the first content-addressable memory cells , the first sense amplifiers sense a plurality of first matching currents on the first matching lines to generate a plurality of first sensing results; and According to the first sensing results, the decoder generates a first matching address, and the first matching address indicates individual addresses of the first content-addressed memory cells for which a first search result matches. The content-addressable memory device as described in claim 3, wherein, in the first content-addressable memory unit cell, when the storage data is a first predetermined storage data, each of the flash memory unit cells A first critical voltage of a first flash memory unit cell is a minimum critical voltage value, and a second critical voltage of each of the second flash memory unit cells is a maximum Threshold voltage value; when the stored data is a second predetermined stored data, the first critical voltage is the maximum critical voltage value, and the second critical voltage is the minimum critical voltage value; when the stored data is a third predetermined When storing data, both the first threshold voltage and the second threshold voltage are at the minimum threshold voltage value; and when the stored data is a fourth predetermined stored data, the first critical voltage and the second critical voltage are equal to or greater than the maximum threshold voltage value; or when a search data is a first predetermined search data, the first search voltage is a minimum search voltage value, and the second search voltage is a maximum search voltage value; when the search data is For a second predetermined search data, the first search voltage is the maximum search voltage value, and the second search voltage is the minimum search voltage value; and, when the search data is a third predetermined search data, the first search voltage is Both the search voltage and the second search voltage are at the maximum search voltage value; Wherein, when the first matching current appears on the first matching line, the first search result is a match. The content-addressable memory device as described in claim 3, wherein the content-addressable memory device further includes: a plurality of second content-addressable memory unit cell series, and these second content-addressable memory unit cell series include a plurality of A second content-addressable memory unit cell, each of the second content-addressable memory unit cells includes a plurality of flash memory unit cells, and the storage data of each of the second content-addressable memory unit cells is determined by each of the second content-addressable memory unit cells A combination of multiple critical voltages of the flash memory cells of the second content-addressable memory cells; a second word line driver for providing multiple third search voltages and multiple fourth search voltages to the second content-addressable memory cells; a plurality of second match lines coupled to the second content-addressable memory cells; a plurality of second sense amplifiers coupled to the second match lines; And wherein, when the third search voltages and the fourth search voltages are applied to the second content-addressable memory cells, the second sense amplifiers sense the plurality of second matches on the second match lines current to generate a plurality of second sensing results; wherein, the decoder generates the first matching address and a second matching address according to a plurality of logical operation results of the first sensing results and the second sensing results , The second matching addresses indicate individual addresses of the second CAM cells for which a second search result matches. The content addressable memory device as described in claim item 5, further comprising: a plurality of logic gates, the logic gates are coupled between the first sense amplifiers and the decoder, or are coupled to the second sense amplifiers between the amplifier and the decoder. A method for operating a content-addressable memory device, comprising: programming a plurality of content-addressable memory unit cells, each of which includes a plurality of flash memory unit cells, and each of the content-addressable memory unit cells A multi-bit storage data of a cell is determined by a combination of a plurality of threshold voltages of the flash memory cells of each of the content-addressable memory cells coupled to a plurality of matching line; apply a plurality of first search voltages and a plurality of second search voltages to the content-addressable memory cells, the first search voltages and the second search voltages are independent; sense the complex numbers on the matching lines a matching current to generate a plurality of sensing results; and according to the sensing results, a matching address is generated, and the matching address indicates a search result is a matching individual address of the content-addressed memory unit cells. The operation method as described in claim 7, wherein, in the content-addressable memory unit cell, When the storage data is a first predetermined storage data, the first threshold voltage of each of the flash memory unit cells of the first flash memory unit cell is a minimum threshold voltage value, and each of the flash memory unit cells A second threshold voltage of one of the second flash memory cells of the memory cell is a maximum threshold voltage value; when the storage data is a second predetermined storage data, the first threshold voltage is the maximum threshold voltage value, the second critical voltage is the minimum critical voltage value; when the stored data is a third predetermined stored data, both the first critical voltage and the second critical voltage are at the minimum critical voltage value; and when the stored data When the data is a fourth predetermined storage data, both the first threshold voltage and the second threshold voltage are at the maximum threshold voltage value; or when a search data is a first predetermined search data, the first search voltage is a The minimum search voltage value, the second search voltage is a maximum search voltage value; when the search data is a second predetermined search data, the first search voltage is the maximum search voltage value, and the second search voltage is the minimum search voltage value A search voltage value; when the search data is a third predetermined search data, both the first search voltage and the second search voltage are the maximum search voltage value; wherein, when the matching current appears on the matching line, the search The result is a match. A content-addressable memory device, comprising: a plurality of content-addressable memory unit cell series, each of the content-addressable memory unit cell series includes a plurality of content-addressable memory unit cells, each of the content-addressable memory unit cells Consists of a plurality of cascaded flash memory cells, each of which is content addressable The individual storage data of the memory cell string is related to a part of a reference string (reference string) data; a word line decoder and driver are used to provide a plurality of search voltages to the content-addressed memory cells , in a plurality of comparison rounds, the word line decoder and driver determine the search voltages applied to the content-addressed memory cells according to a data segment (read); a plurality of matching lines are coupled to the These content address memory cells; a plurality of induction counting circuits, coupled to the matching lines; and a decoder, coupled to the induction counting circuits; wherein, in the comparison rounds, when the search When a voltage is applied to the content-addressable memory cells, the sensing and counting circuits sense and count a plurality of matching currents on the matching lines to generate a plurality of counting results, and the decoder is based on the counting of the sensing and counting circuits As a result, it is determined whether the data segment matches the reference serial data. The CAM device as claimed in claim 9, wherein the decoder determines that the data segment matches the reference serial data when a highest count result of the count results is higher than a threshold. The content addressable memory device as described in claim 9, wherein in each of the comparison rounds, the word line decoder and driver selects a seed data from the data segment, and the word line decoder and driver selects a seed data according to the The search voltages applied to the content-addressable memory cells are determined based on seed data. The content-addressable memory device as described in claim 11, wherein in the comparison rounds, when an effective length of the seed data is less than the number of a content-addressable memory unit of the content-addressable memory unit series The word line decoder and driver applies a predetermined search data to the CAM cell string or stores a predetermined storage data to at least one CAM cell of the CAM cell string. The CAM device as described in Claim 9, wherein whether to store an invalid data in the CAM cell strings is determined according to the reference serial data. A method for searching and comparing data, the method comprising: programming a plurality of content-addressable memory unit cells, each of which includes a plurality of series-connected flash memory unit cells, and each of these content-addressable memory unit cells The individual storage data of the cell string is related to a part of a reference string (reference string) data, and the content-addressed memory cells are coupled to a plurality of matching lines; a plurality of search voltages are applied to the content-addressed In the memory unit cell, in a plurality of comparison rounds, a data segment (read) is used to determine the search voltages applied to the content-addressed memory unit cells; in the comparison rounds, the sensing and counting of the A plurality of matching currents on the matching lines to generate a plurality of counting results; and according to the counting results, it is determined whether the data segment matches the reference serial data. The method as claimed in claim 14, wherein when a highest count result of the count results is higher than a threshold, it is determined that the data segment matches the reference serial data. The method of claim 14, wherein in each of the comparison rounds, a seed data is selected from the data segment, and the seed data is used to determine the searches applied to the content-addressed memory cells Voltage. The method as claimed in claim 16, wherein in the comparison rounds, when an effective length of the seed data is less than the number of cells of a content addressable memory, applying a predetermined search data to the content addressable memory cells cell or store a predetermined storage data in at least one content-addressed memory cell of the content-addressed memory cell string. The method as claimed in claim 14, wherein the reference serial data is used to determine whether to store an invalid data in the CAM cells.

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