TWI792400B - Method of fabricating inverted pyramid textured surface of monocrystalline silicon wafer - Google Patents

Abstract

A method, according to the invention, of fabricating an inverted parymid textured surface of a monocrystalline silicon wafter is, firstly, to remove an oxie on the surface of the monocrystalline silicon wafter. Next, the method according to the invention is to immerse the monocrystalline silicon wafer in an etching solution to maintain an etching temperature and an etching time to perform an etching process such that a plurality of inverted pyramid structures and a plurality of copper nano-particles are formed on the surface of the monocrystalline silicon wafer. During the etching process, a plurality of bubbles of an inert gas are conducted into the etching solution. The composition of the etching solution includes 0.02M~0.1M Cu ²⁺, 0.5M~3.5M HF and 0.5M~3M H ₂O ₂. Then, the method according to the invention is to remove the copper nano-particles formed on the surface of the monocrystalline silicon wafer. Next, the method according to the invention is to wash the monocrystalline silicon wafer. Finally, the method according to the invention is to dry the the monocrystalline silicon wafer.

Description

Texturing Method for Inverted Pyramid Structure on the Surface of Single Crystal Silicon Wafer

The present invention relates to a method for texturing the surface of a monocrystalline silicon wafer with an inverted pyramid structure, and in particular, to a method for texturing the surface of a monocrystalline silicon wafer with an inverted pyramid structure based on copper.

Regarding the relevant technical background of the present invention, please refer to the technical documents listed below: [1] Perez, R.; Zweibel, K.; Hoff, T. E. Solar Power Generation in the US: Too Expensive, or a Bargain? Energy Policy 2011, 39, 7290–7297. [2] Nishioka, K.; Sueto, T.; Saito, N. Formation of Antireflection Nanostructure for Silicon Solar Cells Using Catalysis of Single Nano-Sized Silver Particle. Appl. Surf. Sci. 2009, 255, 9504. [3] Grätzel, M. Recent Advances in Sensitized Mesoscopic Solar cells. Acc. Chem. Res. 2009, 42, 1788–1798. [4] Sopian, K.; Cheow, S. L.; Zaidi, S. H. An Overview of Crystalline Silicon Solar Cell Technology: Past, Present, and Future. InAIP Conference Proceedings. https://doi.org/10.1063/1.4999854. [5] Huang, Z. G.; Gao, K.; Wang, X. G.; Xu, C.; Song, X. M.; Shi, L. X.; Zhang, Y.; Hoex, B.; Shen, W. Z. Large-Area MACE Si Nano-Inverted -Pyramids for PERC Solar Cell Application. Solar Energy 2019, 188, 300–304. [6] Cao, F.; Chen, K.; Zhang, J.; Ye, X.; Li, J.; Zou, S.; Su, X. Next-Generation Multi-Crystalline Silicon Solar Cells: Diamond-Wire Sawing, Nano-Texture and High Efficiency. Sol. Energ Mat. Sol. Cells 2015, 141, 132–138. [7] Moreno, M.; Daineka, D.; i Cabarrocas, R. Plasma Texturing for Silicon Solar Cells: From Pyramids to Inverted Pyramids-like Structures. Sol. Energy Mater. & Sol. Cells 2010, 94, 733–737 . [8] Mavrokefalos, A.; Han, S. E.; Yerci, S.; Branham, M. S.; Chen, G. Efficient Light Trapping in Inverted Nanopyramid Thin Crystalline Silicon Membranes for Solar Cell Applications. Nano Lett. 2012, 12, 2792−2796 . [9] Kontermann, S.; Gimpel, T.; Baumann, A. L.; Guenther, K. M.; Schade, W. Laser Processed Black Silicon for Photovoltaic Applications. Energy Procedia 2012, 27, 390−395. [10] Liu, S.; Niu, X.; Shan, W.; Lu, W.; Zheng, J.; Li, Y.; Duan, H.; C. R.; Yang, D. Improvement of Conversion Efficiency of Multicrystalline Silicon Solar Cells by Incorporating Reactive Ion Etching Texturing. Sol. Energy Mater. Sol. Cells 2014, 127, 21−26. [11] Kafle, B.; Mannan, A.; Freund, T.; Clochard, L.; Duffy, E.; Hofmann, M.; Rentsch, J.; 18% Conversion Efficiency Using Industrially Viable Solar Cell Processes. Phys. Status Solidi RRL 2015, 9, 448−452. [12] Xia, Y.; Liu, B.; Liu, J.; Shen, Z.; Li, C. A Novel Method to Produce Black Silicon for Solar Cells. Sol. Energy 2011, 85, 1574−1578. [13] Zhao, S.; Yuan, G.; Wang, Q.; Liu, W.; Zhang, S.; Liu, Z.; Wang, J.; Li, J. Morphology Control of c-Si via Facile Copper-Assisted Chemical Etching: Managements on Etch end-Points. APPL SURF SCI. 2019, 489, 776–785. [14] Zhang, C.; Chen, L.; Zhu, Y.; Guan, Z.; Fabrication of 20.19% Efficient Single-Crystalline Silicon Solar Cell with Inverted Pyramid Microstructure. Nanoscale research letters, 2018, 13, 91. https ://doi.org/10.1186/s11671-018-2502-9. [15] Yang, B.; Lee, M.; Mask-Free Fabrication of Inverted-Pyramid Texture on Single-Crystalline Si Wafer. Opt Laser Technol 2014, 63, 120–124. [16] Zhao, J.; Wang, A.; Green, M. A. High-efficiency PERL and PERT silicon solar cells on FZ and MCZ substrates. Sol. Energy Mater. Sol. Cells 2001, 65, 429–435. [17] Lin, J. W.; Liu, E. T.; Wu, C. H.; Hsieh, J.; Chao, T. S. Formation of Inverted-Pyramid Structure by Modifying Laser Processing Parameters and Acid Etching Time. ECS Transactions 2011, 35, 67-72. [18] Liu, J.; Zhang, X.; Sun, G.; Wang, B.; Zhang, T.; Yi, F.; Liu, P. Fabrication of inverted pyramid structure by Cesium Chloride self-assembly lithography for silicon solar cell. Mat Sci Semicon Proc, 2015, 40, 44-49. [19] Liu, X.; Coxon, P. R.; Peters, M.; Hoex, B.; Cole, J. M.; Fray, D. J. Black silicon: fabrication methods, properties and solar energy applications. Energy Environ. Sci. 2014, 7, 3223–3263. [20] Wang, Y.; Yang, L.; Liu, Y.; Mei, Z.; Chen, W.; Li, J.; Liang, H.; Kuznetsov, A.; Xiaolong, D. Maskless inverted pyramid texturization of silicon. Sci. Rep. 2015, 5, 10843. [21] Wang, Y.; Liu, Y.; Yang, L.; Chen, W.; Du, X.; Kuznetsov, A. Micro-structured inverted pyramid texturization of Si inspired by self-assembled Cu nanoparticles. Nanoscale 2017 , 9, 907–914. [22] Yang, Y.; Sheng, G.; Li, S.; Yu, J.; Ma, W.; Qiu, J.; El Kolaly, W. Nano-Texturing of Silicon Wafers Via One-Step Copper- Assisted Chemical Etching. Silicon, 2020, 12, 231-238. [23] Jiang, B.; Li, M.; Liang, Y.; Bai, Y.; Song, D.; Li, Y.; Luo, J. Etching anisotropy mechanisms lead to morphology-controlled silicon nanoporous structures by metal assisted chemical etching. Nanoscale 2016, 8, 3085-3092. [24] Smith, A. W.; Rohatgi, A. Ray tracing analysis of the inverted pyramid texturing geometry for high efficiency silicon solar cells. Sol. Energy Mater. Sol. Cells 1993, 29, 37–49. [25] Zheng, H.; Han, M.; Zheng, P.; Zheng, L.; Qin, H.; Deng, L. Porous silicon templates prepared by Cu-assisted chemical etching. Mater. Lett., 2014, 118, 146-149. [26] Huang, Z. P.; Geyer, N.; Liu, L. F.; Li, M. Y.; Zhong, P. Metal-assisted electrochemical etching of silicon. Nanotechnology, 2010, 21, 465301. [27] Liu, Y.; Lai, T.; Li, H.; Wang, Y.; Mei, Z.; Liang, H.; Li, Z.; A. Y.; Du, X. Nanostructure formation and passivation of large‐area black silicon for solar cell applications. Small 2012, 8, 1392–1397. [28] Huang, Z.; Geyer, N.; Werner, P.; De Boor, J.; Gösele, U. Metal‐Assisted Chemical Etching of Silicon: A Review: In memory of Prof. Ulrich Gösele. Adv. mater . 2011, 23, 285-308. [29] Hesketh, P. J.; Ju, C.; Gowda, S.; Zanoria, E.; Danyluk, S. Surface free energy model of silicon anisotropic etching. J. Electrochem. Soc. 1993, 140, 1080–1085. [30] Chyan, O. M.; Chen, J. J.; Chien, H. Y., Sees, J.; Hall, L. Copper deposition on HF etched silicon surfaces: morphological and kinetic studies. J. Electrochem. Soc. 1996, 143, 92–96 .

Crystalline silicon (c-Si) solar cells currently dominate the photovoltaic (photovoltaic, PV) market due to their high photoelectric conversion efficiency and low cost [1-2]. However, the large refractive index of crystalline silicon is one of the biggest factors limiting conversion [3-4]. The fabrication of black silicon wafers or silicon wafers with nano- or micro-structured textured surfaces offers a solution to this light reflectivity problem [5]. Black silicon wafers have high light-harvesting capabilities and can absorb incoming light over a wide range of incident angles, thus potentially increasing the overall efficiency of silicon solar cells [6]. However, an increase in the surface area of a silicon wafer also increases the undesired surface carrier recombination [7]. Therefore, the photoelectric conversion efficiency of black silicon-based solar cells usually does not exceed 10% [8]. So far, various techniques have been used to fabricate black silicon wafers, for example, laser-based texturing [9], reactive ion etching [10], atmospheric pressure _F2- based dry etching [11], and plasma immersion Ion implantation [12]. The metal catalytic chemical etching (MCCE) process is a relatively new technology that uses precious and non-noble metals, such as platinum, gold, palladium, nickel, and copper, for silicon crystals in acidic or alkaline solutions. Round texturing. Due to the potential use of the MCCE process in industrial applications, the method has been investigated [13].

The industrial production of crystalline silicon solar cells is usually based on the texturing of vertical pyramidal structures by alkaline etching techniques to achieve an average light reflectance of 10% to 15% [14]. But due to recent innovations, the inverted pyramid structure has been investigated as a viable alternative due to its relatively high light-harvesting capability and low specific surface area [15]. It is worth noting that the textured silicon solar cell with an inverted pyramid structure broke the world record of solar cell performance with a photoelectric conversion efficiency of 25% [16]. While various methods have been used for the texturing of silicon wafers with an inverted pyramid structure, such as laser texturing, lithography, and electroless wet chemical etching [17-19], MCCE technology is considered the most Simple and most cost-effective mass production method [20].

Copper-based etching methods for arrays of inverted pyramid structures can be performed using low-cost materials and without the use of photomasks [21]. However, since the prior art copper-based etching method generates hydrogen bubbles, which randomly adhere to the wafer surface, after using the prior art copper-based etching method or any other etching method using hydrogen peroxide , usually no etch uniformity is observed. Clearly, there is still room for improvement in copper-based etching methods for inverted pyramid arrays.

Therefore, one technical problem to be solved by the present invention is to provide a copper-based method for texturizing the surface of a monocrystalline silicon wafer with an inverted pyramid structure.

According to a preferred embodiment of the present invention, the copper-based method for texturizing the surface of a monocrystalline silicon wafer with an inverted pyramid structure firstly removes oxides on the surface of the monocrystalline silicon wafer. Next, the method according to the preferred embodiment of the present invention is to immerse the monocrystalline silicon wafer in the etching solution to maintain the etching temperature and etching time for etching, so that multiple inverted pyramid structures and multiple copper nanoparticles are formed. On the surface of a single crystal silicon wafer, and pass inert gas bubbles into the etching solution. The components of the etching solution include 0.02M-0.1M Cu ²⁺ , 0.5M-3.5M HF and 0.5M-3M H ₂ O ₂ . Next, the method according to a preferred embodiment of the present invention is to remove the plurality of copper nanoparticles formed on the surface of the single crystal silicon wafer. Next, the method according to a preferred embodiment of the present invention is to clean the single crystal silicon wafer. Finally, the method according to a preferred embodiment of the present invention is to dry the monocrystalline silicon wafer.

In one embodiment, the step of removing the plurality of copper nanoparticles formed on the surface of the single crystal silicon wafer is performed by immersing the single crystal silicon wafer in a processing solution and introducing a first ultrasonic wave. The components of the treatment solution include H ₂ O and HNO ₃ . The volume ratio of the components of the treatment solution is H ₂ O:HNO ₃ =0.5~1.5:0.5~1.5.

In one embodiment, the step of removing the plurality of copper nanoparticles formed on the surface of the single crystal silicon wafer is performed by immersing the single crystal silicon wafer in a processing solution for a processing time. The processing time is equal to or greater than 20min.

In a specific embodiment, the etching temperature is 45°C-65°C.

In a specific embodiment, the etching time is 2 min.~20 min.

In a specific embodiment, the surface of the single crystal silicon wafer is a (100) crystal plane.

In one embodiment, the step of removing the oxide on the surface of the single crystal silicon wafer is performed by immersing the single crystal silicon wafer in an acid solution and introducing a second ultrasonic wave. The composition of the acid solution contains 5~15 vol.%HF.

Different from the prior art, according to the copper-based method for texturizing the inverted pyramid structure on the surface of the monocrystalline silicon wafer, the uniformly distributed miniature inverted pyramid structure array can be etched on the surface of the monocrystalline silicon wafer. Moreover, the light reflectivity of the surface of the monocrystalline silicon wafer after the surface is textured according to the method of the present invention is extremely low.

The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the accompanying drawings.

Please refer to FIG. 1 to FIG. 3 , which schematically illustrate each method of texturing the surface 22 of a single crystal silicon wafer 2 based on copper with an inverted pyramid structure according to a preferred embodiment of the present invention. program steps. The method according to the preferred embodiment of the present invention is suitable for mass production. Therefore, in FIGS. program steps.

Because the surface 22 of the monocrystalline silicon wafer 2 generally naturally generates oxides, so, according to a preferred embodiment of the present invention, the inverted pyramid texture method for the surface 22 of the monocrystalline silicon wafer 2 based on copper Firstly, the oxide on the surface 22 of the single crystal silicon wafer 2 is removed.

In a specific embodiment, the surface 22 of the single crystal silicon wafer 2 is a (100) crystal plane, but the present invention is not limited thereto.

In one embodiment, the step of removing the oxide on the surface 22 of the single crystal silicon wafer 2 is performed by immersing the single crystal silicon wafer 2 in the acid solution 102 and introducing ultrasonic waves. The composition of the acid solution contains 5~15 vol.%HF. As shown in FIG. 1 , a plurality of monocrystalline silicon wafers 2 are placed in a fixture 108 and then immersed in a first reaction tank 10 containing an acid solution 102 . Also, ultrasonic waves are introduced into the first reaction tank 10 to remove oxides on the surface 22 .

Next, the method according to a preferred embodiment of the present invention is to immerse the single crystal silicon wafer 2 in the etching solution 122 to maintain the etching temperature and etching time for etching treatment, resulting in a plurality of inverted pyramid structures and a plurality of copper nanoparticles It is formed on the surface 22 of the single crystal silicon wafer 2, and the inert gas bubbles are passed into the etching solution 122. The composition of the etching solution 122 includes 0.02M˜0.1M Cu ²⁺ , 0.5M˜3.5M HF and 0.5M˜3M H ₂ O ₂ .

As shown in FIG. 2 , after removing the oxide on the surface 22 of the multiple single crystal silicon wafers 2 , they are immersed in the second reaction tank 12 containing the etching solution 122 , and the second reaction tank 12 is maintained at the etching temperature. The gas supply source 124 is connected with a control valve 126 and a pipeline 128 . The end 1282 of the pipeline 128 is branched and reaches the bottom of the second reaction tank 12 . The branched end 1282 has a plurality of air holes. Nitrogen gas is poured into the gas supply source 124, and the nitrogen gas can be used as a passive gas that does not participate in the reaction. By controlling the valve 126 and the pipeline 128 , the gas supply source 124 can supply nitrogen bubbles in the etching solution 122 . The flow rate of nitrogen 2 was maintained at 3-15 L/min.

The mechanism of texturing based on the copper inverted pyramid structure according to the present invention is the same as that of the prior art MCCE [19, 22]. The mechanism of prior art MCCE is explained by the following reaction:

Cathodic reaction: Cu ²⁺ + 2e ^- → Cu (1) 2H ₂ O ₂ → 2H ₂ O + 2h ⁺ (2)

Anode reaction: Si + 2H ₂ O → SiO ₂ + 4H ⁺ + 4e ^- (3) SiO ₂ + 6HF → H ₂ SiF ₆ + 2H ₂ O (4)

“2h ⁺ ” in the reaction formula (2) represents a positively charged hole. Initially, Cu ²⁺ ions receive electrons from the single crystal silicon wafer 2 and then deposit on the surface 22 of the single crystal silicon wafer 2 in the form of nanoparticles. After deposition, Cu NPs aggregate due to the growth of negatively charged Cu NPs by inducing Cu ²⁺ ions in the etching solution [25–27]. In the same step, the surface 22 of the monocrystalline silicon wafer 2 is oxidized. The oxidized silicon is dissolved in solution by HF, resulting in the formation of pits on the surface 22 of the monocrystalline silicon wafer 2 [28]. _H2O2 reduces and injects holes through the copper nanoparticles into _the silicon.

In a specific embodiment, the source of Cu ²⁺ may be Cu(SO ₄ ), but the invention is not limited thereto.

In a specific embodiment, the etching temperature is 45°C-65°C.

In a specific embodiment, the etching time is 2 min.~20 min.

Next, the method according to a preferred embodiment of the present invention is to remove the plurality of copper nanoparticles formed on the surface 22 of the single crystal silicon wafer 2 .

In one embodiment, the step of removing the plurality of copper nanoparticles formed on the surface 22 of the single crystal silicon wafer 2 is performed by immersing the single crystal silicon wafer 2 in the processing solution 142 and introducing ultrasonic waves . The components of the processing solution 142 include H ₂ O and HNO ₃ . The volume ratio of the components of the processing solution 142 is H ₂ O:HNO ₃ =0.5˜1.5:0.5˜1.5. As shown in FIG. 3 , the multi-piece single crystal silicon wafers 2 are etched and then immersed in the third reaction tank 14 containing the processing solution 142 . Moreover, ultrasonic waves are introduced into the third reaction tank 14 to remove a plurality of copper nanoparticles on the surface 22 .

In one embodiment, the step of removing the plurality of copper nanoparticles formed on the surface 22 of the single crystal silicon wafer 2 is performed by immersing the single crystal silicon wafer 2 in the processing solution 142 for a processing time. The processing time is equal to or greater than 20min.

Next, the method according to the preferred embodiment of the present invention is to clean the single crystal silicon wafer 2 .

In a specific embodiment, the multiple monocrystalline silicon wafers 2 are thoroughly rinsed with distilled water.

Finally, the method according to a preferred embodiment of the present invention is to dry the monocrystalline silicon wafer 2 . A plurality of inverted pyramid structures are evenly distributed on the surface 22 of each single crystal silicon wafer 2 .

In the first example, the method according to the preferred embodiment of the present invention uses an etching solution containing 0.06M Cu(SO ₄ ), 2M HF and 1M H ₂ O ₂ . The etching temperature was maintained at 60°C. The etching times were 3, 5, 7, 10 and 15 minutes, respectively. The surface morphology of the etched single crystal silicon wafer was observed by a field emission scanning electron microscope (FESEM). The FESEM photos of the etched monocrystalline silicon wafer of the first example are shown in FIGS. 4( a ) to 4 ( f ). FIG. 4( a ) is a FESEM photograph of the surface of an unetched single crystal silicon wafer. FIG. 4( b ) is a FESEM photo of the surface of the monocrystalline silicon wafer after being etched for 3 minutes. FIG. 4( c ) is a FESEM photo of the surface of the monocrystalline silicon wafer after being etched for 5 minutes. FIG. 4( d ) is a FESEM photograph of the surface of the monocrystalline silicon wafer after being etched for 7 minutes. FIG. 4( e ) is a FESEM photo of the surface of the monocrystalline silicon wafer after being etched for 10 minutes. FIG. 4( f ) is a FESEM photo of the surface of the monocrystalline silicon wafer after being etched for 15 minutes. As confirmed by the FESEM photographs of FIGS. 4( a ) to 4 ( f ), the pristine monocrystalline silicon wafer showed cracks, grooves and saw marks on its surface before etching. After etching, an inverted pyramid structure forms and increases in size depending on the etching time the monocrystalline silicon wafer spends in the etching solution. Due to the limited hole implantation on the surface of a single-crystal silicon wafer, smaller-sized inverted pyramid structures were found in a shorter etching time [23]. Conversely, at longer etch times, excessive hole implantation causes silicon to dissolve in the HF solution, and the inverted pyramid structures have irregular shapes and sizes. At etching times of 10 and 15 minutes, these inverted pyramidal structures may coalesce due to collapse along the (111) crystal plane.

Please refer to FIG. 5 . FIG. 5 shows the light reflectance test results of the single crystal silicon wafer etched with different etching times in the first example. Figure 5 confirms that the unetched pristine monocrystalline silicon wafer has the highest average light reflectance of 32.57%. After etching, in the incident light wavelength range of 400-1100 nm, the average light reflectance decreased to 5.8% and 5.6% after 5 minutes and 7 minutes of etching time, respectively.

This enhanced light-trapping capability is due to the fact that the adjacent facets of the inverted pyramid structure bounce off three times as much incident light before reflecting it back. Due to this triple bouncing, the length of the incident light path and the total absorption of the incident light increase [24]. After a longer etching time, the surface of the monocrystalline silicon wafer will increase in light reflectance due to the collapse of the inverted pyramid structure. Therefore, the light reflectance of the surface of the single crystal silicon wafer after the etching time of about 7 minutes is the lowest.

In the second example, the method according to the preferred embodiment of the present invention uses an etching solution containing 2M HF, 1M H ₂ O ₂ and different concentrations of Cu(SO ₄ ) (0.01M, 0.03M and 0.06M) 1. The etching temperature was maintained at 60° C., and the etching time was 7 minutes. The FESEM photos of the etched monocrystalline silicon wafer of the second example are shown in FIGS. 6( a ) to 6 ( c ). Figure 6(a) shows that at lower Cu ²⁺ concentrations, the surface morphology of the monocrystalline silicon wafer looks similar to that of the unetched pristine monocrystalline silicon wafer. However, Figure 6(b) shows that etching with 0.03 M Cu(SO ₄ ) resulted in the observation of scattered inverted pyramid structures with an average size of 1–2 µm. Figure 6(c) shows that in the etching solution containing 0.06 M Cu(SO ₄ ), the size of the inverted pyramid structure increases from 3 µm to 7 µm, and the inverted pyramid structure completely covers the surface of the monocrystalline silicon wafer after etching .

Please refer to FIG. 7 . FIG. 7 shows the light reflectance test results of the single crystal silicon wafer after being etched by etching solutions with different concentrations of Cu(SO ₄ ) in the second example. Figure 7 confirms that the average light reflectance of the surface of monocrystalline silicon wafers after texturing with etching solutions with copper ion concentrations of 0.01 M and 0.03 M is higher than that of monocrystalline silicon wafers with etching solutions with copper ion concentrations of 0.06 M The average light reflectance of the round surface is high, about 23.92% and 7.97%, respectively. The relatively high light reflectance of the surface of the monocrystalline silicon wafer after texturing by the etching solution with lower copper ion concentration can be explained by the low oxidation rate on the surface of the monocrystalline silicon wafer, and can be explained by the lack of pits. Formed case can be seen visually. On the contrary, higher copper ion concentration will promote the oxidation of silicon and the formation of pits, so that scattered inverted pyramid structures may appear on the surface of single crystal silicon wafers. It is worth noting that the bonding density along the (111) and (100) crystal planes in crystalline silicon controls the etching direction. For example, there are far fewer electrons available on the (111) silicon facet compared to the (100) facet. Therefore, the nucleation of copper ions on the (100) silicon surface has a higher probability of electron capture [22, 30]. Copper nanoparticles deposition and growth are anisotropic. This mechanism together with the above results suggest the potential role of Cu in accelerating the etching process.

Similar to the MCCE of the prior art, in the process of the copper-based inverted pyramid structure texturing method of the surface of the monocrystalline silicon wafer according to the present invention, H ₂ O ₂ acts as an oxidizing agent and injects holes into the copper nanometers. particles in the valence band of silicon [20]. Here, the positive electrochemical potential _{of H2O2} in the presence of Cu2 ⁺ ions induces hole injection into the valence band of silicon. In the third example, according to the method of the preferred embodiment of the present invention, the composition of the etching solution includes 2M HF, 0.06M Cu(SO ₄ ) and different concentrations of H ₂ O ₂ (0.5M, 1M and 2M), The etching temperature was maintained at 60° C., and the etching time was 7 minutes. The FESEM photos of the etched monocrystalline silicon wafer of the third example are shown in FIGS. 8( a ) to 8 ( c ). Fig. 8(a) shows that only sparse small inverted pyramid structures and shallow pits are observed after etching in an etching solution containing low concentration of H ₂ O ₂ . Silicon cannot perform the desired MCCE reaction due to _its weak oxidation ability at this low _H2O2 concentration. As a result, the copper nanoparticles could not move freely from the surface of the silicon wafer, which caused them to grow rapidly and deposit a thin copper film on the surface of the silicon wafer. This film can then act as a barrier between the wafer and the etchant [30]. Figure 8(b) and Figure 8(c) show that after etching with an etching solution containing a high concentration of H ₂ O ₂ , the surface of the monocrystalline silicon wafer is covered with 2~7 µm inverted pyramid structures. Since the rate of hole injection into silicon through _the copper nanoparticles increases with the concentration of _H2O2 , the etching of silicon beneath the copper nanoparticles also increases.

Please refer to FIG. 9 . FIG. 9 shows the light reflectance test results of the single crystal silicon wafer after being etched by etching solutions with different concentrations of H ₂ O ₂ in the third example. FIG. 9 confirms that a high light reflectance of about 11.23% is observed due to the poor etching ability under the etching solution containing low concentration of H ₂ O ₂ . Although it was shown that increasing the concentration of H ₂ O ₂ in the etching solution to 1 M reduces the light reflectance, due to the disorder of the array of inverted pyramid structures, samples etched with an etching solution containing a higher concentration of H ₂ O ₂ had a lower High light reflectivity. The results in Figure 9 show that the etching solution containing 1M H ₂ O ₂ is approximately the optimum value for etching single crystal silicon wafers resulting in low light reflectivity. It is worth noting that the etching solution containing low concentration of copper ions does not produce any significant structure, as shown in Fig. 6(a). However, an etching solution with a low concentration _{of H2O2} produces a small-scale inverted pyramid structure, as shown in Fig. 8(a). These observations point to the importance of copper ions in the specialized formation of textured textured inverted pyramid structures rather than other microscale patterns.

In the fourth example, the method according to the preferred embodiment of the present invention uses an etching solution containing 0.06M Cu(SO ₄ ), 2M HF and 1M H ₂ O ₂ . The etching time was 7 minutes. The etching temperatures were maintained at 50°C, 55°C and 60°C, respectively. The FESEM photos of the etched monocrystalline silicon wafer of the fourth example are shown in FIGS. 10( a ) to 10 ( c ). After being etched by etching solutions at different etching temperatures, it was found that the surface morphology of the etched monocrystalline silicon wafer had slight differences. As shown in Figures 10(a) to 10(c), the inverted pyramid structure initially exhibits a chaotic state with small pits and pinholes in the etch and sidewalls. The frequency of these formations decreases as the etch temperature increases. Therefore, some differences in light capture can be intuitively guessed.

Please refer to FIG. 11 . FIG. 11 shows the light reflectance test results of the single crystal silicon wafer after being etched by etching solutions with different etching temperatures in the fourth example. FIG. 11 demonstrates that the average light reflectance of the surface of the etched single-silicon wafer decreased to 8.26%, 7.8% and 5.6% at etching temperatures of 50°C, 55°C, and 60°C, respectively. Generally, the etch rate increases with increasing reaction temperature [22]. Since temperature changes the hole injection rate, these average light reflectances may be caused by changes in the hole injection rate. Therefore, rapid oxidation of the surface of single crystal silicon wafers can be observed at higher temperatures on a smaller time scale. At low temperatures, the formation of an inverted pyramid structure can only be observed if the reaction has had sufficient time to complete.

In the fifth example, the method according to the preferred embodiment of the present invention uses an etching solution containing 0.06M Cu(SO ₄ ), 1M H ₂ O ₂ and different concentrations of HF (1M, 2M and 3M), etching The temperature was maintained at 60° C., and the etching time was 7 minutes. The FESEM photos of the etched monocrystalline silicon wafer of the fifth example are shown in FIGS. 12( a ) to 12 ( c ). Fig. 12(a) to Fig. 12(c) show that when the concentration of HF in the etching solution is increased, the dissolution of silicon and the etching rate increase.

Please refer to FIG. 13 . FIG. 13 shows the test results of the light reflectance of the single crystal silicon wafer after being etched by etching solutions with different concentrations of HF in the fifth example. Figure 13 demonstrates the reflectance results for the corresponding samples etched at different HF concentrations. Here, the average light reflectance of the monocrystalline silicon wafer after etching by the etching solution containing 2M HF is the lowest.

In the above example _observations , these observations and test results strongly suggest that _H2O2 evaporation occurs during high temperature etching. Therefore, it is necessary _to monitor the changes in the concentrations of the components, especially the changes in _H2O2 , throughout the etching process.

By the above detailed description of the preferred specific embodiments, it is believed that it can be clearly understood that the copper-based method for the inverted pyramid structure texturing of the surface of the monocrystalline silicon wafer according to the present invention can be etched on the surface of the monocrystalline silicon wafer. Uniform distribution of arrays of micro-inverted pyramid structures. Moreover, the light reflectivity of the surface of the monocrystalline silicon wafer after the surface is textured according to the method of the present invention is extremely low. Moreover, according to the invention, it is suitable for mass production and has strong commercial application potential.

Through the above detailed description of the preferred embodiments, it is hoped that the characteristics and spirit of the present invention can be described more clearly, and the aspect of the present invention is not limited by the preferred embodiments disclosed above. On the contrary, the purpose is to cover various changes and equivalent arrangements within the scope of the patent application for the present invention. Therefore, the aspect of the scope of the patent application for the present invention should be interpreted in the broadest way based on the above description, so as to cover all possible changes and equivalent arrangements.

10: Bottom plate 100: upper surface 102: lower surface 10: The first reaction tank 102: acid solution 108: Fixtures 12: The second reaction tank 122: Etching solution 124: Gas supply source 126: Control valve 128: pipeline 1282: end 14: The third reaction tank 142: Treatment solution 2: Monocrystalline silicon wafer 22: surface

FIGS. 1 to 3 are schematic diagrams of each procedural step of a copper-based method for texturizing the surface of a monocrystalline silicon wafer with an inverted pyramid structure according to a preferred embodiment of the present invention. Fig. 4(a) to Fig. 4(f) are field emission electron microscope (FESEM) photographs of the monocrystalline silicon wafer after different etching times in the first example of the present invention. FIG. 5 is a graph showing the light reflectance test results of the single crystal silicon wafer after different etching times in the first example of the present invention. Fig. 6(a) to Fig. 6(c) are the FESEM photographs of the single crystal silicon wafer etched by etching solutions with different concentrations of Cu(SO ₄ ) in the second example of the present invention. FIG. 7 is a graph showing the light reflectance test results of a single crystal silicon wafer etched by etching solutions of different concentrations of Cu(SO ₄ ) according to the second example of the present invention. Fig. 8(a) to Fig. 8(c) are the FESEM photographs of the monocrystalline silicon wafers etched by etching solutions with different concentrations of H ₂ O ₂ according to the third example of the present invention. FIG. 9 is a graph showing the light reflectance test results of a single crystal silicon wafer etched by etching solutions with different concentrations of H ₂ O ₂ according to the third example of the present invention. Fig. 10(a) to Fig. 10(c) are the FESEM photographs of the monocrystalline silicon wafer after being etched by etching solutions with different etching temperatures according to the fourth example of the present invention. FIG. 11 is a graph showing the light reflectance test results of a single crystal silicon wafer etched by etching solutions with different etching temperatures according to the fourth example of the present invention. Fig. 12(a) to Fig. 12(c) are the FESEM photographs of the monocrystalline silicon wafers etched by etching solutions with different concentrations of HF in the fifth example of the present invention. FIG. 13 is a graph showing the test results of light reflectance of a single crystal silicon wafer etched by etching solutions with different concentrations of HF in the fifth example of the present invention.

108: Fixtures 12: The second reaction tank 122: Etching solution 124: Gas supply source 126: Control valve 128: pipeline 1282: end 2: Monocrystalline silicon wafer 22: surface

Claims (4)

A method for texturizing an inverted pyramid structure on a surface of a single crystal silicon wafer, comprising the following steps: (a) removing the texture by immersing the single crystal silicon wafer in an acid solution and introducing a second ultrasonic wave An oxide on the surface of the single crystal silicon wafer, wherein the composition of the acid solution contains 5~15vol.%HF; (b) immersing the single crystal silicon wafer in an etching solution to maintain an etching temperature and a Etching time is to carry out an etching process so that a plurality of inverted pyramid structures and a plurality of copper nanoparticles are formed on the surface of the single crystal silicon wafer, and an inert gas bubble is passed into the etching solution, wherein the etching The components of the solution include 0.02M~0.1M Cu ²⁺ , 0.5M~3.5M HF and 0.5M~3M H ₂ O ₂ , the etching temperature is 45°C~65°C, and the etching time is 2min.~20min.;( c) removing the plurality of copper nanoparticles formed on the surface of the single crystal silicon wafer; (d) performing a cleaning process on the single crystal silicon wafer; and (e) drying the single crystal silicon wafer , wherein an average reflectance of the surface of the single crystal silicon wafer is equal to or less than 8.26%. The texturing method of an inverted pyramid structure as described in Claim 1, wherein step (c) is performed by immersing the single crystal silicon wafer in a treatment solution and introducing a first ultrasonic wave, the composition of the treatment solution Containing H ₂ O and HNO ₃ , the volume ratio of the components of the treatment solution is H ₂ O:HNO ₃ =0.5-1.5:0.5-1.5. The inverted pyramid structure texturing method as described in claim 2, wherein The step (c) is performed by immersing the single crystal silicon wafer in the processing solution for a processing time equal to or greater than 20 min. The method for texturing an inverted pyramid structure as described in claim 3, wherein the surface of the single crystal silicon wafer is a (100) crystal plane.

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