TWI782696B - Circuit board with multiple network through holes and manufacturing method - Google Patents

Abstract

The invention provides a method for manufacturing a circuit board with multiple network through holes. The manufacturing method includes the following steps. Provide the first circuit board. At least one via hole is provided in the first circuit substrate. A first photoresist is formed on the inner wall of each via hole. Place the reflector in the via holes. The reflector is irradiated with external light to obtain a first patterned photoresist. Forming a tin layer on the surface of the first metal layer. A first opening is provided in the tin layer. Removing the first metal layer corresponding to the first opening. So as to obtain the circuit board. The circuit board provided by the invention has a higher wiring density. The invention also provides a circuit board with multiple network through holes manufactured by the manufacturing method.

Description

Circuit board with multi-network through holes and manufacturing method thereof

The invention relates to the technical field of circuit boards, in particular to a circuit board with multi-network through holes and a manufacturing method thereof.

For complex high-speed digital circuit boards, there are usually a large number of conductive circuit layers and a high thickness. When the signal is transmitted to the inner layer of the circuit board, only part of the signal will directly enter the layer, and part of the signal will be transmitted along the via hole to other locations, such as the bottom layer, and then reflected back to the signal, so the reflected signal and The directly incoming signal has a time difference, which can easily lead to signal errors. For this reason, the industry mainly adopts the method of back drilling to remove part of the hole length of the via hole, so as to avoid the signal transmission from being affected, thereby ensuring the integrity of the signal transmission.

However, the traditional back-drilling method usually leads to the failure of wiring around the via hole, and as the thickness of the circuit board increases, the length of the via hole removal is not easy to control. At the same time, the back-drilling method can only drill the board on one side, and the cost is relatively high.

In view of this, the present invention provides a method for manufacturing a circuit board with multi-network through holes that can solve the above problems.

In addition, it is also necessary to provide a circuit board with multi-network through holes manufactured by the above method.

An embodiment of the present invention provides a method for manufacturing a circuit board with multiple network through holes, including the following steps: providing a first circuit substrate, the first circuit substrate includes an insulating layer and is arranged on the A plurality of first conductive circuit layers in the insulating layer, at least one via hole is provided in the first circuit substrate, and each via hole includes a first via hole and a first via hole located on the inner wall of the first via hole. A metal layer; forming a first photoresist on the inner wall of each via hole; placing a reflector in the via hole; irradiating the reflector with external light and causing the reflection Reflecting the external light to a part of the first photoresist for exposure to obtain a first patterned photoresist; removing the reflector; developing to form a second patterned photoresist; forming a tin layer on the surface of the first metal layer, wherein a first opening is provided in the tin layer, and the second patterned photoresist Resist is located in the first opening; remove the second patterned photoresist, so that part of the first metal layer is exposed to the first opening; remove the corresponding to the first opening the first metal layer to form an annular ring in the first metal layer, so that the via hole forms a first network via hole and a second network via hole, and the first network via hole and the second network via holes are separated by the annular ring; and the tin layer is removed, thereby obtaining the circuit board.

An embodiment of the present invention also provides a circuit board with multiple network via holes, including an insulating layer and a plurality of first conductive circuit layers disposed in the insulating layer, at least one via hole is provided in the circuit board, Each via hole includes a first via hole and a first metal layer located on the inner wall of the first via hole, an annular ring is provided in the first metal layer, and the annular ring makes the via hole form A first network via hole and a second network via hole, and the first network via hole and the second network via hole are separated by the annular ring.

In the present invention, the reflector is placed in the via hole, and part of the first photoresist is exposed through the reflection of the reflector, the surface of the circuit board and the via hole are covered with a tin layer, and subsequently etching the first metal layer exposed to the tin layer in the via hole to form the annular ring, so that one via hole forms the first network via hole and the second network via hole holes, and the first network via hole and the second network via hole are separated by the annular ring, thereby reducing the length of the via hole. In addition, one via hole in the present invention can be used as two or more via holes, thereby realizing the transmission of various signals and reducing the number of via holes, thereby improving the The wiring density of the circuit board.

100: circuit board

10: Second circuit substrate

101: Insulation layer

102: the first conductive line layer

11: The first through hole

20: The first metal layer

21: Second metal layer

22: Via hole

30: The first circuit substrate

40: First photoresist

41: First patterned photoresist

42: Second patterned photoresist

50: reflector

51: visor

60: Second photoresist

601: Second through hole

70: tin layer

701: first opening

702: second opening

80: grommet

81: The first network via

82: The second network through hole

90: Second conductive circuit layer

FIG. 1 is a schematic structural diagram of a second circuit substrate provided by an embodiment of the present invention.

FIG. 2 is a schematic diagram of the structure after the first metal layer is formed on the inner wall of the first through hole shown in FIG. 1 , and the second metal layer is respectively formed on the two opposite surfaces of the insulating layer.

FIG. 3 is a schematic structural diagram after forming a first photoresist on the surface of the first metal layer and the surface of the second metal layer shown in FIG. 2 .

FIG. 4 is a structural schematic view of placing a light shielding plate on the first photoresist on the surface of the second metal layer shown in FIG. 3 , and placing a reflector in the via hole for exposure.

FIG. 5 is a schematic structural view after removing the reflector and the light-shielding plate shown in FIG. 4 and developing the first patterned photoresist.

FIG. 6 is a schematic structural diagram after forming a second photoresist on the surface of the second metal layer shown in FIG. 5 .

FIG. 7 is a schematic diagram of the structure after forming a tin layer on the surface of the first metal layer and the surface of the second metal layer shown in FIG. 6 .

FIG. 8 is a schematic structural diagram after removing the second patterned photoresist and the second photoresist shown in FIG. 7 .

FIG. 9 is a schematic structural diagram after removing the first metal layer corresponding to the first opening and the second metal layer corresponding to the second opening shown in FIG. 8 .

FIG. 10 is a schematic structural diagram of a circuit board obtained after removing the tin layer shown in FIG. 9 .

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present invention.

It should be noted that when a component is said to be "fixed" to another component, it can be directly on the other component or there can also be an intervening component. When a component is said to be "connected" to another component, it may be directly connected to the other component or there may be intervening components at the same time. When a component is said to be "set on" another component, it can be set directly on another component or there may be an intervening component at the same time.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terminology used herein in the description of the present invention is for the purpose of describing specific embodiments only, and is not intended to limit the present invention.

In order to further explain the technical means and effects adopted by the present invention to achieve the intended purpose, the present invention will be described in detail below in conjunction with the accompanying drawings and preferred embodiments.

An embodiment of the present invention provides a method for manufacturing a circuit board with multiple network through holes, including the following steps:

Step S11 , please refer to FIG. 1 , providing a second circuit substrate 10 .

In this embodiment, the second circuit substrate 10 includes an insulating layer 101 and a plurality of first conductive circuit layers 102 disposed in the insulating layer 101 .

The material of the insulating layer 101 can be selected from epoxy resin (epoxy resin), polypropylene (polypropylene, PP), BT resin, polyphenylene oxide (Polyphenylene Oxide, PPO), polyimide (polyimide, PI), polyimide One of resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN). In this embodiment, the insulating layer 101 is made of polypropylene.

In this embodiment, the second circuit substrate 10 includes six first conductive circuit layers 102 . In other embodiments, the number of the first conductive circuit layers 102 in the second circuit substrate 10 can be changed as required.

At least one first through hole 11 is disposed in the second circuit substrate 10 . Wherein, each of the first through holes 11 passes through the insulating layer 101 and the plurality of first conductive circuit layers 102 . In one embodiment, each of the first through holes 11 can be formed by mechanical drilling or laser drilling.

Step S12, please refer to FIG. 2, forming a first metal layer 20 on the inner wall of each of the first through holes 11, and forming a second metal layer 21 on the two opposite surfaces of the insulating layer 101, respectively, to obtain The first circuit substrate 30 .

Specifically, both the first metal layer 20 and the second metal layer 21 can be formed by electroplating. In this embodiment, the first metal layer 20 and the second metal layer 21 are made of copper. Wherein, the first metal layer 20 and the second metal layer 21 can be formed simultaneously in one electroplating process.

Wherein, one first through hole 11 and the first metal layer 20 on the inner wall of the first through hole 11 together form a through hole 22 .

Step S13 , please refer to FIG. 3 , forming a first photoresist 40 on the surface of the first metal layer 20 and the surface of the second metal layer 21 .

Specifically, the first photoresist 40 can be formed by coating.

It can be understood that forming the first photoresist 40 on the surface of the first metal layer 20 means forming the first photoresist 40 on the inner wall of the via hole 22 .

In step S14 , please refer to FIG. 4 , placing a plurality of reflectors 50 in each of the via holes 22 .

Wherein, the number of the reflectors 50 is equal to the number of the via holes 22 . Wherein, the position of the reflector 50 in each of the via holes 22 can be moved. The diameter of the reflector 50 is smaller than the inner diameter of the via hole 22 to prevent the reflector 50 from damaging the first photoresist 40 .

When the number of the via holes 22 in one of the first circuit substrates 30 is too large, a set of jigs (not shown) can be established. Wherein, the jig may include different numbers and different heights of the reflectors 50 , so as to implement subsequent exposure at different positions of the via holes 22 . In addition, the angle of the reflector 50 can also be adjusted according to the subsequent actual exposure area.

In an embodiment, the reflector 50 can be mirror-finished to meet the energy requirements of subsequent exposure. In one embodiment, the reflector 50 is a refracting mirror. Specifically, the refractor is a probe.

Step S15 , placing a light shielding plate 51 on the first photoresist 40 located on the surface of the second metal layer 21 .

Wherein, the light shielding plate 51 is used to prevent subsequent exposure of the first photoresist 40 located on the surface of the second metal layer 21 . In one embodiment, the shading plate 51 is a negative film.

Step S16, irradiating the reflector 50 and the light-shielding plate 51 with external light, and making the reflector 50 reflect the external light to part of the first photoresist 40 for exposure to obtain the second A patterned photoresist 41 .

Wherein, the position of the reflector 50 in the via hole 22 can be moved to realize exposure to different parts of the first photoresist 40 .

In one embodiment, the ambient light may be ultraviolet light.

Step S17 , please refer to FIG. 5 , remove the reflector 50 and the shading plate 51 .

Step 518 , developing the first patterned photoresist 41 to form a second patterned photoresist 42 .

Wherein, the second patterned photoresist 42 is located in the via hole 22 .

Step S19 , please refer to FIG. 6 , forming a second photoresist 60 on the surface of the second metal layer 21 .

Wherein, the second through hole 601 is provided in the second photoresist 60 .

Step S20 , please refer to FIG. 7 , forming a tin layer 70 on the surface of the first metal layer 20 and the surface of the second metal layer 21 .

Wherein, the tin layer 70 located on the surface of the first metal layer 20 is also located in the second through hole 601 .

Wherein, the tin layer 70 is provided with a first opening 701 and a second opening 702, and the second patterned photoresist 42 is located in the first opening 701, and the second photoresist The agent 60 is located in the second opening 702.

Step S21 , please refer to FIG. 8 , removing the second patterned photoresist 42 and the second photoresist 60 .

Specifically, the second patterned photoresist 42 and the second photoresist 60 can be removed by etching.

After removing the second patterned photoresist 42 and the second photoresist 60, part of the first metal layer 20 is exposed to the first opening 701, and part of the second metal layer Layer 21 is exposed to said second opening 702 .

Step S22, please refer to FIG. 9 , removing the first metal layer 20 corresponding to the first opening 701 to form an annular ring 80 in the first metal layer 20, so that the via hole 22 forms a second A network via hole 81 and a second network via hole 82, and the first network via hole 81 and the second network via hole 82 are separated by the annular ring 80, and the connection with the second network via hole is removed. The opening 702 corresponds to the second metal layer 21 , so that the second metal layer 21 forms the second conductive circuit layer 90 .

Specifically, the annular ring 80 and the second conductive circuit layer 90 can be formed by etching.

In this embodiment, the number of the annular ring 80 in one first metal layer 20 is one. In other embodiments, the number of the annular rings 80 in one first metal layer 20 may be equal to or greater than two, and the plurality of annular rings 80 in each first metal layer 20 are connected to each other. parallel. It can be understood that performing multiple exposures in step S16 means forming multiple hole rings 80 in one first metal layer 20 , so as to obtain multiple network via holes.

Step S23 , please refer to FIG. 10 , removes the tin layer 70 to obtain the circuit board 100 .

Please refer to FIG. 10 , an embodiment of the present invention also provides a circuit board 100 with multiple network through holes, the circuit board 100 includes an insulating layer 101, a plurality of first conductive circuit layers 102 and two second conductive circuit layers 102 Line layer 90.

The material of the insulating layer 101 can be selected from epoxy resin (epoxy resin), polypropylene (polypropylene, PP), BT resin, polyphenylene oxide (Polyphenylene Oxide, PPO), polyimide (polyimide, PI), polyimide One of resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN). In this embodiment, the insulating layer 101 is made of polypropylene.

A plurality of the first conductive circuit layers 102 are all disposed in the insulating layer 101 . In this embodiment, the circuit board 100 includes six first conductive circuit layers 102 . In other embodiments, the number of the first conductive circuit layers 102 in the circuit board 100 can be changed as required.

At least one via hole 22 is disposed in the circuit board 100 . Wherein, each via hole 22 includes a first via hole 11 and a first metal layer 20 located on the inner wall of the first via hole 11 . Wherein, each of the first through holes 11 passes through the insulating layer 101 and the plurality of first conductive circuit layers 102 . In this embodiment, the first metal layer 20 is made of copper.

An annular ring 80 is disposed in the first metal layer 20 . Wherein, the annular ring 80 makes the via hole 22 form a first network via hole 81 and a second network via hole 82, and the first network via hole 81 and the second network via hole 82 spaced by said annular ring 80 .

In this embodiment, the number of the annular ring 80 in one first metal layer 20 is one. In other embodiments, the number of the annular rings 80 in one first metal layer 20 may be equal to or greater than two, and the plurality of annular rings 80 in each first metal layer 20 are connected to each other. parallel. When the number of the annular rings 80 is equal to or greater than two, one via hole 22 can form three or more network via holes.

The two second conductive circuit layers 90 are respectively located on two opposite surfaces of the insulating layer 101 .

In the present invention, the reflector 50 is placed in the via hole 22, and part of the first photoresist 40 is exposed through the reflection of the reflector 50, and the tin layer is subsequently formed using 70 to form the annular ring 80 in the first metal layer 20, so that one via hole 22 forms the first network via hole 81 and the second network via hole 82, and the The first network via hole 81 and the second network via hole 82 are separated by the annular ring 80 , thereby reducing the length of the via hole 22 . In addition, one said via hole 22 in the present invention can be used as two or more via holes, thereby realizing the transmission of various signals, and also reducing the quantity of said via hole 22, thereby improving Wiring density of the circuit board 100 . In addition, the manufacturing cost of the present invention is relatively low.

The above description is only an optimized specific implementation manner of the present invention, but it cannot be limited to this implementation manner only in the actual application process. For those skilled in the art, other deformations and changes made according to the technical concept of the present invention should belong to the protection scope of the present invention.

100: circuit board

101: Insulation layer

102: the first conductive line layer

80: grommet

81: The first network via

82: The second network through hole

90: Second conductive line layer

Claims (7)

A method for manufacturing a circuit board with multi-network through holes, the improvement of which includes the following steps: providing a first circuit substrate, the first circuit substrate includes an insulating layer and a plurality of first circuit boards arranged in the insulating layer Conductive circuit layer, at least one via hole is provided in the first circuit substrate, and each via hole includes a first via hole and a first metal layer located on the inner wall of the first via hole; A first photoresist is formed on the inner wall of the via hole; a reflector is placed in the via hole, and the end of the reflector is a tapered structure; the reflector is irradiated by external light, and the The reflector reflects the external light to a part of the first photoresist for exposure to obtain a first patterned photoresist; removes the reflector; The resist is developed to form a second patterned photoresist; a tin layer is formed on the surface of the first metal layer, wherein a first opening is provided in the tin layer, and the second pattern a patterned photoresist located in the first opening; removing the second patterned photoresist so that a portion of the first metal layer is exposed to the first opening; removing the patterned photoresist associated with the first Opening the corresponding first metal layer to form an annular ring in the first metal layer, so that the via hole forms a first network via hole and a second network via hole, and the first network The via hole and the second network via hole are separated by the annular ring; and the tin layer is removed, thereby obtaining the circuit board. The method for manufacturing a circuit board according to Claim 1, wherein the position of the reflector in the via hole is movable. The method for manufacturing a circuit board according to claim 1, wherein the reflector is a refractor, and the refractor is a probe. The method for manufacturing a circuit board according to claim 1, wherein the first circuit substrate further includes a second metal layer located on two opposite surfaces of the insulating layer, and the manufacturing method further includes: Form the first photoresist on the surface of the second metal layer; place a light-shielding plate on the first photoresist on the surface of the second metal layer; irradiating the light-shielding plate, wherein the first patterned photoresist includes the first photoresist on the surface of the second metal layer; removing the light-shielding plate; forming the tin layer on the surface of the metal layer, wherein a second opening is also provided in the tin layer; and removing the second metal layer corresponding to the second opening, so that the second metal layer A second conductive circuit layer is formed. The method for manufacturing a circuit board according to claim 1, wherein the number of the annular rings in each of the first metal layers is equal to or greater than two, and a plurality of the annular rings in each of the first metal layers The annular rings are parallel to each other. The method for manufacturing a circuit board according to claim 1, wherein the step of removing the second patterned photoresist comprises: removing the second patterned photoresist by etching. The manufacturing method of the circuit board as claimed in item 1, wherein, the step of forming the first photoresist on the inner wall of each of the via holes includes: coating each of the via holes The first photoresist is formed on the inner wall of the via hole.

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