TWI777447B - Driving circuit - Google Patents

Abstract

A driving circuit includes at least one first driving unit, at least one second driving unit, driving transistor and light emitting diode. At least one first driving unit is used for storing a first data voltage according to the first pulse signal [n], and determining whether to provide the first power supply voltage according to the first data voltage and the scan signal [n]. At least one second driving unit is used for storing a second data voltage according to the second pulse signal [n], and determining whether to provide the second power supply voltage according to the second data voltage and the first power supply voltage. The driving transistor is coupled to the second driving circuit and used for outputting a second power supply voltage according to the second data voltage. The light emitting diode is coupled to the driving transistor and used to supply voltage according to the second power supply to emit light.

Description

Drive circuit

The present case is related to display devices, and in particular, to a driving circuit applied to a micro-LED display.

The advantages of high contrast ratio, high color saturation, and good luminous efficiency of micro light-emitting diode (micro LED) displays make it one of the next-generation hot technologies. When the conventional micro-LED display updates the display screen, the driving circuit for data writing will turn off the micro-LED to avoid unstable transient brightness generated by the micro-LED. However, the rapid switching of the driving circuit between the off and on states may cause the display screen to flicker. Therefore, how to provide a micro-LED driving circuit and a display with high display quality is a technical problem to be solved in the industry.

SUMMARY The purpose of this summary is to provide a simplified summary of the disclosure to give the reader a basic understanding of the disclosure. This summary is not an exhaustive overview of the disclosure, and it is not intended to identify key/critical elements of the present embodiments or to delimit the scope of the present disclosure.

One technical aspect of the content of this case relates to a driving circuit. The driving circuit includes at least a first driving unit, at least a second driving unit, a driving transistor and a light emitting diode. The at least one first driving unit is used for storing the first data voltage according to the first pulse signal [n], and determining whether to provide the first power supply voltage according to the first data voltage and the scanning signal [n]. At least one second driving unit is used for storing the second data voltage according to the second pulse signal [n], and determining whether to provide the second power supply voltage according to the second data voltage and the first power supply voltage, wherein the first pulse signal [n], the second pulse signal [n] and the scan signal [n] correspond to the first to nth level signals, and n is a positive integer greater than 1. The driving transistor is coupled to the second driving circuit for outputting the second power supply voltage according to the second data voltage. The light emitting diode is coupled to the driving transistor for emitting light according to the second power supply voltage.

Therefore, according to the technical content of this application, the driving circuit shown in the embodiment of this application can be applied to a micro-LED driving circuit with high display quality and multi-pulse light emission. In addition, the driving circuit of this application can resist the voltage drop (Anti-IR Drop), therefore, the problem of uneven display brightness of the display can be improved.

After referring to the following embodiments, those with ordinary knowledge in the technical field of this case can easily understand the basic spirit and other inventive purposes of this case, as well as the technical means and implementation modes adopted in this case.

In order to make the description of the present disclosure more detailed and complete, the following provides an illustrative description for the implementation aspects and specific embodiments of the present case; but this is not the only form of implementing or using the specific embodiments of the present case. The features of various specific embodiments as well as method steps and sequences for constructing and operating these specific embodiments are encompassed in the detailed description. However, other embodiments may also be utilized to achieve the same or equivalent function and sequence of steps.

Unless otherwise defined in this specification, the scientific and technical terms used herein have the same meanings as understood and commonly used by those of ordinary skill in the technical field to which this case belongs. In addition, unless contradicting the context, the singular noun used in this specification covers the plural form of the noun; and the plural noun used also covers the singular form of the noun.

In addition, "coupled" or "connected" as used herein may refer to two or more elements in direct physical or electrical contact with each other, or in indirect physical or electrical contact with each other, or two or more elements Elements interact or act with each other.

As used herein, the term "circuit" generally refers to an object that is connected in a certain manner by one or more transistors and/or one or more active and passive components to process signals.

Certain terms are used in the specification and claims to refer to particular elements. However, those of ordinary skill in the art should understand that the same elements may be referred to by different nouns. The description and the scope of the patent application do not use the difference in name as a way of distinguishing elements, but use the difference in function of the elements as a basis for distinguishing. The "comprising" mentioned in the description and the scope of the patent application is an open-ended term, so it should be interpreted as "including but not limited to".

FIG. 1 is a schematic diagram of a driving circuit 100 according to an embodiment of the present disclosure. As shown in the figure, the driving circuit 100 includes at least one first driving unit 110 , at least one second driving unit 120 , a driving transistor T5 and a light emitting diode D1 . In connection relationship, at least one first driving unit 110 is coupled to at least one second driving unit 120, at least one second driving unit 120 is coupled to driving transistor T5, and driving transistor T5 is coupled to light emitting diode D1 .

In order to provide a high display quality micro-LED driving circuit technology, the present application provides a driving circuit 100 as shown in FIG. 1 , and the related operations are described in detail below.

In one embodiment, at least one first driving unit 110 is used to store the first data voltage according to the first pulse signal [n], and determine whether to provide the first power supply according to the first data voltage and the scan signal [n] Voltage. At least one second driving unit 120 is used for storing the second data voltage according to the second pulse signal [n], and determining whether to provide the second power supply voltage according to the second data voltage and the first power supply voltage, wherein the first pulse The signal [n], the second pulse signal [n] and the scanning signal [n] correspond to the signals of the first level to the nth level, and n is a positive integer greater than 1. The driving transistor T5 is used for outputting the second power supply voltage according to the second data voltage. The light emitting diode D1 is used to emit light according to the second power supply voltage.

In order to make the above operation of the driving circuit 100 easier to understand, please refer to FIGS. 2 to 6 together. FIG. 2 is a schematic diagram of waveforms of various control signal levels according to an embodiment disclosed in the present application, and FIGS. 3 to 6 The drawing is a schematic diagram illustrating the operation of the driving circuit 100 shown in FIG. 1 according to an embodiment disclosed in the present application.

As shown in FIG. 1 and FIG. 2, at least one first driving unit 110 stores the first data voltage DATA according to the first pulse signal S1[n], and stores the first data voltage DATA according to the first data voltage DATA and the scan signal Sweep[n] Determine whether to provide the first power supply voltage VDD1. The first pulse signal S1[n] and the scan signal Sweep[n] correspond to the first to nth level signals, and n is a positive integer greater than 1. For example, the at least one first driving unit 110 controls whether to provide the first power supply voltage VDD1 by providing the first data voltage DATA and the scan signal Sweep[n] to the gate of the transistor T3. In addition, the first pulse signal S1[n] can be implemented by a pulse width modulation (Pulse Width Modulation, PWM) signal.

Then, at least one second driving unit 120 is used to store the second data voltage DATA according to the second pulse signal S2[n], and determine whether to provide the second power supply according to the second data voltage DATA and the first power supply voltage VDD1 voltage VDD2. The first pulse signal S1[n], the second pulse signal S2[n], and the scan signal Sweep[n] correspond to the signals of the first level to the nth level, and n is a positive integer greater than 1. In addition, the second pulse signal S2[n] can be implemented by a pulse-amplitude modulation (Pulse-amplitude modulation, PAM) signal. In some embodiments, the first pulse signal S1[n] and the second pulse signal S2[n] may have a timing difference, but the present application is not limited to this.

Then, the driving transistor T5 outputs the second power supply voltage VDD2 according to the second data voltage DATA. Next, the light emitting diode D1 emits light according to the second power supply voltage VDD2. For example, at least one second driving unit 120 controls whether to provide the second power supply voltage VDD2 to the light-emitting diodes by providing the second data voltage DATA and the first power supply voltage VDD1 to the gate of the driving transistor T5 D1. In addition, the transistor T3 and the driving transistor T5 can be implemented by any suitable type of P-type transistor, such as a P-type thin film transistor (TFT) or a P-type metal-oxide-semiconductor field effect transistor (Metal- Oxide-Semiconductor Field Effect Transistor, MOSFET) etc.

Referring to FIG. 2 and FIG. 3 together, in one embodiment, at least one first driving unit 110 includes a first storage capacitor C1 , and at least one second driving unit 120 includes a second storage capacitor C2 . In the first stage P1, the first storage capacitor C1 stores the first power supply voltage VDD1 and the first pull-down voltage Vref at the first end and the second end respectively according to the first switch signal RS[n]. In addition, the second storage capacitor C2 stores the first power supply voltage VDD1 and the first pull-down voltage Vref at the third terminal and the fourth terminal, respectively, according to the first switching signal RS[n]. Furthermore, the light emitting diode D1 is reset according to the first switch signal RS[n]. The above-mentioned first switch signal RS[n] corresponds to the first to nth stage signals.

Please refer to Figure 2 and Figure 4 together, in the second stage P2 At the time, the first storage capacitor C1 stores the first data voltage DATA and the first compensation voltage at the first end and the second end respectively according to the first pulse signal S1[n]. In addition, the second storage capacitor C2 maintains the first power supply voltage VDD1 and the first pull-down voltage Vref stored in the first stage. For example, if the first power supply voltage VDD1 is 5V and the threshold voltage of the transistor T3 is Vth_T3, the first compensation voltage is 5-Vth_T3.

Please refer to FIG. 2 and FIG. 5 together. In the third stage P3, the first storage capacitor C1 maintains the first data voltage DATA and the first compensation voltage stored in the first stage. In addition, the second storage capacitor C2 stores the second data voltage DATA and the second compensation voltage at the third terminal and the fourth terminal respectively according to the second pulse signal S2[n]. For example, if the second power supply voltage VDD2 is 7V and the threshold voltage of the driving transistor T5 is Vth_T5, the second compensation voltage is 7-Vth_T5.

Please refer to FIG. 2 and FIG. 6 together, in the fourth stage P4, the first storage capacitor C1 stores the scan signal Sweep[n] at the first end and the second end respectively according to the second switch signal EM[n] and coupling voltage. In addition, the second driving unit 120 drives the driving transistor T5 according to the second data voltage DATA and the second compensation voltage stored in the second storage capacitor C2, so that the driving transistor T5 outputs the second power supply voltage VDD2. In addition, the light emitting diode D1 emits light according to the second power supply voltage VDD2. Furthermore, the second switch signal EM[n] corresponds to the first to nth level signals. For example, if scanning The signal Sweep[n] is 5V and the first compensation voltage is 5-Vth_T3, then the coupling voltage is 5+(5-Vth_T3)=10-Vth_T3. When the coupling voltage is positive, since the transistor T3 is P-type Transistor, the state of transistor T3 is off at this time.

In the fifth stage P5, the present case will have different changes under the operating state shown in FIG. 6. For example, the voltage level of the scan signal Sweep[n] will gradually turn to a low level, and the first driving unit 110 scans according to the low level. The signal Sweep[n] provides the first power supply voltage VDD1 to the second driving unit 120 . In addition, the second driving unit 120 drives the driving transistor T5 according to the first power supply voltage VDD1, so that the driving transistor T5 stops outputting the second power supply voltage VDD2. For example, at the end of the fifth stage P5, if the scan signal Sweep[n] is at a low level, the low level is coupled to the gate of the transistor T3, so that the transistor T3 is turned on and provides the first power supply voltage VDD1 For the gate of the driving transistor T5, since the first power supply voltage VDD1 is positive, the driving transistor T5 is turned off and stops supplying the second power supply voltage VDD2 to the light-emitting diode D1.

In another embodiment, each column driving circuit 100 on the display panel successively draws current in different stages, and provides the second power supply voltage VDD2 to the light emitting diodes D1 of each column, so the second power supply The voltage value of the voltage VDD2 is stable to achieve the effect of anti-IR Drop.

FIG. 7 shows a driving circuit according to an embodiment of the present invention. Schematic diagram of the road. Referring to FIG. 7, compared with the driving circuit 100 shown in FIG. 1 using the same switching signal RS[n] for control, the driving circuit 100 shown in FIG. 7 uses two switching signals RS1[n], RS2[ n] to control. In order to make the above-mentioned operation of the driving circuit 100 in FIG. 7 easier to understand, please refer to FIGS. 8 to 15 together. FIG. 8 is a schematic diagram illustrating waveforms of various control signal levels according to an embodiment disclosed in the present application. FIGS. 15 to 15 are schematic diagrams illustrating the operation of the driving circuit 100 shown in FIG. 7 according to an embodiment disclosed in the present application.

Please refer to FIG. 8 and FIG. 9 together, in the first stage P1, the first storage capacitor C1 stores the first power supply voltage VDD1 at the first end and the second end respectively according to the first switch signal RS1[n] and the first pull-down voltage Vref, wherein the first switch signal RS1[n] corresponds to the signals of the first level to the nth level.

Please refer to FIG. 8 and FIG. 10 together. In the second stage P2, the first storage capacitor C1 stores the first data voltages DATA1 and DATA1 at the first end and the second end respectively according to the first pulse signal S1[n]. the first compensation voltage. In addition, the second storage capacitor C2 stores the first power supply voltage VDD1 and the first pull-down voltage Vref at the third terminal and the fourth terminal respectively according to the second switching signal RS2[n]. Furthermore, the light-emitting diode D1 is reset according to the second switch signal RS2[n]. The above-mentioned second switch signal RS2[n] corresponds to the first-level to n-th level signals. For example, if the first data voltage DATA1 is 5V and the threshold voltage of the transistor T3 is Vth_T3, the first compensation voltage is 5-Vth_T3. In addition, the first data voltage DATA1 and the first power supply voltage VDD1 can be implemented by a pulse width modulation (Pulse Width Modulation, PWM) signal.

Please refer to FIG. 8 and FIG. 11 together. In the third stage P3, the first storage capacitor C1 maintains the first data voltage DATA1 and the first compensation voltage stored in the second stage P2. Furthermore, the second storage capacitor C2 stores the second data voltage DATA2 and the second compensation voltage at the third terminal and the fourth terminal respectively according to the second pulse signal S2[n]. For example, if the second data voltage DATA2 is 7V and the threshold voltage of the driving transistor T5 is Vth_T5, the second compensation voltage is 7-Vth_T5. In addition, the second data voltage DATA2 can be implemented by a pulse-amplitude modulation (Pulse-amplitude modulation, PAM) signal.

Please refer to FIG. 8 and FIG. 12 together, in the fourth stage P4, the first storage capacitor C1 stores the scan signal Sweep[n] at the first end and the second end respectively according to the third switch signal EM[n] and coupling voltage. In addition, the second driving unit 120 drives the driving transistor T5 according to the second data voltage DATA2 and the second compensation voltage stored in the second storage capacitor C2, so that the driving transistor T5 outputs the second power supply voltage VDD2. Furthermore, the light emitting diode D1 emits light according to the second power supply voltage VDD2. The above-mentioned third switch signal EM[n] corresponds to the signals of the first level to the nth level. For example, if the scan signal Sweep[n] is 5V and the first compensation voltage is 5-Vth_T3, the coupling voltage is 5+(5-Vth_T3)=10-Vth_T3, when the coupling voltage is positive, since the transistor T3 is a P-type transistor, the state of the transistor T3 is turned off at this time.

In the fifth stage P5, the present case will have different changes under the operating state shown in FIG. 12. For example, the voltage level of the scan signal Sweep[n] will gradually turn to a low level, and the first driving unit 110 scans according to the low level. The signal Sweep[n] provides the first power supply voltage VDD1 to the second driving unit 120 . In addition, the second driving unit 120 drives the driving transistor T5 according to the first power supply voltage VDD1, so that the driving transistor T5 stops outputting the second power supply voltage VDD2. For example, at the end of the fifth stage P5, if the scan signal Sweep[n] is at a low level, the low level is coupled to the gate of the transistor T3, so that the transistor T3 is turned on and provides the first power supply voltage VDD1 to The gate of the driving transistor T5, because the first power supply voltage VDD1 is a positive value, causes the driving transistor T5 to be turned off and stop providing the second power supply voltage VDD2 to the light-emitting diode D1. Furthermore, the second power supply voltage VDD2 can be implemented by a pulse-amplitude modulation (Pulse-amplitude modulation, PAM) signal.

Please refer to FIG. 8 and FIG. 13 together. In the sixth stage P6, the second storage capacitor C2 stores the first power supply voltage VDD1 at the third terminal and the fourth terminal respectively according to the second switching signal RS2[n]. and the first pull-down voltage Vref. In addition, the light emitting diode D1 is reset according to the second switch signal RS2[n].

Please refer to FIG. 8 and FIG. 14 together. In the seventh stage P7, the second storage capacitor C2 stores the second data voltages DATA2 and DATA2 at the third end and the fourth end respectively according to the second pulse signal S2[n]. The second compensation voltage. For example, if the second pulse signal S2[n] is 7V and the threshold voltage of the driving transistor T5 is Vth_T5, the second compensation voltage is 7-Vth_T5.

Please refer to FIG. 8 and FIG. 15 together, in the eighth stage P8, the second driving unit 120 drives the driving transistor T5 according to the second data voltage DATA2 and the second compensation voltage stored in the second storage capacitor C2, In order to make the driving transistor T5 output the second power supply voltage VDD2. In addition, the light emitting diode D1 emits light according to the second power supply voltage VDD2. For example, if the scan signal Sweep[n] is 5V and the first compensation voltage is 5-Vth_T3, the coupling voltage is 5+(5-Vth_T3)=10-Vth_T3. The transistor T3 is a P-type transistor, and the state of the transistor T3 is turned off at this time.

In the ninth stage P9, the present case will have different changes under the operating state shown in FIG. 15. For example, the voltage level of the scan signal Sweep[n] will gradually turn to a low level, and the first driving unit 110 scans according to the low level. The signal Sweep[n] provides at least one first power supply voltage VDD2 to at least one second driving unit 120 . In addition, at least one second driving unit 120 drives the driving transistor T5 according to the first power supply voltage VDD1, so that the driving transistor T5 stops outputting the second power supply voltage VDD2. For example, in the ninth stage P9 At the end of time, if the scan signal Sweep[n] is at a low level, the low level will be coupled to the gate of the transistor T3, so that the transistor T3 is turned on and provides the first power supply voltage VDD1 to the gate of the driving transistor T5. The first power supply voltage VDD1 is positive, so that the driving transistor T5 is turned off and stops supplying the second power supply voltage VDD2 to the light-emitting diode D1.

In another embodiment, since the first driving unit 110 may not be operated in the sixth stage P6 to the ninth stage P9, only the second driving unit 120 can be operated to make the light emitting diode D1 emit light, and the light emitting diode D1 can emit light during the operation period The diode D1 emits light at least twice, thereby achieving the effect of multi-pulse light emission.

In another embodiment, each column driving circuit 100 on the display panel successively draws current in different stages, and provides the second power supply voltage VDD2 to the light emitting diodes D1 of each column, so the second power supply The voltage value of the voltage VDD2 is stable to achieve the effect of anti-IR Drop.

It can be seen from the above embodiments of the present case that the application of the present case has the following advantages. The driving circuit 100 shown in the embodiment of the present invention is suitable for a micro-LED driving circuit with high display quality and multi-pulse light emission. In addition, the driving circuit 100 of the present application can resist the voltage drop (Anti-IR Drop), therefore, the problem of uneven display brightness of the display can be improved.

Although the above embodiments disclose specific embodiments of the present case, they are not intended to limit the present case. Please note that in the front view, The shapes, sizes and proportions of the components are only for illustration, and are for the purpose of understanding the present case by those with ordinary knowledge in the technical field to which the present case belongs, and are not intended to limit the present case. Those with ordinary knowledge in the technical field to which this case belongs can make various changes and modifications without departing from the principles and spirit of this case. Therefore, the scope of protection of this case shall be defined by the scope of the patent application attached hereto. .

100: Drive circuit

110: At least one first drive unit

120: At least one second drive unit

121: Memory

123: Processor

T1~T4: Transistor

T5: drive transistor

T6~T15: Transistor

C1~C2: Capacitor

D1: Light Emitting Diode

DATA: data voltage

RS[n]: The first switch signal [n]

S1[n]: The first pulse signal [n]

S2[n]: The second pulse signal [n]

EM[n]: Second switch signal [n]

Sweep[n]: Sweep signal[n]

VDD1: The first power supply voltage

VDD2: The second power supply voltage

Vref: The first pull-down voltage

VSS: Second pull-down voltage

DATA1: The first data voltage

DATA2: The second data voltage

RS1[n]: The first switch signal [n]

RS2[n]: The second switch signal [n]

EM[n]: The third switch signal [n]

In order to make the above and other objects, features, advantages and embodiments of the present case more clearly understood, the descriptions of the accompanying drawings are as follows: FIG. 1 is a schematic diagram illustrating a driving circuit according to an embodiment of the present invention. FIG. 2 is a schematic diagram illustrating waveforms of various control signal levels according to an embodiment of the present application. FIG. 3 to FIG. 6 are schematic diagrams illustrating the operation of the driving circuit shown in FIG. 1 according to an embodiment of the present application. FIG. 7 is a schematic diagram illustrating a driving circuit according to an embodiment of the present invention. FIG. 8 is a schematic diagram illustrating waveforms of various control signal levels according to an embodiment of the present invention. FIGS. 9 to 15 are schematic diagrams illustrating the operation of the driving circuit shown in FIG. 7 according to an embodiment of the present application. In accordance with common practice, the various features and elements in the figures are not drawn to scale, but are drawn in a manner that best represents the specific features and elements relevant to the present case. Furthermore, the same or similar reference numerals are used to refer to similar elements/components among the different drawings.

100: Drive circuit

110: At least one first drive unit

120: At least one second drive unit

T1~T4: Transistor

T5: drive transistor

T6~T15: Transistor

C1~C2: Capacitor

D1: Light Emitting Diode

DATA: data voltage

RS[n]: The first switch signal [n]

S1[n]: The first pulse signal [n]

S2[n]: The second pulse signal [n]

EM[n]: Second switch signal [n]

Sweep[n]: Sweep signal[n]

VDD1: The first power supply voltage

VDD2: The second power supply voltage

Vref: The first pull-down voltage

VSS: Second pull-down voltage

Claims (10)

A driving circuit, comprising: at least one first driving unit for storing a first data voltage according to a first pulse signal [n], and for determining whether to provide or not according to the first data voltage and a scanning signal [n] a first power supply voltage; at least one second driving unit for storing a second data voltage according to a second pulse signal [n], and determining whether to use the second data voltage and the first power supply voltage A second power supply voltage is provided, wherein the first pulse signal [n], the second pulse signal [n] and the scan signal [n] correspond to the signals of the first level to the nth level, and n is a positive integer greater than 1 , wherein the first pulse signal [n] and the second pulse signal [n] have a timing difference; a driving transistor is coupled to the second driving circuit for outputting a first pulse signal according to the second data voltage two power supply voltages; and a light emitting diode coupled to the driving transistor for emitting light according to the second power supply voltage. The driving circuit of claim 1, wherein the at least one first driving unit includes a first storage capacitor, and the at least one second driving unit includes a second storage capacitor; wherein in a first stage, the first storage capacitor A storage capacitor stores the first power supply voltage and a first pull-down voltage at a first end and a second end respectively according to a first switch signal [n], wherein the second storage capacitor is according to the first switch The signal [n] is stored in a third terminal and a fourth terminal respectively. The power supply voltage and the first pull-down voltage, wherein the light emitting diode is reset according to the first switch signal [n], wherein the first switch signal [n] corresponds to the signals of the first level to the nth level. The driving circuit of claim 2, wherein in a second stage, the first storage capacitor stores the first data voltage at the first end and the second end respectively according to the first pulse signal [n] and a first compensation voltage, wherein the second storage capacitor maintains the first power supply voltage and the first pull-down voltage stored in the first stage. The driving circuit of claim 3, wherein in a third stage, the first storage capacitor maintains the first data voltage and the first compensation voltage stored in the first stage, wherein the second storage capacitor is based on the The second pulse signal [n] stores the second data voltage and a second compensation voltage at a third terminal and a fourth terminal, respectively. The driving circuit of claim 4, wherein in a fourth stage, the first storage capacitor stores the scan signal [n] at the first end and the second end respectively according to a second switch signal [n] ] and a coupling voltage, wherein the second drive unit drives the drive transistor according to the second data voltage and the second compensation voltage stored in the second storage capacitor, so that the drive transistor outputs the second power supply voltage, wherein the light emitting diode emits light according to the second power supply voltage, wherein the second switch signal [n] corresponds to the first to nth level signals; wherein in a fifth stage, the scanning The voltage level of the scan signal [n] is a low level, the first driving unit provides the first power supply voltage to the second driving unit according to the low level of the scan signal [n], wherein the second driving unit The unit drives the driving transistor according to the first power supply voltage, so that the driving transistor stops outputting the second power supply voltage. The driving circuit of claim 1, wherein the at least one first driving unit includes a first storage capacitor, and the at least one second driving unit includes a second storage capacitor; wherein in the first stage, the first storage capacitor A storage capacitor stores the first power supply voltage and a first pull-down voltage at a first end and a second end respectively according to a first switch signal [n], wherein the first switch signal [n] corresponds to the 1st to nth level signal. The driving circuit of claim 6, wherein in a second stage, the first storage capacitor stores the first data voltage at the first end and the second end respectively according to the first pulse signal [n] and a first compensation voltage, wherein the second storage capacitor stores the first power supply voltage and the first pull-down voltage at a third end and a fourth end respectively according to a second switch signal [n], wherein The light emitting diode is reset according to the second switch signal [n], wherein the second switch signal [n] corresponds to the signals of the first level to the nth level. The driving circuit of claim 7, wherein in a third stage, the first storage capacitor maintains the first data stored in the second stage The data voltage and the first compensation voltage, wherein the second storage capacitor stores the second data voltage and a second compensation voltage at the third end and the fourth end respectively according to the second pulse signal [n]. The driving circuit of claim 8, wherein in a fourth stage, the first storage capacitor stores the scan signal [n] at the first end and the second end respectively according to a third switch signal [n] ] and a coupling voltage, wherein the second drive unit drives the drive transistor according to the second data voltage and the second compensation voltage stored in the second storage capacitor, so that the drive transistor outputs the second power supply voltage, wherein the light emitting diode emits light according to the second power supply voltage, wherein the third switch signal [n] corresponds to the first to nth level signals; wherein in a fifth stage, the scan signal The voltage level of [n] is a low level, and the first driving unit provides the first power supply voltage to the second driving unit according to the scan signal [n] of the low level, wherein the second driving unit is based on The first power supply voltage drives the driving transistor, so that the driving transistor stops outputting the second power supply voltage. The driving circuit of claim 9, wherein in a sixth stage, the second storage capacitor stores the first power supply at the third end and the fourth end respectively according to a second switch signal [n] voltage and the first pull-down voltage, wherein the light emitting diode is reset according to the second switch signal [n]; wherein in a seventh stage, the second storage capacitor is according to the second pulse signal [n] ] and store the second data at the third end and the fourth end respectively data voltage and the second compensation voltage; wherein in an eighth stage, the second driving unit drives the driving transistor according to the second data voltage and the second compensation voltage stored in the second storage capacitor, so as to Make the driving transistor output the second power supply voltage, wherein the light-emitting diode emits light according to the second power supply voltage; wherein in the ninth stage, the voltage level of the scan signal [n] is one low level, the first driving unit provides the first power supply voltage to the second driving unit according to the scan signal [n] of the low level, wherein the second driving unit drives the second driving unit according to the first power supply voltage The driving transistor is used to stop the driving transistor from outputting the second power supply voltage.

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