TWI776128B - Power device and mthode for fabricating the same - Google Patents

Abstract

A power device includes a substrate structure, an epitaxial structure, a gate, at least one metal element and an insulating structure. The epitaxial structure is disposed on the substrate structure and has a hetero-junction. The gate is disposed on the substrate structure. The metal element is disposed between the epitaxial structure and the gate and contacts to the epitaxial structure. The insulating structure is disposed between the gate and the metal element and electrically isolates the gate from the metal element.

Description

Power element and method of making the same

This disclosure relates to a semiconductor device and a method for fabricating the same. In particular, it relates to a power component and its manufacturing method.

Power components have high temperature resistance, high voltage, high current density and high frequency operation because of their large energy gap (band gap), high breakdown voltage (breakdown voltage) and high saturation voltage (saturation voltage) and other characteristics It is mainly used in power circuits as high-power switches or radio frequency components.

A typical power device, taking AlGaN/GaN high electron mobility transistors as an example, uses the hetero-junction of AlGaN/GaN, which is A high polarization field is generated between the source electrode and the drain electrode, so that electrons are highly accumulated near the interface between the upper aluminum gallium nitride layer and the lower gallium nitride layer to form a two-dimensional electron gas. Electron Gas, 2DEG) channel.

However, the power element is usually a normally-on type, that is, a depletion mode (D mode) element, and an additional negative bias voltage is applied to the gate to turn off the element, and the time required for boosting affects the power element. switching characteristics. Other In addition, power components face the problem of current collapse under high voltage operating conditions.

Therefore, there is a need to provide an advanced power device and a manufacturing method thereof to solve the problems faced by the prior art.

An embodiment of the present specification discloses a power device including a substrate structure, an epitaxial structure, a gate, at least one metal unit, and an insulating structure. The epitaxial structure is located on the substrate structure and has a heterojunction and a two-dimensional electron gas channel, and the epitaxial structure is mainly composed of non-silicon materials. The gate is located on the epitaxial structure. The metal unit is located between the epitaxial structure and the gate electrode, and is in contact with the epitaxial structure. The insulating structure is located between the gate electrode and the metal unit, and electrically isolates the gate electrode and the metal unit.

Another embodiment of this specification discloses a method for fabricating a power device, including the following steps: first, forming an epitaxial structure, so that the epitaxial structure has a heterojunction and a two-dimensional electron gas channel, and the epitaxial structure mainly Constructed of non-silicon materials. Afterwards, at least one metal unit is formed on the epitaxial structure to be in contact with the epitaxial structure. An insulating structure is formed on the epitaxial structure and at least one metal unit. Subsequently, a gate electrode is formed on the epitaxial structure, so that a part of the insulating structure is located between the at least one metal unit and the gate electrode, and the gate electrode is electrically isolated from the at least one metal unit.

According to the above-mentioned embodiments, the present specification provides a power element and a manufacturing method thereof. It is connected between the epitaxial structure with a heterojunction and the gate, improving the For at least one metal unit and the epitaxial structure to form a Schottky Contact (Schottky Contact), and at least one insulating structure is used to electrically isolate the gate and the metal unit, so as to form a parasitic capacitance between the metal unit and the gate. Schottky diodes are connected in series to form a parasitic circuit. Negative charges (electrons) inside the power element are concentrated in parasitic capacitance.

100, 300, 500, 700: Power components

101, 501: Substrate structure

102, 502: Epitaxial structure

102A, 502A: Buffer substructure

102B, 502B: Channel Substructure

102C, 502C: Barrier Substructure

103A, 103B, 503A, 503B, 503C, 703: Metal units

104, 504: Dielectric Structure

104a, 104b, 514, 714: through holes

105, 505: Insulation structure

105a, 105b, 105c, 305a, 504a, 504b, 505a, 510a: Openings

106, 306, 506: gate

106A, 306A, 506A: main body

106B, 506B, 506C: Extensions

107A, 507A: source

107B, 507B: drain

108, 508: Passivation structure

201, 401, 601: Heterojunction Diodes

202, 204, 206, 402, 404, 406, 602, 603, 605A, 605B, 605C, 805: Parasitic capacitance

203, 205, 403, 405, 604A, 604B, 604C, 804: Schottky Diodes

509: Connection Structure

510: Override Structure

R1, R2: parasitic resistance

In order to have a better understanding of the above and other aspects of this specification, the following specific examples are given and described in detail in conjunction with the accompanying drawings as follows: Figures 1A to 1E show the power according to an embodiment of this specification. Schematic cross-sectional view of the process structure of the device; Figure 2 is an equivalent circuit diagram of the power device according to Figure 1E; Figure 3 is a schematic cross-sectional view of the structure of the power device according to another embodiment of this specification; Fig. 4 is an equivalent circuit diagram of the power device according to Fig. 3; Fig. 5A to Fig. 5E are cross-sectional schematic diagrams of the process structure of the power device according to another embodiment of the present specification; Fig. 6 is a FIG. 5 is an equivalent circuit diagram of the power device according to FIG. 5; FIG. 7 is a schematic cross-sectional view of the structure of the power device according to another embodiment of the present specification; and FIG. 8 is the power device according to FIG. 7. Equivalent circuit diagram shown.

This specification provides a power device and a manufacturing method thereof. The power device disclosed in this specification has a lower current attenuation effect, and the power device disclosed in this specification has a faster switching speed. In order to make the above-mentioned embodiments and other objects, features and advantages of the present specification more clearly understood, a plurality of embodiments are exemplified below and described in detail with the accompanying drawings.

However, it must be noted that these specific implementation cases and methods are not intended to limit the present disclosure. The present disclosure can still be implemented using other features, elements, methods, and parameters. The preferred embodiments are provided only to illustrate the technical features of the present disclosure, and are not intended to limit the scope of the patent application of the present disclosure. Those with ordinary knowledge in the technical field can make equivalent modifications and changes according to the description of the following specification without departing from the spirit and scope of the present disclosure. In different embodiments and drawings, the same elements will be represented by the same element symbols.

Please refer to FIGS. 1A to 1E. FIGS. 1A to 1E are schematic cross-sectional views of the process structure of the power device 100 according to an embodiment of the present specification. In this embodiment, the fabrication of the power device 100 includes the following steps: first, a substrate structure 101 is provided, and an epitaxial structure 102 having Group 35 or Group 26 elements is formed on the substrate structure 101 . The epitaxial structure 102 is mainly composed of non-silicon materials. The epitaxial structure 102 at least includes a buffer substructure 102A, a channel substructure 102B and a barrier substructure 102C (as shown in FIG. 1A ). In some embodiments of the present specification, the substrate structure 101 may be a semiconductor substrate structure (eg, a silicon substrate structure), a glass substrate structure, a sapphire substrate structure, or a structure containing, for example, polyimide (polyimide, PI), polyethylene naphthalate (polyethylene naphthalate two formic acid glycol ester, PEN) or polyethylene terephthalate (polyethylene terephthalate, PET), flexible plasticized substrate structure .

In some embodiments of the present specification, the buffer substructure 102A, the channel substructure 102B and the barrier substructure 102C may be composed of group III element nitrides. Suitable group III element nitrides may be, for example, aluminum nitride (AlN), gallium nitride (GaN) or aluminum gallium nitride (AlGaN). The barrier substructure 102C can be made of aluminum gallium nitride, and there is a heterojunction between the barrier substructure 102C and the channel substructure 102B.

In this embodiment, the base structure 101 may be a silicon base structure. Both the buffer sub-structure 102A and the channel sub-structure 102B are composed of gallium nitride; the barrier sub-structure 102C is composed of aluminum gallium nitride. The thickness of the buffer substructure 102A may be between 3 micrometers (um) and 5 micrometers; the thickness of the channel substructure 102B may be between 200 nanometers (nm) and 400 nanometers; the thickness of the barrier substructure 102C may be between between 20 nm and 40 nm.

Next, at least one metal unit (eg, metal units 103A and 103B) is formed on a surface of the epitaxial structure 102 facing away from the substrate structure 101 to contact the epitaxial structure 102 (as shown in FIG. 1B ). In some embodiments of the present specification, the formation of the metal units 103A and 103B includes the following steps: first, a dielectric structure 104 is formed on the epitaxial structure 102 ; and at least one through hole (eg, a through hole) is formed in the dielectric structure 104 Through holes 104a and 104b), a part of the epitaxial structure 102 is exposed to the outside. The material constituting the dielectric structure 104 may be silicon nitride or silicon oxynitride.

Then, the dielectric structure 104 is covered with a metal material, such as tungsten (W), titanium nitride (TiN), titanium tungsten (TiW), nickel vanadium (NiV), nickel (Ni) or other suitable metal materials , and fill in the through hole 104a. Then, through a planarization process, such as chemical mechanical polishing (CMP) (not shown), the metal material on the dielectric structure 104 is removed, and a metal unit 103A is formed in the through holes 104a and 104b, respectively. and 103B; and make each metal unit (103A and 103B) form a Schottky Contact with the epitaxial structure 102.

After that, an insulating structure 105 is formed on the epitaxial structure 102 and the metal units 103A and 103B (as shown in FIG. 1C ). In some embodiments of the present specification, the material constituting the insulating structure 105 may be silicon oxide (SiO _x ), silicon nitride (SiN), silicon oxynitride (SiON), silicon oxycarbide (SiOC) or other suitable dielectrics. electrical material. In this embodiment, the material of the insulating structure 105 may be a kind of silicon dioxide (SiO ₂ ).

Subsequently, a gate electrode 106 is formed on the insulating structure 105, and a part of the gate electrode 106 penetrates the insulating structure 105, so that a part of the insulating structure 105 is located between the metal unit (103A and 103B) and the gate electrode 106, and the gate electrode 106 Electrically isolated from the metal cells (103A and 103B) (as depicted in Figure 1D). In some embodiments of the present specification, the formation of the gate electrode 106 includes the following steps: first, an etching process, such as a reactive ion etching (RIE) process, is used to pattern the insulating structure 105 , so as to form the insulating structure 105 An opening 105a is formed therein, exposing a portion of the dielectric structure 104 . Afterwards, a conductive material structure (not shown) is formed on the insulating structure 105, and the opening 105a is filled. Another lithography etching process is used to pattern the conductive material structure (not shown) to form the gate electrode 106 having the stepped structure. The material constituting the gate 106 may be a doped or undoped semiconductor material, Such as polysilicon, germanium (Ge) or silicon germanium (SiGe), or metal materials such as titanium (Ti), titanium tungsten (TiW), copper (Cu), tungsten (W), titanium aluminum (TiAl) alloy or others metallic material.

In this embodiment, the gate 106 may include a body portion 106A and an extension portion 106B. The body portion 106A is located in the opening 105 a, and the body portion 106A is in contact with the dielectric structure 104 . The extension portion 106B is connected to the main body portion 106A, and extends laterally beyond the opening 105a to form a two-level stepped structure with the main body portion 106A. The metal units 103A and 103B are located between the epitaxial structure 102 and the extension part 106B, and a part of the insulating structure 105 is sandwiched between the extension part 106B and the metal units 103A and 103B, and connects the gate 106 and the metal units 103A and 103B. 103B is electrically isolated.

Then, a source electrode 107A and a drain electrode 107B are formed on both sides of the gate electrode 106 to form ohmic contact with the epitaxial structure 102 respectively. After performing a series of back-end-of-line (BEOL) processes (for example, including forming a passivation structure 108 over the gate electrode 106, the source electrode 107A and the drain electrode 107B, and forming a metal interconnect structure 109 (for example,) metal pads), the power device 100 shown in Figure 1E can be formed. It should be noted that when the buffer substructure 102A is gallium nitride and the barrier substructure 102C is aluminum gallium nitride, the source 107A and the drain are A high polarization field is generated between the poles 107B, so that electrons are highly accumulated near the interface between the buffer substructure 102A and the barrier substructure 102C to form the channel substructure 102B. The aforementioned channel substructure 102B is a two-dimensional electron gas channel. Therefore, the high-speed electron mobility of the two-dimensional electron gas channel enables the power device 100 to have high-frequency switching characteristics.

In some embodiments of the present specification, the formation of the source electrode 107A and the drain electrode 107B includes: patterning the insulating structure 105 by an etching process (eg, a reactive ion etching process), thereby forming two adjacent gate electrodes in the insulating structure 105 106 through the openings 105b and 105c, and a part of the epitaxial structure 102 is exposed to the outside. The through openings 105b and 105c are filled with conductive materials that can form ohmic contact with the epitaxial structure 102, respectively. In this embodiment, the material constituting the source electrode 107A and the drain electrode 107B may include a titanium aluminum (TiAl) alloy.

It should be noted that although in this embodiment, the source electrode 107A and the drain electrode 107B are formed after the gate electrode 106 . However, in other embodiments of this specification, the source electrode 107A and the drain electrode 107B may also be formed before the gate electrode 106 .

The gate electrode 106 of the power device 100 has an extension portion 106B extending laterally from the body portion 106A, and can form a two or more stepped structure with the body portion 106A.

The stepped structure can add multiple corners to the edge of the gate electrode 106, which is beneficial to relieve the peak electric field of the negative bias applied to the edge of the gate electrode 106, and the metal units 103A and 103B are located between the epitaxial structure 102 and the edge of the gate electrode 106. Between the extension portions 106B, the probability of negative charges (electrons) being captured by the surface of the epitaxial structure 102 is reduced, and the current decay effect when the power device 100 is in operation is reduced. In addition, when the power device 100 is biased to start operation, the negative charges (electrons) trapped between the metal units 103A and 103B and the extension 106B can be neutralized by the positive charge carriers, thus shortening the The required boost time increases the switching speed of the power element 100 .

Please refer to FIG. 2, which is an equivalent circuit diagram of the power device 100 according to FIG. 1E. There is a parasitic resistance R1 between the source electrode 107A and the gate electrode 106 . There is a heterojunction between the source 107A and the drain 107B Pole body 201 . The epitaxial structure 102 itself has a parasitic resistance R2; the epitaxial structure 102, the dielectric structure 104 (not shown) and the body portion 106A of the gate 106 form a parasitic capacitance 202, which is connected in series with the parasitic resistance R2. The metal unit 103A is in contact with the epitaxial structure 102 to form a Schottky diode 203; the metal unit 103A forms a parasitic capacitance 204 with the insulating structure 105 and the extension 106B of the gate 106, and is connected with the Schottky diode 203 concatenate. The metal unit 103B is in contact with the epitaxial structure 102 to form a Schottky diode 205; the metal unit 103B forms a parasitic capacitance 206 with the insulating structure 105 and the extension 106B of the gate 106, and is connected with the Schottky diode 205 concatenate.

By the Schottky diodes 203 and 205 disposed on the surface of the epitaxial structure 102 , the negative charges (electrons) inside the power device 100 can be concentrated in the parasitic capacitances 204 and 206 . When the power device 100 is biased to start operation, the negative charges (electrons) concentrated in the parasitic capacitances 204 and 206 can be neutralized with the positive charge carriers, thus shortening the boosting time required for the output voltage, The switching speed of the power element 100 is improved. In addition, since the probability of negative charges (electrons) being captured by the surface of the epitaxial structure 102 is reduced, the current decay effect when the power device 100 is in operation is further reduced.

However, the power device is not limited to this. For example, please refer to FIG. 3 , which is a schematic cross-sectional view of the structure of the power device 300 according to another embodiment of the present specification. For the structure of the power device 300, reference may be made to the power device 100 shown in FIG. 1E. One difference between the two is that the body portion 306A of the gate 306 of the power device 300 passes through the dielectric structure 104 and is in direct contact with the epitaxial structure 102 . In this embodiment, a Schottky contact is formed between the body portion 306A of the gate electrode 306 and the epitaxial structure 102 .

For the method of fabricating the power device 300 , reference may be made to the aforementioned fabricating method of the power device 100 . One difference between the two is the step of forming the gate electrode 306 . In this embodiment, when the insulating structure 305 is patterned by an etching process, different from the structure in FIG. 1D, the opening 305a formed in the insulating structure 305 passes through the dielectric structure 104, and a part of the The crystal structure 102 is exposed to the outside. Therefore, the body portion 306A of the gate electrode 306 formed in the opening 305 a is brought into contact with the epitaxial structure 102 . Since other process steps of the power device 300 have been described in detail above (please refer to FIG. 1A to FIG. 1C and FIG. 1E ), they are not repeated here.

Please refer to FIG. 4 , which is an equivalent circuit diagram of the power device 300 shown in FIG. 3 . There is a parasitic resistance R1 between the source electrode 107A and the gate electrode 106 . There is a heterojunction diode 401 between the source 107A and the drain 107B. The epitaxial structure 102 is in contact with the body portion 306A of the gate electrode 306 to form a Schottky diode 402 . The metal unit 103A is in contact with the epitaxial structure layer 102 to form a Schottky diode 403; the metal unit 103A forms a parasitic capacitance 404 with the insulating structure 105 and the gate 306 extension 306B, and is connected with the Schottky diode 403 concatenate. The metal unit 103B is in contact with the epitaxial structure 102 to form a Schottky diode 405; the metal unit 103B forms a parasitic capacitance 406 with the insulating structure 105 and the gate 306 extension 306B, and is connected in series with the Schottky diode 405 catch.

The negative charges (electrons) inside the power element 300 are concentrated in the parasitic capacitances 404 and 406 by the Schottky diodes 403 and 405 disposed on the surface of the epitaxial structure 102 . When the power element 300 is biased to start operation, the negative charges (electrons) concentrated in the parasitic capacitors 404 and 406 can be neutralized with the positive charge carriers, thus shortening the boosting time required for the output voltage and increasing the Power Components 300 switching speed. In addition, since the probability of negative charges (electrons) being captured by the surface of the epitaxial structure 102 is reduced, the current decay effect when the power device 300 is in operation is further reduced.

Please refer to FIGS. 5A to 5E. FIGS. 5A to 5E are schematic cross-sectional views of the process structure of the power device 500 according to another embodiment of the present specification. In this embodiment, the method for fabricating the power device 500 includes the following steps: firstly, a substrate structure 501 is provided, and an epitaxial structure 502 having nitrides of Group 35 or Group 26 elements is formed on the substrate structure 501 . The epitaxial structure 502 is mainly composed of non-silicon materials. The epitaxial structure 502 at least includes a buffer substructure 502A, a channel substructure 502B and a barrier substructure 502C (as shown in FIG. 5A ). In this embodiment, the base structure 501 may be a silicon base structure. Both the buffer substructure 502A and the channel substructure 502B are composed of gallium nitride; the barrier substructure 502C is composed of aluminum gallium nitride.

Next, a source electrode 507A and a drain electrode 507B are formed on the epitaxial structure 502 (as shown in FIG. 5B ). In some embodiments of this specification, the formation of the source electrode 507A and the drain electrode 507B includes the following steps: first, a dielectric structure 504 is formed on the epitaxial structure 502 , and two through openings are formed in the dielectric structure 504 504a and 504b, a portion of the epitaxial structure 502 is exposed to the outside. Then, the through openings 504a and 504b are filled with conductive materials that can form ohmic contact with the epitaxial structure 502, respectively, so as to form a source electrode 507A and a drain electrode 507B in the through openings 504a and 504b, respectively. In some embodiments of the present specification, the material constituting the source electrode 507A and the drain electrode 507B may include a titanium aluminum (TiAl) alloy. The material constituting the dielectric structure 504 may be silicon nitride or silicon oxynitride.

Then, a plurality of metal units (eg, metal units 503A, 503B and 503C) are formed on the epitaxial structure 502 to form Schottky contacts with the epitaxial structure 502 (as shown in FIG. 5C ). In some embodiments of the present specification, the formation of the metal cells 503A, 503B and 503C includes the following steps: First, a capping structure 510 is formed in the dielectric structure 504 between the source electrode 507A and the drain electrode 507B. After that, the cover structure 510 and the dielectric structure 504 are patterned by a lithography etching process, and a plurality of through holes 514 are formed through the cover structure 510 and the dielectric structure 504 to expose a part of the epitaxial structure 502 to the outside.

Then, the through holes 514 are filled with tungsten (W), titanium nitride (TiN), titanium tungsten (TiW), nickel vanadium (NiV), nickel (Ni) or other suitable metal materials, so as to A metal unit 503A, 503B and 503C is formed in each through hole 514 to form Schottky contact with the exposed epitaxial structure 502 . In this embodiment, the material constituting the capping structure 510 may be silicon dioxide.

Subsequently, a gate electrode 506 is formed on the epitaxial structure 502 (as shown in FIG. 5D ). The formation of the gate electrode 506 includes the following steps: First, a capping structure 510 and an insulating structure 505 are sequentially formed over the dielectric structure 504 , the source electrode 507A, the drain electrode 507B and the metal units 503A, 503B and 503C. Next, the insulating structure 505 and the capping structure 510 are patterned by a lithography etching process, an opening 505a is formed in the insulating structure 505 between the source electrode 507A and the metal units 503A, 503B and 503C, and a part of the capping structure 510 is exposed to In addition, an opening 510a is formed in the cover structure 510 exposed to the outside, and a part of the dielectric structure 504 is exposed to the outside. After that, a conductive material structure (not shown) is formed on the insulating structure 505, and fill openings 505a and 510a. The conductive material structure (not shown) is then patterned by another lithography etching process to form the gate electrode 506 having a stepped structure.

In this embodiment, gate 506 may include a body portion 506A and a plurality of laterally extending extensions (eg, extensions 506B and 506C). The body portion 506A is located in the opening 510a. The extension portion 506B is connected to the body portion 506A and extends laterally beyond the opening 510a; the extension portion 506C is connected to the extension portion 506B and laterally extends beyond the opening 505a.

The extension parts 506B and 506C and the main body part 506A form a three-level stepped structure, so that the metal units 503A, 503B and 503C are located between the epitaxial structure 502 and the extension part 506C; a part of the covering structure 510 is sandwiched between the extension part 506B and the dielectric structure 504; a part of the insulating structure 505 is sandwiched between the extension part 506C and the metal units 503A, 503B and 503C; and the gate 506 is connected to the metal units 503A, 503B and 503C Electrical isolation.

After performing a series of back-end processes (for example, including forming a passivation structure 508 over the source electrode 507A and the drain electrode 507B, and forming a metal interconnect structure 509 (such as a metal pad), the structure shown in FIG. 5E can be formed. Power element 500 .

The gate 506 of the power device 500 has extension parts 506B and 506C extending laterally from the main body part 506A, and can form a three-level stepped structure with the main body part 506A. The shape of the structure can increase multiple corners at the edge of the gate 506, which is beneficial to relieve the peak electric field formed by the negative bias applied to the edge of the gate 106, and the metal units 503A, 503B and 503C are located between the epitaxial structure 502 and the Extension 506C In the meantime, the probability of negative charges (electrons) being captured by the surface of the epitaxial structure 502 is reduced, and the current decay effect when the power device 500 is in an operating state is slowed down. In addition, the power element 500 is biased so that the negative charges (electrons) trapped between the metal cells 503A, 503B and 503C and the extension 506B under the starting operation can be neutralized by the applied positive charge carriers, so that That is, the required boost time is shortened, and the switching speed of the power element 500 is improved.

Please refer to FIG. 6 , which is an equivalent circuit diagram of the power device 500 shown in FIG. 5 . There is a parasitic resistance R1 between the source electrode 507A and the gate electrode 506 . There is a heterojunction diode 601 between the source 507A and the drain 507B. The epitaxial structure 502 itself has a parasitic resistance R2; the epitaxial structure 502 forms a parasitic capacitance 602 with the dielectric structure 504 and the body portion 506A of the gate 506, and is connected in series with the parasitic resistance R2; the epitaxial structure 502 and the dielectric structure 504. The covering structure 510 and the extension 506B of the gate 506 form a parasitic capacitance 603, which is connected in series with the parasitic resistance R2. The metal units (503A, 503B, 503C) are respectively in contact with the epitaxial structure 502 to form Schottky diodes (604A, 604B, 604C); the metal units (503A, 503B, 503C) are respectively connected with the insulating structure 505 and the covering structure 510 Parasitic capacitances (605A, 605B, 605C) are formed with the extension 506C of the gate 506, and are connected in series with the corresponding Schottky diodes (604A, 604B, 604C).

By the Schottky diodes 604A, 604B and 604C disposed on the surface of the epitaxial structure 502, the negative charges (electrons) inside the power element 500 are concentrated in the parasitic capacitances 605A, 605B and 605C. When the power element 500 is biased to start operation, it concentrates on the parasitic capacitances 605A, 605B and 605C. Negative charges (electrons) can be neutralized with positive charge carriers, thus shortening the boosting time required for the output voltage and improving the switching speed of the power element 500 .

Please refer to FIG. 7. FIG. 7 is a schematic cross-sectional view of the structure of a power device 700 according to still another embodiment of the present specification. For the structure of the power device 700, reference may be made to the power device 500 shown in FIG. 5E. One difference between the two is that the metal unit 703 is a single block.

For the method of fabricating the power device 700 , reference may be made to the aforementioned fabricating method of the power device 500 . One difference between the two is the step of forming the metal unit 703 . In the present embodiment, when the capping structure 510 and the dielectric structure 504 are patterned by a lithography etching process, only a single through hole 714 needs to be formed to pass through the capping structure 510 and the dielectric structure 504 and a part of the epitaxial structure 502 exposed. Then, tungsten (W), titanium nitride (TiN), titanium tungsten (TiW), nickel vanadium (NiV), nickel (Ni) or other suitable metal materials are used to fill the through holes 714, so that the through holes 714 are filled. A single monolithic metal unit 703 is formed in 714, and forms Schottky contact with the exposed epitaxial structure 502. For other process steps of the power device 700, reference may be made to FIGS. 5A to 5B and 5D to 5E, as well as the corresponding paragraphs in the above-mentioned figures, so they are not repeated here.

Please refer to FIG. 8 , which is an equivalent circuit diagram of the power device 700 shown in FIG. 7 . There is a parasitic resistance R1 between the source electrode 507A and the gate electrode 506 . There is a heterojunction diode 601 between the source 507A and the drain 507B. The epitaxial structure 502 itself has a parasitic resistance R2; the epitaxial structure 502 forms a parasitic capacitance 602 with the dielectric structure 504 and the body portion 506A of the gate 506, and is connected in series with the parasitic resistance R2; the epitaxial structure 502 and the dielectric structure 504. The cover structure 510 and the extension 506B of the gate 506 form a parasitic electric current. Capacitance 603, and is connected in series with the parasitic resistance R2. The metal unit 703 is in contact with the epitaxial structure 502 to form a Schottky diode 804; the metal unit 703 forms a parasitic capacitance 805 with the insulating structure 505, the cover structure 510 and the extension 506C of the gate 506, and is connected with the Schottky The diodes 804 are connected in series.

The negative charges (electrons) inside the power element 700 are concentrated in the parasitic capacitance 805 by the Schottky diode 804 disposed on the surface of the epitaxial structure 502 . When the power element 700 is biased to start operation, the negative charges (electrons) concentrated in the parasitic capacitance 805 can be neutralized by positive charge carriers, thus shortening the boost time required for the output voltage and increasing the power Switching speed of element 700 .

According to the above-mentioned embodiments, the present specification provides a power element and a manufacturing method thereof. It is connected between an epitaxial structure with a heterojunction and a gate, provides at least one metal unit and the epitaxial structure to form Schottky contact, and electrically isolates the gate and the metal unit by at least one insulating structure, so as to be in contact with the epitaxial structure. A parasitic capacitance is formed between the metal unit and the gate, and the Schottky diode is connected in series to form a parasitic circuit. Negative charges (electrons) inside the power element are concentrated in the parasitic capacitance. When the power element is biased to start operation, the trapped electrons and positive charge carriers can be induced to neutralize, thus shortening the boosting time required for the output voltage and increasing the switching speed of the power element. The gate of a power device provided in this specification is further provided with an extension part, so that the metal unit is located between the epitaxial structure and the extension part, which reduces the probability of negative charges (electrons) being captured by the surface of the epitaxial structure, and slows down the power device in the epitaxial structure. Current decay effects during operation.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the appended patent application.

500: Power Components

501: Substrate Structure

502: Epitaxial structure

502A: Buffer Substructure

502B: Channel Substructure

502C: Barrier Substructure

503A, 503B, 503C: Metal Units

504: Dielectric Structure

505: Insulation structure

504a, 504b, 505a, 510a: openings

506: Gate

506A: Body part

506B, 506C: Extensions

507A: Source

507B: Drain

508: Passivation structure

509: Connection Structure

510: Override Structure

514: Through hole

Claims (10)

A power device includes: a base material structure; an epitaxial structure located on the base material structure and having a heterojunction, the epitaxial structure has a two-dimensional electron gas channel, and the epitaxial structure is made of non-silicon material a gate located on the epitaxial structure; a first metal unit located between the epitaxial structure and the gate and in contact with the epitaxial structure; and an insulating structure located between the gate and the gate Between the first metal units, the gate electrode is electrically isolated from the first metal unit, wherein the gate electrode includes an extension portion, the first metal unit is located between the epitaxial structure and the extension portion, the The insulating structure is located between the extension portion and the first metal unit. The power device as described in claim 1, wherein the gate electrode comprises a body connected to the extension portion, and the body is in contact with the epitaxial structure. The power device as described in item 2 of the claimed scope further comprises a second metal unit located between the epitaxial structure and the extension, the insulating structure between the extension and the second metal unit, and The second metal unit is in contact with the epitaxial structure. The power device of claim 1, wherein the gate further comprises a body portion and the extension portion to form a stepped structure. The power device of claim 1, wherein the first metal unit forms a Schottky contact with the epitaxial structure. The power device as described in item 5 of the claimed scope further includes a dielectric structure located on the epitaxial structure to electrically isolate the gate from the epitaxial structure. The power device of claim 5, wherein the first metal unit, the extension portion and the insulating structure form a parasitic capacitance. The power device of claim 2, wherein the gate and the epitaxial structure form a Schottky contact. A manufacturing method of a power device, comprising: forming an epitaxial structure, the epitaxial structure has a heterojunction, the epitaxial structure has a two-dimensional electron gas channel, and the epitaxial structure is composed of a non-silicon material; A metal unit is formed on the epitaxial structure and is in contact with the epitaxial structure; an insulating structure is formed on the epitaxial structure and the metal unit; the insulating structure is patterned to form a first opening in the insulating structure; A gate body portion is formed in the first opening; and a gate extension portion is formed outside the first opening, wherein the gate body portion and the gate extension portion together form a stepped structure, and the insulating A portion of the structure is located between the metal unit and the gate extension. The method for manufacturing a power device according to claim 9, further comprising: forming a second opening and a third opening in the insulating structure; and forming an opening in the second opening and the third opening respectively source and one drain.

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