TWI775404B - Control circuit and display apparatus utilizing the same - Google Patents

Abstract

A control circuit is provided. A first input-output pin is coupled to a display device and a capacitive touch device. A second input-output pin is coupled to the display device and a capacitive touch device. A sensing circuit determines whether the capacitive touch device is touched according to the voltages of the first and second input-output pins. A display controller provides a first driving signal to the display device via the first input-output pin and provides a second driving signal to the display device via the second input-output pin in a first display period and a second display period. From the end time point of the first display period to the start time point of the second display period, the sensing circuit detects the voltage level of the first input-output pin and stops detecting the voltage of the second input-output pin.

Description

Control circuit and display equipment

The present invention relates to a control circuit, and more particularly, to a control circuit coupled to a display device and a touch device.

With the advancement of technology, there are more and more types and functions of electronic devices. Most electronic devices have an input device and an output device. A control device in the electronic device controls the operation of the electronic device according to the information received by the input device, and presents specific information through the output device. Touch devices and display devices are common input devices and output devices. However, since the touch device and the display device each have a large number of pins, the number of pins of the control device must be greater than the sum of the pins of the touch device and the display device in order to couple the touch control device and the display device. Thus, the available space inside the electronic device is reduced.

The invention provides a control circuit, which includes a first input and output pin, a second input and output pin, a sensing circuit and a display controller. The first input and output pins are used for coupling to a first input pin of a display device and a first sensing pin of a capacitive touch device. The second input and output pins are used for coupling to a second input pin of the display device and a second sensing pin of the capacitive touch device. The sensing circuit determines whether the capacitive touch device is touched according to the voltages of the first and second input and output pins. In a first display period and a second display period, the display controller provides a first driving signal to the display device through the first input and output pins, and provides a second driving signal to the display device through the second input and output pins display device. After an end time point of the first display period, the display controller stops providing the first and second driving signals. After a start time point of the second display period, the display controller provides the first and second driving signals. From the end time point of the first display period to the start time point of the second display period, the sensing circuit detects the voltage of the first input and output pins, and stops detecting the voltage of the second input and output pins.

The present invention further provides a display device including a display device, a capacitive touch device and a control circuit. The display device has a first input pin and a second input pin. The capacitive touch device has a first sensing pin and a second sensing pin. The control circuit includes a first input and output pin, a second input and output pin, a sensing circuit and a display controller. The first input and output pins are coupled to the first input pins and the first sensing pins. The second input and output pins are coupled to the second input pins and the second sensing pins. The sensing circuit determines whether the capacitive touch device is touched according to the voltages of the first and second input and output pins. In a first display period and a second display period, the display controller provides a first driving signal to the display device through the first input and output pins, and provides a second driving signal to the display device through the second input and output pins display device. During the first and second display periods, the display device presents images according to the first and second driving signals. After an end time point of the first display period, the display controller stops providing the first and second driving signals. After a start time point of the second display period, the display controller provides the first and second driving signals. From the end time point of the first display period to the start time point of the second display period, the sensing circuit detects the voltage of the first input and output pins, and stops detecting the voltage of the second input and output pins.

In order to make the objects, features and advantages of the present invention more obvious and easy to understand, the following specific embodiments are given and described in detail in conjunction with the accompanying drawings. The present specification provides different embodiments to illustrate the technical features of different embodiments of the present invention. Wherein, the configuration of each element in the embodiment is for illustration, and not for limiting the present invention. In addition, parts of the reference numerals in the drawings in the embodiments are repeated for the purpose of simplifying the description, and do not mean the correlation between different embodiments.

FIG. 1 is a schematic diagram of the operating system of the present invention. As shown in the figure, the operating system 100 includes a display device 110 , a capacitive touch device 120 and a control circuit 130 . The display device 110 has pins PN ₁ -PN ₄ and a display area 111 . The display area 111 presents a picture according to the voltage levels of the pins PN ₁ -PN ₄ . The present invention does not limit the number of pins of the display device 110 . In other embodiments, the display device 110 may have more or fewer pins. In addition, the present invention does not limit the type of the display device 110 either. In a possible embodiment, the display device 110 is a super twisted liquid crystal display panel (STN LCD panel).

The capacitive touch device 120 includes regions 121 - 124 , sensing elements 125 - 128 , and pins PN ₅ -PN ₈ , which are not intended to limit the present invention. In other embodiments, the capacitive touch device 120 may have other numbers of regions, sensing elements, and pins. The present invention does not limit the type of the capacitive touch device 120 . In a possible embodiment, the capacitive touch device 120 is a touch keyboard or a touch pad.

In this embodiment, the sensing element 125 is disposed in the area 121 to sense whether the area 121 is touched, and the sensing element 126 is disposed in the area 122 to sense whether the area 122 is touched. The element 127 is disposed in the area 123 to sense whether the area 123 is touched, and the sensing element 128 is disposed in the area 124 to sense whether the area 124 is touched. In a possible embodiment, the sensing elements 125 - 128 are capacitive sensors. The pin _PN5 outputs the sensing result of the sensing element 125 . The pin _PN6 outputs the sensing result of the sensing element 126 . The pin _PN7 outputs the sensing result of the sensing element 127 . Pin PN ₈ outputs the sensing result of the sensing element 128 . Taking the sensing element 125 as an example, when the area 121 is not touched, the capacitance of the sensing element 125 does not change. Therefore, the voltage V _PN5 of the pin _PN5 is equal to a reference voltage. However, when the area 121 is touched, the capacitance of the sensing element 125 will change (may become larger), so the voltage V _PN5 of the pin _PN5 is lower than the reference voltage.

The control circuit 130 includes an image driver 131 , a micro-control circuit 132 , a sensing circuit 133 , a transmission circuit 134 and input-output pins 135 - 138 . The image driver 131 is used for driving the display device 110 . In this embodiment, the image driver 131 generates the driving signals SD1 ˜ SD4 , but the invention is not limited thereto. In other embodiments, the image driver 131 may generate more or less driving signals. The present invention does not limit the circuit structure of the image driver 131 . In a possible embodiment, the image driver 131 is a liquid crystal driver (LCD driver). In another possible embodiment, the image driver 131 is a COM/SEG driver for generating COM/SEG waveforms.

The sensing circuit 133 is used to detect whether the capacitive touch device 120 is touched and the touch position. The present invention does not limit how the sensing circuit 133 detects whether the capacitive touch device 120 is touched. In a possible embodiment, the sensing circuit 133 first provides a reference voltage DK to the pins PN ₅ ˜PN ₈ of the capacitive touch device 120 , and then detects whether the voltage levels of the pins PN ₅ ˜PN ₈ occur. Variety. When the voltage level of pins PN ₅ ~PN ₈ changes, it means that the corresponding area is touched. For example, when the voltage V _PN5 of the pin PN ₅ is not equal to the reference voltage DK, it means that the region 121 corresponding to the pin PN ₅ is touched. Conversely, when the voltage V _PN5 of the pin PN ₅ is equal to the reference voltage DK, it means that the region 121 corresponding to the pin PN ₅ is not touched. In some embodiments, the reference voltage DK is less than 1 volt.

The transmission circuit 134 includes switching circuits SW1 and SW2. The switching circuit SW1 is coupled between the image driver 131 and the input and output pins 135-138, and is controlled by the switching signal SEL. When the switching signal SEL turns on the switching circuit SW1, the switching circuit SW1 transmits the driving signals SD1-SD4 to the input and output pins 135-138. At this time, the input and output pins 135 - 138 are used as output pins for outputting the driving signals SD1 - SD4 to the display device 110 .

The switching circuit SW2 is coupled between the sensing circuit 133 and the input and output pins 135-138, and is controlled by the switching signal SEL. When the switching signal SEL turns on the switching circuit SW2, the switching circuit SW2 may first transmit the reference voltage DK to the input and output pins 135-138, and then transmit the voltages V _PN5 -V _PN8 of the pins PN5 _{- PN8} to the sensing circuit 133.

In this embodiment, the input and output pins 135 - 138 are used to transmit analog signals. In other words, the driving signals SD1 to SD4 and the voltages V _PN5 to V _PN8 are analog signals. In addition, in this embodiment, the display device 110 and the capacitive touch device 120 share the input and output pins 135 - 138 , so the number of input and output pins of the control circuit 130 can be reduced. In other embodiments, the display device 110 and the capacitive touch device 120 may share more or less input and output pins.

Since the characteristics of the input and output pins 135 to 138 are the same, the following content takes the input and output pin 135 as an example. As shown in the figure, the input/output pin 135 is coupled to the pin PN _{1 of the display device 110 and the pin PN 5 of} the capacitive touch device 120 . When the switching circuit SW1 is turned on, the I/O pin 135 transmits the driving signal SD1. When the switching circuit SW2 is turned on, the I/O pin 135 transmits the reference voltage DK and the voltage V _PN5 of the pin PN ₅ of the capacitive touch device 120 .

In a possible embodiment, the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ are one-third or one-quarter of the amplitudes of the driving signals SD1 ˜SD4 . Therefore, even if the pins PN ₅ ˜PN ₈ are coupled to the pins PN ₁ ˜PN ₄ , the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ will not affect the images displayed by the display device 110 .

For example, it is assumed that the maximum voltage of the driving signals SD1 ˜ SD4 is 4 volts (V). In this example, the voltages of pins PN ₅ ~PN ₈ V _PN5 ~V _PN8 have a maximum voltage of about 1.3V (that is, one third of the voltage of the driving signal SD1 ~ SD4) or 1V (that is, the voltage of the driving signal SD1 quarter of the voltage). Since the voltages V _{PN5 ˜V PN8} are very small, the voltages V _{PN5 ˜V PN8} will not affect the picture displayed by the display device 110 . In other embodiments, the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ are less than 1V.

The micro-control circuit 132 generates the switching signal SEL for controlling the switching circuits SW1 and SW2. In this embodiment, the switching circuits SW1 and SW2 are not turned on at the same time. For example, when the micro-control circuit 132 turns on the switching circuit SW1, the micro-control circuit 132 does not turn on the switching circuit SW2. When the micro-control circuit 132 turns on the switching circuit SW2, the micro-control circuit 132 turns off the switching circuit SW1.

The present invention does not limit the circuit structure of the micro-control circuit 132 . In a possible embodiment, the microcontroller circuit 132 is a microcontroller (MCU). In this embodiment, the micro-control circuit 132 uses a single switching signal (eg, SEL) to control the switching circuits SW1 and SW2, but it is not intended to limit the present invention. In other embodiments, the micro-control circuit 132 uses two switching signals to control the switching circuits SW1 and SW2 respectively.

In other embodiments, the micro-control circuit 132 further triggers the image driver 131 and the sensing circuit 133 . When the video driver 131 is activated, the video driver 131 generates the driving signals SD1 - SD4 . At this time, the micro-control circuit 132 turns on the switching circuit SW1 and does not turn on the switching circuit SW2 through the switching signal SEL. Therefore, the input and output pins 135 - 138 output the driving signals SD1 - SD4 to the display device 110 . The display device 110 presents images according to the driving signals SD1 to SD4.

When the micro-control circuit 132 triggers the sensing circuit 133, the sensing circuit 133 generates the reference voltage DK. At this time, the micro-control circuit 132 turns on the switching circuit SW2 and does not turn on the switching circuit SW1 through the switching signal SEL. Therefore, the input and output pins 135 ˜ 138 first output the reference voltage DK to the sensing circuit 133 , and then provide the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ to the sensing circuit 133 . In this example, the sensing circuit 133 determines whether the regions 121 ˜ 124 are touched according to the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ .

In other embodiments, when the micro-control circuit 132 triggers the sensing circuit 133, the micro-control circuit 132 may instruct the image driver 131 to suspend generating the driving signals SD1-SD4. In some embodiments, the image driver 131 may continue to generate the driving signals SD1-SD4, but since the microcontroller 132 does not conduct the switching circuit SW1, the switching circuit SW1 does not transmit the driving signals SD1-SD4 to the input and output pins 135-138 . In this example, since the display device 110 has charge storage elements, the display device 110 can maintain the screen even if the driving signals SD1 to SD4 are not received.

In this embodiment, the time during which the switching circuit SW2 is turned on is shorter than the time during which the switching circuit SW1 is turned on. For example, the time that the switching circuit SW2 is turned on may be only one tenth of the time that the switching circuit SW1 is turned on. Therefore, even if the switching circuit SW1 temporarily stops transmitting the driving signals SD1 ˜ SD4 , the images displayed by the display device 110 will not be disturbed by the voltages V _{PN5 ˜V PN8} of the pins PN5 _˜PN8 . In a possible embodiment, the switching circuit SW1 is turned on for about 250 us, and the switching circuit SW2 is turned on for about 250 ns.

In addition, since the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ are very small, even if the display device 110 receives the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ , the picture displayed by the display device 110 will not change. It will not be affected by the voltages V _PN5 ~V _PN8 on pins PN ₅ ~PN ₈ . In a possible embodiment, the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ may be less than one-third of the driving signals SD1 ˜SD4 . In another embodiment, the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ may be less than a quarter of the driving signals SD1 ˜SD4 . In other embodiments, the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ are less than 1V.

The present invention does not limit when the micro-control circuit 132 turns on the switching circuit SW2. Assume that the display device 110 displays a plurality of frames in one second. In a possible embodiment, the micro-control circuit 132 turns on the switching circuit SW2 between the two frames presented by the display device 110 . In another possible embodiment, the micro-control circuit 132 turns on the switching circuit SW2 at least once during the time when the display device 110 presents one frame. In other words, the microcontroller 132 turns on the switching circuit SW2 at least once in a frame time.

FIG. 2 is a possible schematic diagram of the transmission circuit 134 of the present invention. As shown in the figure, the switching circuit SW1 is coupled between the image driver 131 and the input and output pins 135-138, and has paths PA1-PA4. In this embodiment, the paths PA1 ˜ PA4 transmit the driving signals SD1 ˜ SD4 to the input and output pins 135 ˜ 138 according to the switching signal SEL.

For example, when the switching signal SEL turns on the paths PA1-PA4, the paths PA1-PA4 transmit the driving signals SD1-SD4 to the input and output pins 135-138. When the switching signal SEL does not conduct the paths PA1-PA4, the paths PA1-PA4 stop transmitting the driving signals SD1-SD4 to the input and output pins 135-138. The present invention does not limit the structure of the switching circuit SW1. In a possible embodiment, the switching circuit SW1 has a plurality of switches for forming the paths PA1 ˜ PA4 . In this embodiment, the paths PA1 ˜ PA4 are turned on or off at the same time. In other embodiments, when one of the paths PA1 ˜ PA4 is turned on, the other one of the paths PA1 ˜ PA4 is not turned on.

The switching circuit SW2 has paths PA5 to PA8. The path PA5 is coupled between the sensing circuit 133 and the input and output pins 135 and transmits the reference voltage DK and the voltage V _PN5 of the pin PN ₅ according to the switching signal SEL. The path PA6 is coupled between the sensing circuit 133 and the input and output pins 136 and transmits the reference voltage DK and the voltage V _PN6 of the pin PN ₆ according to the switching signal SEL. The path PA7 is coupled between the sensing circuit 133 and the input/output pin 137, and transmits the reference voltage DK and the voltage V _PN7 of the pin PN ₇ according to the switching signal SEL. The path PA8 is coupled between the sensing circuit 133 and the input/output pin 138, and transmits the reference voltage DK and the voltage V _PN8 of the pin PN ₈ according to the switching signal SEL. For example, when the switching signal SEL turns on the paths PA5~PA8, the paths PA5~PA8 first transmit the reference voltage DK to the input and output pins 135~138, and then transmit the voltages V _PN5 ~V _PN8 of the pins PN5~ _PN8 for pre _- induction Test circuit 133. When the switching signal SEL does not conduct the paths PA5 ˜ PA8 , the paths PA5 ˜PA8 stop transmitting the reference voltage DK and the voltages V _{PN5 ˜V PN8} . In this embodiment, the paths PA5 ˜ PA8 are turned on or off at the same time. In other embodiments, when one of the paths PA5 ˜ PA8 is turned on, the other one of the paths PA5 ˜ PA8 is not turned on.

In a possible embodiment, the paths coupled to the same input and output pins are not turned on at the same time. Taking the input/output pin 135 as an example, the input/output pin 135 is coupled to the paths PA1 and PA5. In this example, when the path PA1 is turned on, the path PA5 is not turned on. When the path PA5 is turned on, the path PA1 is not turned on. The present invention does not limit the structure of the switching circuit SW2. In a possible embodiment, the switching circuit SW2 has a plurality of switches for providing paths PA5 ˜ PA8 .

FIG. 3 is a possible schematic diagram of the sensing circuit 133 of the present invention. The sensing circuit 133 includes sensing units 310 - 340 . The sensing unit 310 determines whether the area 121 of the capacitive touch device 120 is touched. The sensing unit 320 determines whether the area 122 of the capacitive touch device 120 is touched. The sensing unit 330 determines whether the area 123 of the capacitive touch device 120 is touched. The sensing unit 340 determines whether the area 124 of the capacitive touch device 120 is touched. Since the structures of the sensing units 310 to 340 are the same, only the structure and operation of the sensing unit 310 will be described below.

The sensing unit 310 includes capacitors Cmp, Cmn, a comparator 313 and a controller 314 . The capacitor Cmp is coupled between the node 311 and the non-inverting input terminal of the comparator 313 for providing a reference voltage DK. The capacitor Cmn is coupled between the inverting input terminal of the comparator 313 and the node 312 . In other embodiments, the capacitor Cmn may be coupled between the inverting input terminal of the comparator 313 and the node 311 . In this embodiment, the capacitors Cmp and Cmn are both variable capacitors.

The non-inverting input terminal of the comparator 313 is coupled to the capacitor Cmp for receiving the reference voltage DK. The inverting input terminal of the comparator 313 receives the voltage V _PN8 of the pin PN ₈ and is coupled to the capacitor Cmn. In this embodiment, the comparator 313 compares the reference voltage DK and the voltage V _PN8 to generate a comparison signal SCM.

The controller 314 determines whether a specific area (eg, the area 124 ) of the capacitive touch device 120 is touched according to the comparison signal SCM. In a possible embodiment, the controller 314 first generates the reference voltage DK, and then provides the reference voltage DK to the non-inverting input terminal of the comparator 313 . Then, the controller 314 learns whether a specific area of the capacitive touch device 120 is touched according to the voltage of the inverting input terminal of the comparator 313 . In this embodiment, the controller 314 knows the touch force according to the voltage of the inverting input terminal of the comparator 313 .

For example, in an initial period, the controller 314 first provides a predetermined voltage to the nodes 311 and 312 . Therefore, the capacitors Cmp and Cmn start to store charges for generating the reference voltage DK. At this time, the voltage of the inverting input terminal of the comparator 313 and the voltage of the non-inverting input terminal are approximately equal to the reference voltage DK. If the switch circuit SW2 is turned on, the switch circuit SW2 transmits the reference voltage DK to the pins PN ₅ -PN ₈ of the capacitive touch device 120 .

In this example, when the area 124 of the capacitive touch device 120 is touched, the capacitance of the sensing element 128 in the area 124 changes, so that the voltage V _PN8 of the pin PN ₈ changes and is no longer equal to the reference voltage DK. Since the voltage of the inverting input terminal (ie, V _PN8 ) of the comparator 313 is not equal to the voltage of the non-inverting input terminal (ie, DK), the controller 314 knows that the region 124 is touched.

In a possible embodiment, the controller 314 generates the adjustment signals Sap and San to adjust the capacitances of the capacitors Cmp and Cmn, so that the voltage of the inverting input terminal of the comparator 313 is again equal to the voltage of the non-inverting input terminal (ie DK) . After the voltage of the inverting input terminal of the comparator 313 is equal to the voltage of the non-inverting input terminal, the controller 314 can know the intensity of the touch action according to the adjustment range of the capacitances of the capacitors Cmp and Cmn. In a possible embodiment, the controller 314 generates a notification signal for notifying the microcontroller 132 of a touch event.

FIG. 4 is a possible schematic diagram of the display device 100 of the present invention. As shown in the figure, the display device 100 has pixels P ₁₁ -P ₄₄ , which are not intended to limit the present invention. In other embodiments, the display device 100 has more or fewer pixels. In this embodiment, the display device 100 is an active matrix (AM) liquid crystal display. In this example, the pixels P ₁₁ ˜P ₄₄ receive and store the data signals DA ₁ ˜DA ₄ according to the turn-on signals ST ₁ ˜ST ₄ . Taking the pixel P ₁₁ as an example, the pixel P ₁₁ receives and stores the data signal SD _{1 according to the turn-on signal ST 1 .} In a possible embodiment, the pixels P ₁₁ ˜P ₄₄ each have a storage capacitor (not shown) for storing the data signals DA ₁ ˜DA ₄ .

In a possible embodiment, the turn-on signals ST ₁ ˜ST ₄ are the driving signals SD1 ˜ SD4 . In this example, the data signals DA ₁ -DA ₄ may also be generated by the video driver 131 . The image driver 131 may provide the data signals DA ₁ -DA ₄ to the display device 110 through other input and output pins. These input and output pins (ie, the input and output pins for transmitting the data signals DA ₁ -DA ₄ ) may or may not be coupled to the capacitive touch device 120 .

In another possible embodiment, the data signals DA1 _- DA4 are driving signals SD1 _- SD4. In this example, the image driver 131 may provide the turn-on signals ST ₁ to ST ₄ to the display device 110 through other input and output pins. These input and output pins (ie, the input and output pins for transmitting the turn-on signals ST ₁ -ST ₄ ) may or may not be coupled to the capacitive touch device 120 .

In other embodiments, the driving signals SD1 to SD4 are COM/SEG signals. In this example, the pixels P ₁₁ ˜P ₄₄ receive and store the data signals DA ₁ ˜DA ₄ according to the turn-on signals ST ₁ ˜ST ₄ and the COM/SEG signals.

In some embodiments, the display device 100 is a passive matrix (PM) display. In this example, the driving signals SD1 ˜ SD4 may be called common signals, and the data signals DA ₁ ˜DA ₄ may be called segment signals. Using the potentials of the driving signals SD1 ˜ SD4 and the data signals DA ₁ ˜DA ₄ , the inclination angles of the liquid crystal molecules of the pixels P ₁₁ ˜P ₄₄ are changed, thereby changing the transmittance of light. In a possible embodiment, the pixels P ₁₁ to P ₄₄ do not have a memory function. Therefore, when the driving signals SD1 ˜ SD4 and the data signals DA ₁ ˜DA ₄ disappear, the liquid crystal molecules of the pixels P ₁₁ ˜P ₄₄ will return to their original positions.

In other embodiments, the display device 110 further has a driving circuit (not shown). In this example, the driving circuit may generate turn-on signals ST ₁ ˜ST ₄ or data signals DA ₁ ˜DA ₄ according to the driving signals SD1 ˜SD4 . In some embodiments, the driving circuit of the display device 110 generates the turn-on signals ST ₁ ˜ST ₄ and the data signals DA ₁ ˜DA ₄ according to the driving signals SD1 ˜SD4 .

In this embodiment, since the display device 110 and the capacitive touch device 120 share the input and output pins (eg, 135 - 138 ), the number of input and output pins of the control circuit 130 can be greatly reduced. Furthermore, since the voltages V _{PN5 ˜V PN8} of the pins PN ₅ ˜PN ₈ of the capacitive touch device 120 are much smaller than the voltages of the pins PN ₁ ˜PN ₄ of the display device 110 , the display device 110 is not affected by Influence of voltage V _PN5 ~V _PN8 . Furthermore, the time for the capacitive touch device 120 to output the voltages V _PN5 -V _PN8 is very short, which is not enough to affect the display device 110 .

FIG. 5A is a schematic diagram of voltage level changes of the input and output pins 135 to 138 of the present invention. Symbols V ₁₃₅ to V ₁₃₈ represent the voltage levels of the input and output pins 135 to 138 respectively. During display periods 511 - 518 , each of the voltage levels V ₁₃₅ -V ₁₃₈ is set to a corresponding level. The display device 110 presents corresponding images according to the voltage levels V ₁₃₅ -V ₁₃₈ .

Taking the voltage level V ₁₃₅ as an example, during the display periods 511 and 512 , the image driver 131 may set the voltage level V ₁₃₅ to be equal to the level L1 . In other embodiments, the level of the voltage level V ₁₃₅ during the display period 511 may be different from the level of the voltage level V ₁₃₅ during the display period 512 . During display periods 513 and 514, the image driver 131 may set the voltage level V ₁₃₅ equal to the level L2. Level L2 is greater than level L1. In other embodiments, the level of the voltage level V ₁₃₅ during the display periods 513 or 514 may be different from the level of the voltage level V ₁₃₅ during the display periods 511 and 512 .

During display periods 515 and 516, the image driver 131 may again set the voltage level V ₁₃₅ equal to the level L1. In other embodiments, the level of the voltage level V ₁₃₅ during the display periods 515 and 516 may be different from the level of the voltage level V ₁₃₅ during the display periods 511 or 512 . During display periods 517 and 518, image driver 131 may set voltage level V ₁₃₅ equal to level L2. In other embodiments, the voltage level V ₁₃₅ during the display period 517 or 518 may be different from the voltage level V ₁₃₅ during the display period 513 or 514 . The present invention does not limit the voltage levels V ₁₃₅ to V ₁₃₈ . As long as the display device 110 can be driven, the voltage levels V ₁₃₅ -V ₁₃₈ can be any level.

During the sensing period 521 , the sensing circuit 133 performs a sensing operation on the input and output pins 135 . When performing the sensing operation, the sensing circuit 133 may provide the reference voltage DK to the input and output pins 135 multiple times. Whenever the sensing circuit 133 provides the reference voltage DK to the input/output pin 135 , the sensing circuit 133 detects the voltage level V ₁₃₅ . The sensing circuit 133 counts the number of times that the voltage level V ₁₃₅ is not equal to the reference voltage DK. In this example, when the number of times that the voltage level V ₁₃₅ is not equal to the reference voltage DK is greater than a predetermined value, it means that a sensing area corresponding to the input and output pins 135 is touched. When the number of times that the voltage level V ₁₃₅ is not equal to the reference voltage DK is not greater than the preset value, it means that a sensing area corresponding to the input and output pins 135 is not touched.

During the sensing period 521 , the sensing circuit 133 does not perform a sensing operation on the input and output pins 136 - 138 . In this example, each of the voltage levels V ₁₃₆ -V ₁₃₈ may be set to the level L0, but is not intended to limit the invention. In some embodiments, during the sensing period 521 , the image driver 131 or the sensing circuit 133 sets each of the voltage levels V ₁₃₆ to V ₁₃₈ to a high level (eg, level L2 ) or a floating level . In one embodiment, the image driver 131 and the sensing circuit 133 may not provide any voltage to the input and output pins 136 - 138 . In this example, each of the voltage levels V ₁₃₆ -V ₁₃₈ is a floating level.

During the sensing period 522 , the sensing circuit 133 performs a sensing operation on the input and output pins 136 . The sensing circuit 133 does not perform sensing operations on the input and output pins 135 , 137 and 138 . At this time, each of the voltage levels V ₁₃₅ , V ₁₃₇ and V ₁₃₈ is set to level L0. In other embodiments, each of the voltage levels V ₁₃₅ , V ₁₃₇ and V ₁₃₈ may be set to a high level or a floating level. When the sensing circuit 133 performs a sensing operation on the input and output pins 136 , the sensing circuit 133 may provide the reference voltage DK to the input and output pins 136 for many times. Whenever the sensing circuit 133 provides the reference voltage DK to the input/output pin 136 , the sensing circuit 133 detects the voltage level V ₁₃₆ . In a possible embodiment, the sensing circuit 133 counts the number of times that the voltage level V ₁₃₆ is not equal to the reference voltage DK. In this example, when the number of times that the voltage level V ₁₃₆ is not equal to the reference voltage DK is greater than the preset value, it means that a sensing area corresponding to the input and output pins 136 is touched. When the number of times that the voltage level V ₁₃₆ is not equal to the reference voltage DK is not greater than the preset value, it means that a sensing area corresponding to the input and output pins 136 is not touched.

During the sensing period 523 , the sensing circuit 133 performs a sensing operation on the input and output pins 137 . During this period, the sensing circuit 133 does not perform sensing operations on the input and output pins 135 , 136 and 138 . Since the manner in which the sensing circuit 133 performs the sensing operation on the I/O pins 137 is the same as the manner in which the sensing circuit 133 performs the sensing operation on the I/O pins 135 , the details are not repeated here.

During the sensing period 524 , the sensing circuit 133 performs a sensing operation on the input and output pins 138 . During this period, the sensing circuit 133 does not perform sensing operations on the input and output pins 135 - 137 . Since the manner in which the sensing circuit 133 performs the sensing operation on the input/output pins 138 is the same as the manner in which the sensing circuit 133 performs the sensing operation on the input/output pins 135 , it will not be repeated.

In this embodiment, the sensing period 521 starts from the end time point TP1 of the display period 511 and ends at the start time point TP2 of the display period 512 . The sensing period 522 starts from the end time point TP3 of the display period 513 and ends at the start time point TP4 of the display period 514 . The sensing period 523 starts from the end time point TP5 of the display period 515 and ends at the start time point TP6 of the display period 516 . The sensing period 524 starts from the end time point TP7 of the display period 517 and ends at the start time point TP8 of the display period 518 . In each sensing period, the sensing circuit 133 only detects the voltage level of one input/output pin.

Taking the sensing period 521 as an example, from the end time point TP1 to the start time point TP2 , the sensing circuit 133 performs sensing operations on the input and output pins 135 multiple times. From the end time point TP1 to the start time point TP2, the sensing circuit 133 does not perform a sensing operation on the input and output pins 136-138. In addition, during the display period 511, the image driver 133 provides the driving signals SD1-SD4 to the input and output pins 135-138. Accordingly, the display device 110 presents a screen. From the end time point TP1 to the start time point TP2, the video driver 131 stops providing the driving signals SD1 to SD4. Therefore, the display device 110 stops presenting the picture. Since the interval between the end time point TP1 and the start time point TP2 is very small, it is not easy for the user to find that the display device 110 stops displaying images.

FIG. 5B is a schematic diagram of the variation of the voltage levels of the input and output pins 135 and 136 of the present invention. Since the characteristics of the input and output pins 135 to 138 are the same, in FIG. 5B, only the voltage levels of the input and output pins 135 and 136 are shown. During display periods 531-542, the image driver 131 may set each of the voltage levels V ₁₃₅ and V ₁₃₆ to be equal to a corresponding level. Therefore, in the display periods 531 to 542 , the display device 110 presents a picture according to the voltage levels V ₁₃₅ and V ₁₃₆ . In other embodiments, as long as the voltage levels V ₁₃₅ and V ₁₃₆ can drive the display device 110 so that the display device 110 presents a picture in the display periods 531 - 542 , each of the voltage levels V ₁₃₅ and V ₁₃₆ can be any level.

During the sensing periods 551 to 553 , the sensing circuit 133 performs a sensing operation on the input and output pins 135 . During the sensing periods 551 to 553 , the sensing circuit 133 does not perform a sensing operation on the input and output pins 136 . During the sensing periods 554 to 556 , the sensing circuit 133 performs a sensing operation on the input and output pins 136 . During the sensing periods 554 to 556 , the sensing circuit 133 does not perform a sensing operation on the input and output pins 135 . In this embodiment, during the sensing period, the sensing circuit 133 performs a sensing operation on a single input and output pin.

In a possible embodiment, the sensing period 551 starts from the end time point TP9 of the display period 531 and ends at the start time point TP10 of the display period 532 . The sensing period 552 starts from the end time point TP11 of the display period 533 and ends at the start time point TP12 of the display period 534 . The sensing period 553 starts from the end time point TP13 of the display period 535 to the start time point TP14 of the display period 536 . The sensing period 554 starts from the end time point TP15 of the display period 537 to the start time point TP16 of the display period 538 . The sensing period 555 starts from the end time point TP17 of the display period 539 to the start time point TP18 of the display period 540 . The sensing period 556 starts from the end time point TP19 of the display period 541 to the start time point TP20 of the display period 542 . In each sensing period, the sensing circuit 133 only detects the voltage level of one input/output pin.

FIG. 5C is a schematic diagram of voltage level changes of the input and output pins 135 to 137 of the present invention. For convenience of description, Fig. 5C only shows the voltage levels V ₁₃₅ -V ₁₃₇ . During display periods 561-572, each of the voltage levels V ₁₃₅ -V ₁₃₇ may be equal to a corresponding level. In other embodiments, each of the voltage _levels V _{135 ˜V 137} may be set to any level. In this example, during the same display period, one of the voltage levels V ₁₃₅ ˜V ₁₃₇ may be different from the other one of the voltage levels V ₁₃₅ ˜V ₁₃₇ .

During the sensing periods 581 , 582 and the period P1 of the sensing period 583 , the sensing circuit 133 performs a sensing operation on the input and output pins 135 . During the sensing periods 581 , 582 and the period P1 of the sensing period 583 , the sensing circuit 133 does not perform a sensing operation on the input and output pins 136 and 137 . When the sensing circuit 133 performs a sensing operation on the input and output pins 135, each of the voltage levels V ₁₃₆ and V ₁₃₇ may be set to the level L0, but this is not intended to limit the present invention. In one embodiment, at least one of the voltage levels V ₁₃₆ and V ₁₃₇ may be set to a high level or a floating level.

During the period P2 of the sensing period 583 , the sensing circuit 133 performs a sensing operation on the input and output pins 136 . During the sensing periods 584 and 585 , the sensing circuit 133 performs a sensing operation on the input and output pins 136 . During the period P3 of the sensing period 586 , the sensing circuit 133 performs a sensing operation on the input and output pins 136 . During periods P2 , 584 , 585 and P3 , the sensing circuit 133 does not perform sensing operations on the input and output pins 135 and 137 . In one possible embodiment, during periods P2, 584, 585 and P3, voltage levels V ₁₃₅ and V ₁₃₇ may be set to level L0. In other embodiments, during periods P2, 584, 585 and P3, at least one of the voltage levels V ₁₃₅ and V ₁₃₇ may be set to a high level or a floating level.

During the period P4 of the sensing period 586 , the sensing circuit 133 performs a sensing operation on the input and output pins 137 . During this period, the sensing circuit 133 does not perform sensing operations on the input and output pins 135 and 136 . In this example, each of the voltage levels V ₁₃₅ and V ₁₃₆ is set to level L0, but is not intended to limit the invention. In one embodiment, at least one of the voltage levels V ₁₃₅ and V ₁₃₆ may be set to a high level or a floating level.

In this example, the time sum of periods 581, 582 and P1 is equal to the time sum of periods P2, 584, 585 and P3. In other words, the time sum of the sensing operations performed by the sensing circuit 133 on one input/output pin is the same as the time summation of the sensing operations performed by the sensing circuit 133 on another input/output pin.

FIG. 6A is another schematic diagram of the operating system of the present invention. As shown in the figure, the operating system 600 includes a display device 610 , a capacitive touch device 620 and a control circuit 630 . In one possible embodiment, the operating system 600 is a display system. In this example, the display device 610 , the capacitive touch device 620 and the control circuit 630 are integrated into a display device.

The display device 610 has a display area 611, input pins SEG0-SEG3 and COM0-COM3. In a possible embodiment, each of the input pins SEG0 - SEG3 receives a segment signal, and each of the input pins COM0 - COM3 receives a common signal. The display area 611 has a plurality of pixels (not shown). Each pixel is coupled to one of the input pins SEG0-SEG3 and one of the pins COM0-COM3. Each pixel is activated according to the voltage difference between one of the input pins SEG0-SEG3 and one of the pins COM0-COM3.

The present invention does not limit the type of the display device 610 . In a possible embodiment, the display device 610 is an active matrix display. In this example, each pixel may include a driving transistor (not shown) and a storage capacitor (not shown). The storage capacitor is charged by the driving transistor, so that the pixels exhibit corresponding brightness.

In another possible embodiment, the display device 610 is a passive matrix display, such as a twisted nematic liquid crystal display panel (TN LCD panel) or a super twisted nematic liquid crystal panel (super twisted nematic liquid crystal display panel). liquid crystal display panel; STN LCD panel). In this example, each pixel of the passive matrix display may have a liquid crystal capacitor, but no drive transistor and storage capacitor. One end of the liquid crystal capacitor is directly connected to one of the input pins SEG0 to SEG3, and the other end of the liquid crystal capacitor is directly connected to one of the input pins COM0 to COM3.

In other embodiments, the display device 610 is a passive matrix organic light emitting diode (OLED) display. In this example, each pixel of the display device 610 has only one light-emitting diode, without a driving transistor and a storage capacitor. One end (eg, anode) of the light-emitting diode is directly connected to one of the input pins SEG0 to SEG3, and the other end (eg, the cathode) of the light-emitting diode is directly connected to one of the input pins COM0 to COM3.

The capacitive touch device 620 includes sensing regions 621 - 628 , sensing pins AN0 - AN3 and BN0 - BN3 . In a possible embodiment, each sensing area has at least one sensing element, such as a touch sensor. The sensing element is used to determine whether the corresponding area is touched. Since the characteristics of the sensing elements in the sensing regions 621 ˜ 628 are similar to the characteristics of the sensing elements 125 ˜ 128 in FIG. 1 , detailed descriptions are omitted.

The sensing pins AN0~AN3 and BN0~BN3 output the sensing signal generated by the sensing element. In a possible embodiment, each sensing area has a sensing element. In this example, each of the sensing pins AN0 - AN3 and BN0 - BN3 corresponds to a sensing element. For example, the sensing elements of the sensing regions 621 ˜ 624 are electrically connected to the sensing pins BN0 ˜ BN3 , respectively. The sensing elements of the sensing regions 625 - 628 are electrically connected to the sensing pins AN0 - AN3 respectively. In this embodiment, the sensing pins AN0 ˜ AN3 are electrically connected to the input pins SEG3 ˜ SEG0 , respectively, and the sensing pins BN0 ˜BN3 are electrically connected to the input pins COM0 ˜ COM3 , respectively.

In other embodiments, the capacitive touch device 620 may have more or less sensing areas and sensing pins. The present invention does not limit the type of the capacitive touch device 620 . In a possible embodiment, the capacitive touch device 620 is a touch keyboard or a touch pad. In other embodiments, the capacitive touch device 620 may cover the display device 610 .

The control circuit 630 has input and output pins IOA0-IOA3 and IOB0-IOB3. The input and output pins IOA0~IOA3 are electrically connected to the input pins SEG0~SEG3 and the sensing pins AN3~AN0. The input and output pins IOB0~IOB3 are electrically connected to the input pins COM0~COM3 and the sensing pins BN0~BN3. In this embodiment, since the display device 610 and the capacitive touch device 620 share the input and output pins IOA0 - IOA3 and IOB0 - IOB3 , the number of the input and output pins of the control circuit 630 can be reduced.

During a display period, the control circuit 630 provides segment signals to the input pins SEG0-SEG3 through the input and output pins IOA0-IOA3, and provides a common signal to the input pins COM0-COM3 through the input and output pins IOB0-IOB3. At this time, the display device 610 presents a screen according to the potentials of the input pins SEG0 - SEG3 and COM0 - COM3 .

In a possible embodiment, when the control circuit 630 performs a sensing operation on each of the input and output pins IOA0-IOA3, the control circuit 630 may set the voltage level of each of the input and output pins IOB0-IOB3 to one The first preset level. When the control circuit 630 performs a sensing operation on each of the input and output pins IOB0-IOB3, the control circuit 630 may set the voltage level of each of the input and output pins IOA0-IOA3 to a second predetermined level.

In a possible embodiment, the second predetermined level is relative to the first predetermined level. For example, when the first predetermined level is a high level, the second predetermined level is a low level. When the first preset level is a low level, the second preset level is a high level. In other embodiments, the first and second preset levels are both floating levels. Taking the I/O pin IOA0 as an example, the control circuit 630 may not provide any voltage to the I/O pin IOA0. Therefore, the voltage level of the input/output pin IOA0 is a floating level. In some embodiments, the control circuit 630 sets the impedance of the input/output pin IOA0 to be a high impedance.

In a possible embodiment, the input and output pins IOA0 - IOA3 transmit the same type of signals, so the control circuit 630 classifies the input and output pins IOA0 - IOA3 into a first pin group. In addition, since the input and output pins IOB0 ˜ IOB3 transmit the same type of signals, the control circuit 530 classifies the input and output pins IOB0 ˜ IOB3 as the second pin group.

FIG. 6B is another schematic diagram of the operating system of the present invention. Figure 6B is similar to Figure 6A, except that Figure 6B has additional resistors R1 to R8. The resistors R1 ˜ R4 are respectively coupled between the input/output pins IOA0 ˜IOA3 and the input pins SEG0 ˜SEG3 . The resistors R5 ˜ R8 are respectively coupled between the input and output pins IOB0 ˜ IOB3 and the input pins COM0 ˜ COM3 . Taking the resistors R1 and R5 as examples, the resistor R1 is coupled between the input/output pin IOA0 and the input pin SEG0, and the resistor R5 is coupled between the input/output pin IOB0 and the input pin COM0. In a possible embodiment, the impedances of the resistors R1 ˜ R8 are about 1KΩ˜10KΩ.

In some embodiments, the display device 610 is a liquid crystal display device. Resistors R1~R8 are used to increase the accuracy of the sensing operation. In this example, the control circuit 630 performs a sensing operation for detecting the touched area of the capacitive touch device 620 .

FIGS. 7A to 7C are schematic diagrams of voltage level changes of the first and second pin groups of the present invention. Since the changes of the voltage levels of the input and output pins IOB0 to IOB3 are similar, Figs. 7A to 7C only show the changes of the voltage level V _IOB0 of the input and output pins IOB0. In addition, since the voltage levels of the input and output pins IOA0 to IOA3 have similar changes, Figures 7A to 7C only show the changes of the voltage levels V _IOA0 to V _IOA2 of the input and output pins IOA0 to IOA2.

In FIG. 7A, during display periods 711 and 712, the control circuit 630 sets the voltage level V _IOB0 to be equal to the level LH, and sets the voltage levels V _IOA0 to V _IOA2 to be equal to the level L1. In other embodiments, during the display period 711 , the control circuit 630 sets the voltage levels V _{IOB0 and V IOA0 ˜V IOA2 to be different from the voltage levels V IOB0 and V IOA0 ˜V IOA2 in} the display period 712 . The display device 610 displays corresponding images according to the voltage levels V _IOB0 and V _{IOA0 ˜V IOA2} .

During the sensing period 721, the control circuit 630 sets the voltage level V _IOB0 of the input and output pins IOB0 (the first pin group) to a floating level. In a possible embodiment, the control circuit 630 does not provide any voltage to the input and output pins IOA0. In this example, the impedance of the I/O pin IOB0 is a high impedance. Therefore, the voltage level V _IOB0 of the input/output pin IOB0 is a floating level. During the sensing period 721, the control circuit 630 first performs a sensing operation on the input/output pin IOA0. The control circuit 630 does not perform a sensing operation on the input and output pins IOA1 and IOA2. In a possible embodiment, the control circuit 630 sets the voltage levels V _{IO A1} and V _IOA2 to the level L0.

During display periods 713 and 714 , the control circuit 630 sets the voltage level V _IOB0 to be equal to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to be equal to the level L2 . In other embodiments, during the display period 713 , the control circuit 630 sets the voltage levels V _{IOB0 and V IOA0 ˜V IOA2 to be different from the voltage levels V IOB0 and V IOA0 ˜V IOA2 in} the display period 714 . During the display periods 713 and 714 , the display device 610 presents corresponding images according to the voltage levels V _IOB0 and V _{IOA0 ˜V IOA2} .

During the sensing period 722, the control circuit 630 sets the voltage level V _IOB0 to a floating level. At this time, the control circuit 630 performs a sensing operation on the input and output pins IOA1. The control circuit 630 does not perform a sensing operation on the input and output pins IOA0 and IOA2. In a possible embodiment, the control circuit 630 sets the voltage levels V _{IO A0} and V _IOA2 to the level L0.

During display periods 715 and 716 , the control circuit 630 sets the voltage level V _IOB0 to be equal to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to be equal to the level L1 . In other embodiments, during the display period 715 , the control circuit 630 sets the voltage levels V _{IOB0 and V IOA0 ˜V IOA2 to be different from the voltage levels V IOB0 and V IOA0 ˜V IOA2 in} the display period 716 . During the display periods 715 and 716 , the display device 610 presents corresponding images according to the voltage levels V _IOB0 and V _{IOA0 ˜V IOA2} . In other embodiments, the control circuit 630 may set the voltage level V _IOB0 to be a high level or a low level during the sensing periods 721 - 723 . In this example, the display device 610 may be a passive light emitting diode (PM LED) display device.

During the sensing period 723, the control circuit 630 sets the voltage level V _IOB0 to a floating level. At this time, the control circuit 630 performs a sensing operation on the input and output pins IOA2. The control circuit 630 does not perform a sensing operation on the input and output pins IOA0 and IOA1. In a possible embodiment, the control circuit 630 sets the voltage levels V _{IO A0} and V _IOA1 to the level L0.

In a possible embodiment, the sensing period 721 starts from the end time point TP33 of the display period 711 and ends at the start time point TP34 of the display period 712 . The sensing period 722 starts from the end time point TP35 of the display period 713 and ends at the start time point TP36 of the display period 714 . The sensing period 723 starts from the end time point TP37 of the display period 715 until the start time point TP38 of the display period 716 . In each of the sensing periods 721-723, the control circuit 630 only performs a sensing operation on a single pin in the first pin group, and sets the voltage of each pin in the second pin group The level is a first preset level. After the control circuit 630 performs the sensing operation on all the pins in the first pin group, the control circuit 630 performs the sensing operation on each pin in the second pin group, and sets the first The voltage level of each pin in the pin group is a second predetermined level.

Referring to FIG. 7B, during display periods 731 and 732, the control circuit 630 sets the voltage level V _IOB0 equal to the level LH, and sets the voltage levels V _IOA0 and V _IOA1 equal to the level L1. Therefore, the display device 610 presents corresponding pictures according to the voltage levels V _IOB0 , V _IOA0 and V _IOA1 . In a possible embodiment, at the end time point TP39 of the display period 731, the control circuit 630 stops setting the voltage level V _IOB0 to be equal to the level LH. From the start time point TP40 of the display period 732, the control circuit 630 sets the voltage level V _IOB0 to be equal to the level LH. The sensing period 751 starts from the end time point TP39 and ends at the start time point TP40. From the end time point TP39 to the start time point TP40, the control circuit 630 sets the voltage level V _IOB0 to a floating level. From the end time point TP39 to the start time point TP40, the control circuit 630 performs a sensing operation on the input and output pins IOA0, but does not perform a sensing operation on the input and output pins IOA1. The control circuit 630 may set the voltage level V _IOA1 to the level L0.

During display periods 733 and 734, the control circuit 630 sets the voltage level V _IOB0 to the level LM, and sets the voltage levels V _IOA0 and V _IOA1 to the level L2. In some embodiments, the control circuit 630 may set the voltage levels V _IOB0 , V _IOA0 and V _IOA1 to other levels. In a possible embodiment, at the end time point TP41 of the display period 733, the control circuit 630 stops setting the voltage level V _IOB0 to the level LM. At the start time point TP42 of the display period 734, the control circuit 630 starts to set the voltage level _VIOB0 to the level LM. The sensing period 752 is located between the end time point TP41 and the start time point TP42. From the end time point TP41 to the start time point TP42, the control circuit 630 sets the voltage level V _IOB0 to a floating level. From the end time point TP41 to the start time point TP42, the control circuit 630 performs a sensing operation on the input and output pins IOA0, but does not perform a sensing operation on the input and output pins IOA1. The control circuit 630 may set the voltage level V _IOA1 to the level L0.

During display periods 735 and 736 , the control circuit 630 sets the voltage level V _IOB0 equal to the level LM, and sets the voltage levels V _IOA0 and V _IOA1 equal to the level L1 . In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 , V _IOA0 and V _IOA1 to other levels. In a possible embodiment, at the end time point TP43 of the display period 735, the control circuit 630 stops setting the voltage level V _IOB0 to be equal to the level LM. From the start time point TP44 of the display period 736, the control circuit 630 sets the voltage level _VIOB0 to be equal to the level LM. The sensing period 753 starts from the end time point TP43 and ends at the start time point TP44. From the end time point TP43 to the start time point TP44, the control circuit 630 sets the voltage level V _IOB0 to a floating level. From the end time point TP43 to the start time point TP44, the control circuit 630 performs a sensing operation on the input and output pins IOA0, but does not perform a sensing operation on the input and output pins IOA1. The control circuit 630 may set the voltage level V _IOA1 to the level L0.

During display periods 737 and 738 , the control circuit 630 sets the voltage level V _IOB0 equal to the level LM, and sets the voltage levels V _IOA0 and V _IOA1 equal to the level L2 . In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 , V _IOA0 and V _IOA1 to other levels. In a possible embodiment, at the end time point TP45 of the display period 737, the control circuit 630 stops setting the voltage level V _IOB0 to be equal to the level LM. From the start time point TP46 of the display period 738, the control circuit 630 sets the voltage level _VIOB0 to be equal to the level LM. The sensing period 754 starts from the end time point TP45 and ends at the start time point TP46. From the end time point TP45 to the start time point TP46, the control circuit 630 sets the voltage level V _IOB0 to a floating level. From the end time point TP45 to the start time point TP46, the control circuit 630 performs a sensing operation on the input and output pins IOA1, but does not perform a sensing operation on the input and output pins IOA0. The control circuit 630 may set the voltage level V _IOA0 to be the level L0.

During display periods 739 and 740, the control circuit 630 sets the voltage level V _IOB0 equal to the level LM, and sets the voltage levels V _IOA0 and V _IOA1 equal to the level L1. In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 , V _IOA0 and V _IOA1 to other levels. In a possible embodiment, at the end time point TP47 of the display period 739, the control circuit 630 stops setting the voltage level V _IOB0 to be equal to the level LM. From the start time point TP48 of the display period 740, the control circuit 630 sets the voltage level V _IOB0 to be equal to the level LM. The sensing period 755 starts from the end time point TP47 and ends at the start time point TP48. From the end time point TP47 to the start time point TP48, the control circuit 630 sets the voltage level V _IOB0 to a floating level. From the end time point TP47 to the start time point TP48, the control circuit 630 performs a sensing operation on the input and output pins IOA1, but does not perform a sensing operation on the input and output pins IOA0. The control circuit 630 may set the voltage level V _IOA0 to be the level L0.

During display periods 741 and 742 , the control circuit 630 sets the voltage level V _IOB0 equal to the level LM, and sets the voltage levels V _IOA0 and V _IOA1 equal to the level L2 . In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 , V _IOA0 and V _IOA1 to other levels. In a possible embodiment, at the end time point TP49 of the display period 741, the control circuit 630 stops setting the voltage level V _IOB0 to be equal to the level LM. From the start time point TP50 of the display period 742, the control circuit 630 sets the voltage level _VIOB0 to be equal to the level LM. The sensing period 756 starts from the end time point TP49 and ends at the start time point TP50. From the end time point TP49 to the start time point TP50, the control circuit 630 sets the voltage level V _IOB0 to a floating level. In this embodiment, from the end time point TP49 to the start time point TP50, the control circuit 630 performs a sensing operation on the input and output pins IOA1, but does not perform a sensing operation on the input and output pins IOA0. The control circuit 630 may set the voltage level V _IOA0 to be the level L0. In other embodiments, during the sensing periods 751-756, the control circuit 630 may set the voltage level V _IOB0 to be a high level or a low level.

Referring to FIG. 7C, during display periods 761 and 762, the control circuit 630 sets the voltage level V _IOB0 to be the level LH, and sets the voltage levels V _IOA0 to V _IOA2 to the level L1. Therefore, the display device 610 presents a corresponding picture according to the voltage levels V _IOB0 , V _{IOA0 ˜V IOA2} . During the sensing period 781, the control circuit 630 performs a sensing operation on the input/output pin IOA0. The control circuit 630 does not perform a sensing operation on the input and output pins IOA1 and IOA2. In this example, the control circuit 630 sets the voltage levels V _IOA1 and V _IOA2 to the level L0. The sensing period 781 starts from the end time point TP51 of the display period 761 until the start time point TP52 of the display period 762 . The control circuit 630 stops setting the voltage level V _IOB0 to the level LH. In a possible embodiment, the control circuit 630 sets the voltage level V _IOB0 to a floating level. From the end time point TP51 to the start time point TP52, the control circuit 630 performs a sensing operation on the input and output pins IOA0, and does not perform a sensing operation on the input and output pins IOA1 and IOA2. Control circuit 630 may set voltage levels V _IOA1 and V _IOA2 to level L0.

During display periods 763 and 764, the control circuit 630 sets the voltage level V _IOB0 to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to the level L2. In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 and V _IOA0 to V _IOA2 to other levels. In a possible embodiment, at the end time point TP53 of the display period 763, the control circuit 630 stops setting the voltage level V _IOB0 to the level LM. At the start time point TP54 of the display period 764, the control circuit 630 starts to set the voltage level _VIOB0 to the level LM. The sensing period 782 starts from the end time point TP53 and ends at the start time point TP54. From the end time point TP53 to the start time point TP54, the control circuit 630 sets the voltage level V _IOB0 to a floating level. In this embodiment, from the end time point TP53 to the start time point TP54, the control circuit 630 performs a sensing operation on the input and output pins IOA0, but does not perform a sensing operation on the input and output pins IOA1 and IOA2. Control circuit 630 may set voltage levels V _IOA1 and V _IOA2 to level L0. In other embodiments, during the sensing period 782, the control circuit 630 may set the voltage level V _IOB0 to a high level or a low level.

During display periods 765 and 766 , the control circuit 630 sets the voltage level V _IOB0 to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to the level L1 . In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 and V _IOA0 to V _IOA2 to other levels. In a possible embodiment, at the end time point TP55 of the display period 765, the control circuit 630 stops setting the voltage level V _IOB0 to the level LM. At the start time point TP56 of the display period 766, the control circuit 630 starts to set the voltage level _VIOB0 to the level LM. The sensing period 783 starts from the end time point TP55 and ends at the start time point TP56. From the end time point TP55 to the start time point TP56, the control circuit 630 sets the voltage level V _IOB0 to a floating level. In this embodiment, from the end time point TP55 to the start time point TP56, the control circuit 630 performs a sensing operation on the input and output pins IOA0 or IOA1, but does not perform a sensing operation on the input and output pins IOA2. In this embodiment, the sensing period 783 includes periods P5 and P6. During the period P5, the control circuit 630 performs a sensing operation on the input and output pins IOA0, but does not perform a sensing operation on the input and output pins IOA1 and IOA2. Control circuit 630 may set voltage levels V _IOA1 and V _IOA2 to level L0. During the period P6, the control circuit 630 performs a sensing operation on the input and output pins IOA1, but does not perform a sensing operation on the input and output pins IOA0 and IOA2. Control circuit 630 may set voltage levels V _IOA0 and V _IOA2 to level L0.

During display periods 767 and 768, the control circuit 630 sets the voltage level V _IOB0 to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to the level L2. In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 and V _IOA0 to V _IOA2 to other levels. In a possible embodiment, at the end time point TP57 of the display period 767, the control circuit 630 stops setting the voltage level V _IOB0 to the level LM. At the start time point TP58 of the display period 768, the control circuit 630 starts to set the voltage level _VIOB0 to the level LM. The sensing period 784 starts from the end time point TP57 and ends at the start time point TP58. From the end time point TP57 to the start time point TP58, the control circuit 630 sets the voltage level V _IOB0 to a floating level. In this embodiment, from the end time point TP57 to the start time point TP58, the control circuit 630 performs a sensing operation on the input and output pins IOA1, but does not perform a sensing operation on the input and output pins IOA0 and IOA2. Control circuit 630 may set voltage levels V _IOA0 and V _IOA2 to level L0. In other embodiments, during the sensing period 784, the control circuit 630 may set the voltage level V _IOB0 to a high level or a low level.

During display periods 769 and 770 , the control circuit 630 sets the voltage level V _IOB0 to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to the level L1 . In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 and V _IOA0 to V _IOA2 to other levels. In a possible embodiment, at the end time point TP59 of the display period 769, the control circuit 630 stops setting the voltage level V _IOB0 to the level LM. At the start time point TP60 of the display period 770, the control circuit 630 starts to set the voltage level V _IOB0 to the level LM. The sensing period 785 starts from the end time point TP59 and ends at the start time point TP60. From the end time point TP59 to the start time point TP60, the control circuit 630 sets the voltage level V _IOB0 to a floating level. In this embodiment, from the end time point TP59 to the start time point TP60, the control circuit 630 performs a sensing operation on the input and output pins IOA1, but does not perform a sensing operation on the input and output pins IOA0 and IOA2. Control circuit 630 may set voltage levels V _IOA0 and V _IOA2 to level L0. In other embodiments, during the sensing period 785, the control circuit 630 may set the voltage level V _IOB0 to a high level or a low level.

During the display periods 771 and 772 , the control circuit 630 sets the voltage level V _IOB0 to the level LM, and sets the voltage levels V _IOA0 to V _IOA2 to the level L2 . In other embodiments, the control circuit 630 may set the voltage levels V _IOB0 and V _IOA0 to V _IOA2 to other levels. In a possible embodiment, at the end time point TP61 of the display period 771, the control circuit 630 stops setting the voltage level V _IOB0 to the level LM. At the start time point TP62 of the display period 772, the control circuit 630 starts to set the voltage level _VIOB0 to the level LM. The sensing period 786 starts from the end time point TP61 and ends at the start time point TP62. From the end time point TP61 to the start time point TP62, the control circuit 630 sets the voltage level V _IOB0 to a floating level. In other embodiments, during the sensing period 786, the control circuit 630 may set the voltage level V _IOB0 to a high level or a low level. From the end time point TP61 to the start time point TP62, the control circuit 630 performs a sensing operation on the input and output pins IOA1 or IOA2, but does not perform a sensing operation on the input and output pins IOA0. In this embodiment, the sensing period 786 includes periods P7 and P8. During the period P7, the control circuit 630 performs a sensing operation on the input/output pin IOA1. At this time, the control circuit 630 does not perform a sensing operation on the input and output pins IOA0 and IOA2. Control circuit 630 may set voltage levels V _IOA0 and V _IOA2 to level L0. During the period P8, the control circuit 630 performs a sensing operation on the input and output pins IOA2, but does not perform a sensing operation on the input and output pins IOA0 and IOA1. Control circuit 630 may set voltage levels V _IOA0 and V _IOA1 to level L0.

After the control circuit 630 performs the sensing operation on each of the input and output pins IOA0 ˜ IOA3 , the control circuit 630 performs the sensing operation on each of the input and output pins IOB0 ˜IOB3 instead. In this example, when the control circuit 630 performs a sensing operation on the input and output pins IOB0 - IOB3 , the control circuit 630 sets the voltage level of each of the input and output pins IOA0 - IOA3 to a floating level, a high level standard or a low level.

FIG. 8 is a schematic diagram of the sensing operation performed by the control circuit 630 of the present invention. First, each pin of the first pin group is set equal to a first preset level (step S811 ). Then, the voltage level of each pin of the second pin group is scanned (step S812). In a possible embodiment, the control circuit 630 performs a sensing operation on the second pin group. Between two display periods, the control circuit 630 performs a sensing operation on a single pin in the second pin group, but does not perform a sensing operation on other pins in the second pin group.

Next, it is determined whether the control circuit 630 has performed the sensing operation on all the pins in the second pin group (step S813). If the control circuit 630 has not performed the sensing operation on all the pins in the second pin group, the process returns to step S812. If the control circuit 630 has performed the sensing operation on all the pins in the second pin group, step S814 is executed. Step S814 sets each pin of the second pin group equal to a second preset level. Then, the voltage level of each pin of the first pin group is scanned (step S815). In a possible embodiment, the control circuit 630 scans each pin of the first pin group to perform a sensing operation on the first pin group. Between two display periods, the control circuit 630 performs a sensing operation on a single pin in the first pin group, but does not perform a sensing operation on other pins in the first pin group.

Next, it is determined whether the control circuit 630 has performed the sensing operation on all the pins in the first pin group (step S816). If the control circuit 630 has not performed the sensing operation on all the pins in the first pin group, the process returns to step S815. If the control circuit 630 has performed the sensing operation on all the pins in the second pin group, the sensing operation ends.

In a possible embodiment, the second preset level in step S814 is relative to the first preset level in step S811. For example, when the first predetermined level is a high level, the second predetermined level is a low level. When the first preset level is a low level, the second preset level is a high level. In some embodiments, the first preset level in step S811 and the second preset level in step S814 are both equal to a floating level. In this example, step S811 may not provide any voltage to the first pin group, and step S814 may not provide any voltage to the second pin group.

In other embodiments, steps S814 to S816 are performed earlier than step S811. In this example, the control circuit 630 first sets the voltage level of each pin of the second pin group equal to the second predetermined level, and then performs the sensing operation on the first pin group. After the sensing operation is performed on all the pins of the first pin group, the control circuit 630 sets the voltage level of each pin of the first pin group equal to the first preset level, and then the second The pin group performs the sensing operation.

FIG. 9A is a possible schematic diagram of the display area of the present invention. In this embodiment, the display area 900A includes a plurality of light emitting diodes (LEDs). Each light-emitting diode is coupled to one of the input pins SEG0 ˜ SEG3 and one of the input pins COM0 ˜ COM3 . Taking the light emitting diode 910 as an example, the anode of the light emitting diode 910 is coupled to the input pin SEG0, and the cathode of the light emitting diode 910 is coupled to the input pin COM0. In this example, when the voltage difference between the input pins SEG0 and COM0 is greater than the turn-on voltage of the light-emitting diode 910 , the light-emitting diode 910 is turned on. When the voltage difference between the input pins SEG0 and COM0 is not greater than the turn-on voltage of the light-emitting diode 910 , the light-emitting diode 910 is not lit.

During the sensing period, since the input pins COM0~COM3 may be equal to a high level (or a second preset level), even if the input pins SEG0~SEG3 receive a small voltage, the LED 910 will not be turned on . In addition, since the input pins SEG0 ˜ SEG3 may be equal to a low level (or referred to as the first preset level), even if the input pins COM0 ˜ COM3 receive a small voltage, the light emitting diode 910 will not be turned on. Therefore, during the sensing period, when the control circuit 630 performs a sensing operation on the capacitive touch device 620, the display device 610 will not be disturbed by the sensing operation.

FIG. 9B is another possible schematic diagram of the display area of the present invention. In this embodiment, the display area 900B includes a plurality of liquid crystal capacitors. Each liquid crystal capacitor is coupled to one of the input pins SEG0 ˜ SEG3 and one of the input pins COM0 ˜ COM3 . Taking the liquid crystal capacitor 920 as an example, the liquid crystal capacitor 920 is coupled between the input pins SEG0 and COM0.

During the sensing period, since the voltage level of the input pins COM0 ˜ COM3 may be a floating level, even if the input pins SEG0 ˜ SEG3 receive a small voltage, the liquid crystal capacitor 920 will not be charged. In addition, since the voltage level of the input pins SEG0 ˜ SEG3 may be equal to a floating level, even if the input pins COM0 ˜ COM3 receive a small voltage, the liquid crystal capacitor 920 will not be charged. Therefore, during the sensing period, when the control capacitor 630 performs a sensing operation on the capacitive touch device 620 , the sensing operation does not interfere with the display device 610 .

FIG. 10 is another possible schematic diagram of the control circuit of the present invention. As shown in the figure, the control circuit 1000 includes a display controller 1010 , a sensing circuit 1020 and a transmission circuit 1030 . The display controller 1010 is used for providing driving signals SSG0, SCM0 and a switching signal SEL. In a possible embodiment, the driving signal SSG0 is a segment signal, and the driving signal SCM0 is a common signal. In other embodiments, the display controller 1010 integrates the image driver 131 and the micro-control circuit 132 shown in FIG. 1 . In this example, the driving signal SSG0 is used as one of the driving signals SD1 ˜ SD4 , and the driving signal SCM0 is used as the other one of the driving signals SD1 ˜ SD4 .

The sensing circuit 1020 performs a sensing operation. During the sensing operation, the sensing circuit 1020 provides the reference voltage DK and receives the sensing voltages V _AN3 and V _BN0 . In a possible embodiment, the sensing voltage V _AN3 is the voltage of the sensing pin AN3 of the capacitive touch device 520 , and the sensing voltage V _BN0 is the voltage of the sensing pin BN0 of the capacitive touch device 620 . . In other embodiments, the sensing circuit 1020 receives less or more sensing voltages, such as the voltages of the sensing pins AN0 ˜ AN2 and BN1 ˜ BN3 . Since the characteristics of the sensing circuit 1020 are similar to the characteristics of the sensing circuit 133 in FIG. 1 , detailed descriptions are omitted.

The transmission circuit 1030 selects the display controller 1010 or the sensing circuit 1020 according to the switching signal SEL, so as to provide the output of the display controller 1010 or the sensing circuit 1020 to the input and output pins IOA0 and IOB0. During a display period, the transmission circuit 1030 provides the driving signals SSG0 and SCM0 to the input and output pins IOA0 and IOB0 according to the switching signal SEL. During a sensing period, the transmission circuit 1030 provides the reference voltage DK to one of the input and output pins IOA0 and IOB0 according to the switching signal SEL, and sets the level of the other of the input and output pins IOA0 and IOB0.

It is assumed that the input/output pin IOA0 belongs to the first pin group, and the input/output pin IOB0 belongs to the second pin group. During a first sensing period, the display controller 1010 requests the transmission circuit 1030 to provide the reference voltage DK to the input/output pin IOA0, and to provide the driving signal SCM0 to the input/output pin IOB0. At this time, the driving signal SCM0 is equal to a first predetermined level. In other embodiments, the display controller 1010 may request the transmission circuit 1030 to stop transmitting any signal to the input/output pin IOB0. In this example, the voltage level of the input/output pin IOB0 is a floating level. In some embodiments, when the transmission circuit 1030 provides the reference voltage DK to the input/output pin IOA0, the sensing circuit 1020 may provide a first predetermined level (eg, a low level or a high level). In this example, the transmission circuit 1030 may transmit the first preset bit provided by the sensing circuit 1020 to the input/output pin IOB0.

During the second sensing period, the display controller 1010 requests the transmission circuit 1030 to provide the reference voltage DK to the input/output pin IOB0, and to provide the driving signal SSG0 to the input/output pin IOA0. At this time, the driving signal SSG0 is equal to a second predetermined level. In other embodiments, the display controller 1010 may request the transmission circuit 1030 to stop transmitting any signal to the input/output pin IOA0. In this example, the voltage level of the input/output pin IOA0 is a floating level. In some embodiments, when the transmission circuit 1030 provides the reference voltage DK to the input/output pin IOB0, the sensing circuit 1020 may provide a second predetermined level (eg, a high level or a low level). In this example, the transmission circuit 1030 may transmit the second preset bit provided by the sensing circuit 1020 to the input/output pin IOA0.

After the transmission circuit 1030 provides the reference voltage DK to the I/O pin IOA0, the sensing circuit 1020 detects the voltage V _AN3 of the I/O pin IOA0. In this example, when the voltage V _AN3 of the input/output pin IOA0 is not equal to the reference voltage DK, it means that the sensing area corresponding to the sensing pin AN3 of the capacitive touch device 620 is touched. Therefore, the sensing circuit 1020 informs the display controller 1010, so that the display controller 1010 performs a corresponding action.

Similarly, after the transmission circuit 1030 provides the reference voltage DK to the I/O pin IOB0, the sensing circuit 1020 detects the voltage V _BN0 of the I/O pin IOB0. In this example, when the voltage V _BN0 of the input/output pin IOB0 is not equal to the reference voltage DK, it means that the sensing area corresponding to the sensing pin BN0 of the capacitive touch device 620 is touched. Therefore, the sensing circuit 1020 informs the display controller 1010, so that the display controller 1010 performs another corresponding action.

Before detecting the voltage of the input and output pins IOA0 or IOB0, the sensing circuit 1020 first provides the reference voltage DK to the input and output pins IOA0 or IOB0. Therefore, the sensing operation performed by the sensing circuit 1020 is not easily disturbed by noise.

For convenience of description, FIG. 10 only shows the input and output pins IOA0 and IOB0, but is not intended to limit the present invention. In other embodiments, the transmission circuit 1030 is coupled to more input and output pins (eg, IOA1 ˜IOA3 , IOB1 ˜IOB3 ). The present invention does not limit the structure of the transmission circuit 1030 . In a possible embodiment, the transmission circuit 1030 includes switching circuits 1031 and 1032 . The switching circuits 1031 and 1032 transmit corresponding signals according to the switching signal SEL. In other embodiments, the display controller 1010 provides two switching signals for controlling the switching circuits 1031 and 1032 .

In other embodiments, before the sensing circuit 1020 performs a sensing operation to determine whether the capacitive touch device 620 is touched, the sensing circuit 1020 may send a request signal (not shown) to the display controller 1010 . The display controller 1010 replies to the sensing circuit 1020 and sends an approval signal to the sensing circuit 1020. During a specific period, the sensing circuit 1020 can control the voltage levels of the input and output pins IOA0 and IOB0. After a specific period, the display controller 1010 controls the voltage levels of the input and output pins IOA0 and IOB0.

During the sensing period, the control circuit 1000 scans a part of the input and output pins, and sets another part of the output pins to a preset level (eg, a low level or a high level) or a floating level. During a sensing period between two display periods, the control circuit 1000 performs a sensing operation. During the same sensing period, the control circuit 1000 may perform a sensing operation on a single input and output pin. Therefore, the display device 610 is not affected by the sensing operation of the control circuit 1000 during the sensing period.

Furthermore, when the display device 610 may be a passive matrix display, since the response rate of the passive matrix display is relatively slow, even if the potential of the input and output pins changes, the passive matrix display does not respond immediately. Therefore, even if the input and output pins are set equal to a reference voltage, the display device 610 will not be disturbed by the reference voltage. In other embodiments, even if the display device 610 is an active matrix display, since the reference voltage is lower than the level of the driving signal, the display device 610 will not be affected by the reference voltage. In some embodiments, the sensing period is shorter than the display period, so that the display device 610 is not affected by the sensing operation.

Unless otherwise defined, all terms (including technical and scientific terms) herein are commonly understood by those of ordinary skill in the art to which this invention belongs. Furthermore, unless expressly stated otherwise, the definitions of words in general dictionaries should be construed as consistent with their meanings in articles in the related technical field, and should not be construed as ideal states or overly formal voices.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. . For example, the system, apparatus or method according to the embodiments of the present invention may be implemented in a physical embodiment of hardware, software, or a combination of hardware and software. Therefore, the protection scope of the present invention should be determined by the scope of the appended patent application.

100, 600: Operating system 110, 610: Display device 111, 611: Display area 120, 620: Capacitive touch device 121~124, 621~628, 900A, 900B: Area 125~128: Sensing element 130, 630 , 1000: Control circuit 131: Image driver 132: Micro-control circuit 133, 1020: Sensing circuit 134, 1030: Transmission circuit 135~138, IOA0~IOA3, IOB0~IOB3: Input and output pins PN ₁ ~PN ₈ , SEG0 ~SEG3, COM0~COM3, AN0~AN3, BN0~BN3: Pin SD1~SD4: Drive signal V _PN5 ~V _PN8 , V ₁₃₅ ~V ₁₃₈ , V _IOB0 , V _IOA0 ~V _IOA2 , V _AN3 , V _BN3 : Voltage SEL: Switching signals SW1, SW2, 1031, 1032: Switching circuits PA1~PA8: Paths 310~340: Sensing units Cmp, Cmn: Capacitor 313: Comparator 314: Controller DK: Reference voltages 311, 312: Node SCM : Comparison signal Sap, San: Adjustment signal P ₁₁ ~P ₄₄ : Pixel ST ₁ ~ST ₄ : On signal 511~518, 531~542, 561~572, 711~716, 731~742, 761~772: Display Period 521~524, 551~556, 581~586, 721~723, 751~756, 781~786: Sensing period L0~L2, LH, LM: Level TP1~TP62: Time point P1~P8: Period R1 ~R8: Resistor S811~S816: Step

FIG. 1 is a schematic diagram of the operating system of the present invention. FIG. 2 is a possible schematic diagram of the transmission circuit of the present invention. FIG. 3 is a possible schematic diagram of the sensing circuit of the present invention. FIG. 4 is a possible schematic diagram of the display device of the present invention. 5A to 5C are schematic diagrams of voltage level changes of the input and output pins of the present invention. FIG. 6A is another schematic diagram of the operating system of the present invention. FIG. 6B is another schematic diagram of the operating system of the present invention. FIGS. 7A to 7C are schematic diagrams of voltage level changes of the first and second pin groups of the present invention. FIG. 8 is a schematic flowchart of the sensing operation of the control circuit of the present invention. FIG. 9A is a possible schematic diagram of the display area of the present invention. FIG. 9B is another possible schematic diagram of the display area of the present invention. FIG. 10 is another possible schematic diagram of the control circuit of the present invention.

600: Operating System

610: Display device

611: Display area

620: Capacitive Touch Device

621~628: Area

630: Control circuit

IOA0~IOA3, IOB0~IOB3: Input and output pins

SEG0~SEG3, COM0~COM3: Input pins

AN0~AN3, BN0~BN3: Sensing pins

Claims (10)

A control circuit comprising: a first input and output pin for coupling to a first input pin of a display device and a first sensing pin of a capacitive touch device; a second input and output pin for coupling to a second input pin of the display device and a second sensing pin of the capacitive touch device; a sensing circuit for determining whether the capacitive touch device is touched according to the voltages of the first and second input and output pins; and A display controller provides a first drive signal to the display device through the first input and output pins during a first display period and a second display period, and provides a first drive signal through the second input and output pins a second driving signal to the display device; in: After an end time point of the first display period, the display controller stops providing the first and second driving signals; After a start time point of the second display period, the display controller provides the first and second driving signals; From the end time point of the first display period to the start time point of the second display period, the sensing circuit detects the voltage of the first input and output pins, and stops detecting the second input and output pin voltage. The control circuit of claim 1, wherein During a third display period, the display controller provides the first drive signal to the display device through the first input and output pins, and provides the second drive signal to the display through the second input and output pins device; After an end time point of the second display period, the display controller stops providing the first and second driving signals; After a start time point of the third display period, the display controller provides the first and second driving signals. The control circuit of claim 2, wherein from the end time point of the second display period to the start time point of the third display period, the sensing circuit detects the voltage of the second input and output pins, And stop detecting the voltage of the first input and output pins. The control circuit of claim 3, wherein from the end time point of the first display period to the start time point of the second display period, the voltage of the second input and output pins is equal to a floating level. The control circuit of claim 4, wherein from the end time point of the second display period to the start time point of the third display period, the voltage of the first input/output pin is equal to the floating level. The control circuit of claim 3, wherein from the end time point of the first display period to the start time point of the second display period, the voltage of the second input and output pins is equal to a first preset level From the end time point of the second display period to the start time point of the third display period, the voltage of the first input and output pins is equal to a second preset level, the second preset The level is relative to the first preset level. The control circuit of claim 2, wherein From the end time point of the second display period to an intermediate time point, the sensing circuit detects the voltage of the first input and output pins, and does not detect the voltage of the second input and output pins; From the intermediate time point until the start time point of the third display period, the sensing circuit detects the voltage of the second input and output pins, and does not detect the voltage of the first input and output pins; The intermediate time point is located between the end time point of the second display period and the start time point of the third display period. The control circuit of claim 1, wherein from the end time point of the first display period to the start time point of the second display period, the sensing circuit first provides a reference voltage to the first input-output connection After the pin is connected, the voltage of the first input and output pins is detected. A display device comprising: a display device having a first input pin and a second input pin; a capacitive touch device having a first sensing pin and a second sensing pin; and a control circuit, including: a first input and output pin, coupled to the first input pin and the first sensing pin; a second input and output pin, coupled to the second input pin and the second sensing pin; a sensing circuit for determining whether the capacitive touch device is touched according to the voltages of the first and second input and output pins; and A display controller provides a first drive signal to the display device through the first input and output pins during a first display period and a second display period, and provides a first drive signal through the second input and output pins a second driving signal to the display device; in: During the first and second display periods, the display device presents images according to the first and second driving signals; After an end time point of the first display period, the display controller stops providing the first and second driving signals; After a start time point of the second display period, the display controller provides the first and second driving signals; From the end time point of the first display period to the start time point of the second display period, the sensing circuit detects the voltage of the first input and output pins, and stops detecting the second input and output pin voltage. The display device of claim 9, wherein the display device is a passive matrix organic light emitting diode display, the passive matrix organic light emitting diode display has a display area for presenting a picture, and the display area has a plurality of light emitting diodes A pole body, one of the light emitting diodes is directly connected between the first input pin and the second input pin.

Images