TWI769001B - Method for selecting decoding strategy for data storage system - Google Patents

Abstract

The invention discloses a method for selecting a decoding strategy in a data storage system. In this method, several decoders are first provided. Second, a received word is read. Next, the sum of the symptom values of the received word is calculated. Then, according to the sum of the symptom values, a decoder is selected from the decoders, and its parameters are set. Finally, the received word is decoded with the chosen decoder.

Description

Method for selecting decoding strategy for data storage system

The present invention relates to a NAND flash memory, especially to an error control code using a low density parity check (Low Density Parity Check: "LDPC") code, especially a method for selecting a decoding strategy for a data storage system.

The application of various storage devices, such as mobile phones, dash cams, digital cameras, and network monitors, has grown rapidly in recent years. The rewritable non-volatile memory module has the characteristics of non-volatility, power saving, small size and fast reading and writing, so it is widely used in these devices.

In order to ensure the correctness of the data stored in the rewritable non-volatile memory module, before the data is written into the module, an error control code will be used to encode it to generate a series of verification sequences, which will be stored together with the data in the module. Rewritable non-volatile memory modules.

However, factors inside or outside the device cause digital errors to occur when reading data from the rewritable non-volatile memory module. Therefore, the original data is restored through the decoding mechanism.

The most commonly used error control codes in current NAND Flash are Low Density Parity Check code (“LDPC”) and Bose-Chaudhuri-Hocquenghem: "BCH") code. LDPC decoding mode The formula covers hard decision decoding (Hard Decoding) and soft decision decoding (Soft Decoding).

The hard-decision decoding method only decodes the log-likelihood ratio ("LLR") corresponding to the reading of multiple memory packets according to one read potential.

Soft-decision decoding requires multiple bits to be read from multiple memory packets simultaneously by shifting the read potential multiple times. Each memory packet corresponds to a binary sequence after multiple readings of different displacement potentials. These sequences correspond to the LLR values required for soft-decision decoding. The more accurate the LLR value of each bit cell is obtained by shifting the read potential more times, which usually results in a higher decoding success rate, but the decoding delay is caused by multiple readings.

According to the conventional decoding process, after reading the data, enter the hard-decision decoding mode to decode. Once the hard-decision decoding fails, the hard-decision decoding is performed after reading the data repeatedly, or the soft-decision is performed after a more accurate LLR value per cell is obtained by reading one or several times. This mode not only causes delay but also consumes power.

Therefore, how to judge how many times to read, or which decoding mode to use, is extremely important to the speed and accuracy of data reading.

The main purpose of the present invention is to provide a method for selecting a decoding strategy for a data storage system to overcome the deficiencies of the prior art.

To achieve this, in the method, first, several decoders are provided. Second, a received word is read. Next, the sum of the symptom values of the received word is calculated. Then, according to the sum of the symptom values, a decoder is selected from the decoders, and its parameters are set. Finally, the received word is decoded with the chosen decoder.

1: Read the control module

2: storage unit

3: Decoding configuration control module

4: Decoding module

5: Decoding decision control module

6: Command generation module

7: Output Demultiplexer

8: Input Multiplexer

D: Deviation value

D1-D4: Decoder

S10~S34: Steps

[FIG. 1] is a schematic diagram of frame error rate curves of four decoders according to an embodiment of the present invention.

[Fig. 2] is a schematic diagram of the total number of error bits corresponding to the sum of symptom values.

[FIG. 3] is a block diagram of a device for selecting a decoding strategy in a data storage system according to an embodiment of the present invention.

[FIG. 4] is a flowchart of a method for selecting a decoding strategy in a data storage system according to an embodiment of the present invention.

The following describes a method for selecting a decoding strategy in a data storage system according to an embodiment of the present invention with reference to the related drawings. "Decoding strategy" means decoding a received word with an appropriate decoder. In other words, a decoding strategy is a decoding procedure. To avoid confusion, the decoding procedure is denoted by "decoding strategy", and the procedure of selecting one decoding strategy from several decoding strategies is denoted by "method".

Various objects in this embodiment are drawn according to the proportions, sizes, deformations or displacements suitable for the description, and are not drawn according to the scale of the actual elements, which will be described together first. Identical and symmetrically arranged elements in this embodiment are denoted by the same reference numerals. In addition, if directional terms such as "front, rear, left, right, top, bottom, inner, outer" are used to describe this embodiment, it is shown according to the specified view direction, and is not construed as a limitation of the present invention.

A data storage device includes at least one decoder. The type of error control code used, the parity check matrix, the decoding algorithm used to design the decoder, the parameter setting of the decoder itself, the accuracy of the LLR value of the received word, etc., will affect its frame error rate ( frame error rate: "FER"), decoding speed and power consumption. Therefore, according to the error control code, parity check matrix, decoder, decoder setting parameters and LLR accuracy used by the error control module in the equipment, it can be matched into several decoding modules. Then, Simulations are performed for multiple decoding modules to obtain FER at different raw error bits.

Under the condition that FER is 0.002, set FER_REQ=0.002, and FER_REQ is the required FER (required FER). Referring to Figure 1, the horizontal line FER_REQ=2* ^10-3 intersects the FER curves of the four decoders. It can be known that when the number of error bits is less than or equal to 125 bits, almost all of the four decoders can achieve the required FER. When the error is greater than 125 bits and less than or equal to 259 bits, almost all decoders 2, 3, and 4 can achieve the required FER. When the error is greater than 259 bits and less than or equal to 380 bits, almost all decoders 3 and 4 can achieve the required FER. When the error is greater than 380 bits and less than or equal to 440 bits, decoder 4 can almost always achieve the required FER. When the error is larger than 440 bits, the four decoders can hardly achieve the required FER. Therefore, under the condition of FER_REQ=2*10 ⁻³ , the four decoders in this embodiment have the decoding capability thresholds of 125, 259, 380, and 440 bits, respectively.

synd_sum_i<500，重新排序後E_i範圍在110到170個錯誤位元數。將A

synd_sum_i<B標示為(A+B)/2。 Referring to FIG. 2, the present invention infers the number of error bits of a received word from a syndrome sum ("synd_sum") based on the properties of a low-density parity check matrix. For example, the error control system adopts a parity check matrix H of a low density parity check code, and the length of a legal code word C (code-word) is N. In this embodiment, an equal number of 10 to 910 error bits are generated in advance, that is, the length of an error vector (error vector: "E") is N (length(E)=N) and the sum of the error vectors is 10 to 910. Use the formula synd_sum=sum(mod(H*E'),2) to calculate the sum of its symptom values, "E'" represents the transpose matrix (transportation) of the vector E. In this way, many sequence pairs (synd_sum_i, sum(E_i)), i=0,1,2,…,1000000000 can be obtained. Take these sequence pairs according to synd_sum every 50 as an interval, and count the sequence pair E_i range of synd_sum_i falling in this interval. such as 450

synd_sum_i<500, E_i ranges from 110 to 170 error bits after reordering. will A

synd_sum_i<B is denoted as (A+B)/2.

The threshold values of the number of error bits of the four decoders in this embodiment are respectively 125, 259, 380, and 440 bits under the condition of FER_REQ=2*10 ^-3 . As shown in Fig. 2, the sequence pair of synd_sum_i>500, its sum(E_i)>125. For pairs with synd_sum_i>950, sum(E_i)>259. For pairs with synd_sum_i>1150, sum(E_i)>380. For pairs with synd_sum_i>1250, sum(E_i)>440.

1150=synd_sum_thr_3的序對中，sum(E_i)

380。因此，第三解碼器為最佳解碼器。如此，計算收到的字的症狀值總和後，即可參考表1選擇適當解碼器以進行解碼策略(decoding strategy)。 According to Figures 1 and 2, the following Table 1 can be deduced. The symptom value total threshold (synd_sum_thr) of each decoder is the lower limit of the symptom value sum range in FIG. 2 corresponding to its error bit threshold value. For example, the received word, and its symptom value is calculated to sum to 1000, and then, consider the decoder with the least operating time and energy consumption. The number of error bits threshold for decoder 3 is 380 bits. As shown in Figure 2, in synd_sum_i

1150=In the sequence pair of synd_sum_thr_3, sum(E_i)

380. Therefore, the third decoder is the best decoder. In this way, after calculating the sum of the symptom values of the received words, an appropriate decoder can be selected for a decoding strategy with reference to Table 1.

Table 1

As shown in FIG. 3, according to a preferred embodiment of the present invention, a device for selecting a decoding strategy in a data storage system includes a reading control module 1, a storage Unit 2 , a decoding configuration control module 3 , a decoding module 4 , a decoding decision control module 5 , a command generation module 6 , an output demultiplexer 7 and an input multiplexer 8 .

The read control module 1 receives a read command, and parses the contents of a read voltage, a position and an encoder configuration and other information.

The storage unit 2 is a memory, and is connected to the read control module 1 . The storage unit 2 receives the read voltage, the position information, etc. from the read control module 1, and correspondingly reads a piece of data from a specific position in the memory. Henceforth, this information is called "received word".

The decoding configuration control module 3 is connected to the read control module 1 . The operation of the decoding configuration control module 3 will be described in detail later.

The output demultiplexer 7 is connected to the storage unit 2 at one end, and is connected to the decoding configuration control module 3 at the other end. The decoding configuration control module 3 controls the output demultiplexer 7 to select a decoder. The function of the output demultiplexer 7 can be easily understood by those skilled in the art, so it will not be described in detail.

The decoding module 4 is connected to the output demultiplexer 7 . In other words, the decoding module 4 is connected to the storage unit 2 and the decoding configuration control module 3 through the output demultiplexer 7 . The decoding module 4 has several decoders, and the total number of these decoders is m. According to this embodiment, m is 4. In other words, the decoding module 4 has four decoders D1, D2, D3 and D4. In other embodiments, the decoding module 4 may have fewer or more decoders.

The input multiplexer 8 is connected to the decoders D1, D2, D3 and D4. The input multiplexer 8 can be regarded as part of the decoding module 4 .

In operation, the decoding configuration control module 3 receives the encoder configuration information from the read control module 1 and generates a number of messages for controlling the decoding module 4 and the demultiplexer 7 . These messages include the selection and parameter setting of specific decoders and The received word corresponds to the decoder. Therefore, in operation, according to the configuration of the decoding configuration control module 3, the decoder D1, D2, D3 or D4 is allocated to the received word, and the received word is output for decoding. In other words, each received word matches a decoder. However, the device can process multiple received words simultaneously.

The decoding decision control module 5 is connected to the decoding module 4 . In operation, the decoding decision control module 5 receives synd_sum, diff_0_1 and decoding status (decoding failure or success) from the decoding module 4 as the basis for decoding decision. The decoding decision control module 5 judges the information and decides the optimal decoding strategy, including decoder selection and decoder setting parameters, such as the maximum decoding iteration (maximal iteration, iter_max).

The command generating module 6 is respectively connected to the reading control module 1 and the decoding decision control module 5 . During operation, the decoding decision control module 5, according to the decoding strategy, triggers the command generation module 6 to selectively output a re-reading command (different reading voltage or new encoder configuration information) and present it in a specific format, It is used by the reading control module 1 . In this way, the reading control module 1 is made to read again, and the decoding configuration control module 3 is made to provide new encoder configuration information.

During implementation, we can define diff_0_1 as the absolute value of the difference between the number of "0" and "1" in the received word. We are used to doing an exclusive OR operation (XOR) with a random sequence before the original data is written. Therefore, under the condition that the number of "0" and "1" in the received word is nearly uniform, the larger the value, the more error bits caused by the read voltage (read Vth). Therefore, when the amount of error bits caused by the reading voltage deviation is greater than the decoding capability of the decoding module 4, the decoding decision control module 5 outputs a decoding strategy, triggers the command generation module 6, and requires the reading control module Group 1, according to different displacement read voltages, re-read data from the memory cell 2.

When the diff_0_1 of the received word is less than a preset deviation value D, and the sum of its symptom values (synd_sum) is calculated to be 800, it can be judged from Table 1 that the decoder D1 in the decoding module 4 is very likely to decode successfully, so The decoding decision control module 5 outputs a A kind of decoding strategy, trigger this order to produce module 6, require this reading control module 1, make this decoding configuration control module 3, use this decoder D1 in this decoding module 4, this received word is carried out Decode, and output the decoded result and status.

If the sum of the symptom values is calculated to be 1500, it can be seen that the decoding capability range of the decoding module 4 is exceeded, so a decoding strategy is output to trigger the command to generate the module 6, and the reading control module 1 is required to read the voltage with different reading voltages. , re-read data from the storage unit 2, or adjust the setting parameters of the decoders.

As shown in FIG. 4, a method of selecting a decoding strategy with the above-mentioned apparatus will be described below.

At S10, the received word is read. In detail, according to a preset reading command, or using the command to generate the module 6, the reading control module 1 is made to read the voltage from a specific position in the storage unit 2 with one or more reading voltages, one or more times. read data. Each bit provides a binary sequence. Then, the binary sequence is passed to the decoding module 4 .

At S12, several LLR values are generated. In detail, for each binary sequence obtained at S10, an LLR value is provided. Then, the LLR values are transmitted to the decoding module 4 through the output multiplexer 7 . The decoding module 4 receives a series of binary sequences from the output multiplexer 7 and corresponds them to a series of LLR values for the decoding module 4 to decode.

At S14, the sum of the symptom values of the received word and diff_0_1 are calculated. As above, diff_0_1 is the absolute value of the difference between the number of "0" and "1" in the received word. The decoding module 4 receives the received word from the output demultiplexer 7 and calculates the sum of the symptom values of the received word and diff_0_1.

At S16, it is judged whether the ratio of diff_0_1 (diff_0_1 divided by the statistical length) is greater than a deviation value D. If diff_0_1 is greater than or equal to the deviation value, go to S18, otherwise go to S20. In this preferred embodiment, the deviation value D is calculated to be 2%.

At S18, the decoding decision control module 5 generates the module 6 through the command, and sends Output the displacement read voltage reread command. Then, returning to S10, data is read from the memory cell 2 according to the displacement read voltage.

If diff_0_1 is less than 2% of the statistical length, select an appropriate decoder according to the sum of the symptom values and Table 1, and set parameters for the selected decoder. The method of the present invention will be described below by taking five scenarios as examples.

In the first scenario, the sum of symptom values is less than the sum of symptom values threshold of 1.

At S20, n is set to 1.

At S22, it is judged that the symptom value sum is less than the symptom value sum threshold value 1, and the process goes to S28.

At S28, decoder D1 is selected and its parameters are set.

Next, at S30, the received word is decoded by the decoder D1 according to its parameters and the LLR values.

In the second scenario, the symptom value sum is between the symptom value sum threshold 1 and the symptom value sum threshold 2.

At S20, n is set to 1.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold value 1, and the process goes to S24.

At S24, it is judged that 1 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 2. Then, go back to S22.

At S22, it is judged that the symptom value sum is less than the symptom value sum threshold 2, and the process goes to S28.

At S28, decoder D2 is selected and its parameters are set.

Next, at S30, decoder D2 is used to decode the received word according to its parameters and the LLR values.

In the third scenario, the symptom value sum is between the symptom value sum threshold 2 and the symptom value sum threshold 3.

At S20, n is set to 1.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold value 1, and the process goes to S24.

At S24, it is judged that 1 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 2. Then, go back to S22.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold 2, and the process goes to S24.

At S24, it is judged that 2 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 3. Then, go back to S22.

At S22, it is judged that the symptom value sum is less than the symptom value sum threshold value 3, and the process goes to S28.

At S28, decoder D3 is selected and its parameters are set.

Next, at S30, decoder D3 is used to decode the received word according to its parameters and the LLR values.

In the fourth scenario, the symptom value sum is between the symptom value sum threshold 3 and the symptom value sum threshold 4.

At S20, n is set to 1.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold value 1, and the process goes to S24.

At S24, it is judged that 1 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 2. Then, go back to S22.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold 2, and the process goes to S24.

At S24, it is judged that 2 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 3. Then, go back to S22.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold 3, and Go to S24.

At S24, it is judged that 3 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 4. Then, go back to S22.

In S22, it is judged that the symptom value sum is smaller than the symptom value sum threshold value 4, and the process goes to S28.

At S28, decoder D4 is selected and its parameters are set.

Next, at S30, decoder D4 is used to decode the received word according to its parameters and the LLR values.

In the fifth scenario, the sum of symptom values is greater than the sum of symptom values threshold of 4.

At S20, n is set to 1.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold value 1, and the process goes to S24.

At S24, it is judged that 1 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 2. Then, go back to S22.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold 2, and the process goes to S24.

At S24, it is judged that 2 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 3. Then, go back to S22.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold value 1, and the process goes to S24.

At S24, it is judged that 3 is less than 4, and it goes to S26.

At S26, n+1 is set. In other words, n becomes 4. Then, go back to S22.

At S22, it is judged that the symptom value sum is not less than the symptom value sum threshold value 4, and the process goes to S24.

At S24, it is judged that 4 is not less than 4, and it goes to S28.

At S28, decoder D4 is selected and its parameters are set.

Next, at S30, decoder D4 is used to decode the received word according to its parameters and the LLR values.

No matter in that situation, it will go from S30 to S32.

At S32, it is judged whether the decoding is successful. If the decoding is successful, end, otherwise go to S34.

In S34, it is judged whether or not n is smaller than 4. If n is 1 or 2 or 3, go back to S26, otherwise end.

The above description is only an embodiment of the present invention, and is intended to clarify the characteristics of the present invention, but not to limit the scope of the embodiments of the present invention. Those skilled in the art make equal changes according to the present invention. And the changes well known to those skilled in the art should still belong to the scope covered by the present invention.

S10~S34: Steps

Claims (7)

A method for selecting a decoding strategy for a data storage system, comprising the following steps: providing a plurality of decoders; reading a received word (S10); calculating the sum of the symptom values of the received word and the "0" of the received word The absolute value of the number difference between "" and "1" (S14); divide the absolute value of the number difference by a statistical length to obtain a number difference ratio; determine whether the number difference ratio is greater than or equal to a deviation value (S16); if the number difference ratio is less than the deviation value, select a decoder from the decoders and set its parameters according to the sum of the symptom values (S20); and if the number difference ratio is greater than or equal to the If the deviation value is found, the steps of re-reading a received word (S10); and decoding the received word with the selected decoder (S30). The method for selecting a decoding strategy for a data storage system as claimed in claim 1, wherein each of the decoders has a corresponding threshold, wherein the step of selecting a decoder comprises the step of: comparing the sum of the symptom values with the threshold and select a decoder. The method for selecting a decoding strategy for a data storage system according to claim 2, wherein the step of selecting a decoder includes the following steps: comparing the thresholds, from small to large, with the symptom value summation one by one; if the symptom value summation is less than the current threshold, select the decoding corresponding to the current threshold Otherwise, the sum of the symptom values is compared with the next threshold. The method for selecting a decoding strategy for a data storage system according to claim 3, wherein the step of selecting a decoder includes the following steps: if the sum of the symptom values is not less than a maximum threshold, selecting a decoder corresponding to the maximum threshold. The method for selecting a decoding strategy for a data storage system according to claim 4, further comprising the following steps: judging whether the decoding is successful (S32); and if the decoding is successful, end, otherwise judging whether the selected decoder is the last decoder. The method for selecting a decoding strategy for a data storage system according to claim 5, further comprising the steps of: if the decoding is unsuccessful, judging whether the selected decoder is the last decoder (S34); and if the selected decoder is The last decoder ends, otherwise the sum of the symptom values is compared with the threshold of the next decoder. The method for selecting a decoding strategy for a data storage system as claimed in claim 1, further comprising a step of generating a plurality of LLR values, wherein the step of decoding the received word is based on the parameters of the selected decoder and the LLR values Decode the received word.

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