TWI768031B - Method for forming semiconductor device - Google Patents

Method for forming semiconductor device Download PDF

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TWI768031B
TWI768031B TW107113519A TW107113519A TWI768031B TW I768031 B TWI768031 B TW I768031B TW 107113519 A TW107113519 A TW 107113519A TW 107113519 A TW107113519 A TW 107113519A TW I768031 B TWI768031 B TW I768031B
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shielding layer
transparent
substrate
light
light shielding
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TW107113519A
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TW201944455A (en
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李新輝
曾漢良
林學榮
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世界先進積體電路股份有限公司
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Abstract

A method for forming a semiconductor device includes providing a substrate, forming a first light-shielding layer on the substrate, performing a first lithography process to pattern the first light-shielding layer to form a plurality of first openings in the first light-shielding layer. The first openings expose pixels of the substrate. The method also includes placing a first stencil on the first light-shielding layer. The first stencil has a first openwork pattern which exposes the pixels of the substrate. The method also includes providing a first material. The first material includes a transparent material. The method also includes applying the first material onto the substrate through the first stencil to cover the pixels and fill the first openings, such that a plurality of first transparent pillars made of the first material are formed on the pixels.

Description

半導體裝置之形成方法 Method of forming semiconductor device

本發明實施例係有關於半導體裝置之形成方法,且特別有關於包括透明材料及遮光材料之半導體裝置之形成方法。 Embodiments of the present invention relate to a method of forming a semiconductor device, and particularly, to a method of forming a semiconductor device including a transparent material and a light-shielding material.

半導體裝置可被使用於各種應用中。舉例而言,半導體裝置可被用來作為指紋辨識裝置(或指紋辨識裝置之至少一部份)。指紋辨識裝置可由大量的光學元件組成。舉例而言,上述光學元件可包括光準直器(light collimator)、分束器、聚焦鏡以及線性感測器。 Semiconductor devices can be used in various applications. For example, a semiconductor device may be used as a fingerprint identification device (or at least a part of a fingerprint identification device). Fingerprint recognition devices can be composed of a large number of optical elements. For example, the aforementioned optical elements may include a light collimator, a beam splitter, a focusing mirror, and a linear sensor.

光準直器的功能在於準直(collimate)光線,以減少因光發散所導致之能量損失。舉例而言,光準直器可被應用於指紋辨識裝置中,以增加指紋辨識裝置的效能。 The function of the light collimator is to collimate light to reduce the energy loss caused by light divergence. For example, an optical collimator can be used in a fingerprint identification device to increase the performance of the fingerprint identification device.

然而,現有之光準直器及其形成方法並非在各方面皆令人滿意。 However, existing light collimators and methods of forming the same are not satisfactory in all respects.

根據本發明一些實施例,提供一種半導體裝置之形成方法。上述方法包括提供基板。上述基板包括複數個畫素。上述方法亦包括形成第一遮光層於上述基板之上、進行第一光 微影製程圖案化上述第一遮光層以於上述第一遮光層中形成複數個第一開口。上述複數個第一開口暴露出上述基板之複數個畫素。上述方法亦包括將第一模板放置於上述第一遮光層之上。上述第一模板具有第一鏤空圖案,且上述第一鏤空圖案暴露出上述複數個畫素。上述方法亦包括提供第一材料。第一材料包括透明材料。上述方法亦包括經由上述第一模板將上述第一材料塗佈於上述基板上以覆蓋上述基板之複數個畫素並填充上述複數個第一開口,使得複數個由上述第一材料所形成之第一透明柱體形成於上述基板之複數個畫素上。上述方法亦包括將上述第一模板自上述第一遮光層移開。 According to some embodiments of the present invention, a method of forming a semiconductor device is provided. The above method includes providing a substrate. The above-mentioned substrate includes a plurality of pixels. The above-mentioned method also includes forming a first light shielding layer on the above-mentioned substrate, performing a first light The first light shielding layer is patterned by a lithography process to form a plurality of first openings in the first light shielding layer. The plurality of first openings expose a plurality of pixels of the substrate. The above method also includes placing a first template on the first light shielding layer. The first template has a first hollow pattern, and the first hollow pattern exposes the plurality of pixels. The above method also includes providing the first material. The first material includes a transparent material. The above-mentioned method also includes applying the above-mentioned first material on the above-mentioned substrate through the above-mentioned first template to cover a plurality of pixels of the above-mentioned substrate and fill the above-mentioned plurality of first openings, so that a plurality of first materials formed by the above-mentioned first material are formed. A transparent column is formed on the plurality of pixels of the substrate. The method also includes removing the first template from the first light shielding layer.

根據本發明一些實施例,提供一種半導體裝置。上述半導體裝置包括基板。上述基板具有複數個畫素。上述半導體裝置亦包括設置於上述基板上之光準直層。上述光準直層包括設置於上述基板上之第一遮光層以及設置於上述基板上之複數個第一透明柱體。上述複數個第一透明柱體覆蓋上述基板之複數個畫素。上述光準直層亦包括設置於上述第一遮光層上之第二遮光層以及設置於上述複數個第一透明柱體上之複數個第二透明柱體。上述複數個第二透明柱體覆蓋上述複數個第一透明柱體。 According to some embodiments of the present invention, a semiconductor device is provided. The above-described semiconductor device includes a substrate. The above-mentioned substrate has a plurality of pixels. The above-mentioned semiconductor device also includes a light-collimation layer disposed on the above-mentioned substrate. The light collimation layer includes a first light shielding layer disposed on the substrate and a plurality of first transparent pillars disposed on the substrate. The plurality of first transparent pillars cover the plurality of pixels of the substrate. The light-collimating layer also includes a second light-shielding layer disposed on the first light-shielding layer and a plurality of second transparent columns disposed on the plurality of first transparent columns. The plurality of second transparent cylinders cover the plurality of first transparent cylinders.

10、10’、20、20’:半導體裝置 10, 10', 20, 20': Semiconductor devices

100:基板 100: Substrate

100T:基板之頂表面 100T: Top surface of substrate

100B:基板之底表面 100B: Bottom surface of substrate

100E:基板之側邊 100E: Side of the substrate

102、102’:遮光層 102, 102': shading layer

102a:開口 102a: Opening

104:模板 104: Templates

104a:開口 104a: Opening

106、106’、206、206’:透明柱體 106, 106', 206, 206': transparent cylinder

108、208:光準直層 108, 208: light collimation layer

110:蓋板 110: Cover

204:模板 204: Template

204a:開口 204a: Opening

207、207’:透明連接特徵 207, 207’: Transparent connection feature

P:畫素 P: pixel

W1、W2、W3、W4:寬度 W1, W2, W3, W4: Width

T1、T2、T3:厚度 T1, T2, T3: Thickness

H1、H2:高度 H1, H2: height

以下將配合所附圖式詳述本發明實施例。應注意的是,各種特徵並未按照比例繪製且僅用以說明例示。事實上,元件的尺寸可能經放大或縮小,以清楚地表現出本發明實施例的技術特徵。 The embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the various features are not drawn to scale and are intended to be illustrative only. In fact, the dimensions of elements may be enlarged or reduced to clearly represent the technical features of the embodiments of the present invention.

第1A、1B、1C、1D、1E、1F以及1G圖為一系列的剖面圖,其根據本發明一些實施例繪示出半導體裝置之形成方法。 Figures 1A, 1B, 1C, 1D, 1E, 1F, and 1G are a series of cross-sectional views illustrating a method of forming a semiconductor device according to some embodiments of the present invention.

第1D’圖根據本發明一些實施例繪示出模板104的上視圖。 FIG. 1D' depicts a top view of template 104 in accordance with some embodiments of the present invention.

第1G’圖根據本發明一些實施例繪示出半導體裝置10的剖面圖。 FIG. 1G' depicts a cross-sectional view of a semiconductor device 10 according to some embodiments of the present invention.

第1G”圖根據本發明一些實施例繪示出半導體裝置10’的剖面圖。 FIG. 1G" depicts a cross-sectional view of a semiconductor device 10' according to some embodiments of the present invention.

第2A、2B、2C、2D、2E、2F以及2G圖為一系列的剖面圖,其根據本發明一些實施例繪示出半導體裝置之形成方法。 Figures 2A, 2B, 2C, 2D, 2E, 2F, and 2G are a series of cross-sectional views illustrating a method of forming a semiconductor device according to some embodiments of the present invention.

第2D’圖根據本發明一些實施例繪示出模板204的上視圖。 Figure 2D' depicts a top view of template 204 in accordance with some embodiments of the present invention.

第2G’圖根據本發明一些實施例繪示出半導體裝置20的剖面圖。 FIG. 2G' depicts a cross-sectional view of the semiconductor device 20 according to some embodiments of the present invention.

第2G”圖根據本發明一些實施例繪示出半導體裝置20’的剖面圖。 FIG. 2G" illustrates a cross-sectional view of a semiconductor device 20' according to some embodiments of the present invention.

以下的揭露內容提供許多不同的實施例或範例以實施本案的不同特徵。以下的揭露內容敘述各個構件及其排列方式的特定範例,以簡化說明。當然,這些特定的範例並非用以限定。例如,若是本發明實施例敘述了一第一特徵形成於一第二特徵之上或上方,即表示其可能包含上述第一特徵與上述 第二特徵是直接接觸的實施例,亦可能包含了有附加特徵形成於上述第一特徵與上述第二特徵之間,而使上述第一特徵與第二特徵可能未直接接觸的實施例。另外,以下所揭露之不同範例可能重複使用相同的參考符號及/或標記。這些重複係為了簡化與清晰的目的,並非用以限定所討論的不同實施例及/或結構之間有特定的關係。 The following disclosure provides many different embodiments or examples for implementing different features of the present invention. The following disclosure describes specific examples of various components and their arrangements to simplify the description. Of course, these specific examples are not intended to be limiting. For example, if the embodiment of the present invention describes that a first feature is formed on or above a second feature, it means that it may include the above-mentioned first feature and the above-mentioned Embodiments in which the second feature is in direct contact may also include embodiments in which additional features are formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the different examples disclosed below may reuse the same reference symbols and/or labels. These repetitions are for the purpose of simplicity and clarity and are not intended to limit the specific relationship between the various embodiments and/or structures discussed.

後文將說明本發明之各種實施例。類似的標號可被用來表示類似的元件。應可理解的是,額外的操作步驟可實施於所述方法之前、之間或之後,且在所述方法的其他實施例中,部分的操作步驟可被取代或省略。 Various embodiments of the present invention will be described hereinafter. Similar reference numerals may be used to refer to similar elements. It should be understood that additional operational steps may be performed before, during, or after the method, and in other embodiments of the method, some operational steps may be substituted or omitted.

除非另外定義,在此使用的全部用語(包括技術及科學用語)具有與此篇揭露所屬之一般技藝者所通常理解的相同涵義。能理解的是,這些用語,例如在通常使用的字典中定義的用語,應被解讀成具有與相關技術及本發明的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在本發明實施例有特別定義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It is to be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted to have a meaning consistent with the relevant art and the context or context of the invention and not in an idealized or overly formal manner Interpretation, unless specifically defined in the embodiments of the present invention.

[第一實施例] [First Embodiment]

本實施例之半導體裝置之形成方法係先於基板上形成遮光層並於遮光層中形成複數個開口,然後使用模板印刷製程(stencil printing process)將透明材料設置於基板上以形成複數個透明柱體。上述遮光層以及透明柱體可作為半導體裝置(例如:指紋辨識裝置)的光準直層。由於上述模板印刷製程之成本較低,因此可降低光準直層及包括上述光準直層之半導體裝置的生產成本。 In the method for forming the semiconductor device of this embodiment, a light shielding layer is formed on a substrate and a plurality of openings are formed in the light shielding layer, and then a stencil printing process is used to dispose a transparent material on the substrate to form a plurality of transparent pillars body. The above-mentioned light shielding layer and transparent cylinder can be used as a light collimation layer of a semiconductor device (eg, a fingerprint identification device). Since the cost of the above-mentioned stencil printing process is relatively low, the production cost of the light-collimation layer and the semiconductor device including the above-mentioned light-collimation layer can be reduced.

第1A圖繪示出本實施例之半導體裝置之形成方法的起始步驟。如第1A圖所示,提供基板100。基板100可具有頂表面100T以及相對於頂表面100T的底表面100B,且基板100之側邊100E可位於頂表面100T以及底表面100B之間。 FIG. 1A illustrates the initial steps of the method for forming the semiconductor device of the present embodiment. As shown in FIG. 1A, a substrate 100 is provided. The substrate 100 may have a top surface 100T and a bottom surface 100B opposite to the top surface 100T, and the side 100E of the substrate 100 may be located between the top surface 100T and the bottom surface 100B.

在一些實施例中,基板100可由元素半導體(例如:矽或鍺)、化合物半導體(例如:碳化矽(SiC)、砷化鎵(GaAs)、砷化銦(InAs)或磷化銦(InP))、合金半導體(例如:SiGe、SiGeC、GaAsP或GaInP)、其他適當之半導體或上述之組合所形成。在一些實施例中,基板100可為絕緣層上半導體基板(semiconductor-on-insulator(SOI)substrate)。上述絕緣層上半導體基板可包括底板、設置於上述底板上的埋藏氧化層以及設置於上述埋藏氧化層上的半導體層。在一些實施例中,基板100可為一半導體晶圓(例如:矽晶圓或其他適當之半導體晶圓)。 In some embodiments, the substrate 100 may be made of elemental semiconductors (eg, silicon or germanium), compound semiconductors (eg, silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), or indium phosphide (InP)) ), alloy semiconductors (for example: SiGe, SiGeC, GaAsP or GaInP), other suitable semiconductors or a combination of the above. In some embodiments, the substrate 100 may be a semiconductor-on-insulator (SOI) substrate. The semiconductor-on-insulator substrate may include a bottom plate, a buried oxide layer disposed on the bottom plate, and a semiconductor layer disposed on the buried oxide layer. In some embodiments, the substrate 100 may be a semiconductor wafer (eg, a silicon wafer or other suitable semiconductor wafer).

在一些實施例中,基板100可包括各種以如離子佈植及/或擴散製程所形成之p型摻雜區及/或n型摻雜區。舉例而言,上述摻雜區可被配置來形成電晶體、光電二極體及/或發光二極體,但本發明實施例並非以此為限。 In some embodiments, the substrate 100 may include various p-type doped regions and/or n-type doped regions formed by processes such as ion implantation and/or diffusion. For example, the above-mentioned doped regions may be configured to form transistors, photodiodes and/or light emitting diodes, but the embodiments of the present invention are not limited thereto.

在一些實施例中,基板100可包括各種隔離特徵,以分隔基板100中不同之裝置區域。舉例而言,隔離特徵可包括淺溝槽隔離(shallow trench isolation,簡稱STI)特徵,但本發明實施例並非以此為限。在一些實施例中,形成淺溝槽隔離之步驟可包括於基板100中蝕刻出一溝槽,並於上述溝槽中填入絕緣材料(例如:氧化矽、氮化矽、或氮氧化矽)。所填充的溝槽可具有多層結構(例如:一熱氧化襯層以及填充於溝槽之氮化 矽)。可進行化學機械研磨(Chemical mechanical polishing,簡稱CMP)製程以研磨掉多餘的絕緣材料並平坦化隔離特徵之上表面。 In some embodiments, the substrate 100 may include various isolation features to separate different device regions in the substrate 100 . For example, the isolation features may include shallow trench isolation (STI) features, but the embodiments of the present invention are not limited thereto. In some embodiments, the step of forming the shallow trench isolation may include etching a trench in the substrate 100 and filling the trench with an insulating material (eg, silicon oxide, silicon nitride, or silicon oxynitride). . The filled trenches can have a multi-layered structure (eg: a thermal oxide liner and nitridation filling the trenches) silicon). A chemical mechanical polishing (CMP) process may be performed to polish away excess insulating material and planarize the upper surface of the isolation features.

在一些實施例中,基板100可包括各種導電特徵(例如:導線(line)或導孔(via))。舉例而言,上述導電特徵可由鋁(Al)、銅(Cu)、鎢(W)、其各自之合金、其他適當之導電材料或上述之組合所形成。 In some embodiments, the substrate 100 may include various conductive features (eg, lines or vias). For example, the conductive features described above may be formed of aluminum (Al), copper (Cu), tungsten (W), alloys of each thereof, other suitable conductive materials, or a combination thereof.

請繼續參照第1A圖,在一些實施例中,基板100可包括複數個畫素P。在一些實施例中,畫素P可將所接收到的光訊號轉換成電流訊號。在一些實施例中,基板100之複數個畫素P可排列成一陣列,但本發明實施例並非以此為限。舉例而言,在一些實施例中,基板100之一個畫素P可包括或對應至少一光電二極體及/或其他適當之元件,但本發明實施例並非以此為限。如第1A圖所示,畫素P可具有寬度W1。舉例而言,寬度W1可為2至200微米,但本發明實施例並非以此為限。 Please continue to refer to FIG. 1A , in some embodiments, the substrate 100 may include a plurality of pixels P. In some embodiments, the pixel P can convert the received optical signal into a current signal. In some embodiments, the plurality of pixels P of the substrate 100 may be arranged in an array, but the embodiments of the present invention are not limited thereto. For example, in some embodiments, one pixel P of the substrate 100 may include or correspond to at least one photodiode and/or other appropriate elements, but the embodiments of the present invention are not limited thereto. As shown in FIG. 1A, a pixel P may have a width W1. For example, the width W1 may be 2 to 200 μm, but the embodiment of the present invention is not limited thereto.

接著,如第1B圖所示,形成遮光層102於基板100之頂表面100T之上。遮光層102可由遮光材料所形成。舉例而言,遮光材料可包括光阻(例如:黑光阻或其他適當之非透明的光阻)、油墨(例如:黑色油墨或其他適當之非透明的油墨)、模制化合物(molding compound,例如:黑色模制化合物或其他適當之非透明的模制化合物)、防焊材料(solder mask,例如:黑色防焊材料或其他適當之非透明的防焊材料)、環氧樹脂黑色高分子材料、其他適當之材料或上述之組合。在一些實施例中,遮光層102可包括光固化材料、熱固化材料或上述之組合。 Next, as shown in FIG. 1B , a light shielding layer 102 is formed on the top surface 100T of the substrate 100 . The light shielding layer 102 may be formed of a light shielding material. For example, the light-shielding material may include photoresist (eg, black photoresist or other suitable non-transparent photoresist), ink (eg, black ink or other suitable non-transparent ink), molding compounds such as : black molding compound or other suitable non-transparent molding compound), solder mask (solder mask, such as: black solder mask or other suitable non-transparent solder mask), epoxy resin black polymer material, Other suitable materials or a combination of the above. In some embodiments, the light shielding layer 102 may include a photocurable material, a thermally curable material, or a combination thereof.

如第1B圖所示,遮光層102可具有厚度T1。舉例而言,厚度T1可為2微米至150微米(例如:5微米至100微米),但本發明實施例並非以此為限。 As shown in FIG. 1B, the light shielding layer 102 may have a thickness T1. For example, the thickness T1 may be 2 μm to 150 μm (eg, 5 μm to 100 μm), but the embodiment of the present invention is not limited thereto.

接著,如第1C圖所示,圖案化遮光層102,以於遮光層102中形成複數個開口102a。在一些實施例中,開口102a係對應於畫素P。換句話說,在此些實施例中,開口102a可暴露出所對應之畫素P之至少一部分。如第1C圖所示,開口102a可具有寬度W2。舉例而言,寬度W2可為2至200微米,但本發明實施例並非以此為限。 Next, as shown in FIG. 1C , the light shielding layer 102 is patterned to form a plurality of openings 102 a in the light shielding layer 102 . In some embodiments, opening 102a corresponds to pixel P. In other words, in these embodiments, the opening 102a may expose at least a part of the corresponding pixel P. As shown in FIG. 1C, the opening 102a may have a width W2. For example, the width W2 may be 2 to 200 μm, but the embodiment of the present invention is not limited thereto.

在一些實施例中,如第1C圖所示,開口102a之寬度W2可大抵上相同於畫素P之寬度W1。換句話說,在此些實施例中,開口102a之側壁可與其所對應之畫素P之側壁對齊。在一些其他的實施例中,開口102a之寬度W2大於畫素P之寬度W1。 In some embodiments, as shown in FIG. 1C , the width W2 of the opening 102 a may be substantially the same as the width W1 of the pixel P. In other words, in these embodiments, the sidewalls of the openings 102a can be aligned with the sidewalls of the corresponding pixels P. In some other embodiments, the width W2 of the opening 102a is greater than the width W1 of the pixel P.

在一些實施例中,由於基板100之複數個畫素P係排列成一陣列,因此對應於畫素P之複數個開口102a亦排列成陣列。可視設計需求使開口102a具有任何適當的形狀。舉例而言,在一些實施例中,於上視圖中,開口102a可為矩形、圓形、橢圓形、長圓形、六角形、不規則形、其他適當之形狀或上述之組合。 In some embodiments, since the plurality of pixels P of the substrate 100 are arranged in an array, the plurality of openings 102a corresponding to the pixels P are also arranged in an array. The opening 102a may have any suitable shape depending on design requirements. For example, in some embodiments, in the top view, the opening 102a can be rectangular, circular, oval, oblong, hexagonal, irregular, other suitable shapes, or a combination thereof.

在一些實施例中,形成複數個開口102a之圖案化製程可包括光微影製程。舉例而言,光微影製程可包括光罩對準(mask aligning)、曝光(exposure)、曝光後烘烤(post-exposure baking)、顯影(developing photoresist)、其他適當的製程或上 述之組合。 In some embodiments, the patterning process for forming the plurality of openings 102a may include a photolithography process. For example, the photolithography process may include mask aligning, exposure, post-exposure baking, developing photoresist, other suitable processes or combination of the above.

接著,如第1D圖所示,將模板104放置於基板100之頂表面100T以及遮光層102之上。在一些實施例中,模板104可具有複數個對應於基板100之畫素P的開口104a。換句話說,在此些實施例中,在將模板104放置於基板100之頂表面100T以及遮光層102之上的步驟之後,開口104a可暴露出所對應之畫素P之至少一部分。在一些實施例中,如第1D圖所示,在將模板104放置於基板100之頂表面100T以及遮光層102之上的步驟之後,開口104a與開口102a連通。 Next, as shown in FIG. 1D , the template 104 is placed on the top surface 100T of the substrate 100 and the light shielding layer 102 . In some embodiments, the template 104 may have a plurality of openings 104 a corresponding to the pixels P of the substrate 100 . In other words, in these embodiments, after the step of placing the template 104 on the top surface 100T of the substrate 100 and the light shielding layer 102 , the openings 104 a may expose at least a portion of the corresponding pixels P. In some embodiments, as shown in FIG. 1D, after the step of placing the template 104 on the top surface 100T of the substrate 100 and the light shielding layer 102, the opening 104a communicates with the opening 102a.

如第1D圖所示,模板104可具有厚度T2,開口104a可具有寬度W3。舉例而言,厚度T2可為20至200微米,但本發明實施例並非以此為限。舉例而言,寬度W3可為2至200微米,但本發明實施例並非以此為限。 As shown in FIG. 1D, the template 104 may have a thickness T2, and the opening 104a may have a width W3. For example, the thickness T2 may be 20 to 200 μm, but the embodiment of the present invention is not limited thereto. For example, the width W3 may be 2 to 200 μm, but the embodiment of the present invention is not limited thereto.

在一些實施例中,如第1D圖所示,開口104a之寬度W3可大抵上相同於畫素P之寬度W1。換句話說,在此些實施例中,開口104a之側壁可與其所對應之畫素P之側壁對齊。在一些其他的實施例中,開口104a之寬度W3大於畫素P之寬度W1。在一些實施例中,如第1D圖所示,開口104a之寬度W3可大抵上相同於開口102a之寬度W2。換句話說,在此些實施例中,開口104a之側壁可與其所對應之開口102a之側壁對齊。在一些其他的實施例中,開口104a之寬度W3大於開口102a之寬度W2。 In some embodiments, as shown in FIG. 1D , the width W3 of the opening 104a may be substantially the same as the width W1 of the pixel P. In other words, in these embodiments, the sidewall of the opening 104a can be aligned with the sidewall of the corresponding pixel P. In some other embodiments, the width W3 of the opening 104a is greater than the width W1 of the pixel P. In some embodiments, as shown in FIG. 1D, the width W3 of the opening 104a may be substantially the same as the width W2 of the opening 102a. In other words, in these embodiments, the sidewalls of the openings 104a may be aligned with the sidewalls of the corresponding openings 102a. In some other embodiments, the width W3 of the opening 104a is greater than the width W2 of the opening 102a.

接著,請參照第1D’圖,其繪示出模板104之上視圖。在一些實施例中,如第1D’圖所示,模板104之開口104a於 模板104中形成了鏤空圖案。於後續的步驟中,可經由模板104之鏤空圖案將一材料(例如:透明材料)設置於基板100之頂表面100T之上,使得基板100之頂表面100T上之上述材料具有對應於模板104之鏤空圖案的圖案,於後文將對此詳細說明。 Next, please refer to FIG. 1D', which shows a top view of the template 104. In some embodiments, as shown in FIG. 1D', the opening 104a of the template 104 is A cutout pattern is formed in the template 104 . In the subsequent steps, a material (eg, a transparent material) may be disposed on the top surface 100T of the substrate 100 through the hollow pattern of the template 104 , so that the above-mentioned material on the top surface 100T of the substrate 100 has a pattern corresponding to that of the template 104 . The pattern of the hollow pattern will be explained in detail later.

在一些實施例中,由於基板100之複數個畫素P係排列成一陣列,因此對應於畫素P之複數個開口104a亦排列成陣列。應理解的是,雖然於第1D’圖所繪示的實施例中開口104a係排列成3x3的陣列,但本發明實施例並非以此為限。在一些其他的實施例中,可視設計需求使開口104a所排列成之陣列具有其他適當數量之欄與列。 In some embodiments, since the plurality of pixels P of the substrate 100 are arranged in an array, the plurality of openings 104a corresponding to the pixels P are also arranged in an array. It should be understood that, although the openings 104a are arranged in a 3×3 array in the embodiment shown in FIG. 1D', the embodiment of the present invention is not limited thereto. In some other embodiments, the array in which the openings 104a are arranged may have other suitable numbers of columns and columns depending on design requirements.

在一些實施例中,如第1D’圖所示,開口104a可大抵上為矩形,但本發明實施例並非以此為限。在一些其他的實施例中,亦可視設計需求使開口104a為圓形、橢圓形、長圓形、六角形、不規則形、其他適當之形狀或上述之組合。 In some embodiments, as shown in FIG. 1D', the opening 104a may be substantially rectangular, but the embodiment of the present invention is not limited thereto. In some other embodiments, the opening 104a may be circular, oval, oval, hexagonal, irregular, other suitable shapes, or a combination thereof according to design requirements.

舉例而言,模板104可由鋼鐵形所成,但本發明實施例並非以此為限。舉例而言,可使用如機械鑽孔之方式於模板104中形成開口104a,但本發明實施例並非以此為限。 For example, the template 104 may be formed of steel, but the embodiment of the present invention is not limited thereto. For example, the opening 104a may be formed in the template 104 by means of mechanical drilling, but the embodiment of the present invention is not limited thereto.

接著,如第1E圖所示,形成複數個透明柱體106於基板100之上。在一些實施例中,如第1E圖所示,透明柱體106設置於開口102a以及開口104a中並覆蓋基板100之畫素P。透明柱體106可由第一材料所形成。在一些實施例中,第一材料可包括透明材料(例如:透明光阻、聚亞醯胺、其他適當之材料或上述之組合)。在一些實施例中,第一材料可包括光固化材料、熱固化材料或上述之組合。在一些實施例中,第一材料可具有 如膠體之流動性。 Next, as shown in FIG. 1E , a plurality of transparent pillars 106 are formed on the substrate 100 . In some embodiments, as shown in FIG. 1E , the transparent pillars 106 are disposed in the openings 102 a and 104 a and cover the pixels P of the substrate 100 . The transparent pillars 106 may be formed of a first material. In some embodiments, the first material may include a transparent material (eg, transparent photoresist, polyimide, other suitable materials, or a combination thereof). In some embodiments, the first material may include a photocurable material, a thermally curable material, or a combination thereof. In some embodiments, the first material may have Such as the fluidity of colloids.

在一些實施例中,可使用模板104進行模板印刷製程將第一材料塗佈(或印刷)於基板100之頂表面100T之上。在一些實施例中,於上述模板印刷製程中,先將第一材料設置於模板104之上,然後於模板104之頂表面之上沿著平行於基板100之頂表面100T之方向移動一刮刀或滾輪(未繪示於圖中),並以上述刮刀或滾輪對第一材料施加適當之壓力,使得第一材料從模板104之頂表面被擠壓進入開口104a及開口102a。在一些實施例中,由於第一材料係經由模板104之鏤空圖案設置於基板100之頂表面100T之上,因此此些透明柱體106可具有對應於模板104之鏤空圖案的圖案。在一些實施例中,此些透明柱體106的圖案大抵上相同於模板104之鏤空圖案。 In some embodiments, a stencil printing process may be performed using the stencil 104 to coat (or print) the first material on the top surface 100T of the substrate 100 . In some embodiments, in the above-mentioned stencil printing process, the first material is firstly disposed on the stencil 104 , and then a squeegee or a squeegee is moved on the top surface of the stencil 104 in a direction parallel to the top surface 100T of the substrate 100 . A roller (not shown in the figure), and the above-mentioned scraper or roller applies appropriate pressure to the first material, so that the first material is squeezed from the top surface of the template 104 into the openings 104a and 102a. In some embodiments, since the first material is disposed on the top surface 100T of the substrate 100 through the hollow pattern of the template 104 , the transparent pillars 106 may have a pattern corresponding to the hollow pattern of the template 104 . In some embodiments, the pattern of the transparent pillars 106 is substantially the same as the hollow pattern of the template 104 .

在一些實施例中,由於在使用模板104進行模板印刷製程將第一材料塗佈(或印刷)於基板100之頂表面100T之上的步驟之前先形成遮光層102以及暴露出畫素P之開口102a,因此可使由第一材料所形成之透明柱體106被精準地設置在畫素P的上方,而可增進光準直層(亦即,後文所述之光準直層108)之準直功能。 In some embodiments, the light shielding layer 102 and the opening for exposing the pixels P are formed before the step of coating (or printing) the first material on the top surface 100T of the substrate 100 using the stencil 104 in the stencil printing process. 102a, so that the transparent pillars 106 formed of the first material can be accurately arranged above the pixels P, and the light collimation layer (ie, the light collimation layer 108 described later) can be improved. Collimation function.

接著,如第1F圖所示,將模板104自基板100及遮光層102移開。在一些實施例中,可在將模板104自基板100及遮光層102移開的步驟之後進行固化製程以固化透明柱體106之第一材料。舉例而言,上述固化製程可為光固化製程、熱固化製程或上述組合。 Next, as shown in FIG. 1F , the template 104 is removed from the substrate 100 and the light shielding layer 102 . In some embodiments, a curing process may be performed to cure the first material of the transparent pillars 106 after the step of removing the template 104 from the substrate 100 and the light shielding layer 102 . For example, the above-mentioned curing process may be a photo-curing process, a thermal-curing process, or a combination thereof.

在一些實施例中,如第1F圖所示,透明柱體106以 及遮光層102可共同充當半導體裝置之光準直層108。在一些實施例中,光準直層108之遮光層102以及透明柱體106可交錯設置。 In some embodiments, as shown in FIG. 1F, the transparent cylinder 106 is and the light shielding layer 102 together can serve as the light collimation layer 108 of the semiconductor device. In some embodiments, the light-shielding layers 102 of the light-collimating layer 108 and the transparent pillars 106 may be staggered.

在一些實施例中,光準直層108之遮光層102為黑色(例如:遮光層102由黑光阻、黑色油墨、黑色模制化合物或黑色防焊材料所形成),因此可增進光準直層108之準直功能。 In some embodiments, the light-shielding layer 102 of the light-collimating layer 108 is black (eg, the light-shielding layer 102 is formed of black photoresist, black ink, black mold compound, or black solder mask material), thus improving the light-collimation layer 108 collimation function.

舉例而言,在一些實施例中,可在光準直層108上設置如發光二極體之光源(未繪示於圖中)、阻擋層(未繪示於圖中)、其他適當之元件或上述之組合,並於此些光學元件上設置蓋板110(例如:玻璃蓋板)以形成如指紋辨識裝置之半導體裝置10(如第1G圖所示)。 For example, in some embodiments, a light source such as a light emitting diode (not shown in the figure), a blocking layer (not shown in the figure), and other suitable elements may be disposed on the light-collimating layer 108 Or a combination of the above, and a cover plate 110 (eg, a glass cover plate) is disposed on these optical elements to form a semiconductor device 10 such as a fingerprint identification device (as shown in FIG. 1G ).

在一些實施例中,可重複第1B至1F圖所述之步驟(例如:重複兩次、三次、或其他任何適當之次數),使半導體裝置10之光準直層108包括更多遮光層及透明柱體,以增進光準直層108之準直功能。舉例而言,如第1G’圖所示,在一些實施例中,可重複第1B至1F圖所述之步驟於遮光層102上形成相同或類似於遮光層102的遮光層102’,並於透明柱體106上形成相同或類似於透明柱體106的透明柱體106’。在一些實施例中,可重複任何適當次數之1B至1F圖所述之步驟以提高畫素P上之透明柱體之高度總和與畫素P之寬度的比值(例如:H1/W1),藉此可增進光準直層108之準直功能。在一些實施例中,畫素P上之透明柱體之高度總和與畫素P之寬度的比值(例如:H1/W1)可為2至30(例如:10至30)。 In some embodiments, the steps described in FIGS. 1B to 1F may be repeated (eg, repeated twice, three times, or any other appropriate number of times), so that the light-collimating layer 108 of the semiconductor device 10 includes more light-shielding layers and The transparent cylinder is used to improve the collimation function of the light collimation layer 108 . For example, as shown in FIG. 1G′, in some embodiments, the steps described in FIGS. 1B to 1F may be repeated to form a light-shielding layer 102 ′ that is the same or similar to the light-shielding layer 102 on the light-shielding layer 102 , and A transparent cylinder 106 ′ which is the same as or similar to the transparent cylinder 106 is formed on the transparent cylinder 106 . In some embodiments, the steps described in Figures 1B to 1F may be repeated any appropriate number of times to increase the ratio of the sum of the heights of the transparent cylinders on the pixel P to the width of the pixel P (eg, H1/W1 ), by This can enhance the collimation function of the light collimation layer 108 . In some embodiments, the ratio of the sum of the heights of the transparent cylinders on the pixel P to the width of the pixel P (eg, H1/W1 ) may be 2 to 30 (eg, 10 to 30).

在一些實施例中,如第1G’圖所示,透明柱體106 的頂表面高於遮光層102的頂表面。在一些實施例中,如第1G’圖所示,透明柱體106’的頂表面高於遮光層102’的頂表面。 In some embodiments, as shown in Figure 1G', the transparent cylinder 106 The top surface of the light shielding layer 102 is higher than the top surface of the light shielding layer 102 . In some embodiments, as shown in FIG. 1G', the top surface of the transparent cylinder 106' is higher than the top surface of the light shielding layer 102'.

在一些實施例中,遮光層102’可直接接觸遮光層102。在一些實施例中,遮光層102與遮光層102’可由相同的材料所形成,但本發明實施例並非以此為限。在一些其他的實施例中,遮光層102與遮光層102’可由不同的材料所形成。 In some embodiments, the light shielding layer 102' may directly contact the light shielding layer 102. In some embodiments, the light shielding layer 102 and the light shielding layer 102' may be formed of the same material, but the embodiments of the present invention are not limited thereto. In some other embodiments, the light shielding layer 102 and the light shielding layer 102' may be formed of different materials.

在一些實施例中,透明柱體106’可直接接觸透明柱體106。在一些實施例中,透明柱體106與透明柱體106’可由相同的材料所形成,但本發明實施例並非以此為限。在一些其他的實施例中,透明柱體106與透明柱體106’可由不同的材料所形成。 In some embodiments, the transparent cylinder 106' may directly contact the transparent cylinder 106. In some embodiments, the transparent cylinder 106 and the transparent cylinder 106' may be formed of the same material, but the embodiment of the present invention is not limited thereto. In some other embodiments, the transparent pillars 106 and the transparent pillars 106' may be formed of different materials.

綜合上述,本實施例之半導體裝置之形成方法係先於基板上形成遮光層並於遮光層中形成複數個開口,然後使用模板印刷製程將透明材料設置於基板上以形成複數個透明柱體。上述遮光層以及透明柱體可作為半導體裝置(例如:指紋辨識裝置)的光準直層。由於上述模板印刷製程之成本較低,因此可降低光準直層及包括上述光準直層之半導體裝置的生產成本。此外,在一些實施例中,經由在形成透明柱體的步驟之前先形成遮光層並在遮光層中形成複述個暴露出基板之畫素的開口,而可將透明柱體精準地設置在基板之畫素的上方,藉此可增進所形成之光準直層之準直功能。 To sum up the above, the method for forming a semiconductor device of this embodiment is to form a light shielding layer on a substrate and form a plurality of openings in the light shielding layer, and then use a stencil printing process to dispose a transparent material on the substrate to form a plurality of transparent pillars. The above-mentioned light shielding layer and transparent cylinder can be used as a light collimation layer of a semiconductor device (eg, a fingerprint identification device). Since the cost of the above-mentioned stencil printing process is relatively low, the production cost of the light-collimation layer and the semiconductor device including the above-mentioned light-collimation layer can be reduced. In addition, in some embodiments, by forming a light shielding layer before the step of forming the transparent column, and forming a plurality of openings in the light shielding layer to expose the pixels of the substrate, the transparent column can be accurately arranged on the substrate. Above the pixels, the collimation function of the formed light collimation layer can be improved.

第1G”圖係繪示出本實施例之半導體裝置10的一些變化例。應注意的是,除非特別說明,此些變化例與前述實施例之相同或類似之元件將以相同的元件符號表示,且其形成 方法亦可相同或類似於前述實施例之形成方法。 FIG. 1G" shows some variations of the semiconductor device 10 of the present embodiment. It should be noted that, unless otherwise specified, the same or similar elements of these variations and the aforementioned embodiments will be denoted by the same reference numerals , and it forms The method may also be the same or similar to the formation method of the previous embodiment.

如第1G”圖所示,半導體裝置10’與半導體裝置10的其中一個差異在於透明柱體的頂表面與遮光層的頂表面齊平。舉例而言,在一些實施例中,可在形成透明柱體106之後進行平坦化製程平坦化透明柱體106,使得透明柱體106之頂表面與遮光層102之頂表面具有大抵上相同之水平。換句話說,在此些實施例中,透明柱體106之頂表面可與遮光層102之頂表面共平面。類似地,在一些實施例中,可在形成透明柱體106’之後進行平坦化製程平坦化透明柱體106’,使得透明柱體106’之頂表面與遮光層102’之頂表面具有大抵上相同之水平。換句話說,在此些實施例中,形成透明柱體106’之頂表面可與遮光層102’之頂表面共平面。舉例而言,上述平坦化製程可包括研磨製程、化學機械研磨製程、回蝕刻製程、其他適當之製程或上述之組合。 As shown in FIG. 1G", one of the differences between the semiconductor device 10' and the semiconductor device 10 is that the top surface of the transparent pillar is flush with the top surface of the light shielding layer. For example, in some embodiments, the transparent After the pillars 106, a planarization process is performed to planarize the transparent pillars 106, so that the top surfaces of the transparent pillars 106 and the top surface of the light shielding layer 102 have substantially the same level. In other words, in these embodiments, the transparent pillars The top surface of the body 106 may be coplanar with the top surface of the light shielding layer 102. Similarly, in some embodiments, a planarization process may be performed after forming the transparent pillars 106' to planarize the transparent pillars 106' such that the transparent pillars 106' The top surface of 106' and the top surface of light shielding layer 102' have substantially the same level. In other words, in these embodiments, the top surface forming transparent pillars 106' may be co-located with the top surface of light shielding layer 102'. For example, the above-mentioned planarization process may include a polishing process, a chemical mechanical polishing process, an etch-back process, other suitable processes, or a combination thereof.

[第二實施例] [Second Embodiment]

第二實施例與第一實施例之其中一個差異在於第二實施例之半導體裝置之形成方法係使用僅具有單一開口之模板將第一材料設置於基板之上。 One of the differences between the second embodiment and the first embodiment is that the method for forming the semiconductor device of the second embodiment uses a template having only a single opening to dispose the first material on the substrate.

應注意的是,除非特別說明,本實施例與前述實施例之相同或類似之元件將以相同的元件符號表示,且其形成方法亦可相同或類似於前述實施例之形成方法。 It should be noted that, unless otherwise specified, the same or similar elements in this embodiment and the previous embodiments will be denoted by the same reference numerals, and the forming methods thereof may also be the same or similar to those in the previous embodiments.

首先,如第2A圖所示,提供基板100。接著,如第2B、2C圖所示,於基板100上形成遮光層102並於遮光層102中形成複數個開口102a以暴露出基板100之畫素P。應理解的是, 第2A至2C圖所繪示之步驟係相同或類似於第1A至1C圖所繪示之步驟,為了簡明起見,於此將不再贅述。 First, as shown in FIG. 2A, the substrate 100 is provided. Next, as shown in FIGS. 2B and 2C , a light shielding layer 102 is formed on the substrate 100 and a plurality of openings 102 a are formed in the light shielding layer 102 to expose the pixels P of the substrate 100 . It should be understood that, The steps shown in FIGS. 2A to 2C are the same as or similar to the steps shown in FIGS. 1A to 1C, and for the sake of brevity, they will not be repeated here.

接著,如第2D圖所示,將模板204放置於基板100之頂表面100T以及遮光層102之上。在一些實施例中,模板204可僅具有單一開口204a。在一些實施例中,開口204a對應多個畫素P。換句話說,在此些實施例中,在將模板204放置於基板100之頂表面100T以及遮光層102之上的步驟之後,開口204a可暴露出所對應之多個畫素P。在一些實施例中,如第2D圖所示,在將模板204放置於基板100之頂表面100T以及遮光層102之上的步驟之後,開口204a與多個開口102a連通。 Next, as shown in FIG. 2D , the template 204 is placed on the top surface 100T of the substrate 100 and the light shielding layer 102 . In some embodiments, the template 204 may have only a single opening 204a. In some embodiments, the opening 204a corresponds to a plurality of pixels P. In other words, in these embodiments, after the step of placing the template 204 on the top surface 100T of the substrate 100 and the light shielding layer 102 , the openings 204 a may expose the corresponding plurality of pixels P. In some embodiments, as shown in FIG. 2D, after the step of placing the template 204 on the top surface 100T of the substrate 100 and the light shielding layer 102, the opening 204a communicates with the plurality of openings 102a.

如第2D圖所示,模板204可具有厚度T3,開口204a可具有寬度W4。舉例而言,厚度T3可為10至100微米,但本發明實施例並非以此為限。舉例而言,寬度W4可為50至550釐米,但本發明實施例並非以此為限。 As shown in FIG. 2D, the template 204 may have a thickness T3, and the opening 204a may have a width W4. For example, the thickness T3 may be 10 to 100 μm, but the embodiment of the present invention is not limited thereto. For example, the width W4 may be 50 to 550 cm, but the embodiment of the present invention is not limited thereto.

在一些實施例中,如第2D圖所示,開口204a之寬度W4大於畫素P之寬度W1。在一些實施例中,如第2D圖所示,開口204a之寬度W4大於開口102a之寬度W2。 In some embodiments, as shown in FIG. 2D, the width W4 of the opening 204a is greater than the width W1 of the pixel P. In some embodiments, as shown in FIG. 2D, the width W4 of the opening 204a is greater than the width W2 of the opening 102a.

接著,請參照第2D’圖,其繪示出模板204之上視圖。在一些實施例中,如第2D’圖所示,模板204之開口204a於模板204中形成了鏤空圖案。於後續的步驟中,可經由模板204之鏤空圖案將前述第一實施例之第一材料設置於基板100之頂表面100T之上,使得基板100之頂表面100T上之第一材料具有對應於模板204之鏤空圖案的圖案,於後文將對此詳細說明。 Next, please refer to FIG. 2D', which shows a top view of the template 204. In some embodiments, as shown in Figure 2D', the openings 204a of the template 204 form a hollow pattern in the template 204. In the subsequent steps, the first material of the first embodiment can be disposed on the top surface 100T of the substrate 100 through the hollow pattern of the template 204 , so that the first material on the top surface 100T of the substrate 100 has a shape corresponding to the template. The pattern of the hollow pattern of 204 will be described in detail later.

在一些實施例中,如第2D’圖所示,開口204a可大 抵上為圓形,但本發明實施例並非以此為限。在一些其他的實施例中,亦可視設計需求使開口204a為矩形、橢圓形、長圓形、六角形、不規則形、其他適當之形狀或上述之組合。 In some embodiments, as shown in Figure 2D', opening 204a may be large The top is round, but the embodiment of the present invention is not limited to this. In some other embodiments, the opening 204a may be rectangular, oval, oval, hexagonal, irregular, other suitable shapes, or a combination thereof according to design requirements.

舉例而言,模板204可由鋼鐵形所成,但本發明實施例並非以此為限。舉例而言,可使用如機械鑽孔之方式於模板204中形成開口204a,但本發明實施例並非以此為限。 For example, the template 204 may be formed of steel, but the embodiment of the present invention is not limited thereto. For example, the openings 204a may be formed in the template 204 by means of mechanical drilling, but the embodiment of the present invention is not limited thereto.

接著,如第2E圖所示,形成複數個透明柱體206以及透明連接特徵207於基板100之上。在一些實施例中,如第2E圖所示,透明柱體206設置於開口102a中並延伸進入開口204a,且透明柱體206覆蓋基板100之畫素P。在一些實施例中,如第2E圖所示,透明連接特徵207設置於遮光層102之上且可連接透明柱體206。換句話說,在此些實施例中,複數個透明柱體206可經由連接特徵207相互連接。 Next, as shown in FIG. 2E , a plurality of transparent pillars 206 and transparent connecting features 207 are formed on the substrate 100 . In some embodiments, as shown in FIG. 2E , the transparent pillars 206 are disposed in the openings 102 a and extend into the openings 204 a , and the transparent pillars 206 cover the pixels P of the substrate 100 . In some embodiments, as shown in FIG. 2E , the transparent connecting features 207 are disposed on the light shielding layer 102 and can connect to the transparent pillars 206 . In other words, in such embodiments, a plurality of transparent pillars 206 may be connected to each other via connecting features 207 .

透明柱體206以及透明連接特徵207可由第一材料所形成。在一些實施例中,第一材料可包括透明材料(例如:透明光阻、聚亞醯胺、其他適當之材料或上述之組合)。在一些實施例中,第一材料可包括光固化材料、熱固化材料或上述之組合。在一些實施例中,第一材料可具有如膠體之流動性。 Transparent pillars 206 and transparent connecting features 207 may be formed of a first material. In some embodiments, the first material may include a transparent material (eg, transparent photoresist, polyimide, other suitable materials, or a combination thereof). In some embodiments, the first material may include a photocurable material, a thermally curable material, or a combination thereof. In some embodiments, the first material may have fluidity such as a colloid.

在一些實施例中,可使用模板204進行模板印刷製程將第一材料塗佈(或印刷)於基板100之頂表面100T之上。在一些實施例中,於上述模板印刷製程中,先將第一材料設置於模板204之上,然後於模板204之頂表面之上沿著平行於基板100之頂表面100T之方向移動一刮刀或滾輪(未繪示於圖中),並以上述刮刀或滾輪對第一材料施加適當之壓力,使得第一材 料從模板204之頂表面被擠壓進入開口204a及開口102a。在一些實施例中,由於第一材料係經由模板204之鏤空圖案設置於基板100之頂表面100T之上,因此此些透明柱體206及透明連接特徵207可具有對應於模板204之鏤空圖案的圖案。在一些實施例中,此些透明柱體206及透明連接特徵207的圖案大抵上相同於模板204之鏤空圖案。 In some embodiments, a stencil printing process may be performed using the stencil 204 to coat (or print) the first material on the top surface 100T of the substrate 100 . In some embodiments, in the above-mentioned stencil printing process, the first material is first disposed on the stencil 204 , and then a squeegee or a squeegee is moved on the top surface of the stencil 204 in a direction parallel to the top surface 100T of the substrate 100 . A roller (not shown in the figure), and the above-mentioned scraper or roller is used to apply appropriate pressure to the first material, so that the first material The material is extruded from the top surface of template 204 into opening 204a and opening 102a. In some embodiments, since the first material is disposed on the top surface 100T of the substrate 100 through the cutout pattern of the template 204 , the transparent pillars 206 and the transparent connection features 207 may have a pattern corresponding to the cutout pattern of the template 204 . pattern. In some embodiments, the pattern of the transparent pillars 206 and the transparent connecting features 207 is substantially the same as the hollow pattern of the template 204 .

在一些實施例中,由於在使用模板204進行模板印刷製程將第一材料塗佈(或印刷)於基板100之頂表面100T之上的步驟之前先形成遮光層102以及暴露出畫素P之開口102a,因此可使由第一材料所形成之透明柱體206被精準地設置在畫素P的上方,而可增進光準直層(亦即,後文所述之光準直層208)之準直功能。 In some embodiments, the light shielding layer 102 and the opening for exposing the pixels P are formed before the step of coating (or printing) the first material on the top surface 100T of the substrate 100 using the stencil 204 in the stencil printing process. 102a, so that the transparent pillars 206 formed of the first material can be accurately arranged above the pixels P, and the light collimation layer (ie, the light collimation layer 208 described later) can be improved. Collimation function.

接著,如第2F圖所示,將模板204自基板100及遮光層102移開。在一些實施例中,可在將模板204自基板100及遮光層102移開的步驟之後進行固化製程以固化透明柱體206以及透明連接特徵207之第一材料。舉例而言,上述固化製程可為光固化製程、熱固化製程或上述組合。 Next, as shown in FIG. 2F , the template 204 is removed from the substrate 100 and the light shielding layer 102 . In some embodiments, the step of removing the template 204 from the substrate 100 and the light shielding layer 102 may be followed by a curing process to cure the transparent pillars 206 and the first material of the transparent connecting features 207 . For example, the above-mentioned curing process may be a photo-curing process, a thermal-curing process, or a combination thereof.

在一些實施例中,如第2F圖所示,透明柱體206、透明連接特徵207以及遮光層102可共同充當半導體裝置之光準直層208。在一些實施例中,光準直層208之遮光層102以及透明柱體206可交錯設置。 In some embodiments, as shown in FIG. 2F, the transparent pillars 206, the transparent connecting features 207, and the light shielding layer 102 may collectively serve as a light collimation layer 208 for the semiconductor device. In some embodiments, the light-shielding layers 102 and the transparent pillars 206 of the light-collimating layer 208 may be staggered.

在一些實施例中,光準直層208之遮光層102為黑色(例如:遮光層102由黑光阻、黑色油墨、黑色模制化合物或黑色防焊材料所形成),因此可增進光準直層208之準直功能。 In some embodiments, the light-shielding layer 102 of the light-collimation layer 208 is black (eg, the light-shielding layer 102 is formed of black photoresist, black ink, black mold compound, or black solder mask material), thus improving the light-collimation layer 208 collimation function.

舉例而言,在一些實施例中,可在光準直層208上設置如發光二極體之光源(未繪示於圖中)、阻擋層(未繪示於圖中)、其他適當之元件或上述之組合,並於此些光學元件上設置蓋板110(例如:玻璃蓋板)以形成如指紋辨識裝置之半導體裝置20(如第2G圖所示)。 For example, in some embodiments, a light source such as a light emitting diode (not shown in the figure), a blocking layer (not shown in the figure), and other suitable elements may be disposed on the light-collimating layer 208 Or a combination of the above, and a cover plate 110 (eg, a glass cover plate) is disposed on these optical elements to form a semiconductor device 20 such as a fingerprint identification device (as shown in FIG. 2G ).

在一些實施例中,可重複第2B至2F圖所述之步驟(例如:重複兩次、三次、或其他任何適當之次數),使半導體裝置20之光準直層208包括更多遮光層、透明柱體以及透明連接特徵,以增進光準直層208之準直功能。舉例而言,如第2G’圖所示,在一些實施例中,可重複第2B至2F圖所述之步驟於基板100上形成相同或類似於遮光層102的遮光層102’、相同或類似於透明柱體206的透明柱體206’以及相同或類似於透明連接特徵207的透明連接特徵207’。在一些實施例中,可重複任何適當次數之2B至2F圖所述之步驟以提高畫素P上之透明柱體之高度總和與畫素P之寬度的比值(例如:H2/W1),藉此可增進光準直層208之準直功能。在一些實施例中,畫素P上之透明柱體之高度總和與畫素P之寬度的比值(例如:H2/W1)可為2至30(例如:10至30)。 In some embodiments, the steps described in FIGS. 2B to 2F may be repeated (eg, repeated twice, three times, or any other appropriate number of times), so that the light-collimating layer 208 of the semiconductor device 20 includes more light-shielding layers, Transparent pillars and transparent connection features to enhance the collimation function of the light collimation layer 208 . For example, as shown in FIG. 2G ′, in some embodiments, the steps described in FIGS. 2B to 2F may be repeated to form a light shielding layer 102 ′, the same or similar to the light shielding layer 102 on the substrate 100 . Transparent pillar 206 ′ on transparent pillar 206 and transparent connecting feature 207 ′ which is the same or similar to transparent connecting feature 207 . In some embodiments, the steps described in Figures 2B to 2F may be repeated any suitable number of times to increase the ratio of the sum of the heights of the transparent cylinders on the pixel P to the width of the pixel P (eg, H2/W1), by This can enhance the collimation function of the light collimation layer 208 . In some embodiments, the ratio of the sum of the heights of the transparent cylinders on the pixel P to the width of the pixel P (eg, H2/W1) may be 2 to 30 (eg, 10 to 30).

在一些實施例中,如第2G’圖所示,透明柱體206的頂表面高於遮光層102的頂表面。在一些實施例中,如第2G’圖所示,透明柱體206’的頂表面高於遮光層102’的頂表面。 In some embodiments, as shown in FIG. 2G', the top surface of the transparent pillar 206 is higher than the top surface of the light shielding layer 102. In some embodiments, as shown in Figure 2G', the top surface of the transparent cylinder 206' is higher than the top surface of the light shielding layer 102'.

在一些實施例中,遮光層102’與遮光層102之間設置有透明連接特徵207。在一些實施例中,遮光層102與遮光層102’可由相同的材料所形成,但本發明實施例並非以此為限。 在一些其他的實施例中,遮光層102與遮光層102’可由不同的材料所形成。 In some embodiments, transparent connection features 207 are provided between the light shielding layer 102' In some embodiments, the light shielding layer 102 and the light shielding layer 102' may be formed of the same material, but the embodiments of the present invention are not limited thereto. In some other embodiments, the light shielding layer 102 and the light shielding layer 102' may be formed of different materials.

在一些實施例中,透明柱體206’可直接接觸透明柱體206。在一些實施例中,透明柱體206與透明柱體206’可由相同的材料所形成,但本發明實施例並非以此為限。在一些其他的實施例中,透明柱體206與透明柱體206’可由不同的材料所形成。 In some embodiments, the transparent cylinder 206' may directly contact the transparent cylinder 206. In some embodiments, the transparent cylinder 206 and the transparent cylinder 206' may be formed of the same material, but the embodiment of the present invention is not limited thereto. In some other embodiments, the transparent pillars 206 and the transparent pillars 206' may be formed of different materials.

綜合上述,本實施例之半導體裝置之形成方法係先於基板上形成遮光層並於遮光層中形成複數個開口,然後使用模板印刷製程將透明材料設置於基板上以形成複數個透明柱體。上述遮光層以及透明柱體可作為半導體裝置(例如:指紋辨識裝置)的光準直層。由於上述模板印刷製程之成本較低,因此可降低光準直層及包括上述光準直層之半導體裝置的生產成本。此外,在一些實施例中,經由在形成透明柱體的步驟之前先形成遮光層並在遮光層中形成複述個暴露出基板之畫素的開口,而可將透明柱體精準地設置在基板之畫素的上方,藉此可增進所形成之光準直層之準直功能。 To sum up the above, the method for forming a semiconductor device of this embodiment is to form a light shielding layer on a substrate and form a plurality of openings in the light shielding layer, and then use a stencil printing process to dispose a transparent material on the substrate to form a plurality of transparent pillars. The above-mentioned light shielding layer and transparent cylinder can be used as a light collimation layer of a semiconductor device (eg, a fingerprint identification device). Since the cost of the above-mentioned stencil printing process is relatively low, the production cost of the light-collimation layer and the semiconductor device including the above-mentioned light-collimation layer can be reduced. In addition, in some embodiments, by forming a light shielding layer before the step of forming the transparent column, and forming a plurality of openings in the light shielding layer to expose the pixels of the substrate, the transparent column can be accurately arranged on the substrate. Above the pixels, the collimation function of the formed light collimation layer can be improved.

第2G”圖係繪示出本實施例之半導體裝置20的一些變化例。應注意的是,除非特別說明,此些變化例與前述實施例之相同或類似之元件將以相同的元件符號表示,且其形成方法亦可相同或類似於前述實施例之形成方法。 FIG. 2G" shows some variations of the semiconductor device 20 of the present embodiment. It should be noted that, unless otherwise specified, the same or similar elements of these variations and the foregoing embodiments will be denoted by the same reference numerals , and its formation method can be the same or similar to the formation method of the foregoing embodiment.

如第2G”圖所示,半導體裝置20’與半導體裝置20的其中一個差異在於透明柱體的頂表面與遮光層的頂表面齊平。舉例而言,在一些實施例中,可在形成透明柱體206之後 進行平坦化製程平坦化透明柱體206,使得透明柱體206之頂表面與遮光層102之頂表面具有大抵上相同之水平。換句話說,在此些實施例中,透明柱體206之頂表面可與遮光層102之頂表面共平面。在一些實施例中,上述平坦化製程亦移除透明連接特徵207。類似地,在一些實施例中,可在形成透明柱體206’之後進行平坦化製程平坦化透明柱體206’,使得透明柱體206’之頂表面與遮光層102’之頂表面具有大抵上相同之水平。換句話說,在此些實施例中,形成透明柱體206’之頂表面可與遮光層102’之頂表面共平面。在一些實施例中,上述平坦化製程亦移除透明連接特徵207’。 As shown in FIG. 2G", one of the differences between the semiconductor device 20' and the semiconductor device 20 is that the top surface of the transparent pillar is flush with the top surface of the light shielding layer. For example, in some embodiments, the transparent After cylinder 206 A planarization process is performed to planarize the transparent pillars 206 so that the top surfaces of the transparent pillars 206 and the top surfaces of the light shielding layers 102 have substantially the same level. In other words, in such embodiments, the top surfaces of the transparent pillars 206 may be coplanar with the top surfaces of the light shielding layer 102 . In some embodiments, the planarization process described above also removes the transparent connection features 207 . Similarly, in some embodiments, after forming the transparent pillars 206', a planarization process may be performed to planarize the transparent pillars 206', so that the top surfaces of the transparent pillars 206' and the top surface of the light shielding layer 102' have approximately the same thickness. the same level. In other words, in such embodiments, the top surfaces forming the transparent pillars 206' may be coplanar with the top surfaces of the light shielding layer 102'. In some embodiments, the planarization process described above also removes the transparent connection features 207'.

應理解的是,雖然於第2G”圖所繪示的實施例中透明柱體206之頂表面與遮光層102之頂表面齊平且透明柱體206’之頂表面與遮光層102’之頂表面齊平,但本發明實施例並非以此為限。舉例而言,在一些實施例中,透明柱體206之頂表面與遮光層102之頂表面齊平,而透明柱體206’之頂表面則高於遮光層102’之頂表面且透明連接特徵207’未被移除。舉例而言,在一些實施例中,透明柱體206’之頂表面與遮光層102’之頂表面齊平,而透明柱體206之頂表面則高於遮光層102之頂表面且透明連接特徵207未被移除。 It should be understood that although the top surface of the transparent cylinder 206 is flush with the top surface of the light shielding layer 102 and the top surface of the transparent cylinder 206' is flush with the top surface of the light shielding layer 102' The surface is flush, but the embodiments of the present invention are not limited thereto. For example, in some embodiments, the top surface of the transparent column 206 is flush with the top surface of the light shielding layer 102, and the top of the transparent column 206' The surface is then higher than the top surface of the light shielding layer 102' and the transparent connecting features 207' are not removed. For example, in some embodiments, the top surface of the transparent pillars 206' is flush with the top surface of the light shielding layer 102' , while the top surface of the transparent pillar 206 is higher than the top surface of the light shielding layer 102 and the transparent connecting feature 207 is not removed.

應理解的是,在一些實施例中,可經由具有不同鏤空圖案之多個模板形成光準直層的透明柱體。舉例而言,在一些實施例中,可先使用第一實施例之模板104於基板100之畫素P上形成透明柱體106,然後使用第二實施例之模板204於透明柱體106上形成透明柱體206。 It should be understood that, in some embodiments, the transparent pillars of the light-collimating layer may be formed via a plurality of templates having different hollow patterns. For example, in some embodiments, the transparent pillars 106 may be formed on the pixels P of the substrate 100 using the template 104 of the first embodiment, and then the transparent pillars 106 may be formed using the template 204 of the second embodiment. Transparent cylinder 206 .

綜合上述,本發明實施例之半導體裝置之形成方法係先於基板上形成遮光層並於遮光層中形成複數個開口,然後使用模板印刷製程將透明材料設置於基板上以形成複數個透明柱體。上述遮光層以及透明柱體可作為半導體裝置(例如:指紋辨識裝置)的光準直層。由於上述模板印刷製程之成本較低,因此可降低光準直層及包括上述光準直層之半導體裝置的生產成本。此外,在一些實施例中,經由在形成透明柱體的步驟之前先形成遮光層並在遮光層中形成複述個暴露出基板之畫素的開口,而可將透明柱體精準地設置在基板之畫素的上方,藉此可增進所形成之光準直層之準直功能。 To sum up the above, in the method for forming a semiconductor device according to the embodiment of the present invention, a light shielding layer is formed on a substrate and a plurality of openings are formed in the light shielding layer, and then a stencil printing process is used to dispose a transparent material on the substrate to form a plurality of transparent pillars . The above-mentioned light shielding layer and transparent cylinder can be used as a light collimation layer of a semiconductor device (eg, a fingerprint identification device). Since the cost of the above-mentioned stencil printing process is relatively low, the production cost of the light-collimation layer and the semiconductor device including the above-mentioned light-collimation layer can be reduced. In addition, in some embodiments, by forming a light shielding layer before the step of forming the transparent column, and forming a plurality of openings in the light shielding layer to expose the pixels of the substrate, the transparent column can be accurately arranged on the substrate. Above the pixels, the collimation function of the formed light collimation layer can be improved.

前述內文概述了許多實施例的特徵,使本技術領域中具有通常知識者可以從各個方面更佳地了解本發明實施例。本技術領域中具有通常知識者應可理解,且可輕易地以本發明實施例為基礎來設計或修飾其他製程及結構,並以此達到相同的目的及/或達到與在此介紹的實施例等相同之優點。本技術領域中具有通常知識者也應了解這些相等的結構並未背離本發明實施例的發明精神與範圍。在不背離本發明實施例的發明精神與範圍之前提下,可對本發明實施例進行各種改變、置換或修改。 The foregoing context outlines the features of many of the embodiments so that those skilled in the art may better understand the various aspects of the embodiments of the invention. It should be understood by those skilled in the art that other processes and structures can be easily designed or modified based on the embodiments of the present invention to achieve the same purpose and/or to achieve the embodiments described herein. the same advantages. Those skilled in the art should also understand that these equivalent structures do not depart from the spirit and scope of the embodiments of the present invention. Various changes, substitutions or modifications may be made to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention.

此外,本揭露之每一請求項可為個別的實施例,且本揭露之範圍包括本揭露之每一請求項及每一實施例彼此之結合。 Furthermore, each claim of this disclosure may be a separate embodiment, and the scope of this disclosure includes each claim and each embodiment of this disclosure in combination with each other.

100‧‧‧基板 100‧‧‧Substrate

100T‧‧‧基板之頂表面 100T‧‧‧Top surface of substrate

100B‧‧‧基板之底表面 100B‧‧‧Bottom surface of substrate

100E‧‧‧基板之側邊 100E‧‧‧Side of the substrate

102‧‧‧遮光層 102‧‧‧Light shielding layer

102a‧‧‧開口 102a‧‧‧Opening

104‧‧‧模板 104‧‧‧Template

104a‧‧‧開口 104a‧‧‧Opening

T1、T2‧‧‧厚度 T1, T2‧‧‧Thickness

W1、W2、W3‧‧‧寬度 W1, W2, W3‧‧‧Width

P‧‧‧畫素 P‧‧‧Pixel

Claims (6)

一種半導體裝置之形成方法,包括:提供一基板,其中該基板包括複數個畫素;形成一第一遮光層於該基板之上,其中該第一遮光層與該些畫素在該基板的一法線方向上完全交錯;進行一第一光微影製程圖案化該第一遮光層以於該第一遮光層中形成複數個第一開口,其中該些第一開口暴露出該基板之該些畫素;將一第一模板(stencil)放置於該第一遮光層之上,其中該第一模板具有一第一鏤空圖案(openwork pattern),該第一鏤空圖案僅具有一個開口並暴露出該些畫素,且該開口對應至一個以上的該些畫素;提供一第一材料,其中該第一材料包括一透明材料;經由該第一模板將該第一材料塗佈於該基板上以覆蓋該基板之該些畫素並填充該些第一開口,使得複數個由該第一材料所形成之第一透明柱體形成於該基板之該些畫素上;以及將該第一模板自該第一遮光層移開。 A method for forming a semiconductor device, comprising: providing a substrate, wherein the substrate includes a plurality of pixels; forming a first light shielding layer on the substrate, wherein the first light shielding layer and the pixels are on a surface of the substrate The normal direction is completely staggered; a first photolithography process is performed to pattern the first light shielding layer to form a plurality of first openings in the first light shielding layer, wherein the first openings expose the first openings of the substrate pixel; placing a first stencil on the first light-shielding layer, wherein the first stencil has a first openwork pattern, the first openwork pattern has only one opening and exposes the some pixels, and the opening corresponds to more than one of the pixels; provide a first material, wherein the first material includes a transparent material; apply the first material on the substrate through the first template to covering the pixels of the substrate and filling the first openings, so that a plurality of first transparent pillars formed of the first material are formed on the pixels of the substrate; and the first template is self The first light shielding layer is removed. 如申請專利範圍第1項所述之半導體裝置之形成方法,更包括:進行一平坦化製程平坦化該些第一透明柱體,使得該些透明柱體之頂表面與該第一遮光層之頂表面齊平。 The method for forming a semiconductor device as described in item 1 of the claimed scope further comprises: performing a planarization process to planarize the first transparent pillars, so that the top surfaces of the transparent pillars and the first light shielding layer are in contact with each other. Top surface is flush. 如申請專利範圍第1項所述之半導體裝置之形成方法,其中該第一鏤空圖案之該開口之一寬度大於該些畫素之一者之 一寬度。 The method for forming a semiconductor device as described in claim 1, wherein a width of the opening of the first hollow pattern is larger than a width of one of the pixels a width. 如申請專利範圍第1項所述之半導體裝置之形成方法,其中該透明材料包括光固化材料、熱固化材料或上述之組合。 The method for forming a semiconductor device as described in claim 1, wherein the transparent material comprises a photocurable material, a thermally curable material, or a combination thereof. 如申請專利範圍第1項所述之半導體裝置之形成方法,其中於將該第一模板自該第一遮光層移開的步驟之後更包括:形成一第二遮光層於該第一遮光層以及該些第一透明柱體之上;進行一第二光微影製程圖案化該第二遮光層以於該第二遮光層中形成複數個第二開口,其中該些第二開口暴露出該些第一透明柱體;將該第一模板放置於該第二遮光層之上,其中該第一模板之該第一鏤空圖案暴露出該些第一透明柱體;提供該第一材料;經由該第一模板將該第一材料塗佈於該基板上以覆蓋該些第一透明柱體並填充該些第二開口,使得複數個由該第一材料所形成之第二透明柱體形成於該些第一透明柱體上;以及將該第一模板自該第二遮光層移開。 The method for forming a semiconductor device according to claim 1, further comprising: forming a second light-shielding layer on the first light-shielding layer after the step of removing the first template from the first light-shielding layer; on the first transparent pillars; performing a second photolithography process to pattern the second light shielding layer to form a plurality of second openings in the second light shielding layer, wherein the second openings expose the a first transparent cylinder; placing the first template on the second light shielding layer, wherein the first hollow pattern of the first template exposes the first transparent cylinders; providing the first material; through the The first template coats the first material on the substrate to cover the first transparent pillars and fill the second openings, so that a plurality of second transparent pillars formed of the first material are formed on the on the first transparent cylinders; and removing the first template from the second light shielding layer. 如申請專利範圍第1項所述之半導體裝置之形成方法,其中於將該第一模板自該第一遮光層移開的步驟之後更包括:形成一第二遮光層於該第一遮光層以及該些第一透明柱體之上;進行一第二光微影製程圖案化該第二遮光層以於該第二遮 光層中形成複數個第二開口,其中該些第二開口暴露出該些第一透明柱體;將一第二模板放置於該第二遮光層之上,其中該第二模板具有一第二鏤空圖案,該第二鏤空圖案暴露出該些第一透明柱體,且該第一鏤空圖案與該第二鏤空圖案不同;提供該第一材料;經由該第二模板將該第一材料塗佈於該基板上以覆蓋該些第一透明柱體並填充該些第二開口,使得複數個由該第一材料所形成之第二透明柱體形成於該些第一透明柱體之上;以及將該第二模板自該第二遮光層移開。 The method for forming a semiconductor device as described in claim 1, further comprising: forming a second light-shielding layer on the first light-shielding layer after the step of removing the first template from the first light-shielding layer; On the first transparent pillars; perform a second photolithography process to pattern the second light shielding layer for the second shielding A plurality of second openings are formed in the light layer, wherein the second openings expose the first transparent pillars; a second template is placed on the second light shielding layer, wherein the second template has a second a hollow pattern, the second hollow pattern exposes the first transparent pillars, and the first hollow pattern is different from the second hollow pattern; the first material is provided; the first material is coated through the second template on the substrate to cover the first transparent pillars and fill the second openings, so that a plurality of second transparent pillars formed of the first material are formed on the first transparent pillars; and The second template is removed from the second light shielding layer.
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