TWI767304B - 用於編譯針對同步處理器之程式之方法及系統 - Google Patents

用於編譯針對同步處理器之程式之方法及系統 Download PDF

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Publication number
TWI767304B
TWI767304B TW109128681A TW109128681A TWI767304B TW I767304 B TWI767304 B TW I767304B TW 109128681 A TW109128681 A TW 109128681A TW 109128681 A TW109128681 A TW 109128681A TW I767304 B TWI767304 B TW I767304B
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Taiwan
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configuration
update
program
operations
configuration update
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TW109128681A
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Chinese (zh)
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TW202109289A (zh
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賴納 波普
安德魯 普立查德
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美商谷歌有限責任公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/458—Synchronisation, e.g. post-wait, barriers, locks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/43—Checking; Contextual analysis
    • G06F8/433—Dependency analysis; Data or control flow analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Advance Control (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
TW109128681A 2019-08-22 2020-08-21 用於編譯針對同步處理器之程式之方法及系統 TWI767304B (zh)

Applications Claiming Priority (2)

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US201962890495P 2019-08-22 2019-08-22
US62/890,495 2019-08-22

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TW202109289A TW202109289A (zh) 2021-03-01
TWI767304B true TWI767304B (zh) 2022-06-11

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US (1) US20220276847A1 (fr)
EP (1) EP4004724A1 (fr)
JP (2) JP7476299B2 (fr)
CN (1) CN114270308A (fr)
TW (1) TWI767304B (fr)
WO (1) WO2021035187A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI767304B (zh) 2019-08-22 2022-06-11 美商谷歌有限責任公司 用於編譯針對同步處理器之程式之方法及系統
US11989254B2 (en) * 2020-09-10 2024-05-21 Taboola.Com Ltd. Semantic meaning association to components of digital content
WO2023069180A1 (fr) * 2021-10-22 2023-04-27 ALTMAN, Daniel, E. Système d'exploitation en temps réel à base de temps en cycles cpu

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7523441B2 (en) * 2004-04-16 2009-04-21 National Instruments Corporation Implementing a synchronous reactive system in a graphical program
US20100122105A1 (en) * 2005-04-28 2010-05-13 The University Court Of The University Of Edinburgh Reconfigurable instruction cell array
CN102326126A (zh) * 2009-02-18 2012-01-18 杜比实验室特许公司 用于将多个安全时钟同步的方法和系统
CN103019656A (zh) * 2012-12-04 2013-04-03 中国科学院半导体研究所 可动态重构的多级并行单指令多数据阵列处理系统
TWI531896B (zh) * 2010-12-22 2016-05-01 威盛電子股份有限公司 多核心處理器的電源狀態同步化
US9785587B2 (en) * 2012-07-09 2017-10-10 Commissariat A L'energie Atomique Et Aux Energies Alternatives Method for executing, within a multitasking onboard system, an application timed according to a plurality of different time domains including interruption management
JP6253065B2 (ja) * 2012-06-15 2017-12-27 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理における命令実行の選択的制御
CN107980118A (zh) * 2015-06-10 2018-05-01 无比视视觉技术有限公司 使用多线程处理的多核处理器设备

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2001281164A1 (en) * 2000-08-07 2002-02-18 Altera Corporation Inter-device communication interface
US20030028864A1 (en) * 2001-01-29 2003-02-06 Matt Bowen System, method and article of manufacture for successive compilations using incomplete parameters
US6691301B2 (en) * 2001-01-29 2004-02-10 Celoxica Ltd. System, method and article of manufacture for signal constructs in a programming language capable of programming hardware architectures
US7840777B2 (en) * 2001-05-04 2010-11-23 Ascenium Corporation Method and apparatus for directing a computational array to execute a plurality of successive computational array instructions at runtime
US7849465B2 (en) * 2003-02-19 2010-12-07 Intel Corporation Programmable event driven yield mechanism which may activate service threads
US7587584B2 (en) * 2003-02-19 2009-09-08 Intel Corporation Mechanism to exploit synchronization overhead to improve multithreaded performance
US7734895B1 (en) * 2005-04-28 2010-06-08 Massachusetts Institute Of Technology Configuring sets of processor cores for processing instructions
JP7202293B2 (ja) * 2016-10-11 2023-01-11 グリーン ヒルズ ソフトウェア，エルエルシー 垂直統合インストルメント化およびトレース再構成のためのシステム、方法およびデバイス
TWI767304B (zh) 2019-08-22 2022-06-11 美商谷歌有限責任公司 用於編譯針對同步處理器之程式之方法及系統

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7523441B2 (en) * 2004-04-16 2009-04-21 National Instruments Corporation Implementing a synchronous reactive system in a graphical program
US20100122105A1 (en) * 2005-04-28 2010-05-13 The University Court Of The University Of Edinburgh Reconfigurable instruction cell array
CN102326126A (zh) * 2009-02-18 2012-01-18 杜比实验室特许公司 用于将多个安全时钟同步的方法和系统
US8533515B2 (en) * 2009-02-18 2013-09-10 Dolby Laboratories Licensing Corporation Method and system for synchronizing multiple secure clocks using an average adjusted time of the secure clocks if the average adjusted time is within the limit intersection and using a substitute average adjusted time if the averaged adjusted time is outside the limit intersection
TWI531896B (zh) * 2010-12-22 2016-05-01 威盛電子股份有限公司 多核心處理器的電源狀態同步化
JP6253065B2 (ja) * 2012-06-15 2017-12-27 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理における命令実行の選択的制御
US9785587B2 (en) * 2012-07-09 2017-10-10 Commissariat A L'energie Atomique Et Aux Energies Alternatives Method for executing, within a multitasking onboard system, an application timed according to a plurality of different time domains including interruption management
CN103019656A (zh) * 2012-12-04 2013-04-03 中国科学院半导体研究所 可动态重构的多级并行单指令多数据阵列处理系统
CN107980118A (zh) * 2015-06-10 2018-05-01 无比视视觉技术有限公司 使用多线程处理的多核处理器设备

Also Published As

Publication number Publication date
KR20220032630A (ko) 2022-03-15
CN114270308A (zh) 2022-04-01
JP2022544843A (ja) 2022-10-21
WO2021035187A1 (fr) 2021-02-25
US20220276847A1 (en) 2022-09-01
TW202109289A (zh) 2021-03-01
JP2024105295A (ja) 2024-08-06
EP4004724A1 (fr) 2022-06-01
JP7476299B2 (ja) 2024-04-30

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