TWI762218B - Inspection system of driving circuit - Google Patents

Abstract

An inspection system of driving circuit includes a gate driving circuit, an inspection circuit and a switch circuit. The inspection circuit is coupled to a first signal line. The switch circuit is coupled to a second signal line. During a first period, the first signal line sends an activating signal to the inspection circuit. The second signal line sends a closing signal to the switch circuit. The inspection circuit executes an inspection operation and outputs a sensing voltage through the sensing terminal. The switch circuit is tumed off. During a second period, the first signal line sends a closing signal to the inspection circuit. The second signal line emits an activating signal to the switch circuit. The inspection circuit is turned off and outputs a first operating voltage on the sensing terminal. The switch circuit is turned on.

Description

Drive circuit detection system

The present invention relates to a drive circuit detection system that performs a detection action using a configuration of a detection circuit and a switching circuit.

Generally speaking, the driving circuit of the panel is a current-type driving circuit, and the detection method used by the driving circuit of the panel is mostly direct current pumping, which is usually a single detection path and can only detect the operation of some components of the driving circuit of the panel. However, the short-circuit or open-circuit condition of the driving circuit of the panel cannot be detected, and how to solve the above-mentioned crux of the problem has become a problem to be solved.

In view of the foregoing, the inventors of the present invention have considered and designed a driving circuit detection system, in order to improve the deficiencies of the prior art, thereby enhancing the implementation and utilization in the industry.

In view of the above-mentioned conventional problems, an object of the present invention is to provide a driving circuit detection system to solve the problems faced in the conventional technology.

Based on the above object, the present invention provides a driving circuit detection system, which includes a gate driving circuit, a detection circuit and a switching circuit. The detection circuit is coupled to the first signal line. The switching circuit is coupled to the second signal line. Among them, at the first time, the first signal line sends a start-up signal to the detection circuit, the second signal line sends a shutdown signal to the switching circuit, the detection circuit performs the detection action and outputs the sense at the detection end voltage, the switching circuit is turned off; at the second time, the first signal line sends a shutdown signal to the detection circuit, the second signal line sends a start signal to the switching circuit, the detection circuit is turned off and the first working voltage is output at the detection terminal, and the switching circuit is turned on.

In an embodiment of the present invention, the detection circuit includes a first transistor, a second transistor, and a third transistor, and the switching circuit includes a fourth transistor.

In the embodiment of the present invention, the control end of the first transistor is connected to the first signal line, the second end of the first transistor, the control end of the second transistor and the second end of the third transistor are connected to each other, the first The second terminal of the two transistors is connected to the detection terminal, and the control terminals of the third transistor and the fourth transistor are respectively connected to the second signal line.

In the embodiment of the present invention, at the first time, the first signal line sends a start-up signal to turn on the first transistor and the second transistor, and the second signal line sends a turn-off signal to turn off the third transistor and the fourth transistor , the detection circuit performs the detection action, and the second transistor outputs the sensing voltage at the detection end; at the second time, the first signal line sends a shutdown signal to turn off the first transistor, and the second signal line sends a start signal to make the third transistor and the fourth transistor is turned on, and the second transistor outputs the first working voltage at the detection terminal.

In an embodiment of the present invention, the detection circuit includes a first transistor and a second transistor, and the switching circuit includes a third transistor and a fourth transistor.

In the embodiment of the present invention, the control terminal of the first transistor is connected to the first signal line, the second terminal of the first transistor and the control terminal of the second transistor are connected to each other, and the second terminal of the second transistor is connected to the detection terminal, the control terminal of the third transistor is connected to the second signal line, the control terminal of the third transistor is connected to the control terminal of the fourth transistor, the first terminal of the third transistor and the first terminal of the fourth transistor are connected to each other .

In the embodiment of the present invention, at the first time, the first signal line sends a start-up signal to turn on the first transistor and the second transistor, and the second signal line sends a turn-off signal to turn the third transistor and the fourth transistor on. The transistor is turned off, the detection circuit performs the detection action, and the second transistor outputs a sensing voltage at the detection end; at the second time, the first signal line sends a shutdown signal to turn off the first transistor, and the second signal line sends a start signal to make the first transistor turn off. The third transistor and the fourth transistor are turned on, and the second transistor outputs the first working voltage at the detection end.

In an embodiment of the present invention, the present invention further includes a sensing signal line, the sensing signal line is coupled to the gate driving circuit, and the sensing signal line enables the gate driving circuit to switch between the first time and the second time.

In an embodiment of the present invention, the present invention further includes a high-voltage line and a fifth transistor, the high-voltage line is connected to the gate driving circuit, the control end of the fifth transistor is connected to the second signal line, and the first The terminal is connected to the high voltage line, and the second terminal of the fifth transistor is connected to the sensing signal line.

A display panel has a display area and a non-display area surrounding the display area, the display panel includes a pixel unit and the aforementioned driving circuit detection system, the pixel unit is arranged in the display area, and the driving circuit detection system is arranged in the non-display area to control the pixels display of the unit.

As mentioned above, the driving circuit detection system of the present invention utilizes the detection circuit and the switching circuit to detect the short circuit and open circuit of the gate driving circuit, so as to ensure the normal operation of the gate driving circuit.

10: Detection circuit

20: Switching circuit

AT: the first signal line

AT_SIG: detection end

AT_Sense[EM],AT_Sense[Scan]: Sensing signal line

C1~C3: Capacitor

CLK_EM1~CLK_EM2, CLK1~CLK3: Operating frequency

D1~D4, D10~D40, D_1~D_6, D_E1~D_E6: the first end

DS: Display area

G1~G4, G10~G40, G_1~G_6, G_E1~G_E6: Control terminal

NDS: non-display area

PX[n-1]~[n+1]: pixel unit

GOA1, GOA2: gate driver circuit

ST1~ST6, ET1~ET6: Transistor

STV_EM: Standard Voltage Line

S1~S4, S10~S40, S_1~S_6, S_E1~S_E6: the second terminal

S[n],EM[n]: scan line

S[n-1]: previous scan line

T1, T10: first transistor

T2, T20: The second transistor

T3, T30: The third transistor

T4, T40: Fourth transistor

T51, T52: Fifth transistor

VGH: first high voltage line

VGL: Second High Voltage Line

XAT: The second signal line

FIG. 1 is a configuration diagram of a first embodiment of the drive circuit detection system of the present invention.

FIG. 2 is a schematic diagram of the first embodiment of the driving circuit detection system of the present invention at a first time.

FIG. 3 is a schematic diagram of the first embodiment of the driving circuit detection system of the present invention at a second time.

FIG. 4 is a configuration diagram of a second embodiment of the drive circuit detection system of the present invention.

FIG. 5 is a schematic diagram of the second embodiment of the driving circuit detection system of the present invention at the first time.

FIG. 6 is a schematic diagram of the second embodiment of the driving circuit detection system of the present invention at a second time.

FIG. 7 is a configuration diagram of the display panel of the present invention.

The advantages, features, and technical means of achieving the present invention will be more easily understood by being described in more detail with reference to the exemplary embodiments and the accompanying drawings, and the present invention may be implemented in different forms, so it should not be construed as being limited to what is described herein. Rather, the embodiments are provided so that this disclosure will be thorough, complete and complete to convey the scope of the invention to those of ordinary skill in the art, and the invention will only be appended Defined by the scope of the patent application.

It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections You should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer and/or section from another element, component, region, layer and/or section. Thus, "first element", "first feature", "first region", "first layer" and/or "first portion" discussed below may be referred to as "second element", "second feature" , "Second Area", "Second Layer" and/or "Second Section" without departing from the spirit and teachings of the present invention.

Additionally, the terms "comprising" and/or "comprising" refer to the presence of stated features, regions, integers, steps, operations, elements and/or components, but do not exclude one or more other features, regions, integers, steps, operations , elements, components and/or the presence or addition of combinations thereof.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having the same Definitions are consistent with the meanings in the context of the related art and the present invention, and are not to be construed in an idealized or overly formal sense unless explicitly so defined herein.

Please refer to FIG. 1 , which is a configuration diagram of the first embodiment of the driving circuit detection system of the present invention. As shown in FIG. 1, the driving circuit detection system of the present invention includes a gate driving circuit GOA1, a detection circuit 10 and a switching circuit 20. The detection circuit 10 and the switching circuit 20 are both connected to the gate driving circuit GOA1. The detection circuit 10 is coupled to the first signal line AT. The switching circuit 20 is coupled to the second signal line XAT. Wherein, at the first time, the first signal line AT sends an activation signal to the detection circuit 10, the second signal line XAT sends a shutdown signal to the switching circuit 20, the detection circuit 10 performs a detection operation and outputs a sensing voltage at the detection terminal AT_SIG, and switches The circuit 20 is turned off; at the second time, the first signal line AT sends a shutdown signal to the detection circuit 10, the second signal line XAT sends an enable signal to the switching circuit 20, the detection circuit 10 is turned off and outputs the first working voltage at the detection terminal AT_SIG, The switching circuit 20 is turned on.

The gate drive circuit GOA1 has a 6T1C configuration and includes transistors ST1 to ST6 and a capacitor C1, the detection circuit 10 includes a first transistor T1, a second transistor T2 and a third transistor T3, and the switching circuit 20 includes a first transistor T1, a second transistor T2, and a third transistor T3. Four transistors T4. The transistor ST1 is connected to the first terminal D2 of the second transistor T2, a capacitor C1 is provided between the control terminal G_1 and the second terminal S_1 of the transistor ST1, and the first terminal D_1 of the transistor ST1 is connected to the working frequency line (which has 3 There are two operating frequencies, namely CLK1, CLK2 and CLK3, and the transistor ST1 only operates at a single operating frequency, that is, the transistor ST1 operates at the operating frequency CLK1; or the transistor ST1 operates at the operating frequency CLK2; or, the transistor ST1 Operating at the operating frequency CLK3), the second end S_1 of the transistor ST1 is connected to the scan line S[n]; the second end S_2 of the transistor ST2 is connected to the control end G_1 of the transistor ST1, and the control end G_2 of the transistor ST2 is connected to the first The first end D1 of the transistor T1 and the first end D_2 of the transistor ST2 are connected to the first end D_4 of the transistor ST4; the first end D_3 of the transistor ST3 is connected to the first end D1 of the first transistor T1, and the transistor ST3 control The terminal G_3 is connected to the working frequency line, the second terminal S_3 of the transistor ST3 is connected to the control terminal G_4 of the fourth transistor T4; the first terminal D_4 of the transistor ST4 is connected to the first terminal D_2 of the transistor ST2, and the second terminal of the transistor ST4 The terminal S_4 is connected to the first high voltage line VGH (the voltage it sends out is the first working voltage); the first terminal D_5 of the transistor ST5 is connected to the second terminal S_3 of the transistor ST3, and the second terminal S_5 of the transistor ST5 is connected to the first terminal S_5 of the transistor ST5. A high voltage line VGH, the control terminal G_5 of the transistor ST5 is connected to the second terminal S_6 of the transistor T6; the control terminal G_6 of the transistor ST6 is connected to the previous scan line S[n-1], and the first terminal D_6 of the transistor ST6 The second terminal S4 of the fourth transistor T4 is connected.

The control terminal G1 of the first transistor T1 is connected to the first signal line AT, the second terminal S1 of the first transistor T1, the control terminal G2 of the second transistor T2 and the second terminal S3 of the third transistor T3 are connected to each other, The second terminal S2 of the second transistor T2 is connected to the detection terminal AT_SIG, the control terminals G3 and G4 of the third transistor T3 and the fourth transistor T4 are respectively connected to the second signal line XAT, and the first terminal D4 of the fourth transistor T4 Connected to the second high voltage line VGL (the voltage generated by the second high voltage line VGL is the second working voltage), the second high voltage line VGL is connected to the control terminal G_2 of the transistor ST2 and the first terminal D1 of the first transistor T1.

Please refer to FIG. 2 , which is a schematic diagram of the first embodiment of the driving circuit detection system of the present invention at the first time. As shown in FIG. 2 , in the first embodiment of the present invention, at the first time (which is the test time for short circuit/open circuit), the first signal line AT sends out an enable signal, the second signal line XAT sends out an off signal, and the first signal line AT sends out an off signal. The transistor T1 and the second transistor T2 are turned on, and the third transistor T3, the fourth transistor T4 and the transistor ST1 are turned off. Because the third transistor T3 is turned off, the scanning line S[n-1] of the previous stage is turned off. The signal is input from the control terminal G_6 of the transistor ST6 and flows through the control terminal G_5 of the transistor ST5 and the first terminal D_2 of the transistor ST2. The transistor ST2, the transistor ST5 and the transistor ST6 are in a conducting state, charging the capacitor C1 , through the conduction of the second transistor T2, the sensing voltage is output at the detection terminal AT_SIG, and according to the value of the sensing voltage, it is determined whether the gate driving circuit GOA1 operates normally.

Please refer to FIG. 3 , which is a schematic diagram of the first embodiment of the driving circuit detection system of the present invention at a second time. As shown in FIG. 3 , in the first embodiment of the present invention, at the second time (which is the driving time), the first signal line AT sends a shutdown signal, the second signal line XAT sends an enable signal, and the first transistor T1 is turned off , the second transistor T2, the third transistor T3 and the fourth transistor T4 are all turned on, so that the signal of the previous scan line S[n-1] is input from the control terminal G_6 of the transistor ST6 and flows through the transistor ST5 The control terminal G_5 of the transistor ST2 and the first terminal D_2 of the transistor ST2 are input to the control terminal G_4 of the transistor ST4 and the third transistor T3 through the signal of the previous scan line S[n-1] of the control terminal G_5 of the transistor ST5 The first terminal D3 of the gate driving circuit GOA1 is in a driving state, and the first working voltage is output at the detection terminal AT_SIG through the conduction of the second transistor T2.

Please refer to FIG. 4 , which is a configuration diagram of the second embodiment of the driving circuit detection system of the present invention. As shown in FIG. 4, the driving circuit detection system of the present invention includes a gate driving circuit GOA2, a detection circuit 10 and a switching circuit 20. The detection circuit 10 and the switching circuit 20 are both connected to the gate driving circuit GOA2, and their configuration relationship Similar to the first embodiment, the similarities will not be repeated here, but the second embodiment of the present invention is still different from the first embodiment. The difference is that the detection circuit 10 includes a first transistor T10 and a The second transistor T20, the switching circuit 20 includes a third transistor T3 and a fourth transistor T4, and the gate driving circuit GOA1 includes transistors ET1-ET6 and capacitors C2 and C3.

The first end D_E1 of the transistor ET1 is connected to the second high voltage line VGL, the second end S_E1 of the transistor ET1 is connected to the scan line EM[n], the control end G_E1 of the transistor ET1 is connected to one end of the capacitor C2, and the The other end is connected to the working frequency line (it has two frequencies, CLK_EM1 and CLK_EM2 respectively, the capacitor C2 only operates at one frequency, the capacitor C2 operates at the working frequency CLK_EM1, or the capacitor C2 operates at the working frequency CLK_EM2); transistor ET2 The first terminal D_E2 of the transistor is connected to the control terminal G_E1 of the transistor ET1, the second terminal S_E2 of the transistor ET2 is connected to the first high voltage line VGH, and the transistor ET2 The control terminal G_E2 is connected to the second terminal S30 of the third transistor T30; the first terminal D_E3 of the transistor ET3 is connected to the second high voltage line VGL, and the second terminal S_E3 of the transistor ET3 is connected to the first terminal of the third transistor T30 D30, the control terminal G_E3 of the transistor ET3 is connected to one end of the capacitor C3, and the other end of the capacitor C3 is connected to the working frequency line (it has two frequencies, CLK_EM1 and CLK_EM2 respectively, the capacitor C3 only operates at one frequency, and the capacitor C3 operates at The working frequency CLK_EM1, or the capacitor C3 operates at the working frequency CLK_EM2); the first end D_E4 of the transistor ET4 is connected to the second end S40 of the fourth transistor T40, and the second end S_E4 of the transistor ET4 is connected to the first high voltage line VGH , the control terminal G_E4 of the transistor ET4 is connected to the second terminal S_E6 of the transistor ET6; the first terminal D_E5 of the transistor ET5 is connected to one end of the capacitor C3, the second terminal S_E5 of the transistor ET5 is connected to the first high voltage line VGH, the transistor The control terminal G_E5 of ET5 is connected to the standard voltage line STV_EM; the first terminal D_E6 of the transistor ET6 is connected to the standard voltage line STV_EM, and the control terminal G_E6 of the transistor ET6 is connected to the working frequency line (which has two frequencies, CLK_EM1 and CLK_EM2, respectively, the electrical The crystal ET6 operates at only one frequency, the transistor ET6 operates at the operating frequency CLK_EM1, or the transistor ET6 operates at the operating frequency CLK_EM2).

The first terminal D10 of the first transistor T10 is connected to the second high voltage line VGL, the second terminal S10 of the first transistor T10 is connected to the control terminal G20 of the second transistor T20, and the control terminal G10 of the first transistor T10 is connected to the first transistor T10. A signal line AT; the first end D20 of the second transistor T20 is connected to the scan line EM[n], the second end S20 of the second transistor T20 is connected to the detection end AT_SIG, and the control end G20 of the second transistor T20 is connected to the transistor The control terminal G_E2 of ET2; the control terminal G30 of the third transistor T30 is connected to the second signal line XAT; the first terminal D40 of the fourth transistor T40 is connected to the first terminal D30 of the third transistor T30, and the The control terminal G40 is connected to the control terminal G30 of the third transistor T30.

Please refer to FIG. 5 , which is a schematic diagram of the second embodiment of the driving circuit detection system of the present invention at the first time. As shown in FIG. 5, the second embodiment of the present invention is at the first time (which is a short circuit/ Open circuit test time), the first signal line AT sends out a start signal, and the second signal line XAT sends out a shutdown signal, since the start signal of the first signal line AT is input to the control terminal G10 of the first transistor T10 and the second transistor T20 The control terminal G20 of the first transistor T10 is turned on, and the second terminal S10 of the first transistor T10 is outputted, resulting in the conduction of the second transistor T20 and the transistor ET2, due to the close signal input of the second signal line XAT To the control terminal G30 of the third transistor T30 and the control terminal G40 of the fourth transistor T40, the third transistor T30 and the fourth transistor T40 are turned off. The bias voltage is less than the threshold voltage. Because the bias voltage of the control terminal G_E6 and the second terminal S_E6 of the transistor ET6 is less than the threshold voltage, the transistors ET1 and ET6 are turned off, and the voltage of the standard voltage line STV_EM is input to the transistor ET5 and flows through The transistor ET3 and the first transistor T10 detect the short-circuit/open-circuit condition of the gate drive circuit GOA2, output a sensing voltage at the detection terminal AT_SIG, and determine whether the gate drive circuit GOA2 operates normally according to the value of the sensed voltage.

Please refer to FIG. 6 , which is a schematic diagram of the second embodiment of the driving circuit detection system of the present invention at a second time. As shown in FIG. 6 , in the second embodiment of the present invention, at the second time (which is the driving time), the first signal line AT sends out an off signal, and the second signal line XAT sends out an enable signal. The shutdown signal of the first transistor T10 is input to the control terminal G10 of the first transistor T10, and the first transistor T10 is turned off, because the start signal of the second signal line XAT is input to the control terminal G30 of the third transistor T30 and the fourth transistor T40. At the control terminal G40, the third transistor T30 and the fourth transistor T40 are turned on, and then the transistor ET2 and the second transistor T20 are turned on. At this time, the transistors ET1 to ET6 are all turned on, and the gate driving circuit GOA2 is in the driving state , and output the first working voltage at the detection terminal AT_SIG.

Please refer to FIG. 7 , which is a configuration diagram of the display panel of the present invention. As shown in FIG. 7, the display panel of the present invention has a display area DS and a non-display area NDS surrounding the display area DS, and includes a plurality of gate driving circuits GOA2 and a plurality of gate driving circuits GOA1[n-1] ~[n+1] and the pixel list Elements PX[n-1]~[n+1], multiple gate drive circuits GOA2, multiple gate drive circuits GOA1[n-1]~[n+1] are arranged in the non-display area NDS, the pixel unit PX [n-1]~[n+1] are set in the display area DS. A plurality of gate drive circuits GOA1[n-1]~[n+1] are shown in Fig. 1 to Fig. 3 in their arrangement and operation relationship, and a plurality of gate drive circuits GOA2 are shown in Fig. 4 to Fig. 6 As shown in the configuration and operation relationship shown, each gate driver circuit GOA2 is connected to each gate driver circuit GOA1, and each gate driver circuit GOA1[n-1]~[n+1] is connected to each pixel unit PX[n-1]~ [n+1] are connected, and multiple gate drive circuits GOA2 and multiple gate drive circuits GOA1[n-1]~[n+1] jointly control the pixel units PX[n-1]~[n+1]. show.

The first signal line AT is respectively connected to a plurality of gate driving circuits GOA2, a plurality of gate driving circuits GOA1[n-1]~[n+1], and the second signal line XAT is respectively connected to a plurality of gate driving circuits GOA2, a plurality of gate driving circuits GOA1[n-1]~[n+1]. The gate driving circuits GOA1[n-1]~[n+1], the fifth transistor T51 is respectively connected to the sensing signal line AT_Sense[Scan], the first high voltage line VGH and the first signal line AT, the fifth transistor T51 is connected to the sensing signal line AT_Sense[Scan], the first high voltage line VGH and the first signal line AT respectively. The crystal T52 is respectively connected to the sensing signal line AT_Sense[EM], the first high voltage line VGH and the first signal line AT, and the sensing signal line AT_Sense[Scan] is connected to a plurality of gate driving circuits GOA1[n-1]~[n +1], the sensing signal line AT_Sense[EM] is connected to a plurality of gate driving circuits GOA2. Through the control of the fifth transistor T51, the sensing signal line AT_Sense[Scan] and the first signal line AT, one of the plurality of gate driving circuits GOA1[n-1]~[n+1] is in the detection of open circuit/ During the short circuit, the operation status of each gate drive circuit GOA1[n-1]~[n+1] is detected; through the control of the fifth transistor T52, the sensing signal line AT_Sense[EM] and the first signal line AT, the One of the plurality of gate drive circuits GOA2 is in the open/short detection period, and the operation status of each gate drive circuit GOA2 is detected.

As mentioned above, the driving circuit detection system of the present invention utilizes the detection circuit 10 and the switching circuit 20 to detect the short circuit and open circuit of the gate driving circuits GOA1 and GOA2 to ensure the normal operation of the gate driving circuits GOA1 and GOA2.

The above description is exemplary only, not limiting. Any equivalent modifications or changes that do not depart from the spirit and scope of the present invention shall be included in the appended patent application scope.

10: Detection circuit

20: Switching circuit

AT: the first signal line

AT_SIG: detection end

CLK1~CLK3: Operating frequency

C1: Capacitor

D_1~D_6, D1~D4: The first end

G_1~G_6, G1~G4: Control terminal

S_1~S_6, S1~S4: the second end

ST1~ST6: Transistor

S[n~1]: previous scan line

S[n]: scan line

T1: first transistor

T2: Second transistor

T3: The third transistor

T4: Fourth transistor

VGH: first high voltage line

VGL: Second High Voltage Line

XAT: The second signal line

Claims (10)

A driving circuit detection system, comprising: a gate driving circuit; a detection circuit coupled to a first signal line; and a switching circuit coupled to a second signal line; wherein, at a first time, the first signal line A signal line sends an activation signal to the detection circuit, the second signal line sends a shutdown signal to the switching circuit, the detection circuit performs a detection operation and outputs a sensing voltage at a detection terminal, and the switching circuit is turned off; At a second time, the first signal line sends a shutdown signal to the detection circuit, the second signal line sends a start signal to the switching circuit, the detection circuit is turned off and outputs a first operating voltage at the detection terminal, the The switching circuit is turned on. The driving circuit detection system of claim 1, wherein the detection circuit includes a first transistor, a second transistor and a third transistor, and the switching circuit includes a fourth transistor. The driving circuit detection system of claim 2, wherein a control end of the first transistor is connected to the first signal line, a second end of the first transistor, and the control end of the second transistor and the second terminal of the third transistor are connected to each other, the second terminal of the second transistor is connected to the detection terminal, and the control terminals of the third transistor and the fourth transistor are respectively connected to the second signal Wire. According to the driving circuit detection system of claim 3, at the first time, the first signal line sends the enable signal to turn on the first transistor and the second transistor, and the second signal line sends the turn-off signal The third transistor and the fourth transistor are turned off, the detection circuit performs the detection action, and the second transistor The sensing voltage is output from the detection terminal; at the second time, the first signal line sends the off signal to turn off the first transistor, and the second signal line sends the start signal to make the third transistor and the The fourth transistor is turned on, and the second transistor outputs the first working voltage at the detection terminal. The driving circuit detection system of claim 1, wherein the detection circuit includes a first transistor and a second transistor, and the switching circuit includes a third transistor and a fourth transistor. The driving circuit detection system of claim 5, wherein a control end of the first transistor is connected to the first signal line, a second end of the first transistor and the control end of the second transistor connected to each other, the second end of the second transistor is connected to the detection end, the control end of the third transistor is connected to the second signal line, the control end of the third transistor is connected to the fourth transistor The control terminal, a first terminal of the third transistor and the first terminal of the fourth transistor are connected to each other. According to the driving circuit detection system of claim 6, at the first time, the first signal line sends the enable signal to turn on the first transistor and the second transistor, and the second signal line sends the turn-off signal The third transistor and the fourth transistor are turned off, the detection circuit performs the detection action, the second transistor outputs the sensing voltage at the detection end; at the second time, the first signal line sends the detection The off signal turns off the first transistor, the second signal line sends out the start signal to turn on the third transistor and the fourth transistor, and the second transistor outputs the first operating voltage at the detection end. The driving circuit detection system of claim 1, further comprising a sensing signal line, the sensing signal line is coupled to the gate driving circuit, the sensing signal line enables The gate driving circuit switches between the first time and the second time. The driving circuit detection system of claim 8, further comprising a high voltage line and a fifth transistor, the high voltage line is connected to the gate driving circuit, and a control end of the fifth transistor is connected to the second signal line, a first end of the fifth transistor is connected to the high voltage line, and a second end of the fifth transistor is connected to the sensing signal line. A display panel having a display area and a non-display area surrounding the display area, the display panel comprising a pixel unit and the drive circuit detection system as described in claim 1 to claim 9, the pixel unit is arranged on the display area, the driving circuit detection system is arranged in the non-display area to control the display of the pixel unit.

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