TWI749724B - Electronic circuit system - Google Patents
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- TWI749724B TWI749724B TW109128509A TW109128509A TWI749724B TW I749724 B TWI749724 B TW I749724B TW 109128509 A TW109128509 A TW 109128509A TW 109128509 A TW109128509 A TW 109128509A TW I749724 B TWI749724 B TW I749724B
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本發明是有關於一種網路系統，且特別是有關於一種電子電路系統。 The present invention relates to a network system, and particularly relates to an electronic circuit system.
在智能電子系統中，需要對各個終端元件(如電子裝置或電子模組)定義標識符(ID)，以便於對各個終端元件進行管理，亦即自各個終端元件接收資訊或對各個終端元件傳達指令。然而，傳統的標識符由數根微控制器(MCU)的通用輸入/輸出(GPIO)接腳來定義，亦即藉由拉高或拉低微控制器的輸入來定義各個終端元件的終端標識符，此種方式所定義的標識符稱為靜態標識符。 In an intelligent electronic system, it is necessary to define an identifier (ID) for each terminal element (such as an electronic device or electronic module) to facilitate the management of each terminal element, that is, to receive information from each terminal element or communicate to each terminal element instruction. However, the traditional identifier is defined by the general-purpose input/output (GPIO) pins of several microcontrollers (MCU), that is, the terminal identifier of each terminal element is defined by pulling up or pulling down the input of the microcontroller. The identifier defined in this way is called a static identifier.
如果在各個終端元件上依照通用輸入/輸出接腳來定義且印上相對應的標識符，會造成工廠端在生產及管理各個終端元件及進行組裝時會複雜化。並且，如果定義後的終端元件擺放位置出錯，更會對未來各個終端元件進行售後維修時，造成困擾。 If each terminal element is defined in accordance with the universal input/output pins and the corresponding identifier is printed, it will complicate the production, management and assembly of each terminal element on the factory side. In addition, if the position of the defined terminal components is wrong, it will cause troubles during the after-sales maintenance of each terminal component in the future.
本發明提供一種電子電路系統，可降低第二電路板的設 計及製作成本，並且可提高配置的適應性。 The present invention provides an electronic circuit system, which can reduce the design of the second circuit board. Taking into account the production cost, and can improve the adaptability of the configuration.
本發明的電子電路系統，包括第一電路板及多個第二電路板。第一電路板具有第一控制器，用以提供初始標識符識別訊號。這些第二電路板串聯第一電路板，各個第二電路板具有第二控制器及標識符調整區塊，各個第二電路板的標識符調整區塊於接收初始標識符識別訊號或經調整標識符識別訊號後調整初始標識符識別訊號或經調整標識符識別訊號的脈波寬度以提供另一經調整標識符識別訊號，並且各個第二電路板的第二控制器接收初始標識符識別訊號或經調整標識符識別訊號以決定各個第二電路板的位置標識符。 The electronic circuit system of the present invention includes a first circuit board and a plurality of second circuit boards. The first circuit board has a first controller for providing an initial identifier identification signal. These second circuit boards are connected in series with the first circuit board, and each second circuit board has a second controller and an identifier adjustment block. The identifier adjustment block of each second circuit board receives the initial identifier identification signal or the adjusted identification After the identification signal, the pulse width of the initial identifier identification signal or the adjusted identifier identification signal is adjusted to provide another adjusted identifier identification signal, and the second controller of each second circuit board receives the initial identifier identification signal or The identifier identification signal is adjusted to determine the position identifier of each second circuit board.
基於上述，本發明實施例的電子網路系，第二電路板的標識符調整區塊用以調整標識符識別訊號的脈波寬度，並且透過不同的脈波寬度的標識符識別訊號，第二控制器個別接收經調整個別決定不同的位置標識符。藉此，可降低第二電路板的設計及製作成本，並且可提高配置的適應性。 Based on the above, in the electronic network system of the embodiment of the present invention, the identifier adjustment block of the second circuit board is used to adjust the pulse width of the identifier identification signal, and the identifier identification signal with different pulse widths is used. The controller individually receives and adjusts to determine different location identifiers individually. Thereby, the design and manufacturing cost of the second circuit board can be reduced, and the adaptability of the configuration can be improved.
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。 In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.
100、200:電子電路系統 100, 200: electronic circuit system
BT1~BT8:電池模組 BT1~BT8: Battery module
CR1~CR8:標識符調整電路 CR1~CR8: Identifier adjustment circuit
CTL0:第一控制器 CTL0: the first controller
CTL1~CTL8、CTL1a~CTL8a:第二控制器 CTL1~CTL8, CTL1a~CTL8a: second controller
ID:位置標識符 ID: location identifier
IST:狀態資訊 IST: Status information
PCB0:第一電路板 PCB0: the first circuit board
PCB1~PCB8、PCB1a~PCB8a:第二電路板 PCB1~PCB8, PCB1a~PCB8a: the second circuit board
SID0:初始標識符識別訊號 SID0: Initial identifier identification signal
SID1~SID8:經調整標識符識別訊號 SID1~SID8: adjusted identifier identification signal
Th1~Th9:脈波寬度臨界值 Th1~Th9: critical value of pulse width
圖1為依據本發明一實施例的電子電路系統的系統示意圖。 FIG. 1 is a system schematic diagram of an electronic circuit system according to an embodiment of the present invention.
圖2為依據本發明一實施例的第二控制器的標識符判定示意 圖。 Figure 2 is a schematic diagram of the identifier determination of the second controller according to an embodiment of the present invention picture.
圖3為依據本發明另一實施例的電子電路系統的系統示意圖。 FIG. 3 is a system schematic diagram of an electronic circuit system according to another embodiment of the present invention.
圖1為依據本發明一實施例的電子電路系統的系統示意圖。請參照圖1，在本實施例中，電子電路系統100包括第一電路板PCB0及多個第二電路板PCB1~PCB8(或多個電路模組)，其中第二電路板PCB1~PCB8與第一電路板PCB0是串聯耦接，並且電子電路系統100是以電池模組系統為例，但本發明實施例不以此為限。
FIG. 1 is a system schematic diagram of an electronic circuit system according to an embodiment of the present invention. Please refer to FIG. 1, in this embodiment, the
第一電路板PCB0(亦即電源管理板)具有第一控制器CTL0，用以提供初始標識符識別訊號SID0，其中第一電路板PCB0(亦即第一控制器CTL0)的位置標識符ID固定為0X01。第二電路板PCB1~PCB8個別具有第二控制器CTL1~CTL8、多個電池模組BT1~BT8及多個標識符調整區塊(例如多個標識符調整電路CR1~CR8)，其中第一控制器CTL0及第二控制器CTL1~CTL8會透過匯流排相互耦接。 The first circuit board PCB0 (namely the power management board) has a first controller CTL0 for providing the initial identifier identification signal SID0, wherein the position identifier ID of the first circuit board PCB0 (namely the first controller CTL0) is fixed It is 0X01. The second circuit boards PCB1~PCB8 each have a second controller CTL1~CTL8, a plurality of battery modules BT1~BT8, and a plurality of identifier adjustment blocks (for example, a plurality of identifier adjustment circuits CR1~CR8), of which the first control The controller CTL0 and the second controller CTL1~CTL8 are coupled to each other through the bus.
第二電路板PCB1的標識符調整電路CR1於接收初始標識符識別訊號SID0後調整初始標識符識別訊號SID0的脈波寬度以提供經調整標識符識別訊號SID1，並且第二控制器CTL1接收初始標識符識別訊號SID0以決定第二電路板PCB1的位置標識符 ID(亦即0X02)。第二電路板PCB2的標識符調整電路CR2於接收經調整標識符識別訊號SID1後調整經調整標識符識別訊號SID1的脈波寬度以提供另一經調整標識符識別訊號SID2，並且第二控制器CTL2接收經調整標識符識別訊號SID1以決定第二電路板PCB2的位置標識符ID(亦即0X03)。依據上述，透過不同的脈波寬度的調整標識符識別訊號SID2~SID7，第二控制器CTL3~CTL8個別接收經調整標識符識別訊號SID2~SID7以個別決定第二電路板PCB3~PCB8的位置標識符ID為0X04~0X09。並且，標識符調整電路CR8於接收經調整標識符識別訊號SID7後調整經調整標識符識別訊號SID7的脈波寬度以提供另一經調整標識符識別訊號SID8。 The identifier adjustment circuit CR1 of the second circuit board PCB1 adjusts the pulse width of the initial identifier identification signal SID0 after receiving the initial identifier identification signal SID0 to provide the adjusted identifier identification signal SID1, and the second controller CTL1 receives the initial identification Symbol identification signal SID0 to determine the position identifier of the second circuit board PCB1 ID (ie 0X02). The identifier adjustment circuit CR2 of the second circuit board PCB2 adjusts the pulse width of the adjusted identifier identification signal SID1 after receiving the adjusted identifier identification signal SID1 to provide another adjusted identifier identification signal SID2, and the second controller CTL2 The adjusted identifier identification signal SID1 is received to determine the position identifier ID (ie, 0X03) of the second circuit board PCB2. According to the above, through different pulse width adjustment identifier identification signals SID2~SID7, the second controller CTL3~CTL8 receives the adjusted identifier identification signals SID2~SID7 to individually determine the position identification of the second circuit board PCB3~PCB8 The character ID is 0X04~0X09. Moreover, the identifier adjustment circuit CR8 adjusts the pulse width of the adjusted identifier identification signal SID7 after receiving the adjusted identifier identification signal SID7 to provide another adjusted identifier identification signal SID8.
換言之，第二電路板(如PCB1~PCB8)的標識符調整區塊於接收初始標識符識別訊號SID0或經調整標識符識別訊號(如SID1~SID8)後調整初始標識符識別訊號SID0或經調整標識符識別訊號(如SID1~SID8)的脈波寬度以提供另一經調整標識符識別訊號(如SID1~SID8)，並且各第二電路板(如PCB1~PCB8)的第二控制器(如CTL1~CTL8)接收初始標識符識別訊號SID0或經調整標識符識別訊號(如SID1~SID8)以決定各第二電路板(如PCB1~PCB8)的位置標識符ID。藉此，由於第二電路板(如PCB1~PCB8)是透過不同脈波寬度的標識符識別訊號(如SID0~SID8)且具有同樣的脈寬調整能力的相同電路結構，因此可降低第二電路板的設計及製作成本，並且可提高配置的適應性。 In other words, the identifier adjustment block of the second circuit board (such as PCB1~PCB8) adjusts the initial identifier identification signal SID0 or is adjusted after receiving the initial identifier identification signal SID0 or the adjusted identifier identification signal (such as SID1~SID8) The pulse width of the identifier identification signal (such as SID1~SID8) is used to provide another adjusted identifier identification signal (such as SID1~SID8), and the second controller (such as CTL1) of each second circuit board (such as PCB1~PCB8) ~CTL8) Receive the initial identifier identification signal SID0 or the adjusted identifier identification signal (such as SID1~SID8) to determine the position identifier ID of each second circuit board (such as PCB1~PCB8). As a result, since the second circuit board (such as PCB1~PCB8) uses identifiers with different pulse widths (such as SID0~SID8) to identify signals (such as SID0~SID8) and has the same circuit structure with the same pulse width adjustment capability, the second circuit can be reduced The design and production cost of the board, and can improve the adaptability of the configuration.
在本發明實施例中，第二電路板PCB1~PCB8的第二控制器CTL1~CTL8個別檢測電池模組BT1~BT8，並且個別依據所檢測的結果透過匯流排(例如控制器區域網路(Controller Area Network，CAN)匯流排)回報狀態資訊IST至第一電路板PCB0的第一控制器CTL0，其中狀態資訊IST包含各個第二電路板PCB1~PCB8的位置標識符ID，並且第一電路基於狀態資訊IST中的位置標識符ID判斷狀態資訊IST所對應的第二電路板(如PCB1~PCB8)。並且，第一控制器CTL0可透過各個第二電路板PCB1~PCB8的位置標識符ID對各個第二電路板PCB1~PCB8發送請求或命令。 In the embodiment of the present invention, the second controllers CTL1 to CTL8 of the second circuit boards PCB1 to PCB8 individually detect the battery modules BT1 to BT8, and individually based on the detected results through a bus (such as a controller area network (Controller Area Network) Area Network, CAN) bus) report status information IST to the first controller CTL0 of the first circuit board PCB0, where the status information IST includes the location identifier ID of each second circuit board PCB1~PCB8, and the first circuit is based on the status The location identifier ID in the information IST determines the second circuit board (such as PCB1~PCB8) corresponding to the status information IST. In addition, the first controller CTL0 can send requests or commands to each of the second circuit boards PCB1 to PCB8 through the position identifier ID of each of the second circuit boards PCB1 to PCB8.
在本發明實施例中，第二控制器CTL1~CTL8所傳送的狀態資訊IST包含各個第二電路板PCB1~PCB8的電池模組BT1~BT8的電池電壓、電池溫度及電池電流中的至少其一。 In the embodiment of the present invention, the status information IST transmitted by the second controllers CTL1~CTL8 includes at least one of the battery voltage, battery temperature, and battery current of the battery modules BT1~BT8 of each second circuit board PCB1~PCB8 .
在本發明實施例中，初始標識符識別訊號SID0的脈波寬度為最小脈波寬度，並且第二電路板PCB1~PCB8的標識符調整電路CR1~CR8依時序調大初始標識符識別訊號SID0或經調整標識符識別訊號(如SID1~SID8)的脈波寬度以提供另一經調整標識符識別訊號(如SID1~SID8)。 In the embodiment of the present invention, the pulse width of the initial identifier identification signal SID0 is the minimum pulse width, and the identifier adjustment circuits CR1 to CR8 of the second circuit boards PCB1 to PCB8 increase the initial identifier identification signal SID0 or The pulse width of the identifier identification signal (such as SID1~SID8) is adjusted to provide another adjusted identifier identification signal (such as SID1~SID8).
在本發明另一實施例中，初始標識符識別訊號SID0的脈波寬度為最大脈波寬度，並且第二電路板PCB1~PCB8的標識符調整電路CR1~CR8依時序調小初始標識符識別訊號SID0或經調整標識符識別訊號(如SID1~SID8)的脈波寬度以提供另一經調整 標識符識別訊號(如SID1~SID8)。 In another embodiment of the present invention, the pulse width of the initial identifier identification signal SID0 is the maximum pulse width, and the identifier adjustment circuits CR1 to CR8 of the second circuit boards PCB1 to PCB8 decrease the initial identifier identification signal according to the timing sequence. SID0 or the pulse width of the adjusted identifier identification signal (such as SID1~SID8) to provide another adjusted Identifier identification signal (such as SID1~SID8).
圖2為依據本發明一實施例的第二控制器的標識符判定示意圖。請參照圖1及圖2，在本實施例中，第二控制器CTL1~CTL8內建多個脈波寬度的臨界值Th1~Th9，其定義多個脈波寬度區間。第二控制器CTL1~CTL8基於脈波寬度的臨界值Th1~Th9比較初始標識符識別訊號SID0或經調整標識符識別訊號SID1~SID8的脈波寬度，並且依據比較結果判斷初始標識符識別訊號SID0或經調整標識符識別訊號SID1~SID8所落在的脈波寬度區間，其中初始標識符識別訊號SID0或經調整標識符識別訊號SID1~SID8的脈波寬度會位於不同的脈波寬度區間，因此第二控制器CTL1~CTL8基於不同的脈波寬度區間決定不同的位置標識符ID。 FIG. 2 is a schematic diagram of the identifier determination of the second controller according to an embodiment of the present invention. 1 and 2, in this embodiment, the second controllers CTL1 to CTL8 have built-in multiple thresholds Th1 to Th9 of pulse width, which define multiple pulse width intervals. The second controller CTL1~CTL8 compares the pulse width of the initial identifier identification signal SID0 or the adjusted identifier identification signal SID1~SID8 based on the threshold value Th1~Th9 of the pulse width, and judges the initial identifier identification signal SID0 according to the comparison result Or the pulse width interval where the adjusted identifier identification signals SID1~SID8 fall, where the pulse width of the initial identifier identification signal SID0 or the adjusted identifier identification signals SID1~SID8 will be in different pulse width intervals, so The second controllers CTL1 to CTL8 determine different location identifier IDs based on different pulse width intervals.
舉例來說，假設初始標識符識別訊號SID0及經調整標識符識別訊號SID1~SID8的脈波寬度的工作週期個別約為5%、15%、25%、35%、45%、55%、65%及75%，則脈波寬度臨界值Th1~Th9可以設定為10%、20%、30%、40%、50%、60%、70%、80%及90%的工作週期。透過比較初始標識符識別訊號SID0及經調整標識符識別訊號SID1~SID8的脈波寬度與脈波寬度臨界值Th1~Th9，可以決定出各個第二電路板PCB1~PCB8的位置標識符ID。 For example, suppose that the duty cycles of the pulse widths of the initial identifier identification signal SID0 and the adjusted identifier identification signals SID1~SID8 are respectively about 5%, 15%, 25%, 35%, 45%, 55%, 65 % And 75%, the pulse width threshold Th1~Th9 can be set to 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, and 90% duty cycle. By comparing the pulse width of the initial identifier identification signal SID0 and the adjusted identifier identification signal SID1~SID8 and the pulse width threshold Th1~Th9, the position identifier ID of each second circuit board PCB1~PCB8 can be determined.
再舉例來說，假設初始標識符識別訊號SID0及經調整標識符識別訊號SID1~SID8的脈波寬度的工作週期個別約為95%、85%、75%、65%、55%、45%、35%及25%，則脈波寬度臨界值 Th1~Th9可以設定為90%、80%、70%、60%、50%、40%、30%、20%及10%的工作週期。透過比較初始標識符識別訊號SID0及經調整標識符識別訊號SID1~SID8的脈波寬度與脈波寬度臨界值Th1~Th9，同樣可以決定出各個第二電路板PCB1~PCB8的位置標識符ID。 For another example, suppose that the duty cycles of the pulse widths of the initial identifier identification signal SID0 and the adjusted identifier identification signals SID1~SID8 are respectively about 95%, 85%, 75%, 65%, 55%, 45%, 35% and 25%, the critical value of pulse width Th1~Th9 can be set to 90%, 80%, 70%, 60%, 50%, 40%, 30%, 20% and 10% duty cycle. By comparing the pulse width of the initial identifier identification signal SID0 and the adjusted identifier identification signal SID1~SID8 and the pulse width threshold Th1~Th9, the position identifier ID of each second circuit board PCB1~PCB8 can also be determined.
圖3為依據本發明另一實施例的電子電路系統的系統示意圖。請參照圖1及圖3，電子電路系統200大致相同於電子電路系統100，其不同之處在於第二電路板PCB1a~PCB8a。第二電路板PCB1a~PCB8a的第二控制器CTL1a~CTL8a為個別整合第二控制器CTL1~CTL8及標識符調整電路CR1~CR8的功能，亦即標識符調整電路CR1~CR8的功能是透過第二控制器CTL1a~CTL8a所執行的韌體來實現。
FIG. 3 is a system schematic diagram of an electronic circuit system according to another embodiment of the present invention. 1 and 3, the
綜上所述，本發明實施例的電子電路系統，第二電路板的標識符調整區塊用以調整標識符識別訊號的脈波寬度，並且透過不同的脈波寬度的標識符識別訊號，第二控制器個別接收經調整個別決定不同的位置標識符。藉此，可降低第二電路板的設計及製作成本，並且可提高配置的適應性。 To sum up, in the electronic circuit system of the embodiment of the present invention, the identifier adjustment block of the second circuit board is used to adjust the pulse width of the identifier identification signal, and the identifier identification signal with different pulse widths is used. The two controllers individually receive adjusted and individually determined different location identifiers. Thereby, the design and manufacturing cost of the second circuit board can be reduced, and the adaptability of the configuration can be improved.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be subject to those defined by the attached patent scope.
100:電子電路系統 100: Electronic circuit system
BT1~BT8:電池模組 BT1~BT8: Battery module
CR1~CR8:標識符調整電路 CR1~CR8: Identifier adjustment circuit
CTL0:第一控制器 CTL0: the first controller
CTL1~CTL8:第二控制器 CTL1~CTL8: second controller
ID:位置標識符 ID: location identifier
IST:狀態資訊 IST: Status information
PCB0:第一電路板 PCB0: the first circuit board
PCB1~PCB8:第二電路板 PCB1~PCB8: the second circuit board
SID0:初始標識符識別訊號 SID0: Initial identifier identification signal
SID1~SID8:經調整標識符識別訊號 SID1~SID8: adjusted identifier identification signal
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW109128509A TWI749724B (en) | 2020-08-21 | 2020-08-21 | Electronic circuit system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW109128509A TWI749724B (en) | 2020-08-21 | 2020-08-21 | Electronic circuit system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI749724B true TWI749724B (en) | 2021-12-11 |
| TW202209154A TW202209154A (en) | 2022-03-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW109128509A TWI749724B (en) | 2020-08-21 | 2020-08-21 | Electronic circuit system |
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| Country | Link |
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| TW (1) | TWI749724B (en) |
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| CN1376283A (en) * | 1998-09-30 | 2002-10-23 | 凯登丝设计系统公司 | Block based design methodology |
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| CN101840446A (en) * | 2009-01-30 | 2010-09-22 | 技领半导体(上海)有限公司 | Communicating configuration information across a programmable analog tile to another tile |
| CN101840445A (en) * | 2009-01-30 | 2010-09-22 | 技领半导体(上海)有限公司 | Programmable analog tile programming tool |
| CN102150139A (en) * | 2008-09-12 | 2011-08-10 | 瑞萨电子株式会社 | Data processing device and semiconductor integrated circuit device |
| JP5510280B2 (en) * | 2010-11-12 | 2014-06-04 | 富士通株式会社 | Design support apparatus, design support method, and design support program |
| TWI543681B (en) * | 2010-07-26 | 2016-07-21 | 日本美可多龍股份有限公司 | Flexible printed circuit board and method of manufacturing the same |
| US20180373829A1 (en) * | 2015-12-31 | 2018-12-27 | Altera Corporation | Methods and apparatus for regulating the supply voltage of an integrated circuit |
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2020
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| CN1376283A (en) * | 1998-09-30 | 2002-10-23 | 凯登丝设计系统公司 | Block based design methodology |
| US20030115564A1 (en) * | 1998-09-30 | 2003-06-19 | Cadence Design Systems, Inc. | Block based design methodology |
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| TWI543681B (en) * | 2010-07-26 | 2016-07-21 | 日本美可多龍股份有限公司 | Flexible printed circuit board and method of manufacturing the same |
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| US20180373829A1 (en) * | 2015-12-31 | 2018-12-27 | Altera Corporation | Methods and apparatus for regulating the supply voltage of an integrated circuit |
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| Publication number | Publication date |
|---|---|
| TW202209154A (en) | 2022-03-01 |
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