TWI728694B - Mixed-layer composite charging layer accumulatively increasing breakdown photodiode - Google Patents

Abstract

A hybrid composite charging layer accumulative photodiode, which is a novel InAlAs (InAlAs) accumulative photodiode (Avalanche Photodiode, APD) structure, adopts a composite charge (composite charge) design, and combines a single The P-type electric field control layer is divided into three layers of different materials, and each other is a heterogeneous junction structure. By controlling the relative concentration distribution and thickness of the first, second and third P-type electric field control layers, and chemically selective etching A boss shape, through this single boss structure, part of the first P-type electric field control layer can be etched away while part of the second P-type electric field control layer is exposed to the air, so that the accumulated layer can be The electric field is confined to the center of the structure, so that the electric power can be concentrated, so that the fringe electric field is low without collapsing, so as to achieve the effect of faster overall speed and higher strength, so that the proposed hybrid composite charging layer accumulates and collapses the photodiode. Better sensitivity and fast response speed and high efficiency.

Description

Mixed-layer composite charging layer accumulatively increasing breakdown photodiode

The present invention relates to a mixed-layer composite charging layer accumulative breakdown light diode, especially It relates to a single P-type electric field control layer divided into three layers of different materials, which are heterogeneous junction structures with each other. In particular, it means that the electric field of the accumulating layer can be confined to the center of the structure, so that the electric power can be concentrated and the fringe electric field is low and Will not collapse, in order to achieve the effect of faster overall speed and higher strength.

In order to satisfy the larger virtual system and the huge amount of data (the internet of things) of things, IOT), the traditional copper wire has long been unable to take on the important task of transmission (≥～100m), and it is bound to hope that the transmission bandwidth is still bottomless; when considering the market size, cost and predictability of different transmission distances For the development of technology, the 400GbE Ethernet project team’s goal is to formulate four transmission interfaces with different distance targets, namely 100 m, 500 m, 2 km and 10 km, of which 400 Gbps for 100 m has almost been confirmed. Use the 25 Gbps vertical cavity surface emitting laser (VCSEL @ 850 nm) direct modulation signal of each channel in 100GbE Ethernet to transmit in multimode fiber (MMF) , Just have to quadruple the number of lasers and optical fibers to reach the 400 Gbps target. For 500 m or more, 1310 nm light sources will be used for transmission in single-mode fiber (SMF); in the current considerations of the 400GbE Ethernet project team, possible solutions include the signal speed of each single light source At 50 Gbps or 100 Gbps, eight or four channels (multi-wavelength in a single fiber or single wavelength in multiple fibers) can reach a transmission capacity of 400 Gbps; however, when the speed of a single light source in the Ethernet network comes When it is greater than 25 Gbps, the output optical power of optoelectronic components (including electro-optical modulation in the transmitting module and photoelectric conversion in the receiving module, etc.) taking into account the high bandwidth is usually small (about 1 mW; -2 to +2 dBm) , If wavelength division multiplexing (Wavelength Division Multiplexing, WDM) technology is also used, the insertion loss inside its passive components will make the power budget (power budget) the key to limiting the maximum transmission capacity of the system. Such as Literature One (M. Nada, T. Yoshimatsu, Y. Muramoto, H. Yokoyama, and H. Matsuzaki, "Design and Performance of High-Speed Avalanche Photodiodes for 100-Gb/s Systems and Beyond," IEEE/OSA Journal of Lightwave Technology, vol. 33, no. 5, pp. 984-990, March, 2015.) It can be seen from the cause of insertion loss in the system that the receiving end of the system requires a sensitivity of -13 dBm. Generally, the receiver composed of photodiodes of p-i-n has a sensitivity above -10 dBm under 25 Gbit/sec bandwidth operation.

The third picture is the second document (E. Ishimura, E. Yagyu, M. Nakaji, S. Ihara, K. Yoshiara, T. Aoyagi, Y. Tokuda, and T. Ishikawa, “Degradation Mode Analysis on Highly Reliable Guarding-Free Planar InAlAs Avalanche Photodiodes,” IEEE/OSA Journal of Lightwave Technology, vol. 25, pp. 3686-3693, Dec ., 2007.) Proposed a cross-sectional structure of the cumulative breakdown photodiode with planar indium aluminum arsenide (InAlAs) as the cumulative layer. As shown in the figure, the high-field region (High-Field Region) 3, although there is a zinc diffusion region to limit the electric field, there is no mesa structure, which makes the electric field limited at the edge part. It is easy to exceed the threshold collapse electric field (>550 kV/cm). When the multiplication layer (M-layer) is thinned, in order to achieve the required operation gain, the edges will collapse.

Picture 4 is currently developed by NTT Electronic (ie Document 1) in the last two years The cross-sectional structure of the breakdown photodiode of 25 and 50 Gbit/sec. The structure (from Top to Bottom) is composed of an N-contact layer (N-contact layer) 40 and a fringe field buffer layer (edge- field buffer layer 41, an N-charge layer 42, an indium aluminum arsenide (InAlAs) avalanche layer 43, a P-type charging layer 44, an undoped arsenic Indium gallium (InGaAs) absorption layer 45, a P-type indium gallium arsenide absorption layer 46, a P-type contact layer 47, a semi-insulating InP substrate 48, and an anti-reflection layer 49 are composed. As shown in the figure, in order to achieve a good electric field limitation, this structure is quite special where the indium aluminum arsenide buildup layer 43 and the N-type contact layer 40 are placed close to the surface of the device (inverted structure), which will arsenic Most of the electric field of the indium aluminum accumulating layer 43 is confined under the N-type contact layer 40. However, in order to reduce the probability of surface collapse, the extra fringe field buffer layer 41 and the N-type charging layer 42 are needed. Affect the speed of components. Moreover, the p-side down structure also needs to use a P-type InP based alloy with a wider energy gap, which will cause difficulty in making ohmic contacts and change the resistance of the entire device. Big. In addition, this structure also sacrifices the electric field limitation of the P-type indium gallium arsenide absorption layer 46, which makes the parasitic capacitance of the device possible to increase, and also because of the stronger fringe field in the absorption layer. And increase the difficulty of component packaging (such as Literature 3: F. Nakajima, M. Nada, and T. Yoshimatsu "High-Speed Avalanche Photodiode and High-Sensitivity Receiver Optical Sub-Assembly for 100-Gb/s Ethernet," to be published in IEEE/OSA Journal of Lightwave Technology, vol. 33, 2015.). Therefore, in order to limit the electric field, the document 1 externally exposes the accumulation layer to the air, which will cause reliability problems.

The components shown in Literature 1 are operated at 25 Gbit/sec and 50 Gbit/sec, respectively. Sensitivity measurement results, it can be clearly seen that the sensitivity of 25 and 50 Gbit/sec is about -15.5 dBm and -11 dBm. Compared with the pin PD based 25 and 50 GHz optical receiver modules, the increased responsivity is about ~4 dB and ~1.5 dB respectively. From this result, it can be seen that as the data rate increases, the enhanced sensitivity of the collapsed photodiode structure will decrease accordingly. It's very likely Because the accumulative layer needs to become thinner as the operating frequency bandwidth increases, but this causes the dark current to rise sharply. Increase and cause sensitivity degradation.

In view of this, the applicant in this case had previously applied for the Republic of China patent certificate number I595678 The light detection element uses a double mesa structure to achieve the effect of the electric field limitation of the accumulation layer; however, considering that the speed of holes is much slower than the speed of electrons, the holes will easily accumulate in the essential area and form electric field shielding. The effect causes the internal electric field to become smaller, so the carrier discharge speed becomes slower, which in turn affects the output power and causes the element speed to become very slow. Based on this, the applicant in this case also applied for a convex accumulative light-enhancing detector element of the Republic of China Patent Certificate No. I664718. However, this structure only etches the upper P-type electric field control layer, but it is separated from the lower P-type electric field control layer. Too far, the electric power is relatively scattered, resulting in poor electric field limitation, which is easy to cause edge collapse, thereby reducing the operating speed of the component. Therefore, general users cannot meet the needs of users in actual use.

The main purpose of the present invention is to overcome the above-mentioned problems encountered by the prior art and to improve Provide a mixed-layer composite charging design, a single P-type electric field control layer is divided into three different materials, and each other is a heterogeneous junction structure, by controlling the relative concentration of the first, second and third P-type electric field control layers Distribution and thickness, as well as chemically selective etching to form a bump shape. Through this single bump structure, part of the first P-type electric field control layer can be etched away while exposing the lower part of the second P-type electric field control layer. In the air, the electric field of the accumulating layer can be confined to the center of the structure, so that the electric power can be concentrated, so that the fringe electric field is low without collapsing, so as to achieve a mixed-layer composite charging layer with functions such as faster overall speed and higher strength. Accumulated breakdown of light diodes.

In order to achieve the above objectives, the present invention is a mixed-layer composite charging layer accumulative breakdown photodiode, which includes: a p-type ohmic contact layer (Ohmic Contact Layer), which is a p ⁺ -type doped first semiconductor; An N-type ohmic contact layer is an n ⁺ -type doped second semiconductor; a P-type light-transmitting layer (Window Layer) is a p ⁺ -type doped third semiconductor, and is sandwiched between the P Between the N-type ohmic contact layer and the N-type ohmic contact layer; a first graded bandgap layer, which is a p ⁺ -type doped fourth semiconductor, and is sandwiched between the P-type transparent layer Between the N-type ohmic contact layer and the N-type ohmic contact layer; a first light absorption layer (Absorption Layer), which is a graded p-type doped fifth semiconductor, is sandwiched between the first grooved graded layer and the N-type ohmic contact layer. Between the contact layers; a second light absorbing layer, which is an undoped sixth semiconductor, and is sandwiched between the first light absorbing layer and the N-type ohmic contact layer; a second grooved graded layer, It is an undoped seventh semiconductor and is sandwiched between the second light absorbing layer and the N-type ohmic contact layer; a first P-type field control layer (Field Control Layer) is a p-type doped The eighth semiconductor is mixed and sandwiched between the second grooved graded layer and the N-type ohmic contact layer; a second P-type electric field control layer is a p-type doped ninth semiconductor, and is sandwiched It is placed between the first P-type electric field control layer and the N-type ohmic contact layer; a third P-type electric field control layer is a tenth p-type doped semiconductor and is sandwiched between the second P-type Between the electric field control layer and the N-type ohmic contact layer; a multiplication layer (Multiplication Layer), which is an undoped eleventh semiconductor, is sandwiched between the third P-type electric field control layer and the N-type ohmic contact layer. Between the contact layers; an N-type charge layer (Charge Layer), which is an n ⁺ -type doped twelfth semiconductor, and is sandwiched between the accumulation layer and the N-type ohmic contact layer; and a transmission The Transport Layer is an undoped thirteenth semiconductor and is sandwiched between the N-type charging layer and the N-type ohmic contact layer; the hybrid-layer composite charging layer accumulates and collapses the structure of the photodiode (From Top to Bottom) is composed of the above-mentioned P-type ohmic contact layer, P-type light-transmitting layer, first grooved graded layer, first light absorbing layer, second light absorbing layer, second grooved graded layer, first P Type electric field control layer, the second P-type electric field control layer, the third P-type electric field control layer, the accumulation layer, the N-type charging layer, the transport layer, and the N-type ohmic contact layer to form a cathode (n-side (M -layer) down) The structure of the epitaxial layer under the electrode, the three-layer P-type electric field control layer is designed by composite charge, and the heterogeneous connection of the first, second and third P-type electric field control layers is used. Surface structure, in the first , The second P-type electric field control layer is chemically selectively etched into a mesa structure, so that the electric field of the accumulating layer is confined to the center of the device by the mesa structure.

In the above embodiment of the present invention, the epitaxial layer structure is grown on a half-insulating or conductive The semiconductor substrate further includes a buffer layer between the N-type ohmic contact layer and the semiconductor substrate.

In the foregoing embodiment of the present invention, the P-type ohmic contact layer is p ⁺ -type indium gallium arsenide phosphorous (InGaAsP), the P-type light-transmitting layer is p ⁺ -type indium phosphide (InP), and the first belt The groove graded layer is p ⁺ -type indium gallium arsenide (InGaAs), the first light absorbing layer is graded p-type doped InGaAs, the second light absorbing layer is undoped InGaAs, and the second belt groove The graded layer is undoped InGaAs, the first p-type electric field control layer is p-type doped indium aluminum arsenide (InAlAs), the second p-type electric field control layer is p-type doped InP, the The third P-type electric field control layer is p-type doped InAlAs, the accumulation layer is undoped InAlAs, the N-type charging layer is n ⁺ -type doped InAlAs, and the transmission layer is undoped The InP, the N-type ohmic contact layer and the N-type ohmic contact layer are n ⁺ -type doped InP.

In the above embodiment of the present invention, the P-type ohmic contact layer is p ⁺ -type InGaAsP, the P-type light-transmitting layer is p ⁺ -type InP, the first grooved graded layer is p ⁺ -type InAlAs, and the second A light absorbing layer is graded p-type doped InGaAs, the second light absorbing layer is undoped InGaAs, the second band groove graded layer is undoped InAlAs, and the first p-type electric field control layer is p-type doped InAlAs, the second p-type electric field control layer is p-type doped InP, the third p-type electric field control layer is p-type doped InAlAs, the accumulation layer is undoped InAlAs, the N-type charging layer is n ⁺ -type doped InAlAs, the transmission layer is undoped InP, and the N-type ohmic contact layer is n ⁺ -type doped InP.

In the foregoing embodiment of the present invention, the P-type ohmic contact layer is p ⁺ -type In _1-x Ga _x As _y P _1-y , and x is 0.21 and y is 0.45.

In the above embodiment of the present invention, the first light absorbing layer is graded p-type doped In _x Ga _1-x As, and the second light absorbing layer is undoped In _x Ga _1-x As, And x is 0.53.

In the above embodiment of the present invention, the first and third P-type electric field control layers are p-type doped In _x Al _1-x As, and x is 0.52.

In the above embodiment of the present invention, the accumulation layer is undoped In _x Al _1-x As, and x is 0.52.

In the above embodiment of the present invention, the N-type charging layer is n ⁺ -type doped In _x Al _1-x As, and x is 0.52.

In the above embodiment of the present invention, the thickness of the first P-type electric field control layer is 600 Å The thickness of the second and third P-type electric field control layers is within ±20% of 300 Å.

Please refer to "Figure 1 and Figure 2", which are respectively a preferred embodiment of the present invention The cross-sectional schematic diagram and the schematic diagram of the two-dimensional electric field distribution in the collapse operation of the simulation of the present invention. As shown in the figure: the present invention is a mixed-layer composite charging layer accumulative breakdown photodiode, its structure (from Top to Bottom) is composed of a P-type ohmic contact layer (Ohmic Contact Layer) 11, a P-type light-transmitting layer (Window Layer) 12, a first graded bandgap layer (graded bandgap layer) 13, a first light absorption layer (absorption layer) 14, a second light absorbing layer 15, a second grooved gradient layer 16, a A first P-type electric field control layer (Field Control Layer) 17, a second P-type electric field control layer 18, a third P-type electric field control layer 19, a Multiplication Layer (M-Layer) 20, a N A type charge layer (Charge Layer) 21, a transport layer (Transport Layer) 22, and an N-type ohmic contact layer 23 are composed of an epitaxial layer structure with the cathode (n-side (M-layer) down) electrode underneath, A three-layer P-type electric field control layer is designed with a mixed-layer composite charge (composite charge), and the heterojunction structure of the first, second and third P-type electric field control layers 17, 18 and 19 are used in the first, second and third P-type electric field control layers. A mesa structure is chemically selectively etched between the second P-type electric field control layers 17 and 18, so that the electric field of the accumulating layer 20 is confined to the center of the device by the mesa structure.

The aforementioned P-type ohmic contact layer 11 is a p ⁺ -type doped indium gallium arsenide (InGaAsP) used as a P-type electrode, and the P-type ohmic contact layer 11 may further include a P -Type metal conductive layer (not shown in the figure); wherein the thickness of the P-type ohmic contact layer 11 is within ±20% of 1500 Å.

The P-type transparent layer 12 is made of p ⁺ -type doped indium phosphide (InP), and is sandwiched between the P-type ohmic contact layer 11 and the N-type ohmic contact layer 23; wherein the P-type transparent layer The thickness of the optical layer 12 is within ±20% of 5000 Å.

The first grooved graded layer 13 is a multilayer graded p ⁺ -type doped indium gallium arsenide (InGaAs) or indium aluminum arsenide (AlInAs), and is sandwiched between the P-type transparent layer 12 and the N-type Between the ohmic contact layers 23; wherein the total thickness of the first grooved graded layer 13 is within ±20% of 120 Å.

The first light absorbing layer 14 is made of graded p-type doped InGaAs, and is sandwiched between the first Between a grooved graded layer 13 and the N-type ohmic contact layer 23; wherein the thickness of the first light absorbing layer 14 The degree is within ±20% of 4000 Å.

The second light absorbing layer 15 is made of undoped InGaAs, and is sandwiched between the first light absorbing layer Between the receiving layer 14 and the N-type ohmic contact layer 23; wherein the thickness of the second light absorbing layer 15 is within the range of ±20% of 3500 Å.

The second grooved graded layer 16 is undoped InGaAs or AlInAs, and is sandwiched Between the second light absorbing layer 15 and the N-type ohmic contact layer 23; wherein the total thickness of the second grooved graded layer 16 is within the range of ±20% of 80 Å.

The first P-type electric field control layer 17 is made of p-type doped InAlAs, and is sandwiched between the Between the second grooved graded layer 16 and the N-type ohmic contact layer 23; wherein the thickness of the first P-type electric field control layer 17 is within ±20% of 600 Å.

The second P-type electric field control layer 18 is made of p-type doped InP, and is sandwiched between the first Between the P-type electric field control layer 17 and the N-type ohmic contact layer 23; wherein the thickness of the second P-type electric field control layer 18 is within ±20% of 300 Å.

The third P-type electric field control layer 19 is made of p-type doped InAlAs, and is sandwiched between the Between the second P-type electric field control layer 18 and the N-type ohmic contact layer 23; wherein the thickness of the third P-type electric field control layer 19 is within ±20% of 300 Å.

The accumulation layer 20 is made of undoped InAlAs, and is sandwiched between the third P-type electric field control Between the fabricated layer 19 and the N-type ohmic contact layer 23; wherein the thickness of the accumulative layer 20 is within the range of ±20% of 880 Å.

The N-type charging layer 21 is made of n ⁺ -type doped InAlAs and is sandwiched between the accumulation layer 20 and the N-type ohmic contact layer 23; wherein the thickness of the N-type charging layer 21 is 750 Å Within the range of ±20%.

The transmission layer 22 is undoped InP, and is sandwiched between the N-type charging layer 21 and the Between the N-type ohmic contact layer 23; the thickness of the transmission layer 22 is within ±20% of 6000 Å.

The N-type ohmic contact layer 23 is an n ⁺ -type doped InP, used as an N-type electrode, and the N-type ohmic contact layer 23 may further include an N-type metal conductive layer (not shown in the figure) ); The thickness of the N-type ohmic contact layer 23 is within ±20% of 10000 Å.

The epitaxial layer structure 1 of the present invention is grown on a semi-insulating or conductive semiconductor substrate (Figure Not shown in), and between the N-type ohmic contact layer 23 and the semiconductor substrate, a buffer layer 24 is further included; wherein the semiconductor substrate can be made of compound semiconductors, such as gallium arsenide (GaAs) and gallium antimonide (GaSb) , InP or gallium nitride (GaN), or it can be formed by a four-group element semiconductor, such as silicon (Si), and the buffer layer 24 is undoped InP with a thickness of ±20% of 500 Å Within range. If so, a brand-new mixed-layer composite charging layer accumulative breakdown photodiode is formed by the above-disclosed process.

The above-mentioned P-type ohmic contact layer 11 is p ⁺ -type In _1-x Ga _x As _y P _1-y , and x is 0.21 and y is 0.45.

The first light absorbing layer 14 is graded p-type doped In _x Ga _1-x As, and the second light absorbing layer 15 is undoped In _x Ga _1-x As, and x is 0.53.

The first and third P-type electric field control layers 17 and 19 are p-type doped In _x Al _1-x As, the accumulation layer 20 is undoped In _x Al _1-x As, and the N-type The charging layer 21 is n ⁺ -type doped In _x Al _1-x As, and x is 0.52.

The mixed-layer composite charging layer of the present invention accumulates the epitaxial layer structure required by the photodiode Structure 1 The growth method is not limited, and can be any conventional epitaxy growth method and its conditions, preferably molecular beam epitaxy (Molecular Beam Epitaxy, MBE), metal organic chemical vapor phase epitaxy (Metalorganic Chemical Vapor Deposition, MOCVD) or Hydride Vapor Phase Epitaxy (Hydride Vapor Phase Epitaxy, HVPE) and other epitaxial growth methods are formed on semiconductor substrates.

The invention considers the reliability, adopts the structure of the epitaxial layer with the cathode electrode below, so that the accumulation layer 20 The area with the strongest electric field is covered on the bottom layer of the device to avoid surface breakdown. Compared with the aforementioned patent (TW I595678), the present invention adopts a mixed-layer composite charging design, which combines a single P-type electric field control layer Divided into three layers of different materials, and each other is a heterogeneous junction structure, by controlling the relative concentration distribution and thickness of the first, second and third P-type electric field control layers 17, 18 and 19, and chemically selective etching A bump shape. Since the first P-type electric field control layer 17 and the second P-type electric field control layer 18 are made of p-type doped InAlAs and InP, respectively, the two can be selectively etched through this single bump structure This allows part of the first P-type electric field control layer 17 to be etched away while exposing the lower part of the second P-type electric field control layer 18 to the air, thereby confining the electric field of the accumulating layer 20 to the center of the structure. Electricity can be concentrated, so that the fringe electric field is low without collapsing, so as to achieve the effect of faster overall speed and higher strength.

Moreover, since the electric field at the center of the accumulating layer is very high, the present invention is modified by the above-mentioned structure. Good, the electric field can be 1000 kv, so that the center of the accumulative layer 20 can have a very high electric field. As shown in figure 2, under the boss (below 20 um in the figure), the 20 dashed line of the accumulative layer can have 1000 kv (as shown in figure 1), and its fringe electric field can be beyond 20 um. When pressed down to 370 kv, no crash will occur. This is due to the fact that a bump shape is etched between the first P-type electric field control layer 17 and the second P-type electric field control layer 18, so that the speed of the device can be made faster, and the mentioned cumulative increase The breakdown photodiode has the effect of fast response speed and high efficiency.

It can be seen from Figure 2 that the electric field is particularly strong in the middle of the x direction. Because of the good limitation in the middle, the electric field at the edge can be reduced.

It can be seen from the above that the present invention is a novel InAlAs cumulatively increasing breakdown photodiode (APD , Avalanche Photodiode) structure, adopting a hybrid charging design, a single P-type electric field control layer is divided into three different materials, and each other is a heterogeneous junction structure, by controlling the first, second and third P-type electric field control The relative concentration distribution and thickness of the layers, as well as chemically selectively etched a bump shape. Through this single bump structure, part of the first P-type electric field control layer can be etched away and part of the second P-type The electric field control layer is exposed to the air, so that the electric field of the accumulating layer can be confined to the center of the structure, so that the electric power can be concentrated, so that the fringe electric field is low without collapsing, so as to achieve the effect of faster overall speed and higher strength. The proposed mixed-layer composite charging layer accumulates and collapses the photodiode to achieve better sensitivity and has fast response speed and high efficiency. As a result, the present invention can be applied to the development of high-capacity, long-distance Ethernet transmission of high-speed (greater than 25 Gbit/sec) and high linearity cumulative crash detection diodes.

In summary, the present invention is a mixed-layer composite charging layer cumulatively increasing breakdown light diode, It can effectively improve the various shortcomings of conventional use. It adopts a mixed-layer composite charging design to divide a single P-type electric field control layer into three different materials, and each other is a heterogeneous junction structure, by controlling the first, second and third P-type The relative concentration distribution and thickness of the electric field control layer, as well as the chemical selective etching to form a bump shape. Through this single bump structure, part of the first P-type electric field control layer can be etched away and the lower part of the second The P-type electric field control layer is exposed to the air, so that the electric field of the accumulated layer can be confined to the center of the structure, so that the electric power can be concentrated, so that the fringe electric field is low without collapsing, so that the overall speed becomes faster and the intensity becomes higher. Efficacy, so that the invention can be produced more progressively, more practically, and more in line with the needs of users. It has indeed met the requirements of an invention patent application.

However, the above are only the preferred embodiments of the present invention and should not be limited by this The scope of implementation of the present invention; therefore, all simple equivalent changes and modifications made in accordance with the scope of the patent application of the present invention and the content of the description of the invention should still fall within the scope of the patent of the present invention.

(Part of the present invention) 1: Epitaxy layer structure 11: P-type ohmic contact layer 12: P-type light-transmitting layer 13: The first gradation layer with grooves 14: The first light absorbing layer 15: The second light absorbing layer 16: The second gradation layer with grooves 17: The first P-type electric field control layer 18: The second P-type electric field control layer 19: The third P-type electric field control layer 20: Accumulated layers 21: N-type charging layer 22: Transport layer 23: N-type ohmic contact layer 24: Buffer layer (Traditional part) 3: High electric field area 40: N-type contact layer 41: fringe field buffer layer 42: N-type charging layer 43: Indium arsenide aluminum accumulation layer 44: P-type charging layer 45: undoped indium gallium arsenide absorber layer 46: P-type indium gallium arsenide absorption layer 47: P-type contact layer 48: Semi-insulating InP substrate 49: Anti-reflection layer

Figure 1 is a schematic cross-sectional view of a preferred embodiment of the present invention. Figure 2 is a schematic diagram of the two-dimensional electric field distribution during the collapse operation of the present invention. Figure 3 is a schematic cross-sectional view of the conventional InAlAs APD structure. Figure 4 is a schematic cross-sectional view of another conventional InAlAs APD structure.

1: Epitaxy layer structure

11: P-type ohmic contact layer

12: P-type light-transmitting layer

13: The first grooved gradient layer

14: The first light absorbing layer

15: second light absorbing layer

16: The second grooved gradient layer

17: The first P-type electric field control layer

18: The second P-type electric field control layer

19: The third P-type electric field control layer

20: cumulative layer

21: N-type charging layer

22: Transport layer

23: N-type ohmic contact layer

24: buffer layer

Claims (10)

A mixed-layer composite charging layer accumulative breakdown photodiode, which includes: a P-type ohmic contact layer (Ohmic Contact Layer), which is a p ⁺ -type doped first semiconductor; and an N-type ohmic contact layer, which is n ⁺ -type doped second semiconductor; a P-type light-transmitting layer (Window Layer), which is a p ⁺ -type doped third semiconductor, and is sandwiched between the P-type ohmic contact layer and the N-type ohmic contact layer Between the contact layers; a first graded bandgap layer, which is a p ⁺ -type doped fourth semiconductor, and is sandwiched between the P-type transparent layer and the N-type ohmic contact layer A first light absorption layer (Absorption Layer), which is a graded p-type doped fifth semiconductor, and is sandwiched between the first grooved graded layer and the N-type ohmic contact layer; a second light The absorption layer is an undoped sixth semiconductor and is sandwiched between the first light absorption layer and the N-type ohmic contact layer; a second grooved graded layer is an undoped seventh semiconductor , And sandwiched between the second light absorbing layer and the N-type ohmic contact layer; a first P-type field control layer (Field Control Layer), which is a p-type doped eighth semiconductor, and sandwiched Between the second grooved graded layer and the N-type ohmic contact layer; a second P-type electric field control layer, which is a p-type doped ninth semiconductor, is sandwiched between the first P-type electric field control layer Layer and the N-type ohmic contact layer; a third P-type electric field control layer, which is a tenth p-type doped semiconductor, sandwiched between the second P-type electric field control layer and the N-type ohmic contact Between the layers; a multiplication layer, which is an undoped eleventh semiconductor, and is sandwiched between the third p-type electric field control layer and the n-type ohmic contact layer; a n-type charging The charge layer is an n+-type doped twelfth semiconductor, and is sandwiched between the accumulating layer and the N-type ohmic contact layer; and a transport layer, which is undoped The thirteenth semiconductor is mixed and sandwiched between the N-type charging layer and the N-type ohmic contact layer; the structure of the mixed-layer composite charging layer accumulates and collapses the photodiode (from Top to Bottom) is composed of the above-mentioned P Type ohmic contact layer, P-type light-transmitting layer, first grooved graded layer, first light absorbing layer, second light absorbing layer, second grooved graded layer, first P-type electric field control layer, second P-type electric field The control layer, the third P-type electric field control layer, the accumulating layer, the N-type charging layer, the transmission layer, and the N-type ohmic contact layer are composed of the epitaxial crystal with the cathode (n-side (M-layer) down) electrode underneath. Layer structure. Three layers of P-type electric field control layers are designed by hybrid charge (composite charge), and the heterojunction structure of the first, second and third P-type electric field control layers is used in the first, second, and third P-type electric field control layers. A mesa structure is chemically selectively etched between the second P-type electric field control layers, so that the electric field of the accumulating layer is confined to the center of the device by the mesa structure. According to the mixed-layer composite charging layer accumulative breakdown photodiode described in item 1 of the scope of patent application, the epitaxial layer structure is grown on a semi-insulating or conductive semiconductor substrate, and the N-type ohmic contact layer and A buffer layer is further included between the semiconductor substrates. According to the mixed-layer composite charging layer accumulative breakdown photodiode described in item 1 of the scope of patent application, the p-type ohmic contact layer is p ⁺ -type indium gallium arsenide phosphorous (InGaAsP), and the p-type transparent layer Is p ⁺ -type indium phosphide (InP), the first grooved graded layer is p ⁺ -type indium gallium arsenide (InGaAs), the first light absorbing layer is graded p-type doped InGaAs, the first The two light absorbing layers are undoped InGaAs, the second grooved graded layer is undoped InGaAs, the first p-type electric field control layer is p-type doped indium aluminum arsenide (InAlAs), the second The two P-type electric field control layers are p-type doped InP, the third P-type electric field control layer is p-type doped InAlAs, the accumulation layer is undoped InAlAs, and the N-type charging layer is n ⁺ -Type doped InAlAs, the transmission layer is undoped InP, and the N-type ohmic contact layer is n ⁺ -type doped InP. According to the mixed-layer composite charging layer accumulative breakdown photodiode described in item 1 of the scope of patent application, the p-type ohmic contact layer is p ⁺ -type InGaAsP, and the p-type light-transmitting layer is p ⁺ -type InP, The first grooved graded layer is p ⁺ -type InAlAs, the first light absorbing layer is graded p-type doped InGaAs, the second light absorbing layer is undoped InGaAs, and the second grooved graded layer Is undoped InAlAs, the first p-type electric field control layer is p-type doped InAlAs, the second p-type electric field control layer is p-type doped InP, and the third p-type electric field control layer is p-type doped InAlAs, the accumulation layer is undoped InAlAs, the N-type charging layer is n ⁺ -type doped InAlAs, the transmission layer is undoped InP, and the N-type ohmic contact The layer is n ⁺ -type doped InP. According to the mixed-layer composite charging layer accumulative breakdown photodiode described in item 3 or 4 of the scope of patent application, the p-type ohmic contact layer is p ⁺ -type In _1-x Ga _x As _y P _1-y , And the x system is 0.21, and the y system is 0.45. According to item 3 or 4 of the scope of patent application, the mixed-layer composite charging layer accumulates and collapses the photodiode, wherein the first light absorbing layer is a graded p-type doped In _x Ga _1-x As, and the The second light absorbing layer is undoped In _x Ga _1-x As, and x is 0.53. According to the mixed-layer composite charging layer accumulative breakdown photodiode described in item 3 or 4 of the scope of patent application, wherein the first and third p-type electric field control layers are p-type doped In _x Al _1-x As, and x is 0.52. According to the mixed-layer composite charging layer described in item 3 or 4 of the scope of patent application, the accumulating breakdown photodiode, wherein the accumulating layer is undoped In _x Al _1-x As, and x is 0.52. According to the mixed-layer composite charging layer described in item 3 or 4 of the scope of patent application, the N-type charging layer is n ⁺ -type doped In _x Al _1-x As, and x is Is 0.52. According to the mixed-layer composite charging layer accumulative breakdown photodiode described in item 1 of the scope of patent application, the thickness of the first P-type electric field control layer is within ±20% of 600 Å, and the second and the first The thickness of the triple P-type electric field control layer is within ±20% of 300 Å.

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