TWI727868B - Dimming device and dimming system - Google Patents

Dimming device and dimming system Download PDF

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TWI727868B
TWI727868B TW109125150A TW109125150A TWI727868B TW I727868 B TWI727868 B TW I727868B TW 109125150 A TW109125150 A TW 109125150A TW 109125150 A TW109125150 A TW 109125150A TW I727868 B TWI727868 B TW I727868B
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logic
light
output
signal
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TW202205914A (en
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江定達
尤寶勳
張嘉顯
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聚積科技股份有限公司
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一種調光系統包含N個串聯的發光單元、一脈波產生電路、一邏輯控制電路,及一遲滯比較電路,第一個發光單元接收一具有一原始脈波寬度的輸出電流,該脈波產生電路電連接該等發光單元,並輸出N個脈波信號,該邏輯控制電路電連接該脈波產生電路,該遲滯比較電路電連接該邏輯控制電路與該等發光單元,當其中至少一脈波信號的電壓準位為邏輯1,該遲滯比較電路受控提供該輸出電流到該等發光單元,當該等脈波信號的電壓準位皆為邏輯0,該遲滯比較電路受控不提供該輸出電流到該等發光單元。A dimming system includes N light-emitting units connected in series, a pulse wave generating circuit, a logic control circuit, and a hysteresis comparison circuit. The first light-emitting unit receives an output current with an original pulse wave width, and the pulse wave generates The circuit is electrically connected to the light-emitting units and outputs N pulse signals, the logic control circuit is electrically connected to the pulse wave generating circuit, and the hysteresis comparison circuit is electrically connected to the logic control circuit and the light-emitting units. When at least one of the pulse waves is The voltage level of the signal is logic 1, and the hysteresis comparison circuit is controlled to provide the output current to the light-emitting units. When the voltage levels of the pulse signals are all logic 0, the hysteresis comparison circuit is controlled to not provide the output Electric current flows to the light-emitting units.

Description

調光裝置與調光系統Dimming device and dimming system

本發明是有關於一種控制裝置與控制系統,特別是指一種用於控制發光二極體發光亮度的調光裝置與調光系統。 The invention relates to a control device and a control system, in particular to a dimming device and a dimming system for controlling the brightness of a light-emitting diode.

參閱圖1,為現有的調光(Shunt Dimming)系統,該調光電路是藉由遲滯型電源供應器(SMPS:Switch Mode Power Supply)驅動多個發光二極體發光,其供電機制如下:配合參閱圖2,當電感101的感應電流IL大於一第一參考電壓REF1時,遲滯比較器102的輸出信號Vg的電壓準位切換為邏輯0,當電感101的感應電流IL小於一第二參考電壓REF2時,遲滯比較器102的輸出信號Vg的電壓準位切換為邏輯1,進而將電感101的感應電流IL控制在該第一參考電壓REF1與該第二參考電壓REF2之間,使得整體的平均電流值即為該第一參考電壓REF1與該第二參考電壓REF2的平均值,接著再依據實際需求自外部提供多個分別控制多個開關M1~MN導通/不導通的控制訊號PWM1~PWMN,進而控制多個發光二極體LED1~LEDN呈現對應的調光。 Refer to Figure 1, which shows the existing Shunt Dimming system. The dimming circuit drives multiple light-emitting diodes to emit light with a hysteresis power supply (SMPS: Switch Mode Power Supply). The power supply mechanism is as follows: Referring to FIG. 2, when the induced current I L of the inductor 101 is greater than a first reference voltage REF1, the voltage level of the output signal V g of the hysteresis comparator 102 is switched to logic 0. When the induced current I L of the inductor 101 is less than a first reference voltage REF1, When the reference voltage REF2 is two, the voltage level of the output signal V g of the hysteresis comparator 102 is switched to logic 1, thereby controlling the induced current IL of the inductor 101 between the first reference voltage REF1 and the second reference voltage REF2 , So that the overall average current value is the average value of the first reference voltage REF1 and the second reference voltage REF2, and then a plurality of switches M 1 ~M N are controlled to be turned on/off from the outside according to actual requirements. The control signals PWM 1 ~PWM N control multiple light-emitting diodes LED 1 ~ LED N to present corresponding dimming.

配合參閱圖3,一般而言,該感應電流IL並非為穩定值,其波型是伴隨切換頻率不同而有所變動的漣波,在高輝度需求時由於該等控制訊號PWM1~PWMN的責任週期大於感應電流IL的多個週期,因此,雖然外部提供的該等控制訊號PWM1~PWMN的週期與感應電流IL週期不相同,也就是開關M1~MN開啟時間與遲滯型電源供應器的切換頻率的非同步,然而其差異對於整體平均電流而言影響極低,也就是控制訊號各個週期所對應的各個感應電流IL的平均值差異極小,對於人腦感受到的視覺效果而言,不易查覺發光二極體因接收電流不同導致閃爍的情況。 With reference to Figure 3, generally speaking, the induced current I L is not a stable value. Its waveform is a ripple that varies with the switching frequency. When high brightness is required, the control signals PWM 1 ~PWM N The duty cycle is greater than the multiple cycles of the induced current I L. Therefore, although the cycles of the externally provided control signals PWM 1 ~PWM N are different from the induced current I L cycle, that is, the opening time of the switches M 1 ~M N is different from that of the induced current I L. The switching frequency of the hysteresis power supply is asynchronous, but the difference has very little effect on the overall average current, that is , the average difference of the induced current I L corresponding to each cycle of the control signal is very small, which is very small for the human brain. As far as the visual effect is concerned, it is not easy to detect the flickering of the light-emitting diode due to the different receiving current.

當所需要的輝度變低,代表調光訊號的責任週期跟著變小(例如接近0%),由於控制訊號PWM1~PWMN(在此以PWM1及PWM2舉例說明)的責任週期小於感應電流IL的一個週期,如圖3的△t1與△t2的二個時段,此時非同步的差異所占的比例大幅上升,也就是該二個時段中,PWM1及PWM2對應的感應電流IL平均值大小不同,將使得發光二極體LED1在△t1、△t2的二個時段接收的輸出電流ILED1,或發光二極體LED2在△t1、△t2的二個時段接收的輸出電流ILED2大小不同,使得亮度有所變化,進而使人腦視覺感受到發光二極體因接收電流不同導致閃爍的效果,於是,現有的調光系統有改善的必要。 When the required brightness becomes lower, the duty cycle of the dimming signal becomes smaller (for example, close to 0%). Because the duty cycle of the control signal PWM 1 ~ PWM N (PWM 1 and PWM 2 are used for example) is shorter than the induction A cycle of the current I L is shown in the two periods of △t 1 and △t 2 as shown in Figure 3. At this time, the proportion of the non-synchronized difference rises sharply, that is, in the two periods, PWM 1 and PWM 2 correspond to The average value of the induced current I L is different, which will make the output current I LED1 received by the light-emitting diode LED1 in the two periods of △t 1 and △t 2 , or the light-emitting diode LED2 at △t 1 , △t 2 The output current I LED2 received during the two periods of time is different, which causes the brightness to change, and the human brain visually feels the effect of the light-emitting diode flickering due to the different received current. Therefore, the existing dimming system needs to be improved. .

因此,本發明的一目的,即在提供一種能改善現有技術的缺點的調光裝置。 Therefore, an object of the present invention is to provide a dimming device that can improve the shortcomings of the prior art.

於是,本發明調光裝置適用於產生一輸出電流到N個串聯的發光單元,每一發光單元受控制而切換於一發光狀態及一非發光狀態其中之一,N≧2,該調光裝置包含一脈波產生電路、一邏輯控制電路,及一遲滯比較電路。 Therefore, the dimming device of the present invention is suitable for generating an output current to N light-emitting units connected in series, and each light-emitting unit is controlled to switch to one of a light-emitting state and a non-light-emitting state. N≧2, the dimming device It includes a pulse wave generating circuit, a logic control circuit, and a hysteresis comparison circuit.

該脈波產生電路電連接該等發光單元,並輸出N個脈波信號,每一脈波信號各自具有一脈波寬度,該脈波產生電路根據該等脈波信號分別控制該等發光單元各自切換於該發光狀態與該非發光狀態其中之一。 The pulse wave generating circuit is electrically connected to the light-emitting units and outputs N pulse wave signals, each of which has a pulse wave width. The pulse wave generating circuit controls each of the light-emitting units according to the pulse wave signals. Switch to one of the light-emitting state and the non-light-emitting state.

該邏輯控制電路電連接該脈波產生電路,並根據該等脈波信號的振幅變化而產生對應的輸出信號。 The logic control circuit is electrically connected to the pulse wave generating circuit, and generates corresponding output signals according to changes in the amplitude of the pulse wave signals.

該遲滯比較電路電連接該邏輯控制電路與該等發光單元,該遲滯比較電路根據該邏輯控制電路的輸出信號的變化產生一對應的感應電流,並受控地根據該感應電流產生該輸出電流到該等發光單元,且該遲滯比較電路根據該感應電流的變化而輸出一第一邏輯信號,及一第二邏輯信號其中之一到該邏輯控制電路。。 The hysteresis comparison circuit is electrically connected to the logic control circuit and the light-emitting units. The hysteresis comparison circuit generates a corresponding induced current according to the change of the output signal of the logic control circuit, and generates the output current according to the induced current in a controlled manner. The light-emitting units and the hysteresis comparison circuit output one of a first logic signal and a second logic signal to the logic control circuit according to the change of the induced current. .

當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較電路輸出該第一邏輯信號,該邏輯控制電路控制該遲滯比較 電路提供該輸出電流到該等發光單元,且其中一對應的發光單元切換於該發光狀態。 When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparison circuit outputs the first logic signal, the logic control circuit controls the hysteresis comparison The circuit provides the output current to the light-emitting units, and one of the corresponding light-emitting units switches to the light-emitting state.

當該等脈波信號的電壓準位皆為邏輯0,該邏輯控制電路控制該遲滯比較電路不提供該輸出電流到該等發光單元,且該等發光單元切換於該非發光狀態。 When the voltage levels of the pulse signals are all logic 0, the logic control circuit controls the hysteresis comparison circuit not to provide the output current to the light-emitting units, and the light-emitting units switch to the non-light-emitting state.

又,本發明的另一目的,即在提供一種能改善至少一個現有技術的缺點的調光系統。 Moreover, another object of the present invention is to provide a dimming system that can improve at least one of the disadvantages of the prior art.

於是,本發明調光系統包含N個串聯的發光單元、一脈波產生電路、一邏輯控制電路,及一遲滯比較電路。 Therefore, the dimming system of the present invention includes N light-emitting units connected in series, a pulse wave generating circuit, a logic control circuit, and a hysteresis comparison circuit.

該N個發光單元中的第一個發光單元接收一輸出電流,且每一發光單元受控制而切換於一發光狀態及一非發光狀態其中之一,N≧2。 The first light-emitting unit among the N light-emitting units receives an output current, and each light-emitting unit is controlled to switch to one of a light-emitting state and a non-light-emitting state, N≧2.

該脈波產生電路電連接該等發光單元,並輸出N個脈波信號,每一脈波信號各自具有一脈波寬度,該脈波產生電路根據該等脈波信號分別控制該等發光單元各自切換於該發光狀態與該非發光狀態其中之一。 The pulse wave generating circuit is electrically connected to the light-emitting units and outputs N pulse wave signals, each of which has a pulse wave width. The pulse wave generating circuit controls each of the light-emitting units according to the pulse wave signals. Switch to one of the light-emitting state and the non-light-emitting state.

該邏輯控制電路電連接該脈波產生電路,並根據該等脈波信號的振幅變化而產生對應的輸出信號。 The logic control circuit is electrically connected to the pulse wave generating circuit, and generates corresponding output signals according to changes in the amplitude of the pulse wave signals.

該遲滯比較電路電連接該邏輯控制電路與該等發光單元,該遲滯比較電路根據該邏輯控制電路的輸出信號的變化產生一 對應的感應電流,並受控地根據該感應電流產生該輸出電流到該等發光單元,且該遲滯比較電路根據該感應電流的變化而輸出一第一邏輯信號,及一第二邏輯信號其中之一到該邏輯控制電路。 The hysteresis comparison circuit is electrically connected to the logic control circuit and the light-emitting units, and the hysteresis comparison circuit generates an output signal according to the change in the output signal of the logic control circuit. Corresponds to the induced current, and generates the output current to the light-emitting units according to the induced current in a controlled manner, and the hysteresis comparison circuit outputs a first logic signal and a second logic signal according to the change of the induced current. One to the logic control circuit.

當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較電路輸出該第一邏輯信號,該邏輯控制電路控制該遲滯比較電路提供該輸出電流到該等發光單元,且其中一對應的發光單元切換於該發光狀態。 When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparison circuit outputs the first logic signal, the logic control circuit controls the hysteresis comparison circuit to provide the output current to the light-emitting units, and A corresponding light-emitting unit is switched to the light-emitting state.

當該等脈波信號的電壓準位皆為邏輯0,該邏輯控制電路控制該遲滯比較電路不提供該輸出電流到該等發光單元,且該等發光單元切換於該非發光狀態。 When the voltage levels of the pulse signals are all logic 0, the logic control circuit controls the hysteresis comparison circuit not to provide the output current to the light-emitting units, and the light-emitting units switch to the non-light-emitting state.

本發明的功效在於:藉由該邏輯控制電路依據該等脈波信號的電壓準位控制該遲滯比較電路的輸出電流,當該等脈波信號的電壓準位皆為邏輯0時,使該遲滯比較電路不輸出該輸出電流到該等發光單元,當該等脈波信號的電壓準位其中至少一為邏輯1時,使該遲滯比較電路同步輸出該輸出電流到該等發光單元,使該等發光單元在導通狀態時接收的輸出電流的平均值一致而不產生亮度變化。 The effect of the present invention is that the logic control circuit controls the output current of the hysteresis comparison circuit according to the voltage levels of the pulse signals, and when the voltage levels of the pulse signals are all logic 0, the hysteresis The comparison circuit does not output the output current to the light-emitting units. When at least one of the voltage levels of the pulse wave signals is logic 1, the hysteresis comparison circuit synchronously outputs the output current to the light-emitting units so that the The average value of the output current received by the light-emitting unit in the on state is the same without changing the brightness.

101:電感 101: Inductance

REF1:第一參考電壓 REF1: the first reference voltage

REF2:第二參考電壓 REF2: second reference voltage

M1~MN:開關 M 1 ~M N : switch

LED1~LEDN:發光二極體 LED 1 ~LED N : Light-emitting diode

IL:感應電流 I L : induced current

ILED:輸出電流 I LED : output current

2:發光單元 2: Light-emitting unit

21:負載開關 21: Load switch

22:發光件 22: luminous parts

3:脈波產生電路 3: Pulse wave generating circuit

31:微控制器 31: Microcontroller

32:反向器 32: reverser

4:邏輯控制電路 4: Logic control circuit

41:第一邏輯閘 41: The first logic gate

42:第二邏輯閘 42: The second logic gate

5:遲滯比較電路 5: Hysteresis comparison circuit

51:控制開關 51: Control switch

52:電感 52: Inductance

53:二極體 53: Diode

54:電壓源 54: Voltage source

55:遲滯比較器 55: Hysteresis comparator

本發明的其他的特徵及功效,將於參照圖式的實施方式 中清楚地呈現,其中:圖1是一電路圖,說明現有的調光系統;圖2是一時序圖,說明該調光系統的一電感的輸出電流與一遲滯比較器的輸出信號的對應關係;圖3是一時序圖,說明該調光系統的該電感的輸出電流、驅動發光二極體的輸出電流,與脈波信號三者對應關係;圖4是一電路圖,說明本發明調光系統的一實施例;及圖5是一時序圖,說明該實施例的一電感的輸出電流、脈波信號、一邏輯控制電路4的輸出信號、及驅動發光二極體的輸出電流各自對應關係。 The other features and effects of the present invention will be described with reference to the drawings. Figure 1 is a circuit diagram illustrating the existing dimming system; Figure 2 is a timing diagram illustrating the corresponding relationship between the output current of an inductor of the dimming system and the output signal of a hysteresis comparator; Fig. 3 is a timing diagram illustrating the corresponding relationship between the output current of the inductor and the output current of the driving light-emitting diode of the dimming system, and the pulse wave signal; Fig. 4 is a circuit diagram illustrating the dimming system of the present invention An embodiment; and FIG. 5 is a timing diagram illustrating the corresponding relationship between the output current of an inductor, the pulse signal, the output signal of a logic control circuit 4, and the output current of driving the light-emitting diodes of this embodiment.

參閱圖4,本發明調光系統的一實施例,包含N個串聯的發光單元2、一脈波產生電路3、一邏輯控制電路4,及一遲滯比較電路5。 Referring to FIG. 4, an embodiment of the dimming system of the present invention includes N light-emitting units 2 connected in series, a pulse generation circuit 3, a logic control circuit 4, and a hysteresis comparison circuit 5.

該N個發光單元2中的第一個接收一輸出電流ILED,且每一發光單元2受控制而切換於一發光狀態及一非發光狀態其中之一,N≧2,該等發光單元2分別包括一負載開關21,及一發光件22,每一發光件22各自與每一負載開關21並聯。 The first of the N light-emitting units 2 receives an output current I LED , and each light-emitting unit 2 is controlled to switch to one of a light-emitting state and a non-light-emitting state, N≧2, the light-emitting units 2 Each light-emitting element 22 includes a load switch 21 and a light-emitting element 22, and each light-emitting element 22 is connected in parallel with each load switch 21.

該脈波產生電路3電連接該等發光單元2,並輸出N個脈 波信號,每一脈波信號各自具有一脈波寬度,該脈波產生電路3據該等脈波信號分別控制該等發光單元2各自切換於該發光狀態、該非發光狀態其中之一,該脈波產生電路3包括一微控制器31及N個反向器32,該微控制器31產生該N個脈波信號,每一反向器32各自具有一接收每一脈波信號的接收端,及一與其中一發光單元2的電連接的輸出端,更具體地說,每一反向器32的輸出端各自與每一負載開關21電連接,且每一反向器32將接收到的脈波信號進行邏輯轉態,並自該輸出端輸出至對應的負載開關21,須再補充說明的是,前述的發光單元2切換於發光狀態指的是當其中一反向器32的接收端接收電壓準位為邏輯1的脈衝信號時,其輸出端輸出邏輯0的脈波信號,因此對應的發光單元2的負載開關21接收邏輯0的脈波信號而不導通,且該發光單元2的發光件22自該遲滯比較電路5接收該輸出電流ILED而導通發光,該非發光狀態則是該反向器32的接收端接收電壓準位為邏輯0的脈衝信號時,其輸出端輸出邏輯1的脈波信號,因此對應的發光單元2的負載開關21接收邏輯1的脈波信號而導通,且該發光單元2的發光件22不自該遲滯比較電路5接收該輸出電流ILED而不導通,關於該等發光單元2更詳細的發光機制將詳述於後。 The pulse wave generating circuit 3 is electrically connected to the light-emitting units 2 and outputs N pulse wave signals. Each pulse wave signal has a pulse wave width. The pulse wave generating circuit 3 controls the pulse wave signals respectively according to the pulse wave signals. The light-emitting unit 2 is switched to one of the light-emitting state and the non-light-emitting state. The pulse wave generating circuit 3 includes a microcontroller 31 and N inverters 32. The microcontroller 31 generates the N pulse wave signals. Each inverter 32 has a receiving terminal for receiving each pulse signal, and an output terminal electrically connected to one of the light-emitting units 2, more specifically, the output terminal of each inverter 32 is connected to Each load switch 21 is electrically connected, and each inverter 32 performs a logical transition of the received pulse signal and outputs it from the output terminal to the corresponding load switch 21. It should be added that the aforementioned light-emitting The switching of unit 2 to the light-emitting state means that when the receiving end of one of the inverters 32 receives a pulse signal with a voltage level of logic 1, its output end outputs a pulse signal of logic 0, so the corresponding load of the light-emitting unit 2 The switch 21 receives the pulse signal of logic 0 and does not turn on, and the light emitting element 22 of the light emitting unit 2 receives the output current I LED from the hysteresis comparison circuit 5 and turns on and emits light. The non-light emitting state is received by the inverter 32 When the terminal receives a pulse signal whose voltage level is logic 0, its output terminal outputs a pulse signal of logic 1, so the load switch 21 of the corresponding light-emitting unit 2 receives the pulse signal of logic 1 and is turned on, and the light-emitting unit 2 The light emitting element 22 does not receive the output current I LED from the hysteresis comparison circuit 5 and does not turn on. A more detailed light emitting mechanism of the light emitting units 2 will be described later.

該邏輯控制電路4電連接該脈波產生電路3,並根據該等脈波信號的振幅變化而產生對應的輸出信號,具體而言,該邏輯控 制電路4包括一第一邏輯閘41,及一第二邏輯閘42,該第一邏輯閘41為一或閘,其具有N個分別接收該等脈波信號的接收端,及一輸出端,該第二邏輯閘42為一及閘,其具有一電連接該第一邏輯閘41的輸出端的第一接收端、一電連接該遲滯比較電路5以接收該第一邏輯信號與該第二邏輯信號其中之一的第二接收端,及一電連接該遲滯比較電路5的輸出端,該遲滯比較電路5根據該邏輯控制電路4的輸出信號的變化產生一對應的感應電流IL,並根據該感應電流IL產生該輸出電流ILED到該等發光單元2,且該遲滯比較電路5根據該感應電流IL的變化而輸出一第一邏輯信號,及一第二邏輯信號其中之一到該邏輯控制電路4。 The logic control circuit 4 is electrically connected to the pulse wave generating circuit 3, and generates corresponding output signals according to the amplitude changes of the pulse wave signals. Specifically, the logic control circuit 4 includes a first logic gate 41 and a The second logic gate 42. The first logic gate 41 is an OR gate, which has N receiving terminals for receiving the pulse signals, and an output terminal. The second logic gate 42 is an AND gate, which has A first receiving terminal electrically connected to the output terminal of the first logic gate 41, a second receiving terminal electrically connected to the hysteresis comparison circuit 5 to receive one of the first logic signal and the second logic signal, and an electrical Connected to the output terminal of the hysteresis comparison circuit 5, the hysteresis comparison circuit 5 generates a corresponding induced current I L according to the change of the output signal of the logic control circuit 4, and generates the output current I LED according to the induced current I L to the Wait for the light-emitting unit 2 and the hysteresis comparison circuit 5 outputs one of a first logic signal and a second logic signal to the logic control circuit 4 according to the change of the induced current IL.

此外,該遲滯比較電路5還根據該感應電流IL的變化而輸出一第一邏輯信號,及一第二邏輯信號其中之一到該邏輯控制電路4,更詳細地說,該第一邏輯信號的電壓準位是邏輯1,該第二邏輯信號的電壓準位是邏輯0,該遲滯比較電路5在本實施例中為遲滯降壓型直流-直流轉換器,其包括一控制開關51、一電感52、一個二極體53、一電壓源54,及一遲滯比較器55,該控制開關51具有一電連接該第二邏輯閘42的該輸出端的控制端、一電連接該電感52的第一端,及一電連接該電壓源54的第二端,該控制開關51根據其控制端接收的該第二邏輯閘42的輸出端的輸出信號而運作於一導通狀態及一不導通狀態其中之一,該電感52具有一電連接該控制 開關51的該第一端的第一端,及一電連接該N個發光單元2中的第一個的第二端,該電感52用以根據該控制開關51的運作狀態而產生該感應電流IL,進而提供該輸出電流ILED到該等發光單元2, 該二極體53具有一電連接該電感52的該第一端的陰極端,及一電連接該第N個發光單元2的陽極端,該電壓源54具有一電連接該控制開關51的該第二端的陽極端,及一電連接該二極體53的該陽極端的陰極端,該遲滯比較器55電連接該第二邏輯閘42的該第二接收端與該電感52,並根據該電感52的該感應電流IL而輸出該第一邏輯信號,及該第二邏輯信號其中之一(也就是圖5中,信號55_OUT的邏輯變化)到該第二邏輯閘42的該第二接收端。 In addition, the hysteresis comparison circuit 5 also outputs one of a first logic signal and a second logic signal to the logic control circuit 4 according to the change of the induced current IL. In more detail, the first logic signal The voltage level of the second logic signal is logic 1, and the voltage level of the second logic signal is logic 0. In this embodiment, the hysteresis comparison circuit 5 is a hysteresis step-down DC-DC converter, which includes a control switch 51, a Inductor 52, a diode 53, a voltage source 54, and a hysteresis comparator 55. The control switch 51 has a control terminal electrically connected to the output terminal of the second logic gate 42 and a second terminal electrically connected to the inductor 52. One end, and a second end electrically connected to the voltage source 54, the control switch 51 operates in a conducting state and a non-conducting state according to the output signal of the output end of the second logic gate 42 received by its control end One, the inductor 52 has a first end electrically connected to the first end of the control switch 51, and a second end electrically connected to the first one of the N light-emitting units 2, and the inductor 52 is used according to the The operating state of the switch 51 is controlled to generate the induced current I L , and then the output current I LED is provided to the light-emitting units 2, the diode 53 has a cathode terminal electrically connected to the first terminal of the inductor 52, and An anode terminal electrically connected to the Nth light-emitting unit 2, the voltage source 54 has an anode terminal electrically connected to the second terminal of the control switch 51, and a cathode terminal electrically connected to the anode terminal of the diode 53 , The hysteresis comparator 55 is electrically connected to the second receiving end of the second logic gate 42 and the inductor 52, and outputs the first logic signal and the second logic signal according to the induced current IL of the inductor 52 One of them (that is, the logic change of the signal 55_OUT in FIG. 5) goes to the second receiving end of the second logic gate 42.

當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較電路5輸出電壓準位為邏輯1的該第一邏輯信號,此時,該第一邏輯閘41自其輸出端輸出邏輯1的輸出信號(對應圖5的41_OUT的時序變化),該第二邏輯閘42的該第一接收端接收該輸出信號,該第二邏輯閘42的該第二接收端接收該第一邏輯信號,且該第二邏輯閘42自其輸出端輸出邏輯1的輸出信號(對應圖5的42_OUT的時序變化),該邏輯控制電路4控制該遲滯比較電路5提供該輸出電流到該等發光單元2,其中一對應的發光單元2切換於該發光狀態,也就是該控制開關51運作於該導通狀態,對應的負載開關21切換為不導通,該電感52的感應電流IL流向對應的發光件22而形成該輸出 電流ILED;當該等脈波信號的電壓準位皆為邏輯0,該邏輯控制電路控制該遲滯比較電路不提供該輸出電流到該等發光單元,且該等發光單元切換於該非發光狀態,該等負載開關21根據該脈波產生電路3的該等反向器32輸出的信號切換為導通狀態,該第一邏輯閘41自其輸出端輸出邏輯0的輸出信號,該第二邏輯閘42的該第一接收端接收該第一邏輯閘41的該輸出端接收該輸出信號,且該第二邏輯閘42自其輸出端輸出邏輯0的輸出信號,該控制開關51根據該第二邏輯閘42的輸出端的輸出信號而運作於該不導通狀態,該電感52的感應電流IL經由該等負載開關21流向該二極體53,因而無輸出電流ILED流經該等發光單元2。 When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparison circuit 5 outputs the first logic signal whose voltage level is logic 1, at this time, the first logic gate 41 is from its output terminal The output signal of logic 1 is output (corresponding to the timing change of 41_OUT in FIG. 5), the first receiving end of the second logic gate 42 receives the output signal, and the second receiving end of the second logic gate 42 receives the first Logic signal, and the second logic gate 42 outputs the output signal of logic 1 from its output terminal (corresponding to the timing change of 42_OUT in FIG. 5), the logic control circuit 4 controls the hysteresis comparator circuit 5 to provide the output current to the light emitting Unit 2, one of the corresponding light-emitting units 2 is switched to the light-emitting state, that is, the control switch 51 operates in the conductive state, the corresponding load switch 21 is switched to non-conductive, and the induced current IL of the inductor 52 flows to the corresponding light-emitting state. Component 22 to form the output current I LED ; when the voltage levels of the pulse signals are all logic 0, the logic control circuit controls the hysteresis comparison circuit not to provide the output current to the light-emitting units, and the light-emitting units Switching to the non-luminous state, the load switches 21 are switched to the conducting state according to the signals output by the inverters 32 of the pulse generating circuit 3, and the first logic gate 41 outputs a logic 0 output signal from its output terminal, The first receiving terminal of the second logic gate 42 receives the output terminal of the first logic gate 41 to receive the output signal, and the second logic gate 42 outputs a logic 0 output signal from its output terminal, the control switch 51 According to the output signal of the output terminal of the second logic gate 42 to operate in the non-conducting state, the induced current I L of the inductor 52 flows to the diode 53 through the load switches 21, so no output current I LED flows through the Wait for the light-emitting unit 2.

進一步說明當該控制開關51導通/不導通時,該電感52的感應電流IL與該電壓源54的電壓的對應關係,當該控制開關51導通時,該電壓源54對該電感52充電,該電感52的感應電流IL與該電壓源54的電壓變化對應關係為IL=(VIN-VOUT)/L,其中,L為電感52的電感值,VIN為該電感52接收的輸入電壓,VOUT為該電感52的輸出電壓;當該控制開關51不導通時,該電感52開始放電,該電感52的感應電流IL與該電壓源54的電壓變化對應關係為IL=-(VOUT-0.7)/L,其中,0.7為該二極體53的壓降。 To further explain the corresponding relationship between the induced current IL of the inductor 52 and the voltage of the voltage source 54 when the control switch 51 is on/off, when the control switch 51 is on, the voltage source 54 charges the inductor 52, The corresponding relationship between the induced current I L of the inductor 52 and the voltage change of the voltage source 54 is I L =(V IN -V OUT )/L, where L is the inductance value of the inductor 52, and V IN is the value received by the inductor 52 Input voltage, V OUT is the output voltage of the inductor 52; when the control switch 51 is not turned on, the inductor 52 starts to discharge, and the corresponding relationship between the induced current I L of the inductor 52 and the voltage change of the voltage source 54 is I L = -(V OUT -0.7)/L, where 0.7 is the voltage drop of the diode 53.

配合圖4參閱圖5,接著說明本實施例中該感應電流IL,及輸出電流ILED的產生機制:該遲滯比較器55對該電感52產生的電 流進行取樣,在△t1的時段中,當該等脈波信號的電壓準位其中至少一為邏輯1(在本實施例中,以對應於第一個發光件22及第二個發光件22的脈波信號PWM1、PWM2為例),該控制開關51導通,且該遲滯比較器55輸出該第一邏輯信號時,該第二邏輯閘42自其輸出端輸出邏輯1的輸出信號,該控制開關51持續導通,該電感52的感應電流IL遞增,此時對應於該第一個發光件22的第一個負載開關21,及對應於該第二個發光件22的第二個負載開關21皆不導通,且其餘負載開關21導通,因此該輸出電流ILED流向第一個發光件22與第二個發光件22而形成電流ILED1、ILED2,當對應於第一個發光件22的脈波信號PWM1切換為邏輯0,則該電流ILED1對應改變為零,此時由於該第一邏輯閘41持續輸出邏輯1的信號,且該遲滯比較器55根據該感應電流IL輸出該第一邏輯信號,該第二邏輯閘42自其輸出端輸出邏輯1的輸出信號以控制該控制開關51導通,當該感應電流IL大於一第一參考電壓REF1時,該遲滯比較器55輸出該第二邏輯信號,此時,該第二邏輯閘42自其輸出端輸出邏輯0的輸出信號以控制該控制開關51不導通,因此該感應電流IL開始下降,而流向第二個發光件22的電流ILED2則隨其遞減,直到該感應電流IL低於一小於該第一參考電壓REF1的第二參考電壓RREF2時,該遲滯比較器55輸出該第一邏輯信號,此時,該第二邏輯閘42根據該第一邏輯信號,與該脈波信號PWM2自其輸出端輸出邏輯1的輸 出信號以控制該控制開關51導通,因此該感應電流IL開始增加,而流向第二個發光件22的電流ILED2則隨其遞增,接著當該脈波信號PWM2切換為邏輯0時,該第一邏輯閘41輸出邏輯0的信號,因此該第二邏輯閘42自其輸出端輸出邏輯0的輸出信號以控制該控制開關51不導通,此時該感應電流IL開始下降至零,該電流ILED2對應改變為零,且該遲滯比較器55持續輸出該第一邏輯信號,直到△t2時段,該第一邏輯閘41再次接收脈波信號PWM1、PWM2時,該感應電流IL再次受控地產生,並重新提供該電流ILED1、ILED2到對應的發光件22,其運作原理與上述相同不再贅述,值得一提的是,本實施例中,當該第一邏輯閘41接收的脈波信號皆為邏輯0時,藉由該第二邏輯閘42強制輸出邏輯0的輸出信號,使得該感應電流IL遞減為零,當該第一邏輯閘41再次接收邏輯1的脈波信號時,則該感應電流IL與該脈波信號同步產生,因此在每個脈波信號為邏輯1的週期中,可使得對應的輸出電流ILED平均值皆相同。 Refer to FIG. 5 in conjunction with FIG. 4, and then explain the mechanism of generating the induced current I L and the output current I LED in this embodiment: the hysteresis comparator 55 samples the current generated by the inductor 52, and in the period of Δt 1 , When at least one of the voltage levels of the pulse signals is logic 1 (in this embodiment, the pulse signals PWM1 and PWM2 corresponding to the first light-emitting element 22 and the second light-emitting element 22 are taken as an example) When the control switch 51 is turned on and the hysteresis comparator 55 outputs the first logic signal, the second logic gate 42 outputs a logic 1 output signal from its output terminal. The control switch 51 is continuously turned on, and the inductor 52 senses The current I L increases. At this time, the first load switch 21 corresponding to the first light-emitting element 22 and the second load switch 21 corresponding to the second light-emitting element 22 are both non-conducting, and the remaining load switches 21 Therefore, the output current I LED flows to the first light-emitting element 22 and the second light-emitting element 22 to form currents I LED1 and I LED2 . When the pulse signal PWM1 corresponding to the first light-emitting element 22 is switched to logic 0, Then the current I LED1 correspondingly changes to zero. At this time, because the first logic gate 41 continues to output a logic 1 signal, and the hysteresis comparator 55 outputs the first logic signal according to the induced current I L, the second logic gate 42 outputs a logic 1 output signal from its output terminal to control the control switch 51 to turn on. When the induced current IL is greater than a first reference voltage REF1, the hysteresis comparator 55 outputs the second logic signal. At this time, the The second logic gate 42 outputs a logic 0 output signal from its output terminal to control the control switch 51 to be non-conductive, so the induced current IL begins to decrease, and the current I LED2 flowing to the second light emitting element 22 decreases accordingly. Until the induced current IL is lower than a second reference voltage RREF2 that is less than the first reference voltage REF1, the hysteresis comparator 55 outputs the first logic signal. At this time, the second logic gate 42 is based on the first logic Signal, and the pulse signal PWM2 outputs a logic 1 output signal from its output terminal to control the control switch 51 to turn on, so the induced current IL starts to increase, and the current I LED2 flowing to the second light emitting element 22 follows it. Increment, and then when the pulse signal PWM2 switches to logic 0, the first logic gate 41 outputs a logic 0 signal, so the second logic gate 42 outputs a logic 0 output signal from its output terminal to control the control switch 51 No conduction, at this time the induced current I L begins to drop to zero, the current I LED2 correspondingly changes to zero, and the hysteresis comparator 55 continues to output the first logic signal until the Δt 2 period, the first logic gate 41 When the pulse signals PWM1 and PWM2 are received again, the induced current I L is again generated in a controlled manner, and the currents I LED1 and I LED2 are re-provided to the corresponding light-emitting elements 22. The operation principle is the same as the above and will not be repeated. It is mentioned that in this embodiment When the pulse signals received by the first logic gate 41 are all logic 0, the second logic gate 42 is forced to output a logic 0 output signal, so that the induced current I L decreases to zero. When the gate 41 receives the pulse signal of logic 1 again, the induced current I L is generated synchronously with the pulse signal. Therefore, in each period when the pulse signal is logic 1, the average value of the corresponding output current I LED can be made All the same.

綜上所述,藉由該邏輯控制電路4將邏輯1的脈波信號強制與該電感52的感應電流IL同步輸出,因此每一邏輯1的脈波信號在導通期間所對應的輸出電流ILED的平均值皆為相同,也就是說流經發光二極體的電流ILED大小固定,不會產生亮度變化,進而可使人腦視覺感受到發光二極體亮度穩定、不閃爍的效果,故確實能達成本發明的目的。 In summary, the logic control circuit 4 forces the pulse signal of logic 1 to be output synchronously with the induced current IL of the inductor 52. Therefore, the pulse signal of each logic 1 corresponds to the output current I during the conduction period. The average value of the LEDs are all the same, that is to say, the current I LED flowing through the light-emitting diode is fixed, and there will be no brightness change, so that the human brain can visually feel the brightness of the light-emitting diode and does not flicker. Therefore, it can indeed achieve the purpose of the invention.

惟以上所述者,僅為本發明的實施例而已,當不能以此限定本發明實施的範圍,凡是依本發明申請專利範圍及專利說明書內容所作的簡單的等效變化與修飾,皆仍屬本發明專利涵蓋的範圍內。 However, the above are only examples of the present invention. When the scope of implementation of the present invention cannot be limited by this, all simple equivalent changes and modifications made in accordance with the scope of the patent application of the present invention and the content of the patent specification still belong to Within the scope covered by the patent of the present invention.

2:發光單元 2: Light-emitting unit

21:負載開關 21: Load switch

22:發光件 22: luminous parts

3:脈波產生電路 3: Pulse wave generating circuit

31:微控制器 31: Microcontroller

32:反向器 32: reverser

4:邏輯控制電路 4: Logic control circuit

41:第一邏輯閘 41: The first logic gate

42:第二邏輯閘 42: The second logic gate

5:遲滯比較電路 5: Hysteresis comparison circuit

51:控制開關 51: Control switch

52:電感 52: Inductance

53:二極體 53: Diode

54:電壓源 54: Voltage source

55:遲滯比較器 55: Hysteresis comparator

Claims (10)

一種調光裝置,適用於產生一輸出電流到N個串聯的發光單元,每一發光單元受控制而切換於一發光狀態及一非發光狀態其中之一,N≧2,該調光裝置包含: 一脈波產生電路,電連接該等發光單元,並輸出N個脈波信號,每一脈波信號各自具有一導通脈波寬度,該脈波產生電路根據該等脈波信號分別控制該等發光單元各自切換於該發光狀態,與該非發光狀態其中之一; 一邏輯控制電路,電連接該脈波產生電路,並根據該等脈波信號的振幅變化而產生對應的輸出信號; 一遲滯比較電路,電連接該邏輯控制電路與該等發光單元,該遲滯比較電路根據該邏輯控制電路的輸出信號的變化產生一對應的感應電流,並受控地根據該感應電流產生該輸出電流到該等發光單元,且該遲滯比較電路根據該感應電流的變化而輸出一第一邏輯信號,及一第二邏輯信號其中之一到該邏輯控制電路, 當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較電路輸出該第一邏輯信號,該邏輯控制電路控制該遲滯比較電路提供該輸出電流到該等發光單元,且其中一對應的發光單元切換於該發光狀態, 當該等脈波信號的電壓準位皆為邏輯0,該邏輯控制電路控制該遲滯比較電路不提供該輸出電流到該等發光單元,且該等發光單元切換於該非發光狀態。 A dimming device suitable for generating an output current to N light-emitting units connected in series, each light-emitting unit is controlled to switch to one of a light-emitting state and a non-light-emitting state, N≧2, the dimming device includes: A pulse wave generating circuit is electrically connected to the light-emitting units and outputs N pulse wave signals. Each pulse wave signal has an on-pulse width. The pulse wave generating circuit controls the light-emitting units respectively according to the pulse wave signals. Each unit is switched to one of the light-emitting state and the non-light-emitting state; A logic control circuit, electrically connected to the pulse wave generating circuit, and generating corresponding output signals according to changes in the amplitude of the pulse wave signals; A hysteresis comparison circuit electrically connected to the logic control circuit and the light-emitting units, the hysteresis comparison circuit generates a corresponding induced current according to the change of the output signal of the logic control circuit, and generates the output current according to the induced current in a controlled manner To the light-emitting units, and the hysteresis comparison circuit outputs a first logic signal and one of a second logic signal to the logic control circuit according to the change of the induced current, When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparison circuit outputs the first logic signal, the logic control circuit controls the hysteresis comparison circuit to provide the output current to the light-emitting units, and A corresponding light-emitting unit is switched to the light-emitting state, When the voltage levels of the pulse signals are all logic 0, the logic control circuit controls the hysteresis comparison circuit not to provide the output current to the light-emitting units, and the light-emitting units switch to the non-light-emitting state. 如請求項1所述的調光裝置,其中,該邏輯控制電路包括一第一邏輯閘,及一第二邏輯閘, 該第一邏輯閘具有N個分別接收該等脈波信號的接收端,及一輸出端, 該第二邏輯閘具有一電連接該第一邏輯閘的輸出端的第一接收端、一電連接該遲滯比較電路以接收該第一邏輯信號與該第二邏輯信號其中之一的第二接收端,及一電連接該遲滯比較電路的輸出端, 當該等脈波信號其中至少一的電壓準位為邏輯1,且該遲滯比較電路輸出該第一邏輯信號時,該第一邏輯閘自其輸出端輸出邏輯1的輸出信號,該第二邏輯閘的該第一接收端接收該第一邏輯閘的該輸出端接收該輸出信號,該第二邏輯閘的該第二接收端接收該第一邏輯信號,且該第二邏輯閘自其輸出端輸出邏輯1的輸出信號,該遲滯比較電路根據該第二邏輯閘的輸出端的輸出信號而提供該輸出電流到該等發光單元。 The dimming device according to claim 1, wherein the logic control circuit includes a first logic gate and a second logic gate, The first logic gate has N receiving terminals for receiving the pulse wave signals respectively, and an output terminal, The second logic gate has a first receiving terminal electrically connected to the output terminal of the first logic gate, and a second receiving terminal electrically connected to the hysteresis comparison circuit to receive one of the first logic signal and the second logic signal , And an output terminal electrically connected to the hysteresis comparison circuit, When the voltage level of at least one of the pulse signals is logic 1, and the hysteresis comparison circuit outputs the first logic signal, the first logic gate outputs a logic 1 output signal from its output terminal, and the second logic The first receiving terminal of the gate receives the output terminal of the first logic gate and the output terminal receives the output signal, the second receiving terminal of the second logic gate receives the first logic signal, and the second logic gate is from its output terminal The output signal of logic 1 is output, and the hysteresis comparison circuit provides the output current to the light-emitting units according to the output signal of the output terminal of the second logic gate. 如請求項2所述的調光裝置,其中,該遲滯比較電路包括一控制開關、一電感、一個二極體、一電壓源,及一遲滯比較器, 該控制開關具有一電連接該第二邏輯閘的該輸出端的控制端、一電連接該電感的第一端,及一電連接該電壓源的第二端,該控制開關根據其控制端接收的該第二邏輯閘的輸出端的輸出信號而運作於一導通狀態及一不導通狀態其中之一, 該電感具有一電連接該控制開關的該第一端的第一端,及一電連接該N個發光單元中的第一個的第二端,該電感用以根據該控制開關的運作狀態而產生該感應電流,並提供該輸出電流到該等發光單元, 該二極體具有一電連接該電感的該第一端的陰極端,及一電連接該第N個發光單元的陽極端, 該電壓源具有一電連接該控制開關的該第二端的陽極端,及一電連接該二極體的該陽極端的陰極端, 該遲滯比較器電連接該第二邏輯閘的該第二接收端與該電感,並根據該電感的該感應電流而輸出該第一邏輯信號,及該第二邏輯信號其中之一到該第二邏輯閘的該第二接收端, 當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較器輸出該第一邏輯信號,該控制開關運作於該導通狀態,該電感自該電壓源接收電壓而產生該感應電流並提供該輸出電流, 當該等脈波信號的電壓準位皆為邏輯0,該控制開關運作於該不導通狀態,該電感不自該電壓源接收電壓而不產生該感應電流且不提供該輸出電流。 The dimming device according to claim 2, wherein the hysteresis comparison circuit includes a control switch, an inductor, a diode, a voltage source, and a hysteresis comparator, The control switch has a control terminal electrically connected to the output terminal of the second logic gate, a first terminal electrically connected to the inductor, and a second terminal electrically connected to the voltage source. The output signal of the output terminal of the second logic gate operates in one of a conducting state and a non-conducting state, The inductor has a first end electrically connected to the first end of the control switch, and a second end electrically connected to the first one of the N light-emitting units. The inductor is used to change the control switch according to the operating state of the control switch. Generate the induced current and provide the output current to the light-emitting units, The diode has a cathode terminal electrically connected to the first terminal of the inductor, and an anode terminal electrically connected to the Nth light-emitting unit, The voltage source has an anode terminal electrically connected to the second terminal of the control switch, and a cathode terminal electrically connected to the anode terminal of the diode, The hysteresis comparator is electrically connected to the second receiving end of the second logic gate and the inductor, and outputs the first logic signal and one of the second logic signals to the second logic signal according to the induced current of the inductor The second receiving end of the logic gate, When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparator outputs the first logic signal, the control switch operates in the on state, and the inductor receives the voltage from the voltage source to generate the induction Current and provide the output current, When the voltage levels of the pulse signals are all logic 0, the control switch operates in the non-conducting state, the inductor does not receive voltage from the voltage source, does not generate the induced current, and does not provide the output current. 如請求項3所述的調光裝置,其中,當該等脈波信號電壓準位皆為邏輯0,該第一邏輯閘自其輸出端輸出邏輯0的輸出信號,該第二邏輯閘的該第一接收端接收該第一邏輯閘的該輸出端接收該輸出信號,且該第二邏輯閘自其輸出端輸出邏輯0的輸出信號,該控制開關根據該第二邏輯閘的輸出端的輸出信號而運作於該不導通狀態。The dimming device according to claim 3, wherein when the pulse signal voltage levels are all logic 0, the first logic gate outputs a logic 0 output signal from its output terminal, and the second logic gate The first receiving terminal receives the output terminal of the first logic gate to receive the output signal, and the second logic gate outputs an output signal of logic 0 from its output terminal, and the control switch is based on the output signal of the output terminal of the second logic gate And operate in the non-conducting state. 如請求項1所述的調光裝置,其中,該脈波產生電路包括一微控制器,及N個反向器, 該微控制器產生該N個脈波信號, 每一反向器各自具有一接收每一脈波信號的接收端,及一與其中一發光單元電連接的輸出端,每一反向器將接收到的脈波信號進行邏輯轉態,並自該輸出端輸出。 The dimming device according to claim 1, wherein the pulse wave generating circuit includes a microcontroller and N inverters, The microcontroller generates the N pulse wave signals, Each inverter has a receiving terminal for receiving each pulse signal, and an output terminal electrically connected to one of the light-emitting units. Each inverter performs logic transitions on the received pulse signal and automatically This output is output. 如請求項1所述的調光裝置,其中,該第一邏輯信號的電壓準位是邏輯1,該第二邏輯信號的電壓準位是邏輯0。The dimming device according to claim 1, wherein the voltage level of the first logic signal is logic 1, and the voltage level of the second logic signal is logic 0. 一種調光系統,包含: N個串聯的發光單元,第一個發光單元接收一輸出電流,且每一發光單元受控制而切換於一發光狀態及一非發光狀態其中之一,N≧2; 一脈波產生電路,電連接該等發光單元,並輸出N個脈波信號,每一脈波信號各自具有一導通脈波寬度,該脈波產生電路根據該等脈波信號分別控制該等發光單元各自切換於該發光狀態,與該非發光狀態其中之一; 一邏輯控制電路,電連接該脈波產生電路,並根據該等脈波信號的振幅變化而產生對應的輸出信號;及 一遲滯比較電路,電連接該邏輯控制電路與該等發光單元,該遲滯比較電路根據該邏輯控制電路的輸出信號的變化產生一對應的感應電流,並根據該感應電流產生該輸出電流到該等發光單元,且該遲滯比較電路根據該感應電流的變化而輸出一第一邏輯信號,及一第二邏輯信號其中之一到該邏輯控制電路, 當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較電路輸出該第一邏輯信號,該邏輯控制電路控制該遲滯比較電路提供該輸出電流到該等發光單元,且其中一對應的發光單元切換於該發光狀態, 當該等脈波信號的電壓準位皆為邏輯0,該邏輯控制電路控制該遲滯比較電路不提供該輸出電流到該等發光單元,且該等發光單元切換於該非發光狀態。 A dimming system, including: N light-emitting units connected in series, the first light-emitting unit receives an output current, and each light-emitting unit is controlled to switch to one of a light-emitting state and a non-light-emitting state, N≧2; A pulse wave generating circuit is electrically connected to the light-emitting units and outputs N pulse wave signals. Each pulse wave signal has an on-pulse width. The pulse wave generating circuit controls the light-emitting units respectively according to the pulse wave signals. Each unit is switched to one of the light-emitting state and the non-light-emitting state; A logic control circuit, electrically connected to the pulse wave generating circuit, and generating corresponding output signals according to changes in the amplitude of the pulse wave signals; and A hysteresis comparison circuit is electrically connected to the logic control circuit and the light-emitting units. The hysteresis comparison circuit generates a corresponding induced current according to the change of the output signal of the logic control circuit, and generates the output current to the output currents according to the induced current. A light emitting unit, and the hysteresis comparison circuit outputs one of a first logic signal and a second logic signal to the logic control circuit according to the change of the induced current, When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparison circuit outputs the first logic signal, the logic control circuit controls the hysteresis comparison circuit to provide the output current to the light-emitting units, and A corresponding light-emitting unit is switched to the light-emitting state, When the voltage levels of the pulse signals are all logic 0, the logic control circuit controls the hysteresis comparison circuit not to provide the output current to the light-emitting units, and the light-emitting units switch to the non-light-emitting state. 如請求項7所述的調光系統,其中,該邏輯控制電路包括一第一邏輯閘,及一第二邏輯閘, 該第一邏輯閘具有N個分別接收該等脈波信號的接收端,及一輸出端, 該第二邏輯閘具有一電連接該第一邏輯閘的輸出端的第一接收端、一電連接該遲滯比較電路以接收該第一邏輯信號與該第二邏輯信號其中之一的第二接收端,及一電連接該遲滯比較電路的輸出端, 當該等脈波信號其中至少一的電壓準位為邏輯1,且該遲滯比較電路輸出該第一邏輯信號時,該第一邏輯閘自其輸出端輸出邏輯1的輸出信號,該第二邏輯閘的該第一接收端接收該第一邏輯閘的該輸出端接收該輸出信號,該第二邏輯閘的該第二接收端接收該第一邏輯信號,且該第二邏輯閘自其輸出端輸出邏輯1的輸出信號,該遲滯比較電路根據該第二邏輯閘的輸出端的輸出信號而提供該輸出電流到該等發光單元。 The dimming system according to claim 7, wherein the logic control circuit includes a first logic gate and a second logic gate, The first logic gate has N receiving terminals for receiving the pulse wave signals respectively, and an output terminal, The second logic gate has a first receiving terminal electrically connected to the output terminal of the first logic gate, and a second receiving terminal electrically connected to the hysteresis comparison circuit to receive one of the first logic signal and the second logic signal , And an output terminal electrically connected to the hysteresis comparison circuit, When the voltage level of at least one of the pulse signals is logic 1, and the hysteresis comparison circuit outputs the first logic signal, the first logic gate outputs a logic 1 output signal from its output terminal, and the second logic The first receiving terminal of the gate receives the output terminal of the first logic gate and the output terminal receives the output signal, the second receiving terminal of the second logic gate receives the first logic signal, and the second logic gate is from its output terminal The output signal of logic 1 is output, and the hysteresis comparison circuit provides the output current to the light-emitting units according to the output signal of the output terminal of the second logic gate. 如請求項8所述的調光系統,其中,該遲滯比較電路包括一控制開關、一電感、一個二極體、一電壓源,及一遲滯比較器, 該控制開關具有一電連接該第二邏輯閘的該輸出端的控制端、一電連接該電感的第一端,及一電連接該電壓源的第二端,該控制開關根據其控制端接收的該第二邏輯閘的輸出端的輸出信號而運作於一導通狀態及一不導通狀態其中之一, 該電感具有一電連接該控制開關的該第一端的第一端,及一電連接該N個發光單元中的第一個的第二端,該電感用以根據該控制開關的運作狀態而產生該感應電流,並提供該輸出電流到該等發光單元, 該二極體具有一電連接該電感的該第一端的陰極端,及一電連接該第N個發光單元的陽極端, 該電壓源具有一電連接該控制開關的該第二端的陽極端,及一電連接該二極體的該陽極端的陰極端, 該遲滯比較器電連接該第二邏輯閘的該第二接收端與該電感,並根據該電感的該感應電流而輸出該第一邏輯信號,及該第二邏輯信號其中之一到該第二邏輯閘的該第二接收端, 當該等脈波信號的電壓準位其中至少一為邏輯1,且該遲滯比較器輸出該第一邏輯信號,該控制開關運作於該導通狀態,該電感自該電壓源接收電壓而產生該感應電流並提供該輸出電流, 當該等脈波信號的電壓準位皆為邏輯0,該控制開關運作於該不導通狀態,該電感不自該電壓源接收電壓而不產生該感應電流且不提供該輸出電流。 The dimming system according to claim 8, wherein the hysteresis comparison circuit includes a control switch, an inductor, a diode, a voltage source, and a hysteresis comparator, The control switch has a control terminal electrically connected to the output terminal of the second logic gate, a first terminal electrically connected to the inductor, and a second terminal electrically connected to the voltage source. The output signal of the output terminal of the second logic gate operates in one of a conducting state and a non-conducting state, The inductor has a first end electrically connected to the first end of the control switch, and a second end electrically connected to the first one of the N light-emitting units. The inductor is used to change the control switch according to the operating state of the control switch. Generate the induced current and provide the output current to the light-emitting units, The diode has a cathode terminal electrically connected to the first terminal of the inductor, and an anode terminal electrically connected to the Nth light-emitting unit, The voltage source has an anode terminal electrically connected to the second terminal of the control switch, and a cathode terminal electrically connected to the anode terminal of the diode, The hysteresis comparator is electrically connected to the second receiving end of the second logic gate and the inductor, and outputs the first logic signal and one of the second logic signals to the second logic signal according to the induced current of the inductor The second receiving end of the logic gate, When at least one of the voltage levels of the pulse signals is logic 1, and the hysteresis comparator outputs the first logic signal, the control switch operates in the on state, and the inductor receives the voltage from the voltage source to generate the induction Current and provide the output current, When the voltage levels of the pulse signals are all logic 0, the control switch operates in the non-conducting state, the inductor does not receive voltage from the voltage source, does not generate the induced current, and does not provide the output current. 如請求項9所述的調光系統,其中,當該等脈波信號電壓準位皆為邏輯0,該第一邏輯閘自其輸出端輸出邏輯0的輸出信號,該第二邏輯閘的該第一接收端接收該第一邏輯閘的該輸出端接收該輸出信號,且該第二邏輯閘自其輸出端輸出邏輯0的輸出信號,該控制開關根據該第二邏輯閘的輸出端的輸出信號而運作於該不導通狀態。The dimming system of claim 9, wherein when the voltage levels of the pulse signals are all logic 0, the first logic gate outputs a logic 0 output signal from its output terminal, and the second logic gate The first receiving terminal receives the output terminal of the first logic gate to receive the output signal, and the second logic gate outputs an output signal of logic 0 from its output terminal, and the control switch is based on the output signal of the output terminal of the second logic gate And operate in the non-conducting state.
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