TWI703432B - Component power mode switch circuit and motherboard having the same - Google Patents

Abstract

A component power mode switch circuit is provided for switching a power mode of one of plural component in a computer system. The circuit comprises a fan controller, a southbridge, a BIOS, a northbridge, and a CPU. The fan controller includes an input pin and an output pin. The input pin receives a temperature detection signal. The output pin normally output a first voltage. When the temperature detection signal reveals a temperature higher than a temperature threshold, the fan controller switches the output of the output pin to a second voltage different from the first voltage. The southbridge includes an interrupt event triggered pin and an interrupt event output pin. When interrupt event triggered pin detects that the fan controller switches the output of the output pin to a second voltage, the southbridge output a power mode switch signal via the interrupt event output pin, to switch the power mode of the one of plural component. The BIOS is electrically connected to the southbridge. Wherein the southbridge loads a power mode setting parameter set from the BIOS, and encodes the power mode setting parameter set into the switch signal. The northbridge is electrically connected to the southbridge; the CPU is electrically connected to the northbridge, and the switch signal is transmitted to the CPU via the northbridge; according to the power mode setting parameter set, the CPU switches the power mode of the one of plural component.

Description

Element power consumption switching circuit and its main board

The invention relates to temperature control of a computer system, and particularly relates to a component power consumption switching circuit and a motherboard.

Existing computer mainframes are oriented towards thin and light design, and even some fanless designs are introduced. The fanless design of the computer mainframe relies on natural convection for heat dissipation. The light and thin design of the mainframe, regardless of whether there is a fan, is not conducive to convection heat dissipation. Therefore, for this type of host, a heat pipe must be installed in a relatively high-cost heat dissipation design.

However, under certain designs, the area where the overheated element is located may not be conducive to disposing the heat sink, which may cause heat dissipation problems. Therefore, the aforementioned computer host can only be operated for a short time, and there is still an unsolvable overheating problem after a long time of operation. Or, force the system to operate at low power to reduce heat generation, but this will seriously affect performance.

The existing design is mainly based on the operation of the software interface, allowing users to manually adjust the performance mode according to the operating conditions. When the overheating problem occurs, the computer will be operated in low power mode. After the overheating problem is eliminated, the computer can be manually upgraded. Effectiveness mode.

In view of the fact that thin hosts or fanless systems are prone to system overheating problems, the present invention proposes a component power consumption switching circuit and its circuit board to avoid overheating problems.

The present invention provides a component power consumption switching circuit for switching the power consumption of one of a plurality of components in a computer system, including a fan controller, a south bridge chip, a basic input output system, a north bridge chip and a central processing unit Device. The fan controller has a receiving pin and an output pin. The receiving pin is used to receive a temperature detection signal. The output pin normally outputs a first level, and when the fan controller determines that the temperature corresponding to the temperature detection signal is higher than a temperature threshold, it switches the output of the output pin to a first level that is not equal to the first level. Second level. The South Bridge chip has an interrupt event trigger pin and an interrupt event output pin. The interrupt event trigger pin is electrically connected to the output pin of the fan controller. When the interrupt event trigger pin receives the output of the output pin to switch from the first level to the second level, the South Bridge chip outputs a power switching signal with the interrupt event output pin. The basic input/output system is electrically connected to the south bridge chip; wherein, the south bridge chip is read by the basic input output system to a power switch setting value, which is encoded as a power switch signal. The north bridge chip is electrically connected to the south bridge chip; the central processing unit is electrically connected to the north bridge chip, and the power switching signal is transmitted to the central processing unit through the north bridge chip. The central processing unit switches one of the multiple components according to the power consumption switching setting value Power consumption.

In at least one embodiment of the present invention, the basic input output system stores an initial power consumption setting value; when the temperature corresponding to the temperature detection signal is lower than the temperature threshold, the output pin of the fan controller changes from the second level Return to the first level, and trigger the south bridge chip to read the initial power consumption setting value from the basic input output system, and generate a power recovery signal to make the central processing unit perform power recovery, thereby increasing the power consumption of one of the multiple components.

In at least one embodiment of the present invention, the output pin is a pulse signal pin of the fan controller.

In at least one embodiment of the present invention, the fan controller has a pulse signal pin and a general output pin. The pulse signal pin is used to output a pulse signal for controlling the fan speed, and the output pin is a general output pin.

In at least one embodiment of the present invention, the device power consumption switching circuit further includes a temperature detector, and the receiving pin is connected to the temperature detector to receive the temperature detection signal.

The present invention also provides a motherboard, which includes a board body and a component power consumption switching circuit. The component power consumption switching circuit is arranged on the board.

In at least one embodiment of the present invention, the north bridge chip provides a front-end bus, a high-speed graphics bus, and a memory bus to connect a central processing unit, a graphics processor, and a memory module.

Through the aforementioned component power consumption switching circuit, the controller on the existing motherboard, such as the fan controller, can be used directly to determine whether the temperature is too high. Through a simple circuit configuration, the South Bridge chip can be triggered to generate an interrupt event and the system enters power switching. In systems with low heat dissipation performance, such as fanless systems or thin mainframes that are not easy to dissipate heat, dynamically adjusting component power consumption based on temperature conditions can solve the problem of poor system heat dissipation performance.

100: Component power consumption switching circuit

110: Controller

110a: Fan controller

112: receiving pin

114: output pin

116: temperature detector

118: Fan socket

120: South Bridge Chip

122: Interrupt event trigger pin

124: Interrupt event output pin

130: Basic Input Output System

140: North Bridge Chip

142: memory bus

144: High-speed graphics bus

146: Front end bus

150: central processing unit

160: graphics processor

170: Memory Module

180: Peripheral bus

GPO: General purpose output pin

T: temperature detection signal

V1: First level

V2: Second level

SW: Power switching signal

R: Power recovery signal

10: Board body

FIG. 1 is a circuit block diagram of a device power consumption switching circuit according to a first embodiment of the present invention.

2 is a schematic diagram of the switching timing of temperature, electrical level, and power consumption in the first embodiment of the present invention.

FIG. 3 is a circuit block diagram of a device power consumption switching circuit according to a second embodiment of the present invention.

4 is a circuit block diagram of a device power consumption switching circuit according to a third embodiment of the invention.

FIG. 5 is a circuit block diagram of a device power consumption switching circuit according to a fourth embodiment of the present invention.

As shown in FIG. 1, it is a device power switching circuit 100 disclosed in the first embodiment of the present invention, which is used to switch the power consumption of one of a plurality of components, thereby changing the heat and heat dissipation state of the computer system, and dynamically maintaining the system temperature.

As shown in FIG. 1, the component power switching circuit 100 includes a controller 110, a south bridge chip 120, a basic input output system 130 (BIOS 130), a north bridge chip 140, a central processing unit 150, and a graphics processor 160. And a memory module 170.

As shown in FIG. 1, the controller 110 can be a fan controller, which can be used to output a pulse signal (PWM) for controlling the speed of the fan. The controller 110 has at least one receiving pin 112 and an output pin 114. The receiving pin 112 is connected to a temperature detector 116, such as a thermocouple, to receive a temperature detection signal T. The output pin 114 normally outputs a first level V1. When determining that the temperature corresponding to the temperature detection signal T is higher than a temperature threshold, the controller 110 switches the output of the output pin 114 to a second level V2 that is not equal to the first level V1.

As shown in FIG. 1, the south bridge chip 120 has an interrupt event trigger pin 122 and an interrupt event output pin 124. The interrupt event trigger pin 122 is electrically connected to the output pin 114 of the controller 110; when the output of the output pin 114 is switched from the first level V1 to the second level V2, the interrupt event triggers the electrical level of the pin 122 The change is interpreted as an interrupt event by the south bridge chip 120, and the interrupt event output pin 124 outputs a power switching signal. The south bridge chip 120 also has a peripheral bus 180, such as Super I/O, for peripheral connections of keyboards, hard disks, and serial ports.

As shown in FIG. 1, the BIOS 130 is electrically connected to the south bridge chip 120 for performing basic system I/O control. In addition, the BIOS 130 allows users to set power consumption through the setting interface Switch the power consumption switching setting value transmitted by the switching signal, such as CPU frequency reduction, memory transmission speed reduction, memory update time extension or fan speed increase, etc. to reduce system temperature.

As shown in FIG. 1, the north bridge chip 140 is electrically connected to the south bridge chip 120 through an internal bus bar for processing high-speed signal transmission. The north bridge chip 140 and the south bridge chip 120 can be independent chips, or can be integrated into a single system chip. The north bridge chip 140 provides a memory bus 142 (Memory Bus) and a high-speed graphic bus 144 (High-Speed Graphic Bus) for connecting the memory module 170 and the graphics processor 160. In addition, the north bridge chip 140 provides a front-side bus 146 (Front-Side Bus) for the central processing unit 150 to be electrically connected to the north bridge chip 140.

As shown in Figure 1 and Figure 2, when an interrupt event triggers a change in the electrical level of the pin 122 by the South Bridge chip 120, it is interpreted as an interrupt event trigger. The South Bridge chip 120 is read by the BIOS 130 to read the power switch setting value, and the code is power switch The signal SW is output through the interrupt event output pin 124. The power switching signal SW is transmitted to the central processing unit 150 via the north bridge chip 140. The power switching signal SW forms an interrupt event, so that the central processing unit 150 executes power switching of a specific component according to the power switching setting value. The power switching can be achieved through the power switching code loaded and executed by the central processing unit 150, or it can be an instruction set built in the central processing unit 150, directly executed according to the power switching setting value.

The power switching signal SW can be a System Control Interrupt Event (SCI event). After receiving the power switching signal SW, the central processing unit 150 can generate a corresponding SCI signal to the operating system, so that the operating system starts to perform power switching.

The BIOS 130 also stores an initial power consumption setting value. After the computer is turned on, the south bridge chip 120 will first load the initial power consumption setting value from the BIOS 130, so that the operating system can adjust the power consumption and operate normally. When the controller 110 determines that the temperature corresponding to the temperature detection signal T is higher than the temperature threshold, the interrupt event causes the south bridge chip 120 to load the power switching setting value to generate the power switching signal SW. This power switching signal SW can be used to adjust the power consumption of one or more components.

For example, the central processing unit 150 may have a low-power long-term operation mode (PL1) and a high-power short-time operation mode (PL2). The memory transmission has a low-speed mode and a high-speed mode, an operation mode and a low-frequency operation mode. The refresh rate (Memory Refresh) can also be set to fast update and slow update.

The initial power consumption setting can be set to high-power short-time operation mode PL2, memory transmission high-speed mode, and memory refresh rate to be updated quickly, and the fan is set to normal speed. After the computer is turned on, the power consumption of various components can be switched by the aforementioned initial power consumption setting value.

As shown in FIG. 2, the temperature detector 116 can be used to detect the overall temperature of the system, or to detect the temperature of components prone to heat such as the CPU 150. When the temperature detected by the temperature detector 116 is higher than the temperature threshold, that is, the controller 110 determines that the temperature corresponding to the temperature detection signal T is higher than the temperature threshold, the controller 110 will output the output pin 114 from the first The level V1 (HIGH) is switched to the second level V2 (LOW). At this time, the south bridge chip 120 is triggered, and the BIOS 130 loads the power consumption switching setting value. At this time, the initial power consumption setting value can be set to the low-power long-term operation mode PL1, the memory transmission low-speed mode, and the memory refresh rate is slow update, and the fan is set to high rotation speed. At this time, the central processing unit 150 can execute the system interruption event, reduce the heat generation of the system, and increase the heat dissipation efficiency of the fan to reduce the overall temperature of the system. The aforementioned first level V1 and second level V2 may be high level and low level respectively, However, the opposite setting is not ruled out, as long as the output conditions of the controller 110 and the conditions under which the south bridge chip 120 is triggered are modified accordingly.

As shown in FIG. 2 again, after the temperature is lower than the temperature threshold, the output of the output pin 114 of the controller 110 is restored from the second level V2 to the first level V1. At this time, it can be regarded as another system interrupt event, and the south bridge chip 120 is triggered to read the initial power consumption setting value by the BIOS 130 to generate a power recovery signal R. The power recovery signal R is transmitted to the central processing unit 150 through the north bridge chip 140, so that the central processing unit 150 performs power recovery, and again increases the power consumption of each component and reduces the fan speed to the normal speed.

As shown in FIG. 3, a device power consumption switching circuit 100 disclosed in the second embodiment of the present invention is used to switch the power consumption of one of a plurality of devices. The device power switching circuit 100 includes a fan controller 110a, a south bridge chip 120, a basic input output system 130 (BIOS 130), a north bridge chip 140, and a central processing unit 150.

The second embodiment uses the fan controller 110a as the controller. The fan controller 110a is in the form of a pulse signal pin. Here, the fan controller 110a with four pins is taken as an example for description, and one of the pins is the pulse signal pin. At this time, the fan controller 110a is not used to control the fan, that is, the pulse signal pin is not used to output the pulse signal to the fan, but is used as the output pin 114 of the present invention. The PWM period of the pulse signal pin output as the output pin 114 can be adjusted by the fan controller 110a to continuously output the first level V1 or the second level V2. The pulse signal pin is usually connected to the fan socket 118 to drive the fan with the power output from the power supply. Here, the pulse signal pin is used as the output pin 114, and the output pin 114 is still connected to a fan socket 118. At this time, this fan socket 118 does not provide fan connection. Instead, a signal cable is used to connect the fan socket 118 to the output pin 114 The contact point is electrically connected to the interrupt event trigger pin 122 of the south bridge chip 120. At this time, the pulse signal pin of the second embodiment cannot be used to drive a fan, so it is suitable for a fanless system.

As shown in FIG. 4, a device power consumption switching circuit 100 disclosed in the third embodiment of the present invention is used to switch the power consumption of one of a plurality of devices. The device power switching circuit 100 includes a fan controller 110a, a south bridge chip 120, a basic input output system 130 (BIOS 130), a north bridge chip 140, and a central processing unit 150.

The fan controller 110a of the third embodiment has a pulse signal pin and a general purpose output pin (GPO). The pulse signal pin is still electrically connected to the fan socket 118 for outputting PWM to drive the fan. The general output pin GPO is used as the output pin 114 and is electrically connected to the interrupt event trigger pin 122 of the south bridge chip 120 to provide the first level V1 or the second level V2 to the south bridge chip 120. The third embodiment reserves the fan socket 118 for driving the fan, so that the fan controller 110a can still output the pulse signal to the fan through the pulse signal pin, which is applicable to a fan system.

Please refer to FIG. 5, which is a motherboard disclosed in the fourth embodiment of the present invention. It includes a board body 10 and a component power consumption switching circuit 100 as in the previous embodiment. The controller 110, a south bridge chip 120, and a basic The input and output system 130 (BIOS 130), the north bridge chip 140 and the peripheral bus 180 are all disposed on the board body 10 and are electrically connected through a printed circuit.

The central processing unit 150, the graphics processor 160, and the memory module 170 drawn in FIG. 5 are drawn with dashed lines, which mainly illustrate that the central processing unit 150, the graphics processor 160, and the memory module 170 are not necessarily fixed on the motherboard . The north bridge chip 140 provides a front-end bus 146, a high-speed graphics bus 144, and a memory bus 142 for the central processing unit 150, the graphics processor 160, and the memory module 170 to connect to. CPU 150, graphics processor 160 and And the memory module 170 can be on-board (On-Board), and is directly electrically connected to the north bridge chip 140 through the aforementioned bus. The central processing unit 150, the graphics processor 160, and the memory module 170 can also be indirectly electrically connected to the north bridge chip 140 through the insertion of electrical connectors; that is, the motherboard itself does not include the central processing unit 150, graphics The processor 160 and the memory module 170.

Through the aforementioned component power consumption switching circuit 100, the controller 110 on the existing motherboard, such as the fan controller 110, can be used directly to determine whether the temperature is too high. Through a simple circuit configuration, the south bridge chip 120 can be triggered to generate an interrupt event, and the system can enter power switching. In systems with low heat dissipation performance, such as fanless systems or thin mainframes that are not easy to dissipate heat, dynamically adjusting component power consumption based on temperature conditions can solve the problem of poor system heat dissipation performance.

100: Component power consumption switching circuit

110: Controller

112: receiving pin

114: output pin

116: temperature detector

120: South Bridge Chip

122: Interrupt event trigger pin

124: Interrupt event output pin

130: Basic Input Output System

140: North Bridge Chip

142: memory bus

144: High-speed graphics bus

146: Front end bus

150: central processing unit

160: graphics processor

170: Memory Module

180: Peripheral bus

T: temperature detection signal

V1: First level

V2: Second level

SW: Power switching signal

R: Power recovery signal

Claims (7)

A component power consumption switching circuit for switching the power consumption of one of a plurality of components in a computer system includes: a fan controller for outputting a pulse signal for controlling the speed of a fan, and the fan controller at least It has a receiving pin and an output pin; the receiving pin is used to receive a temperature detection signal, and the output pin normally outputs a first level; when the temperature corresponding to the temperature detection signal is higher than a temperature At the threshold value, the fan controller switches the output of the output pin to a second level that is not equal to the first level; a south bridge chip has an interrupt event trigger pin and an interrupt event output pin, The interrupt event trigger pin is electrically connected to the output pin of the fan controller; when the interrupt event trigger pin receives the output of the output pin and switches from the first level to the second level, the The south bridge chip outputs a power switching signal with the interrupt event output pin; a basic input output system is electrically connected to the south bridge chip; wherein, the south bridge chip is read by the basic input output system to read a power switching setting value, The code is the power switching signal; a north bridge chip electrically connected to the south bridge chip; and a central processing unit electrically connected to the north bridge chip, and the power switching signal is transmitted to the central processing unit through the north bridge chip The central processing unit switches the power consumption of one of the plurality of components according to the power consumption switching setting value. The device power switching circuit of claim 1, wherein the basic input output system stores an initial power consumption setting value; when the temperature corresponding to the temperature detection signal is lower than the temperature threshold, the fan controller The output of the output pin is restored from the second level to the first level, and the south bridge chip is triggered to read the initial power consumption setting by the basic input output system Value, a power recovery signal is generated to enable the CPU to perform power recovery, thereby increasing the power consumption of one of the multiple components. The device power consumption switching circuit according to claim 1, wherein the output pin is a pulse signal pin of the fan controller. The device power consumption switching circuit of claim 1, wherein the fan controller has a pulse signal pin and a universal output pin, and the pulse signal pin is used to output a pulse signal for controlling the speed of the fan , The output pin is the general output pin. The device power consumption switching circuit of claim 1 further includes a temperature detector, and the receiving pin is connected to the temperature detector to receive the temperature detection signal. A host board includes: a board body; and the component power consumption switching circuit according to any one of claims 1 to 5, which is arranged on the board body. The motherboard according to claim 6, wherein the north bridge chip provides a front-end bus, a high-speed graphics bus, and a memory bus to connect the central processing unit, a graphics processor and a memory module .

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