TWI694162B - Sputtering target, method for manufacturing target - Google Patents

Sputtering target, method for manufacturing target Download PDF

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Publication number
TWI694162B
TWI694162B TW105130847A TW105130847A TWI694162B TW I694162 B TWI694162 B TW I694162B TW 105130847 A TW105130847 A TW 105130847A TW 105130847 A TW105130847 A TW 105130847A TW I694162 B TWI694162 B TW I694162B
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atomic
film
substrate
copper
sputtering target
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TW105130847A
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Chinese (zh)
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TW201726932A (en
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仲台保夫
新田純一
高澤悟
白井雅紀
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日商愛發科股份有限公司
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/3407Cathode assembly for sputtering apparatus, e.g. Target
    • C23C14/3414Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C1/00Making non-ferrous alloys
    • C22C1/02Making non-ferrous alloys by melting
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C9/00Alloys based on copper
    • C22C9/06Alloys based on copper with nickel or cobalt as the next major constituent
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering

Abstract

提供一種不會使電弧放電產生而能夠在樹脂基板上形成不會剝落之導電膜的濺鍍靶材。 Provided is a sputtering target capable of forming a conductive film that does not peel off on a resin substrate without generating arc discharge.

在對於具有由樹脂所成之基體的加工基板(32)而形成合金薄膜之濺鍍靶材(55)中,相對於以較50原子%更多而含有Cu並以5原子%以上40原子%以下之範圍來含有Ni並且以3原子%以上10原子%以下之範圍來含有Al的母材之100原子%,而將由Zn和Mn之其中一方或雙方所成之添加物以0.01原子%以上之含有率來含有。由於係能夠得到不存在有空孔之濺鍍靶材,因此係並不會產生電弧放電。 In the sputtering target material (55) which forms an alloy thin film for a processed substrate (32) having a substrate made of resin, it contains Cu in an amount of more than 50 atomic% and more than 5 atomic% to 40 atomic% The following range contains Ni and contains 3 atomic% or more and 10 atomic% or less to contain 100 atomic% of the base material of Al, and the additive made of one or both of Zn and Mn is 0.01 atomic% or more Content rate to contain. Since the sputtering target without voids can be obtained, no arc discharge will occur.

Description

濺鍍靶材、靶材製造方法 Sputtering target material and manufacturing method of target material

本發明,係有關於濺鍍靶材、和用以製造該濺鍍靶材之靶材製造方法。 The present invention relates to a sputtering target material and a method of manufacturing the target material for manufacturing the sputtering target material.

現今,LSI等之半導體元件,係被搭載在將使配線膜形成於樹脂之基體上所成的單層基板作了複數層層積之搭載裝置處,故而,係對於在樹脂之表面上形成密著性為高之金屬膜的技術有所需求。特別是,銅薄膜雖然有著低阻抗之優點,但是,由於與樹脂間之密著性係為低,因此,在樹脂與銅薄膜之間,係被形成有由其他之金屬所成之密著層。 Nowadays, semiconductor elements such as LSI are mounted on a mounting device where a single-layer substrate formed by forming a wiring film on a resin substrate is laminated in multiple layers. There is a demand for the technology of metal films with high adhesion. In particular, although the copper film has the advantage of low resistance, the adhesion between the resin and the resin is low. Therefore, an adhesion layer made of other metals is formed between the resin and the copper film .

圖13之元件符號100,係為此種先前技術之搭載裝置,並被層積有複數之單層基板1111、1112The element symbol 100 in FIG. 13 is a mounting device of this prior art, and a plurality of single-layer substrates 111 1 and 111 2 are stacked.

此搭載裝置100之各單層基板1111、1112,係具備有由樹脂所成之基體103,在基體103之表面上,係被設置有配線膜110。又,在基體103處,係被設置有連接孔102,在連接孔102之內部,係被設置有將被作了 層積的單層基板1111、1112之配線膜110彼此作連接的金屬插銷119。 The single-layer substrates 111 1 and 111 2 of the mounting device 100 are provided with a base 103 made of resin, and a wiring film 110 is provided on the surface of the base 103. In addition, the base 103 is provided with a connection hole 102, and inside the connection hole 102, a metal for connecting the wiring films 110 of the laminated single-layer substrates 111 1 and 111 2 to each other is provided Bolt 119.

圖11(a),係為在單層基板1111之上被貼附有成為最上層之單層基板1112的基體103之狀態。在基體103處,係被設置有連接孔102,在連接孔102之底面,係露出有下層之單層基板1111的配線膜110之表面。 FIG 11 (a), is based on single layer substrate 1111 is attached with the uppermost layer of the single layer substrate of the base body 103 of 1112. At base 103, system 102 is provided with a coupling hole, in the bottom surface of the connection hole 102, the lower line of the substrate is exposed monolayer surface 1111 of the wiring film 110.

首先,如同圖11(b)中所示一般,對於含有Ti等之密著用之金屬的濺鍍靶材進行濺鍍,而形成與基體103之表面和連接孔102之內周側面以及露出於底面處之配線膜110作了接觸的Ti薄膜等之密著層118,接著,對於銅之濺鍍靶材進行濺鍍,並在密著層118之表面上,形成由銅薄膜所成之種層115。 First, as shown in FIG. 11(b), a sputtering target material containing an adhesion metal such as Ti is sputtered to form the surface of the base 103 and the inner peripheral side surface of the connection hole 102 and exposed to The wiring film 110 at the bottom surface is made of an adhesion layer 118 such as a Ti thin film, and then, a sputtering target of copper is sputtered, and a seed made of a copper thin film is formed on the surface of the adhesion layer 118 Layer 115.

將被作了圖案化的光阻膜配置在種層115之表面上,而使連接孔102之內部的種層115和基體103之表面上的特定位置之種層115露出,再浸漬於電鍍液中,而使露出了的種層115與電鍍液作接觸,並對於種層115與電鍍液之間施加電壓,而藉由電解電鍍法來使銅在露出了的種層115之表面上而析出,以在連接孔102之內部和基體103之表面上,如同圖11(c)中所示一般地形成銅薄膜106、107。在此狀態下,銅薄膜106、107係與種層115相接觸,連接孔102之內部係被由銅所成之銅薄膜106而填充,銅薄膜106、107係被形成為較種層115而更厚。該圖(c)之元件符號128,係為光阻膜。 The patterned photoresist film is disposed on the surface of the seed layer 115, so that the seed layer 115 inside the connection hole 102 and the seed layer 115 at a specific position on the surface of the base 103 are exposed, and then immersed in the plating solution In the process, the exposed seed layer 115 is brought into contact with the plating solution, a voltage is applied between the seed layer 115 and the plating solution, and copper is deposited on the surface of the exposed seed layer 115 by electrolytic plating In order to form copper thin films 106 and 107 as shown in FIG. 11(c) inside the connection hole 102 and the surface of the base 103. In this state, the copper films 106 and 107 are in contact with the seed layer 115, the inside of the connection hole 102 is filled with the copper film 106 made of copper, and the copper films 106 and 107 are formed as the seed layer 115. thicker. The symbol 128 of the figure (c) is a photoresist film.

在此狀態下,密著層118與種層115,係存在有位置在銅薄膜106、107之下方的部份、和位置在光阻膜128之下方的部份,在將光阻膜128剝離並使位置在光阻膜128之下方的種層115露出之後,首先,浸漬在銅之蝕刻液中,如同該圖(d)中所示一般,在銅薄膜106、107之下方,係一面使被作了圖案化的種層105殘留,一面將露出的種層115作蝕刻除去,而在被作了除去的部份處使密著層118露出。 In this state, the adhesion layer 118 and the seed layer 115 have a portion located below the copper thin films 106 and 107, and a portion located below the photoresist film 128. After the photoresist film 128 is peeled off After exposing the seed layer 115 located below the photoresist film 128, first, it is immersed in a copper etching solution, as shown in (d) of the figure, under the copper thin films 106, 107, one side is used The seed layer 105 that has been patterned remains, the exposed seed layer 115 is etched and removed on one side, and the adhesion layer 118 is exposed at the removed portion.

接著,若是浸漬在Ti進行蝕刻之蝕刻液中,則係如同圖13中所示一般,一面使位置在銅薄膜106、107以及種層105之下方的密著層108殘留,一面將露出的密著層118蝕刻除去,在作了除去的部份處,基體103係露出。 Next, if it is immersed in an etching solution for etching by Ti, as shown in FIG. 13, while leaving the adhesive layer 108 positioned under the copper thin films 106 and 107 and the seed layer 105, the exposed density The coating layer 118 is removed by etching, and the base 103 is exposed at the removed portion.

藉由連接孔102內之密著層108和種層105以及銅薄膜106,來構成填充連接孔102之金屬插銷119,又,藉由基體103之表面上的密著層108和種層105以及銅薄膜107,來構成配線膜110。 By the adhesion layer 108 and the seed layer 105 and the copper film 106 in the connection hole 102, the metal plug 119 filling the connection hole 102 is formed, and by the adhesion layer 108 and the seed layer 105 and the surface of the base 103 The copper thin film 107 constitutes the wiring film 110.

銅薄膜106、107與露出於基體103之表面上的樹脂之間之密著性係為低,銅薄膜106、107係容易從樹脂而剝離,但是,由於身為Ti薄膜之密著層108的與樹脂間之密著性係為高,並且與身為銅薄膜之種層105之間的密著性亦為高,因此,種層105和銅薄膜106、107係並不會從基體103而剝離。 The adhesion between the copper thin films 106 and 107 and the resin exposed on the surface of the substrate 103 is low, and the copper thin films 106 and 107 are easily peeled from the resin. However, since the adhesion layer 108 is a Ti film The adhesion to the resin is high and the adhesion to the seed layer 105 as a copper film is also high, therefore, the seed layer 105 and the copper films 106 and 107 are not peeled off from the base 103 .

於此情況,為了形成銅薄膜106、107,由於 係需要形成密著層108和種層105之2層,因此,配線膜110係成為3層構造,製造工程係會增加。 In this case, in order to form the copper thin films 106 and 107, since Since it is necessary to form two layers of the adhesion layer 108 and the seed layer 105, the wiring film 110 has a three-layer structure, and the manufacturing engineering department will increase.

又,密著層108,由於係含有多量的銅以外之Ti等之元素,因此,密著層118和身為銅薄膜之種層115,係並無法藉由相同的蝕刻液來進行蝕刻,蝕刻工程係為複雜。 Moreover, since the adhesion layer 108 contains a large amount of elements other than Ti, such as copper, the adhesion layer 118 and the seed layer 115, which is a copper thin film, cannot be etched and etched by the same etching solution. The engineering department is complex.

因此,若是如同下述之專利文獻2中所記載一般,製作在銅中而包含有鎳和鋁之Cu-Ni-Al靶材,並對於Cu-Ni-Al靶材進行濺鍍,來在使樹脂作了露出的基體之表面上形成銅合金薄膜,並在銅合金薄膜之表面上形成由純銅所成之導電性薄膜而作為配線膜,則銅合金薄膜與樹脂間之密著性以及銅合金薄膜與導電性薄膜間之密著性亦為良好,而能夠得到不會有從基體而剝離之虞的配線膜。 Therefore, if a Cu-Ni-Al target containing nickel and aluminum is made in copper as described in Patent Document 2 below, and the Cu-Ni-Al target is sputtered to use A copper alloy film is formed on the surface of the exposed substrate of the resin, and a conductive film made of pure copper is formed on the surface of the copper alloy film as a wiring film, then the adhesion between the copper alloy film and the resin and the copper alloy The adhesion between the thin film and the conductive thin film is also good, and a wiring film that does not cause peeling from the substrate can be obtained.

然而,Cu-Ni-Al靶材,在進行濺鍍時之電弧放電的發生次數係為多,因此,係會有所形成之銅合金薄膜成為不良的情形。 However, the Cu-Ni-Al target has a large number of occurrences of arc discharge during sputtering, and therefore, the formed copper alloy thin film may become defective.

[先前技術文獻] [Prior Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本特開平8-332697號公報 [Patent Document 1] Japanese Patent Laid-Open No. 8-332697

[專利文獻2]WO2014185301 [Patent Literature 2] WO2014185301

本發明,係為了解決上述先前技術之問題而創作者,其目的,係在於提供一種不會使電弧放電產生並且能夠在露出有樹脂之基體上形成不會剝離之配線膜的濺鍍靶材、和製造該濺鍍靶材之靶材製造方法。 The present invention was created to solve the above-mentioned problems of the prior art, and its object is to provide a sputtering target capable of forming a non-stripping wiring film on a substrate exposed without causing arc discharge, And a target manufacturing method for manufacturing the sputtering target.

本發明之發明者們,在將Cu-Ni-Al靶材切斷並對於內部作了觀察之後,係發現了在切斷面處係發生有多數之空孔(亦稱作「缺陷」)。濺鍍靶材中之此種空孔,係會成為電弧放電之原因,此事係為周知,因此,明顯的,若是使空孔減少,則電弧放電係會減少。 After cutting the Cu-Ni-Al target and observing the inside, the inventors of the present invention discovered that a large number of voids (also referred to as "defects") occurred at the cut surface. Such voids in the sputtering target will become the cause of arc discharge. This is well known. Therefore, it is obvious that if the voids are reduced, the arc discharge will be reduced.

本發明,係為為了解決此種課題所創作者,並藉由發現到下述之知識、亦即是,在將以特定比例來含有銅和鎳以及鋁的熔融物冷卻並使其固化時,只要在熔融物中含有Zn和Mn之其中一者或雙方即可,而完成了本發明。 The present invention was created to solve such a problem, and by discovering the following knowledge, that is, when cooling and solidifying a melt containing copper, nickel and aluminum in a specific ratio, The present invention has been completed as long as one or both of Zn and Mn are contained in the melt.

亦即是,本案發明,係為一種濺鍍靶材,其係包含有:母材,係含有Cu和Ni以及Al,在將Cu和Ni以及Al設為100原子%時,係以較50原子%更多而含有Cu,並以5原子%以上40原子%以下之含有率來含有Ni,並且以3原子%以上10原子%以下之含有率來含有Al;和添加物,係被添加於前述母材中,該濺鍍靶材,其 特徵為:前述添加物,係由Zn和Mn之其中一方或雙方所成,並相對於前述此母材之100原子%,而以0.01原子%以上之含有率來含有。 That is, the invention of this case is a sputtering target material, which includes: a base material, which contains Cu, Ni, and Al, and when Cu, Ni, and Al are set to 100 atomic %, it is more than 50 atoms % More, containing Cu, and containing Ni at a content rate of 5 atomic% or more and 40 atomic% or less, and Al at a content rate of 3 atomic% or more and 10 atomic% or less; and additives are added to the foregoing In the base material, the sputtering target, its The characteristic is that the aforementioned additive is made of one or both of Zn and Mn, and is contained at a content rate of 0.01 atomic% or more with respect to 100 atomic% of the base material.

本發明,係為一種濺鍍靶材,其中,在前述添加物中所含有之Zn的含有率和Mn的含有率,係分別被設為1.0原子%以下。 The present invention is a sputtering target in which the content of Zn and the content of Mn contained in the aforementioned additives are each set to 1.0 atomic% or less.

又,本發明,係為一種靶材製造方法,其係為製造上述所記載之濺鍍靶材之靶材製造方法,其特徵為:將固體之前述母材和固體之前述添加物配置在相同的容器中,進行加熱而形成含有前述母材和前述添加物之熔融物,冷卻前述熔融物而使其固化並形成前述濺鍍靶材。 In addition, the present invention is a target manufacturing method, which is a target manufacturing method for manufacturing the sputtering target described above, characterized in that the solid base material and the solid additive are arranged in the same In the container, heating is performed to form a melt containing the base material and the additive, and the melt is cooled and solidified to form the sputtering target.

藉由濺鍍靶材中之空孔為少而電弧放電為少之濺鍍所形成之配線膜,係可藉由一次的蝕刻工程來進行圖案化。 The wiring film formed by sputtering with less holes in the sputtering target and less arc discharge can be patterned by one etching process.

又,由於配線膜之阻抗值係並不會變大,因此,係能夠得到電壓損失為小並且不會從樹脂而剝離之配線膜。 In addition, since the impedance value of the wiring film does not increase, it is possible to obtain a wiring film having a small voltage loss and not peeling off from the resin.

2‧‧‧連接孔 2‧‧‧Connecting hole

3‧‧‧基體 3‧‧‧Matrix

4、5‧‧‧合金薄膜 4, 5‧‧‧ alloy film

6、7‧‧‧導電膜 6, 7‧‧‧ conductive film

8‧‧‧金屬插銷 8‧‧‧Metal latch

9‧‧‧配線膜 9‧‧‧Wiring film

10‧‧‧搭載裝置 10‧‧‧ mounted device

55‧‧‧濺鍍靶材 55‧‧‧Sputtering target

[圖1]係為用以對於本發明之搭載裝置作說明的圖。 FIG. 1 is a diagram for explaining the mounting device of the present invention.

[圖2]係為用以對於用以形成搭載裝置之濺鍍裝置作 說明之圖。 [Fig. 2] It is used for the sputtering device used to form the mounting device. Illustrated figure.

[圖3]係為用以對於本發明之搭載裝置的製造工程作說明之圖(1)。 [FIG. 3] It is a figure (1) for demonstrating the manufacturing process of the mounting apparatus of this invention.

[圖4]係為用以對於本發明之搭載裝置的製造工程作說明之圖(2)。 FIG. 4 is a diagram (2) for explaining the manufacturing process of the mounting device of the present invention.

[圖5]係為用以對於本發明之搭載裝置的製造工程作說明之圖(3)。 FIG. 5 is a diagram (3) for explaining the manufacturing process of the mounting device of the present invention.

[圖6]係為用以對於本發明之搭載裝置的製造工程作說明之圖(4)。 FIG. 6 is a diagram (4) for explaining the manufacturing process of the mounting device of the present invention.

[圖7]係為用以對於本發明之搭載裝置的製造工程作說明之圖(5)。 7 is a diagram (5) for explaining the manufacturing process of the mounting device of the present invention.

[圖8]係為用以對於本發明之搭載裝置的製造工程作說明之圖(6)。 8 is a diagram (6) for explaining the manufacturing process of the mounting device of the present invention.

[圖9]係為用以對於本發明之搭載裝置的製造工程作說明之圖(7)。 9 is a diagram (7) for explaining the manufacturing process of the mounting device of the present invention.

[圖10]係為電弧放電之圖表。 [Figure 10] is a graph of arc discharge.

[圖11](a)~(d):係為用以對於先前技術之搭載裝置的製造工程作說明之圖。 [Fig. 11] (a) to (d): It is a diagram for explaining the manufacturing process of the mounted device of the prior art.

[圖12]係為用以對於基體作說明之圖。 [Fig. 12] is a diagram for explaining the substrate.

[圖13]係為對於先前技術之搭載裝置作展示之圖。 [Fig. 13] is a diagram showing a prior art mounted device.

圖1之元件符號10,係代表藉由本發明之靶材的濺鍍所得到之搭載裝置,元件符號20,係代表被與 搭載裝置10作了電性連接的主機板。 The symbol 10 in FIG. 1 represents the mounting device obtained by sputtering the target of the present invention, and the symbol 20 represents the The mounted device 10 is a motherboard that is electrically connected.

此搭載裝置10,係具備有支持基板14、和分別被配置在支持基板14之兩面上的第1、第2多層基板11、12,第1、第2多層基板11、12,係分別具備有複數之單層基板111~113、121~123This mounting device 10 includes a support substrate 14 and first and second multilayer substrates 11 and 12 that are disposed on both sides of the support substrate 14, respectively. The first and second multilayer substrates 11 and 12 are respectively provided with A plurality of single-layer substrates 11 1 ~11 3 , 12 1 ~12 3 .

若是將各單層基板111~113、121~123中之較接近支持基板14者稱作下層,並將較遠者稱作上層,則在各單層基板111~113、121~123之下一層的位置處,係分別被配置有其他之單層基板111、112、121、122或者是支持基板14。 If the single-layer substrates 11 1 to 11 3 and 12 1 to 12 3 that are closer to the support substrate 14 are called the lower layer, and the further ones are called the upper layers, then each single-layer substrate 11 1 to 11 3 , At positions below 12 1 to 12 3 , other single-layer substrates 11 1 , 11 2 , 12 1 , 12 2 or the support substrate 14 are respectively arranged.

在圖9中,係對於第1多層基板11之最上層的單層基板113和該單層基板113之下一層的單層基板112之一部分作展示。 In FIG. 9, line 11 to the first multi-layer substrate of single layer substrate 113 and the single layer portion of the substrate 112 for display 113 under the uppermost layer board.

各單層基板111~113、121~123之構造,係為相同,該些單層基板111~113、121~123,係分別具備有板狀之基體3、和被形成於基體3處之複數之連接孔2、和被配置在基體3之單側之表面(除了連接孔2之內周面和底面以外)上的複數之配線膜9、以及將各連接孔2作填充之金屬插銷8。 The structures of the single-layer substrates 11 1 to 11 3 and 12 1 to 12 3 are the same. The single-layer substrates 11 1 to 11 3 and 12 1 to 12 3 are respectively provided with a plate-shaped base 3 and A plurality of connection holes 2 formed on the base 3, and a plurality of wiring films 9 arranged on the surface of one side of the base 3 (except the inner peripheral surface and the bottom surface of the connection hole 2), and the connection holes 2for filling metal latch 8.

支持基板14,係具備有由身為有機化合物之樹脂所成之樹脂基板14a、和被形成於樹脂基板14a處之複數之支持基板貫通孔14b、和將各支持基板貫通孔14b之內部作填充之連接體14c、以及被配置在樹脂基板14a之兩面上的複數之配線膜14d。連接體14c係具備有導電 性,並被與至少一根的配線膜14d作電性連接。 The support substrate 14 is provided with a resin substrate 14a made of a resin which is an organic compound, a plurality of support substrate through holes 14b formed at the resin substrate 14a, and filling the inside of each support substrate through hole 14b Connecting body 14c and a plurality of wiring films 14d arranged on both surfaces of the resin substrate 14a. The connector 14c is provided with electrical conductivity It is electrically connected to at least one wiring film 14d.

各單層基板111~113、121~123之金屬插銷8,係對於具備有該金屬插銷8所位置之連接孔2的基體3之配線膜9,而在被設置有配線膜9之表面上作電性連接。在圖9中,係於未圖示之位置處而作連接。 The metal pins 8 of the single-layer substrates 11 1 to 11 3 and 12 1 to 12 3 are provided with the wiring film 9 for the wiring film 9 of the base 3 provided with the connection hole 2 where the metal pin 8 is located Make electrical connection on the surface. In FIG. 9, the connection is made at a position not shown.

又,各單層基板111~113、121~123之連接孔2,係位置在下層之單層基板111、112、121、122的配線膜9或者是支持基板14的配線膜14d上,各單層基板111~113、121~123之金屬插銷8,係被與下層之單層基板111、112、121、122的配線膜9或者是支持基板14的配線膜14d作電性連接。 In addition, the connection holes 2 of the single-layer substrates 11 1 to 11 3 and 12 1 to 12 3 are the wiring films 9 or the support substrate 14 of the single-layer substrates 11 1 , 11 2 , 12 1 and 12 2 at the lower layer On the wiring film 14d, the metal pins 8 of each single-layer substrate 11 1 ~ 11 3 , 12 1 ~ 12 3 are connected to the wiring film 9 of the lower single-layer substrate 11 1 , 11 2 , 12 1 , 12 2 or The wiring film 14d of the support substrate 14 is electrically connected.

故而,由於第1、第2多層基板11、12之最上層的單層基板113、123之配線膜9,係分別被與支持基板14之其中一面和另外一面的配線膜14d作連接,支持基板14之兩面的配線膜14d之間,係經由連接體14c而被作連接,因此,最上層之單層基板113、123的配線膜9亦係被作電性連接。 Therefore, the wiring films 9 of the uppermost single-layer substrates 11 3 and 12 3 of the first and second multilayer substrates 11 and 12 are respectively connected to the wiring films 14 d on one side and the other side of the support substrate 14. The wiring films 14d on both sides of the support substrate 14 are connected via the connecting body 14c. Therefore, the wiring films 9 of the uppermost single-layer substrates 11 3 and 12 3 are also electrically connected.

主機板20,係具備有主機板本體20a、和被配置在主機板本體20a上之配線膜20b。 The motherboard 20 is provided with a motherboard body 20a and a wiring film 20b arranged on the motherboard body 20a.

在第1多層基板11之最上層的單層基板113之配線膜9處,係被固定有半導體裝置13之端子13b,第2多層基板12之最上層的單層基板123之配線膜9,係經由金屬體24而被與主機板20之配線膜20b作電性連接。 At the wiring film 9 of the uppermost single-layer substrate 11 3 of the first multilayer substrate 11, the terminal 13 b of the semiconductor device 13 is fixed, and the wiring film 9 of the uppermost single-layer substrate 12 3 of the second multilayer substrate 12 Is electrically connected to the wiring film 20b of the motherboard 20 via the metal body 24.

半導體裝置13之端子13b,係與被配置在半導體裝置本體13a之內部的半導體元件之積體電路作電性連接,故而,積體電路,係經由搭載裝置10和金屬體24,而被與主機板20之配線膜20b作電性連接。 The terminal 13b of the semiconductor device 13 is electrically connected to the integrated circuit of the semiconductor element arranged inside the semiconductor device body 13a, so the integrated circuit is connected to the host through the mounting device 10 and the metal body 24 The wiring film 20b of the board 20 is electrically connected.

若是針對此種各單層基板111~113、121~123的金屬插銷8和配線膜9作說明,則首先,各單層基板111~113、121~123的基體3,係以由樹脂所成之基板所構成,或者是以由在編織入有玻璃纖維之布狀基板中含浸有樹脂的複合材料所構成。 If for 11 1 to 11 3, the metal latches 12 1 to 12 3, 8 and 9 wiring film such as described in each single layer substrates, first, the respective single layer substrates 11 1 to 11 3, the base 12 1 to 12 3 3. It is composed of a substrate made of resin or a composite material impregnated with resin in a cloth-shaped substrate woven with glass fibers.

圖12之基體3,係在樹脂25中包含有玻璃纖維26,該基體3之表面,係藉由樹脂25之表面和玻璃纖維26之表面所構成,樹脂25和玻璃纖維26係露出。 The base 3 of FIG. 12 includes the glass fiber 26 in the resin 25. The surface of the base 3 is composed of the surface of the resin 25 and the surface of the glass fiber 26, and the resin 25 and the glass fiber 26 are exposed.

各金屬插銷8,係分別具備有與連接孔2之內周表面相接觸地而配置之合金薄膜4、和與該合金薄膜4之表面相接觸地而配置之導電膜6。又,各配線膜9,係分別具備有與基體3之表面相接觸地而配置之合金薄膜5、和與該合金薄膜5之表面相接觸地而配置之導電膜7。 Each metal plug 8 includes an alloy thin film 4 arranged in contact with the inner peripheral surface of the connection hole 2 and a conductive film 6 arranged in contact with the surface of the alloy thin film 4. Each wiring film 9 includes an alloy thin film 5 arranged in contact with the surface of the base 3 and a conductive film 7 arranged in contact with the surface of the alloy thin film 5.

合金薄膜4、5,係在基體3之表面或者是連接孔2之內周表面,而與構成基體3之樹脂25相接觸,當基體3為包含有玻璃纖維26的情況時,係與構成基體3之樹脂25和玻璃纖維26相接觸。 The alloy thin films 4 and 5 are on the surface of the base 3 or the inner peripheral surface of the connecting hole 2 and are in contact with the resin 25 constituting the base 3, and when the base 3 contains glass fibers 26, it is in contact with the constituent base The resin 25 of 3 and the glass fiber 26 are in contact.

針對上述搭載裝置10的製造工程作說明。於此,假設係已在支持基板14之單面處被形成有第2多層 基板12,在相反面處,係被形成並配置有除了成為最上層的單層基板113以外之單層基板111、112The manufacturing process of the mounting device 10 described above will be described. Here, it is assumed that the second multi-layer substrate 12 has been formed on one side of the support substrate 14, and the single-layer substrate 11 other than the single-layer substrate 11 3 as the uppermost layer has been formed and arranged on the opposite side 1 , 11 2 .

圖3,係對於此狀態之處理基板31作展示,在表面上,係露出有此處理基板31中之最上層的單層基板112FIG. 3 shows the processed substrate 31 in this state, and on the surface, the uppermost single-layer substrate 11 2 of the processed substrate 31 is exposed.

首先,在該單層基板112之表面上,如同圖4中所示一般,貼附基體3。 First, on the surface of the single layer substrate 112, as generally shown in Figure 4, the base body 3 attached.

所貼附之基體3,係可在進行貼附之前先形成連接孔2,亦可在將基體3作了貼附之後,再形成連接孔2。 The attached base body 3 may be formed with the connection hole 2 before the attachment, or the attachment hole 2 may be formed after the base body 3 is attached.

在此狀態下之處理基板32中,於成為最上層之基體3的連接孔2之底面處,係露出有下一層的單層基板112之配線膜9,接著,在基體3之表面和連接孔2之內周側面與底面處,形成合金薄膜4、5。 In the processing substrate 32 in this state, at the bottom surface of the connection hole 2 that becomes the uppermost substrate 3, the wiring film 9 of the single-layer substrate 11 2 of the next layer is exposed, and then, on the surface of the substrate 3 and the connection At the inner peripheral side and bottom of the hole 2, alloy thin films 4 and 5 are formed.

於圖2中,係對於形成合金薄膜4、5之濺鍍裝置50作展示。 In FIG. 2, a sputtering apparatus 50 for forming alloy thin films 4 and 5 is shown.

此濺鍍裝置50,係具備有搬入搬出室51a、和前置處理室51b、以及成膜室51c。 This sputtering apparatus 50 includes a carry-in/out chamber 51a, a pre-processing chamber 51b, and a film-forming chamber 51c.

在各室51a~51c中,係分別被連接有真空排氣裝置58a~58c,將各室51a~51c之間之閘閥59a、59b關閉,並使真空排氣裝置58b、58b動作,來將前置處理室51b之內部和成膜室51c之內部作真空排氣,而在前置處理室51b之內部和成膜室51c之內部預先分別形成真空氛圍。 In each of the chambers 51a to 51c, vacuum exhaust devices 58a to 58c are connected to close the gate valves 59a and 59b between the chambers 51a to 51c, and the vacuum exhaust devices 58b and 58b are operated to move the front The inside of the processing chamber 51b and the film-forming chamber 51c are evacuated, and the inside of the pre-processing chamber 51b and the film-forming chamber 51c are previously formed with vacuum atmospheres, respectively.

在搬入搬出室51a之內部,係被配置有搬送裝置54,將露出有基體3之處理基板32搬入至搬入搬出室51a之內部,並安裝在搬送裝置54上。 Inside the carry-in/out chamber 51a, a conveying device 54 is arranged, and the processing substrate 32 with the base 3 exposed is carried into the carry-in/out chamber 51a and mounted on the conveying device 54.

將搬入搬出室51a之門關閉,而將內部氛圍從大氣來遮斷,並使真空排氣裝置58a動作,而將搬入搬出室51a之內部作真空排氣。 The door of the carry-in/out room 51a is closed, the internal atmosphere is blocked from the atmosphere, the vacuum exhaust device 58a is operated, and the inside of the carry-in/out room 51a is vacuum-evacuated.

在搬入搬出室51a之內部,係被配置有加熱裝置56,一面進行真空排氣,一面藉由加熱裝置56來對於被配置在搬送裝置54上之處理基板32進行加熱。 Inside the carry-in/out chamber 51a, a heating device 56 is arranged to perform vacuum exhaust while heating the processing substrate 32 arranged on the conveying device 54 by the heating device 56.

在處理基板32升溫至特定溫度之後,閘閥59a係被開啟,處理基板32,係被與搬送裝置54一同地而從搬入搬出室51a之內部來移動至前置處理室51b之內部。 After the processing substrate 32 is heated to a specific temperature, the gate valve 59a is opened, and the processing substrate 32 is moved from the inside of the carry-in/out chamber 51a to the inside of the pre-processing chamber 51b together with the transfer device 54.

在前置處理室51b之內部,係被配置有離子槍57,在使搬入搬出室51a和前置處理室51b之間之閘閥59a被關閉之後,若是從氣體導入系來將稀有氣體(於此係為Ar)供給至離子槍57處,則在離子槍57之內部係產生有稀有氣體離子。所產生的稀有氣體離子,係被放出至前置處理室51b之內部。 Inside the pre-processing chamber 51b, an ion gun 57 is arranged. After the gate valve 59a between the carry-in/out chamber 51a and the pre-processing chamber 51b is closed, if the rare gas is introduced from the gas introduction system (here When Ar is supplied to the ion gun 57, rare gas ions are generated inside the ion gun 57. The generated rare gas ions are discharged into the pre-processing chamber 51b.

處理基板32之基體3,係露出於前置處理室51b之真空氛圍中,若是被搬入至前置處理室51b內,則係被朝向離子槍57,稀有氣體離子係被放出。稀有氣體離子,係被照射至基體3之表面和連接孔2之內周側面以及露出於連接孔2之底面處的下層之單層基板1112之導 電膜7的表面上,被進行了照射的部分係被清淨並成為活性之狀態。 The substrate 3 of the processing substrate 32 is exposed to the vacuum atmosphere of the pre-processing chamber 51b. If it is carried into the pre-processing chamber 51b, it is directed toward the ion gun 57 and the rare gas ion is released. The rare gas ions are irradiated onto the surface of the base 3 and the inner peripheral side surface of the connection hole 2 and the surface of the conductive film 7 of the lower single-layer substrate 111 2 exposed at the bottom surface of the connection hole 2 and irradiated Some are cleaned and become active.

若是將離子作特定時間之照射,則前置處理係結束,在其與成膜室51c之間之閘閥59b係被開啟,被進行了前置處理之處理基板32,係被與搬送裝置54一同地而從前置處理室51b之內部來移動至成膜室51c之內部,閘閥59b係被關閉。 If the ions are irradiated for a specific time, the pre-processing is completed, the gate valve 59b between it and the film-forming chamber 51c is opened, and the processed substrate 32 subjected to the pre-processing is taken together with the transport device 54 From the inside of the pre-processing chamber 51b to the inside of the film forming chamber 51c, the gate valve 59b is closed.

在成膜室51c之內部,係被配置有濺鍍靶材55。 Inside the film forming chamber 51c, a sputtering target 55 is arranged.

此濺鍍靶材55,係將板狀之靶材合金安裝於陰極電極上所構成,該板狀之靶材合金,係含有包含銅和鎳以及鋁之母材、和被添加於此母材中之添加物。 The sputtering target 55 is formed by mounting a plate-shaped target alloy on the cathode electrode. The plate-shaped target alloy contains a base material including copper, nickel and aluminum, and is added to the base material Of the additives.

針對此成分,母材,當將銅和鎳以及鋁之合計原子數設為100原子%時,係設為以較50原子%更多而含有銅,並以5原子%以上40原子%以下之範圍來含有鎳,並且以3原子%以上10原子%以下之範圍來含有鋁,又,係含有由鋅和錳之其中一方或雙方所成的添加物。 For this component, the base material, when the total atomic number of copper, nickel, and aluminum is set to 100 atomic %, is set to contain more than 50 atomic% of copper, and 5 atomic% or more and 40 atomic% or less It contains nickel in the range, and contains aluminum in the range of 3 atomic% or more and 10 atomic% or less, and also contains additives made of one or both of zinc and manganese.

添加物之含有率,係相對於母材之100原子%,而設為0.01原子%以上,又,添加物中之鋅的含有率係設為1.0原子%以下,添加物中之錳的含有率亦係設為1.0原子%以下。 The content rate of the additive is 0.01 atomic% or more with respect to 100 atomic% of the base material, and the content rate of zinc in the additive is 1.0 atomic% or less, and the content rate of manganese in the additive It is also set to 1.0 atomic% or less.

若是針對濺鍍靶材55之製造工程作說明,則首先,係將分別身為固體之銅原料和鎳原料和鋁原料以及添加物之原料,配置在相同之熔融容器中。 To explain the manufacturing process of the sputtering target 55, first, the copper raw material, the nickel raw material, the aluminum raw material, and the additive raw material, which are solid respectively, are arranged in the same melting vessel.

銅原料和鎳原料以及鋁原料,係如同上述一般,當將銅和鎳以及鋁之合計原子數設為100原子%時,係設為以較50原子%更多而含有銅,並以5原子%以上40原子%以下之範圍來含有鎳,並且以3原子%以上10原子%以下之範圍來含有鋁,又,係相對於母材之100原子%,而設為0.01原子%以上,又,相對於母材之100原子%,添加物係設為0.01原子%以上,並且,添加物中之鋅的含有率係設為1.0原子%以下,添加物中之錳的含有率亦係設為1.0原子%以下。 Copper raw materials, nickel raw materials, and aluminum raw materials are as described above. When the total atomic number of copper, nickel, and aluminum is set to 100 atomic %, it is set to contain more than 50 atomic% of copper, and 5 atoms It contains nickel in the range of% or more and 40 atom% or less, and contains aluminum in the range of 3 atom% or more and 10 atom% or less, and it is 0.01 atom% or more relative to 100 atom% of the base material. The additive system is set to 0.01 atomic% or more with respect to 100 atomic% of the base material, and the zinc content in the additive is set to 1.0 atomic% or less, and the manganese content in the additive is also set to 1.0 Atomic% or less.

將熔融容器加熱,而形成包含銅、鎳、鋁、添加物之熔融物。 The melting vessel is heated to form a melt containing copper, nickel, aluminum, and additives.

在熔融物中,銅、鎳、鋁、鋅、錳係均勻地分散,使熔融物冷卻,並將固化物成形為板狀,而形成濺鍍靶材。 In the melt, the copper, nickel, aluminum, zinc, and manganese systems are uniformly dispersed, the melt is cooled, and the solidified material is formed into a plate shape to form a sputtering target.

若是使熔融物冷卻,則係得到靶材合金。若是將板狀之靶材合金固定於陰極電極上,則係得到濺鍍靶材55。 If the melt is cooled, the target alloy is obtained. If the plate-shaped target alloy is fixed to the cathode electrode, the sputtering target 55 is obtained.

熔融物和濺鍍靶材55之組成,係與配置在熔融容器中之含有銅原料和鎳原料和鋁原料以及組成物之原料中所包含之銅和鎳和鋁以及添加物之比例相同。 The composition of the molten material and the sputtering target 55 is the same as the ratio of copper, nickel, aluminum, and additives contained in the raw material containing copper, nickel, aluminum, and the raw materials of the composition.

在成膜室51c之內部,係被設置有氣體放出裝置53,一面將成膜室51c之內部藉由真空排氣裝置58c來進行真空排氣,一面從氣體供給裝置52來對於氣體放出裝置53供給由Ar等之稀有氣體所成之濺鍍氣體,再從 氣體放出裝置53來將濺鍍氣體放出至成膜室51c之內部,並對於濺鍍靶材55施加電壓,而產生濺鍍氣體之電漿。 Inside the film-forming chamber 51c, a gas release device 53 is provided, and the inside of the film-forming chamber 51c is evacuated by a vacuum exhaust device 58c, while the gas supply device 52 is used for the gas release device 53. Supply sputtering gas made of rare gas such as Ar, and then The gas discharge device 53 discharges the sputtering gas into the film forming chamber 51c, and applies a voltage to the sputtering target 55 to generate a plasma of the sputtering gas.

被進行了前置處理後之基體3的表面,係與濺鍍靶材55相對面,若是藉由所產生的電漿來對於濺鍍靶材55之表面進行濺鍍,則濺鍍粒子係附著於基體3之被進行了前置處理後的表面上,於該表面上,係成長有銅和鎳和鋁和鋅以及錳的含有率為與濺鍍靶材55相同的合金薄膜。 The surface of the substrate 3 that has been subjected to the pre-treatment is opposite to the sputtering target 55. If the surface of the sputtering target 55 is sputtered by the generated plasma, the sputtered particles are attached On the surface of the substrate 3 subjected to the pretreatment, an alloy thin film having the same content rates as the sputtering target 55 of copper, nickel, aluminum, zinc, and manganese is grown on the surface.

在使將銅原料和鎳原料和鋁原料以及添加物原料一同作了熔融的熔融物固化的情況時,相較於將銅原料和鎳原料以及鋁原料在相異之熔融容器中個別熔解並裝入至相同的熔融容器中並且添加添加物之原料再使熔融物固化的情況,係發現到,在將各原料一同熔解的情況時,空孔係會變少。 In the case of solidifying a molten material in which copper raw materials, nickel raw materials, aluminum raw materials, and additive raw materials are melted together, compared to melting and loading copper raw materials, nickel raw materials, and aluminum raw materials separately in different melting vessels When it was put into the same melting vessel and the raw materials of the additives were added to solidify the melt, it was found that when the raw materials were melted together, the void system was reduced.

故而,在使各原料一同熔融之後再進行固化所成的濺鍍靶材55之內部,空孔係變少,電弧放電之發生頻率係減少,因此,藉由濺鍍靶材55之濺鍍,係能夠得到缺陷為少之合金薄膜。 Therefore, in the sputtering target 55 formed by melting the raw materials together and then solidifying, the voids are reduced and the frequency of arc discharge is reduced. Therefore, by sputtering the sputtering target 55, It is possible to obtain alloy thin films with few defects.

圖5之元件符號33,係為以特定膜厚而形成有該合金薄膜15之處理基板,合金薄膜15之組成,係與濺鍍靶材之組成相同。 The element symbol 33 in FIG. 5 is a processed substrate formed with the alloy thin film 15 at a specific film thickness. The composition of the alloy thin film 15 is the same as the composition of the sputtering target.

合金薄膜15,係與基體3之表面(連接孔2之內部除外)和連接孔2之內周面以及連接孔2之底面之 導電膜7相接觸,在連接孔2之底面,則係與下一層的單層基板112之配線膜9相接觸,而被作電性連接。下一層的單層基板112之配線膜9,係藉由合金薄膜5和導電膜7所構成。 The alloy film 15 is in contact with the conductive film 7 on the surface of the base 3 (excluding the inside of the connection hole 2), the inner circumferential surface of the connection hole 2 and the bottom surface of the connection hole 2, and on the bottom surface of the connection hole 2 single layer of the wiring substrate 112 in contact with the film 9, is made electrically connected. The wiring layer 112 of the single layer substrate film 9, by-based alloy thin film 5 and the conductive film 7 is formed.

另外,最上層之合金薄膜15,由於係藉由離子槍57而被形成於照射有離子之表面上,因此,密著強度相較於並未進行照射的情況係變高。 In addition, since the uppermost alloy thin film 15 is formed on the surface irradiated with ions by the ion gun 57, the adhesion strength is higher than when the irradiation is not performed.

在以特定膜厚而形成了合金薄膜15之後,使對於濺鍍靶材55之電壓施加和濺鍍氣體之導入停止,而結束濺鍍。 After forming the alloy thin film 15 at a specific film thickness, the voltage application to the sputtering target 55 and the introduction of the sputtering gas are stopped, and the sputtering is ended.

接著,閘閥59a、59b係被開啟,被形成有合金薄膜15之處理基板33,係通過前置處理室51b,而被移動至內部成為了真空氛圍之搬入搬出室51a中。 Next, the gate valves 59a and 59b are opened, and the processing substrate 33 on which the alloy thin film 15 is formed passes through the pre-processing chamber 51b and is moved into the carry-in/out chamber 51a, which becomes a vacuum atmosphere.

在使閘閥59a、59b關閉之後,氣體係被導入至搬入搬出室51a中,在搬入搬出室51a之內部成為了大氣壓之後,被形成有合金薄膜15之處理基板33係被從搬入搬出室51a而取出。 After closing the gate valves 59a and 59b, the gas system is introduced into the carry-in/out chamber 51a. After the inside of the carry-in/out chamber 51a becomes atmospheric pressure, the processing substrate 33 formed with the alloy thin film 15 is removed from the carry-in/out chamber 51a. take out.

接著,如同圖6中所示一般,在合金薄膜15之表面上,係被配置有被作了圖案化之光阻膜28。 Next, as shown in FIG. 6, a patterned photoresist film 28 is arranged on the surface of the alloy thin film 15.

在此光阻膜28處,係於最上層之基體3的各連接孔2之上方和該基體3之表面上的合金薄膜15之特定位置之上方處,被形成有開口29,在開口29之底面下,係露出有被配置在各連接孔2之底面和內周側面上的合金薄膜15、或者是位置在基體3之表面上的合金薄膜 15。 At this photoresist film 28, an opening 29 is formed above each connection hole 2 of the uppermost substrate 3 and above a specific position of the alloy thin film 15 on the surface of the substrate 3, and between the opening 29 Under the bottom surface, the alloy thin film 15 disposed on the bottom surface and inner peripheral side surface of each connection hole 2 or the alloy thin film positioned on the surface of the base 3 are exposed 15.

對於該狀態之處理基板33的開口29之底面下所露出之合金薄膜15之表面,將由銅之含有率(原子%)為較合金薄膜15更高而電阻率為更小之材料所成的導電膜,與合金薄膜15相接觸地來形成之。 The surface of the alloy thin film 15 exposed under the bottom surface of the opening 29 of the processing substrate 33 in this state will be made of a material with a copper content rate (atomic %) higher than that of the alloy thin film 15 and a lower resistivity. The film is formed in contact with the alloy thin film 15.

關於導電膜之具體性的形成方法,例如,係將身為在光阻膜28之開口29的底面和基體3之表面的特定位置上而露出有合金薄膜15的狀態下之處理基板33,浸漬於包含有銅離子之電鍍液中,而使露出了的合金薄膜15與電鍍液相接觸,再使電源與被浸漬在電鍍液中之銅電極以及合金薄膜15作連接,並使電源動作,來經由銅電極而對於合金薄膜15與電鍍液之間施加電壓,而使電鍍液中之正的金屬離子附著於合金薄膜15之與電鍍液相接觸的部份處,來使相較於合金薄膜15而含有更多銅的導電膜成長,而如同圖7中所示一般地,製作出在連接孔2上之開口29的底面下和基體3之表面上之開口29的底面下被形成有導電膜6、7之處理基板34。 Regarding the specific method of forming the conductive film, for example, the treated substrate 33 in a state where the alloy thin film 15 is exposed at specific positions on the bottom surface of the opening 29 of the photoresist film 28 and the surface of the base 3 is immersed In the plating solution containing copper ions, the exposed alloy film 15 is brought into contact with the plating liquid, and then the power supply is connected to the copper electrode and the alloy film 15 immersed in the plating solution, and the power supply is activated. A voltage is applied between the alloy film 15 and the plating solution through the copper electrode, so that positive metal ions in the plating solution are attached to the portion of the alloy film 15 that is in contact with the plating liquid, to compare with the alloy film 15 A conductive film containing more copper grows, and as shown in FIG. 7, a conductive film is formed under the bottom surface of the opening 29 on the connection hole 2 and under the bottom surface of the opening 29 on the surface of the base 3 6,7的处理基地34。 The processing substrate 34 of 7.

一般而言,相較於濺鍍法,係以電解電鍍法的情況時之成長速度為更大,相較於藉由濺鍍法所形成的合金薄膜15之膜厚,係以藉由電解電鍍法所形成的導電膜6、7之膜厚為更厚,在此處理基板34處,被形成在連接孔2內之合金薄膜15的表面上之導電膜6,係將連接孔2之內部作填充,其之上部,係位置在較基體3之表面上的合金薄膜15之表面而更上方。 Generally speaking, compared with the sputtering method, the growth rate in the case of the electrolytic plating method is greater, and the film thickness of the alloy thin film 15 formed by the sputtering method is by electrolytic plating The thickness of the conductive films 6 and 7 formed by the method is thicker. At the processing substrate 34, the conductive film 6 formed on the surface of the alloy thin film 15 in the connection hole 2 is used to make the inside of the connection hole 2 The upper part of the filling is located above the surface of the alloy thin film 15 on the surface of the base 3.

接著,如同圖8中所示一般,若是將光阻膜28剝離,則在導電膜6、7所露出的部份之間,係露出有合金薄膜15。 Next, as shown in FIG. 8, if the photoresist film 28 is peeled off, the alloy thin film 15 is exposed between the exposed portions of the conductive films 6 and 7.

連接孔2之內部的導電膜6,係被與基體3之表面上的導電膜7作連接,但是,在基體3之表面上的導電膜7中,雖然係包含有相互被作了分離的導電膜,然而在將光阻膜28作了剝離的狀態下,內部之導電膜6和表面之導電膜7,係為藉由合金薄膜15而相互被作了電性連接的狀態。 The conductive film 6 inside the connection hole 2 is connected to the conductive film 7 on the surface of the base 3, but the conductive film 7 on the surface of the base 3 includes the conductive separated from each other However, in the state where the photoresist film 28 is peeled off, the internal conductive film 6 and the surface conductive film 7 are in a state of being electrically connected to each other by the alloy thin film 15.

接著,若是將此狀態之處理基板34浸漬在對於銅進行蝕刻之蝕刻液中,則露出的合金薄膜15係被蝕刻並除去,如同圖9中所示一般,在合金薄膜15被作了除去的部份處,位置在合金薄膜15之下的基體3之表面係露出,並形成使導電膜6、7被作了圖案化的最上層之單層基體113Next, if the processed substrate 34 in this state is immersed in an etching solution for etching copper, the exposed alloy thin film 15 is etched and removed, as shown in FIG. 9, the alloy thin film 15 is removed In part, the surface of the substrate 3 positioned under the alloy thin film 15 is exposed, and the uppermost single-layer substrate 11 3 in which the conductive films 6, 7 are patterned is formed.

在各單層基板111~113、121~123處,連接孔2之內部,係被構成有藉由連接孔2之內部的導電膜6和位置於該導電膜6之下的合金薄膜4來將連接孔2作填充的金屬插銷8,在基體3上,係藉由導電膜7和位置於該導電膜7之下的合金薄膜5而被構成有配線膜9。 At each of the single-layer substrates 11 1 to 11 3 and 12 1 to 12 3 , the inside of the connection hole 2 is constituted by the conductive film 6 inside the connection hole 2 and the alloy positioned under the conductive film 6 The thin film 4 is a metal plug 8 filled with a connection hole 2, and a wiring film 9 is formed on the base 3 by a conductive film 7 and an alloy thin film 5 positioned under the conductive film 7.

相對於在基體3之表面上而露出的樹脂25,純銅之薄膜的密著性係為差。 With respect to the resin 25 exposed on the surface of the base 3, the adhesion of the thin film of pure copper is poor.

在本案發明中,與樹脂25相接觸之合金薄膜4、5,係在以較50原子%更多而含有銅的薄膜材料中, 如同下述實驗中所示一般地,使其含有銅以外之元素並對於密著力進行了測定,其結果,以5原子%以上30原子%以下之範圍來含有鎳並且以3原子%以上10原子%以下之範圍來含有鋁的薄膜材料,相較於純銅或氧化銅之薄膜,其之相對於樹脂25的密著性係變高,作為添加物,當將銅和鎳以及鋁之合計原子數設為100%時,係包含有0.01原子%以上1.0原子%以下之鋅和0.01原子%以上1.0原子%以下之範圍之錳的其中一方或者是雙方。 In the present invention, the alloy films 4 and 5 in contact with the resin 25 are contained in a film material containing copper at more than 50 atomic %, As shown in the following experiment, in general, an element other than copper was included and the adhesion was measured. As a result, nickel was contained in the range of 5 atomic% or more and 30 atomic% or less, and 3 atomic% or more and 10 atoms The film material containing aluminum in the range of% or less has a higher adhesion to the resin 25 than the film of pure copper or copper oxide. As an additive, when the total atomic number of copper, nickel and aluminum is added When it is set to 100%, it includes one or both of zinc of 0.01 atomic% or more and 1.0 atomic% or less and manganese of 0.01 atomic% or more and 1.0 atomic% or less.

關於添加物,由於係並不會有使與樹脂25之間之密著性惡化的情況,並且母材之銅含有率係較50原子%而更大,因此,與純銅之薄膜之間的密著性亦係為高,金屬插銷8或配線膜9係並不會從基體3而剝離,又,由於導電膜6、7係相較於合金薄膜4、5而銅之含有率為更高,因此,導電膜6、7亦係成為不會從合金薄膜4、5而剝離。 Regarding the additive, since there is no possibility of deteriorating the adhesion with the resin 25, and the copper content of the base material is greater than 50 atomic %, the density with the pure copper film The adhesion is also high, the metal plug 8 or the wiring film 9 will not peel off from the base 3, and because the conductive films 6, 7 are higher than the alloy thin films 4, 5 and the copper content rate is higher, Therefore, the conductive films 6 and 7 are not peeled off from the alloy thin films 4 and 5.

[實施例] [Example]

當將銅和鎳以及鋁之合計原子數設為100原子%時,以1原子%以上50原子%以下來含有鎳,並以1原子%以上10原子%以下來含有鋁,並且以0.01%來含有由鋅和錳之其中一方或雙方所成的添加物,而將殘餘部分設為銅原子,來製作出鎳以及鋁之含有率為相異的複數之組成之試驗用濺鍍靶材。 When the total atomic number of copper, nickel, and aluminum is 100 atomic %, nickel is contained at 1 atomic% or more and 50 atomic% or less, and aluminum is contained at 1 atomic% or more and 10 atomic% or less, and 0.01% Containing additives made of one or both of zinc and manganese, and using the remainder as copper atoms, a test sputtering target with a composition in which the content ratio of nickel and aluminum are different is produced.

使用各濺鍍靶材來藉由濺鍍而形成與玻璃基 板之表面相接觸之50nm的合金膜,並形成1mm×1mm×100格之刮削圖案,而進行了由交錯切劃(crosscut)試驗所致之密著性之評價。 Use each sputtering target to form a glass substrate by sputtering A 50 nm alloy film in contact with the surface of the board was formed into a scraping pattern of 1 mm×1 mm×100 grid, and the adhesion evaluation by the crosscut test was conducted.

將測定結果展示於表1中。 The measurement results are shown in Table 1.

Figure 105130847-A0202-12-0020-1
Figure 105130847-A0202-12-0020-1

在表1中,將當起因於交錯切劃試驗而產生有膜之剝離的格子為10以上的情況記載為「×」,並將1~10的情況記載為「△」,且將並未觀察到剝離的情況記載為「○」。 In Table 1, the case where the peeling of the film due to the cross-cut test is 10 or more is described as “×”, and the case of 1 to 10 is described as “△”, and it is not observed The situation until peeling is described as "○".

根據此結果,可以得知,為了形成與剝離基板間之密著力為高的合金膜,鎳之含有量係以5原子%以上為理想,鋁之含有量係以3原子%以上為理想。 From this result, it can be seen that in order to form an alloy film with high adhesion to the peeling substrate, the content of nickel is preferably 5 atomic% or more, and the content of aluminum is preferably 3 atomic% or more.

另外,當鎳的含有量為較40原子%而更大的情況時,由於濺鍍靶材之硬度係會超過145Hv,因此在加工性上並不理想,若是以較10原子%更大而含有鋁,則係成為難以藉由熔解法來製造濺鍍靶材,而並不理想。 In addition, when the nickel content is greater than 40 atomic %, the hardness of the sputtering target will exceed 145Hv, so it is not ideal in workability. If it is greater than 10 atomic% Aluminum is difficult to produce sputtering target by melting method, which is not ideal.

接著,當將銅和鎳以及鋁之合計原子數設為100原子%時,以較50原子%更多來含有銅,並以5原子 %以上40原子%以下之範圍來含有鎳,並且以3原子%以上10原子%以下來含有鋁,而製作母材,使此母材與由鋅和錳之其中一方或雙方所成的添加物之間的熔融物固化,來製作出鋅和錳之含有率為相異的複數之組成之試驗用濺鍍靶材。 Next, when the total atomic number of copper, nickel, and aluminum is set to 100 atomic %, copper is contained more than 50 atomic %, and 5 atomic It contains nickel in the range of% or more and 40 atom% or less, and contains aluminum in the range of 3 atom% or more and 10 atom% or less, and the base material is made such that the base material and one or both of zinc and manganese are made of additives The molten material in between is solidified to produce a sputtering target for a test with a composition of a plurality of different contents of zinc and manganese.

將各濺鍍靶材切斷並對於剖面進行觀察,而對於空孔數作了測定。進行了測定的靶材,係為100mm

Figure 105130847-A0202-12-0021-18
×10mm厚度,切斷後之剖面積係為100mm×10mm,觀察係使用染色穿透測試試驗機,空孔係對於尺寸為0.5mm
Figure 105130847-A0202-12-0021-19
以上者進行計數。空孔數之測定結果係展示於表2中。 Each sputtering target was cut and the cross section was observed, and the number of holes was measured. The measured target is 100mm
Figure 105130847-A0202-12-0021-18
×10mm thickness, the cross-sectional area after cutting is 100mm×10mm, the observation system uses a dye penetration tester, and the hole size is 0.5mm
Figure 105130847-A0202-12-0021-19
Count the above. The measurement results of the number of holes are shown in Table 2.

Figure 105130847-A0202-12-0021-2
Figure 105130847-A0202-12-0021-2

表2之數值,係為在將銅和鎳以及鋁之合計原子數設為100原子%時的添加物之含有率(原子%),對於空孔數被觀察到較3個/cm2而更多的濺鍍靶材,係記載為「×」,對於觀察到1~3個/cm2的濺鍍靶材,係記載為「○」,對於並未被觀察到空孔的濺鍍靶材,係記載為 「◎」。 The numerical value in Table 2 is the content rate (atomic %) of the additive when the total atomic number of copper, nickel and aluminum is set to 100 atomic %, and the number of voids is observed to be more than 3/cm 2 Many sputtering targets are described as “×”, and for sputtering targets where 1 to 3 pieces/cm 2 are observed, they are described as “○”, and for sputtering targets where no holes are observed , Is described as "◎".

又,圖10之圖表的橫軸,係為在將銅和鎳以及鋁之合計原子數設為100原子%時的添加物含有率(原子%),縱軸係為將所測定出的空孔數作了常態化之值,而對於添加物含有量和空孔數之間的關係作展示。 In addition, the horizontal axis of the graph in FIG. 10 is the additive content rate (atomic %) when the total atomic number of copper, nickel, and aluminum is 100 atomic %, and the vertical axis is the measured void The number is normalized, and the relationship between the additive content and the number of holes is shown.

根據表2和圖10之圖表,可以預測到,在將銅和鎳以及鋁之合計原子數設為100原子%時,若是將鋅和錳分別含有1.0%,則係能夠使空孔數縮小。 From the graphs in Table 2 and FIG. 10, it can be predicted that, when the total atomic number of copper, nickel, and aluminum is set to 100 atomic %, if zinc and manganese are each contained at 1.0%, the number of pores can be reduced.

接著,以5原子%以上40原子%以下之範圍而含有鎳,並以3原子%以上8原子%以下之範圍而含有鋁,並且以0原子%以上1.2原子%以下之範圍而含有添加物,而將殘餘部分設為銅原子,來製作出添加物含有率為相異之濺鍍靶材。 Next, it contains nickel in the range of 5 atomic% or more and 40 atomic% or less, contains aluminum in the range of 3 atomic% or more and 8 atomic% or less, and contains additives in the range of 0 atomic% or more and 1.2 atomic% or less, On the other hand, the copper atom was used as the residual portion to produce a sputtering target having different additive content rates.

此些之濺鍍靶材之添加物,係為錳或鋅之其中一方,並分別為在0原子%以上1.2原子%以下之範圍中而為相異之含有率。 The additives of these sputtering targets are one of manganese and zinc, and they are different content rates in the range of 0 atomic% or more and 1.2 atomic% or less, respectively.

使用各濺鍍靶材來藉由濺鍍而在玻璃基板上形成50nm膜厚的濺鍍膜,並在此濺鍍膜上而使Cu電鍍膜作了30μm之膜厚的成長。形成其之1mm×1mm×100格之刮削圖案,而進行了由交錯切劃(crosscut)試驗所致之密著性之評價。 Each sputtering target was used to form a 50 nm-thick sputtering film on the glass substrate by sputtering, and the Cu plating film was grown to a thickness of 30 μm on this sputtering film. A scraping pattern of 1 mm×1 mm×100 grid was formed, and the evaluation of the adhesion by the crosscut test was conducted.

將測定結果,展示於下述表3之Zn各添加量評價結果和表4之Mn各添加量評價結果中。 The measurement results are shown in the evaluation results of the respective addition amounts of Zn in Table 3 and the evaluation results of the respective addition amounts of Mn in Table 4.

根據表2,若是將鋅和錳之其中一方或者是雙 方分別含有0.01原子%以上,則係能夠得到使空孔減少之效果,若是將其中一方或雙方分別以0.25原子%以上來含有,則空孔係消失,而為理想。 According to Table 2, if one of zinc and manganese is If each contains 0.01 atomic% or more, the effect of reducing voids can be obtained, and if one or both of them are contained at 0.25 atomic% or more, the void system disappears, which is ideal.

Figure 105130847-A0202-12-0023-3
Figure 105130847-A0202-12-0023-3

Figure 105130847-A0202-12-0023-4
Figure 105130847-A0202-12-0023-4

在表3、表4中,將當起因於交錯切劃試驗而導致電鍍膜從濺鍍膜而剝離的情況記載為「×」,並將並未剝離的情況記載為「○」。 In Table 3 and Table 4, the case where the plating film peeled off from the sputtered film due to the cross-cut test is described as “×”, and the case where it did not peel is described as “○”.

在表3和表4之至少其中一者處被記載為「×」的濺鍍靶材,係並無法作使用。在表3和表4之雙方處被記載為「○」的濺鍍靶材,係能夠作使用。 At least one of Table 3 and Table 4 is marked as "X" sputtering target, it is not available for use. Sputtering targets described as "○" in both Table 3 and Table 4 can be used.

根據表3和表4,由鋅和錳之其中一方或雙方所成之添加物,若是相對於母材100原子%而以1.2原子%以上之含有率來含有並形成濺鍍靶材,則係並無法相對 於藉由在濺鍍靶材之濺鍍成膜的後續工程中所進行之Cu電鍍法而形成的導電膜6、7而得到良好的密著性,若是設為1.0原子%以下,則係能夠形成具有良好之密著性的合金薄膜4、5。 According to Table 3 and Table 4, if the additive made of one or both of zinc and manganese is contained and formed at a content rate of 1.2 atomic% or more relative to 100 atomic% of the base material, it is And cannot be relative Since the conductive films 6, 7 formed by the Cu plating method performed in the subsequent process of sputtering film formation of the sputtering target material, good adhesion is obtained, and if it is 1.0 atomic% or less, it is possible The alloy thin films 4 and 5 with good adhesion are formed.

根據表3、表4,可以得知,就算是使鋁的含有量增加,對於密著性也不會造成影響,但是,若是對於由熔解法所致之靶材的製造性作考慮,則根據以上之結果,由鋅和錳之其中一方或雙方所成之添加物,在當將銅和鎳以及鋁之合計原子數設為100原子%時以較50原子%更多而含有銅並以5原子%以上40原子%以下之範圍來含有鎳並且以3原子%以上10原子%以下之範圍來含有鋁的母材中,鋅和錳,若是以相對於母材100原子%而將其中一方或雙方分別以0.01原子%以上1.0原子%以下之含有率來含有並設為濺鍍靶材,則係能夠得到加工性為良好並且空孔為少之濺鍍靶材,並能夠形成相對於藉由在濺鍍靶材之濺鍍成膜的後續工程中所進行之Cu電鍍法而形成的導電膜6、7而具有良好的密著性之合金薄膜4、5,進而,係能夠形成與樹脂之間的密著性為良好之合金薄膜4、5。 According to Table 3 and Table 4, it can be known that even if the aluminum content is increased, it will not affect the adhesion, but if the manufacturability of the target material by the melting method is considered, then based on As a result of the above, an additive made of one or both of zinc and manganese contains copper more than 50 atomic% when the total atomic number of copper, nickel, and aluminum is set to 100 atomic %. In the base material containing nickel in the range of at least 40 atom% or less and containing aluminum in the range of 3 atom% or more and 10 atom% or less, zinc and manganese, if one of them is based on 100 atom% of the base material When both sides are contained at a content rate of 0.01 atomic% or more and 1.0 atomic% or less and set as the sputtering target, a sputtering target with good workability and few voids can be obtained The conductive films 6, 7 formed by the Cu plating method performed in the subsequent process of sputtering film formation of the sputtering target material, and the alloy thin films 4, 5 having good adhesion, in addition, can be formed with the resin The adhesion between them is good alloy film 4, 5.

112‧‧‧單層基板 11 2 ‧‧‧Single layer substrate

32‧‧‧處理基板 32‧‧‧Process substrate

50‧‧‧濺鍍裝置 50‧‧‧Sputtering device

51a‧‧‧搬入搬出室 51a‧‧‧Move in and out of the room

51b‧‧‧前置處理室 51b‧‧‧Pre-treatment room

51c‧‧‧成膜室 51c‧‧‧Film-forming room

52‧‧‧氣體供給裝置 52‧‧‧Gas supply device

53‧‧‧氣體放出裝置 53‧‧‧Gas release device

54‧‧‧搬送裝置 54‧‧‧Conveying device

55‧‧‧濺鍍靶材 55‧‧‧Sputtering target

56‧‧‧加熱裝置 56‧‧‧Heating device

57‧‧‧離子槍 57‧‧‧Ion gun

58a、58b、58c‧‧‧真空排氣裝置 58a, 58b, 58c‧‧‧ vacuum exhaust device

59a、59b‧‧‧閘閥 59a, 59b ‧‧‧ gate valve

Claims (2)

一種濺鍍靶材,係身為Cu-Ni-Al合金之濺鍍靶材,並包含有:母材,係含有Cu和Ni以及Al,在將Cu和Ni以及Al設為100原子%時,係以較50原子%更多而含有Cu,並以5原子%以上40原子%以下之含有率來含有Ni,並且以3原子%以上10原子%以下之含有率來含有Al;和添加物,係被添加於前述母材中,該濺鍍靶材,其特徵為:前述添加物,係由Zn和Mn之其中一方或雙方所成,並相對於前述母材之100原子%,而以0.01原子%以上之含有率來含有,在前述添加物中所含有之Zn的含有率和Mn的含有率,係分別被設為1.0原子%以下。 A sputtering target material, which is a sputtering target material of Cu-Ni-Al alloy, and includes: a base material, which contains Cu, Ni and Al, and when Cu, Ni and Al are set to 100 atomic %, It contains Cu more than 50 atomic %, contains Ni at a content rate of 5 atomic% or more and 40 atomic% or less, and contains Al at a content rate of 3 atomic% or more and 10 atomic% or less; and additives, It is added to the base material. The sputtering target is characterized in that the additive is made of one or both of Zn and Mn, and is 0.01% relative to 100 atomic% of the base material. It is contained at a content rate of at least atomic %, and the content rate of Zn and the content rate of Mn contained in the aforementioned additives are each set to 1.0 atomic% or less. 一種靶材製造方法,係為製造如申請專利範圍第1項所記載之濺鍍靶材之靶材製造方法,其特徵為:將固體之前述母材和固體之前述添加物配置在相同的容器中,進行加熱而形成含有前述母材和前述添加物之熔融物,冷卻前述熔融物而使其固化並形成前述濺鍍靶材。 A target manufacturing method is a target manufacturing method for manufacturing a sputtering target as described in item 1 of the scope of patent application, characterized in that the solid base material and the solid additive are arranged in the same container In the process, heating is performed to form a melt containing the base material and the additive, and the melt is cooled and solidified to form the sputtering target.
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