TWI692064B - Semiconductor chip having coplanar bumps and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a semiconductor chip having coplanar bumps and manufacturing method thereof. The semiconductor chip has a chip, a polymer layer and multiple bumps. An active surface of the chip has multiple pads and is covered by the polymer layer. The polymer layer has multiple openings corresponding to the pads so the pads are exposed. The bumps are directly and respectively formed on the exposed pads and respectively protruded over the corresponding openings. Tops of the bumps are coplanar. Therefore, a quality of the solder joint surface between the semiconductor chip and a substrate or other semiconductor chip in a semiconductor packaging process is increased.

Description

Semiconductor wafer with equal-height bumps and manufacturing method thereof

The invention relates to a semiconductor wafer bump manufacturing method, in particular to a semiconductor wafer with equal height bumps and a manufacturing method thereof.

In the semiconductor packaging process, a plurality of bumps are first formed on the active surface of the chip. As shown in FIG. 3, most of the bumps 70 are formed on the pads 51 of the active surface, and the remaining bumps 70 are used as semiconductors The wafer 50 is used for supporting in the packaging process; therefore, in the bump process of the semiconductor wafer 50, the bumps 70 formed on non-coplanar surfaces are not equal in height; in addition, the bumps 70 formed on the partial pads 51 have a size The difference will also cause the bumps 70 on the same plane but different sizes to have different heights.

Please refer to FIGS. 4A to 4G, which are the current bump manufacturing processes of semiconductor chips. First, as shown in FIG. 4A, a polymer layer 60 (Polymer Layer) is formed on the active surface of a semiconductor chip 50, and then corresponding An opening 61 is formed on the pad 51 on the active surface to expose the pad; as shown in FIG. 4B, a metal layer 700 is formed on the polymer layer 60, the inner wall of each opening 61 and the exposed pad 51; As shown in FIG. 4C, a patterned photoresist layer 80 is formed, and the opening 81 corresponds to the bump forming position. As shown in FIG. 4D, a metal post 71 and a metal intermediate layer are sequentially formed in the opening 81 of the photoresist layer 80 72 and the tin layer 73, as shown in FIG. 4E, the photoresist layer 80 is removed, and then as shown in FIG. 4F, the metal layer 71 is etched, leaving the metal layer under each metal post 71 as a metal bonding layer 701, Finally, through a reflow process, the tin layer 73 on each of the metal pillars 71 is melted to form a spherical shape to form the bump 70, as shown in FIG. 4G.

Since the metal pillars formed in FIG. 4D are formed by chemical plating, within a certain plating time, metal pillars 71 formed on non-coplanar surfaces with different opening sizes naturally have different heights; similarly, subsequent formation of the metal pillars 71 The height of the tin layer 73 on the post 71 is also different. Even after the reflow process, the bumps 70 are still unequal in height; thus, it will cause the subsequent bonding of the semiconductor chip to the substrate or other semiconductor chips in the packaging process The problem of poor quality requires further improvement.

In view of the above technical defect that the current bump manufacturing process of semiconductor wafers cannot provide contour bumps, the main object of the present invention is to provide a semiconductor wafer with contour bumps and a manufacturing method thereof.

The main technical means used to achieve the above purpose is to make the semiconductor wafer with contour bumps include: A chip includes an active surface, and the active surface includes multiple pads; A polymer layer covering the active surface of the chip, and openings are formed at the pads corresponding to the active surface; and A plurality of bumps are formed directly on the pads of the corresponding openings of the polymer layer and protrude from the openings, and the tops of the bumps are coplanar.

It can be seen from the above that the semiconductor wafer of the present invention can be formed with equal height bumps on the pads corresponding to the opening sizes of different polymer layers; in this way, it helps the semiconductor wafer to improve the quality of the solder joint surface with the substrate or other semiconductor wafers during the packaging process .

The main technical means used to achieve the above purpose is to make the bump manufacturing method of the semiconductor wafer include: (a) A polymer layer is formed on the active surface of a chip; wherein the active surface includes a plurality of pads, and the polymer layer has openings formed corresponding to the pads to expose the pads; (b) forming a metal pillar layer on the polymer layer, the inner wall of the opening of the polymer layer and the exposed pad; (c) A first metal pillar is formed in each opening, and the first metal pillars are coplanar with the metal layer on the polymer layer; (d) A patterned photoresist layer is formed on the metal layer, and the openings of the photoresist layer respectively correspond to the openings of the polymer layer; (e) A second metal pillar and a tin layer are sequentially formed in each opening, that is, a second metal pillar corresponding to the opening of the polymer layer is formed on the first metal pillar. (f) remove the photoresist layer; and (g) Etching the metal layer and leaving the metal layer under each second metal pillar, and then reflowing the tin layer to make each tin layer spherical.

The bump manufacturing method of the semiconductor wafer of the present invention mainly first fills the first metal pillar with the opening of the corresponding pad of the polymer layer, so that the next second metal pillar can be formed on the coplanar surface to ensure the forming height is consistent, and finally Contour bumps can be formed on the pads of the semiconductor wafer corresponding to the opening sizes of different polymer layers; thus, it helps the semiconductor wafer to improve the quality of the solder joint surface with the substrate or other semiconductor wafers during the packaging process.

The present invention proposes improvements to the bump structure of the semiconductor wafer and its method, and the technical contents of the present invention are described in detail with the embodiments and drawings.

Referring first to FIG. 1H, it is a semiconductor chip structure of the present invention, which includes a chip 10, a polymer layer 20 and a plurality of bumps 30.

Each of the above-mentioned chips 10 includes an active surface 11, and the active surface 11 includes a plurality of pads 12.

The above-mentioned polymer layer 20 covers the active surface 11 of the wafer 10, and an opening 21 is formed at each pad 12 corresponding to the active surface 11. In this embodiment, the diameter of the partial opening 21 is different.

The bumps 30 are directly formed in the corresponding openings 21 of the polymer layer 20 and protrude out of the openings 21, and the tops of the bumps 30 are coplanar; in this embodiment, other bumps are further included The block 30a is formed directly on the polymer layer 20. Each of the bumps 30, 30a includes a metal bonding layer 311, a metal post 321, and a tin layer 34; wherein the metal bonding layer 311 is formed in the corresponding opening 21 of the polymer layer 20, the metal post 321 is It is formed on the corresponding metal bonding layer 311, and the tin layer 34 is formed on the metal post 321; in this embodiment, the tin layer 34 is formed into a spherical shape. As shown in FIG. 2C, in another embodiment of the bump of the present invention, the bumps 30 and 30a further include a metal intermediate layer 33 formed between the metal pillar 311 and the tin layer 34. Preferably, the metal bonding layer 311 is copper or titanium, the metal post 321 is copper, and the middle 33 layer of the metal is nickel.

Please refer to FIGS. 1A to 1H for the first embodiment of the semiconductor wafer bump manufacturing method of the present invention. As shown in FIG. 1A, a polymer layer 20 is formed on the active surface 11 of a wafer 10 The object layer 20 forms an opening 21 corresponding to the position of each pad 12 on the active surface 11 to expose the corresponding pad 12.

As shown in FIG. 1B, a metal layer 31 is formed on the polymer layer 20, the inner wall of the opening 21 of the polymer layer 20 and the exposed pad 12.

As shown in FIG. 1E, first metal pillars 322 are formed in each opening 21. The first metal pillars 322 are coplanar with the metal layer 31 located on the polymer layer 20. In this embodiment, as shown in FIG. 1C, electroless copper electroplating is performed on the metal layer 31 to form a metal pillar layer 32 having a first thickness h1; then, a chemical mechanical planarization (CMP) process is used from the metal The pillar layer is ground down to the second thickness h2, and then the metal pillar layer 32' is etched until the metal pillar layer 32' is coplanar with the metal layer 31 on the polymer layer 20, that is, only the opening is left 21内的第一金属柱322. In this embodiment, through the chemical mechanical planarization (CMP) and etching process steps, the protruding portion generated in FIG. 1C due to the effect of the opening 21 of the polymer layer 20 can be eliminated.

As shown in FIG. 1F, a patterned photoresist layer 41 is formed on the metal layer 31, and the opening 42 of the photoresist layer 41 corresponds to the opening 21 of the polymer layer 20; in this embodiment, the patterned The photoresist layer 41 further includes other openings 43 corresponding to the metal layer 31 on the polymer layer 20. A second metal pillar 323 and a tin layer 34 are formed in the openings 42 and 43 in sequence, that is, the second metal pillar 323 corresponding to the opening 21 of the polymer layer 20 is formed on the first metal pillar 322 .

As shown in FIGS. 1F and 1G, the photoresist layer 41 is removed.

As shown in FIG. 1G and FIG. 1H, the metal layer 31 is etched, leaving the metal layer 31 under each second metal pillar 322 as the metal bonding layer 311, and then reflowing the tin layer 34 to make Each tin layer 34 is formed into a spherical shape.

Please refer to FIGS. 2A to 2C again. This is the second embodiment of the semiconductor wafer bump manufacturing method of the present invention. The previous steps are the same as those in FIGS. 1A to 1E, which will not be repeated here.

As shown in FIG. 2A, a second metal post 323, a metal intermediate layer 33, and a tin layer 34 are formed in sequence in the openings 42 and 43 of the photoresist layer 41, that is, the third corresponding to the opening 21 of the polymer layer 20 The two metal pillars 323 are formed on the first metal pillar 322.

As shown in FIGS. 2A and 2B, the photoresist layer 41 is removed.

As shown in FIGS. 2B and 2C, the metal layer 31 is etched, that is, the metal bonding layer 311, remaining under each second metal post 323, and then re-soldering the tin layer 34 to make each tin layer 34 forms a spherical shape.

As can be seen from FIG. 1H and FIG. 2C above, the bumps 30 and 30a formed on the wafer in the bump process of the semiconductor wafer of the present invention, regardless of the required size or the non-coplanar limitation, the tops of the bumps The system is coplanar, that is, contour bumps.

In summary, the semiconductor wafer of the present invention can be formed with equal height bumps on the pads corresponding to different polymer layer opening sizes. Furthermore, the bumps formed on the polymer layer are also of the same height as the bumps formed on the pads; In this way, it helps to improve the quality of the bonding surface of the semiconductor chip in the packaging process with the substrate or other semiconductor chips.

The above is only an embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field of the art, Within the scope of not departing from the technical solution of the present invention, when the technical contents disclosed above can be used to make some modifications or modifications to equivalent embodiments of equivalent changes, but any content that does not depart from the technical solution of the present invention, based on the technical essence of the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solution of the present invention.

10: Wafer

11: Active surface

12: Contact

20: polymer layer

21: opening

30, 30a: bump

31: Metal layer

311: metal bonding layer

32, 32’: metal pillar layer

321: Metal pillar

322: First metal pillar

323: Second metal post

33: Metal intermediate layer

34: Tin layer

41: Photoresist layer

42: opening

43: opening

50: chip

51: Pad

60: polymer layer

61: opening

70: bump

700: metal layer

701: metal bonding layer

71: Metal pillar

72: Metal intermediate layer

73: Tin layer

80: photoresist layer

81: opening

1A to 1H: Corresponding cross-sectional views of a semiconductor wafer bump manufacturing process of the present invention. 2A to 2C: Cross-sectional views corresponding to another semiconductor wafer bump manufacturing process of the present invention. Figure 3: A cross-sectional view of an existing semiconductor wafer. 4A to 4G: Cross-sectional views corresponding to the steps of the existing semiconductor wafer bump manufacturing process.

10: Wafer

11: Active surface

12: Contact

20: polymer layer

21: opening

30, 30a: bump

311: metal bonding layer

321: Metal pillar

322: First metal pillar

323: Second metal post

34: Tin layer

Claims (5)

A bump manufacturing method for a semiconductor wafer includes the following steps: (a) A polymer layer is formed on an active surface of a wafer; wherein the active surface includes a plurality of pads, and the polymer layer is formed corresponding to each pad Having openings to expose the pads; (b) forming a metal layer on the polymer layer, the inner wall of the opening of the polymer layer and the exposed pads; (c) forming a first metal in each of the openings Pillars, the first metal pillars are coplanar with the metal layer on the polymer layer; (d) a patterned photoresist layer is formed on the metal layer, and the openings of the photoresist layer are respectively aligned Should correspond to the opening of the polymer layer; (e) a second metal pillar and a tin layer are sequentially formed in each opening, that is, the second metal pillar corresponding to the opening of the polymer layer is formed on the first metal pillar . (f) remove the photoresist layer; and (g) etch the metal layer and retain the metal layer under each second metal pillar, and then reflow the tin layer to form each tin layer Spherical. The method for manufacturing a bump of a semiconductor wafer according to claim 1, wherein in the above step (e), after forming the second metal pillar in each opening, a metal intermediate layer is formed on the second metal pillar, and then the metal The tin layer is formed on the intermediate layer. The bump manufacturing method of a semiconductor wafer according to claim 2, wherein the step (c) includes: (c1) performing electroless copper plating on the metal layer to form a metal pillar layer having a first thickness; (c2 ) Grinding down from the metal pillar layer to a second thickness; and (c3) etching the metal pillar layer until the metal pillar layer is coplanar with the metal layer on the polymer layer. The bump manufacturing method of a semiconductor wafer according to claim 3, wherein the step (c2) is performed by a chemical mechanical planarization (CMP) process. The bump manufacturing method of a semiconductor wafer according to claim 2, wherein: the metal layer is copper or titanium; the first and second metal pillars are copper; and the metal intermediate layer is nickel.

Images