TWI688187B - Voltage monitoring system and method thereof - Google Patents
Voltage monitoring system and method thereof Download PDFInfo
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- TWI688187B TWI688187B TW108101073A TW108101073A TWI688187B TW I688187 B TWI688187 B TW I688187B TW 108101073 A TW108101073 A TW 108101073A TW 108101073 A TW108101073 A TW 108101073A TW I688187 B TWI688187 B TW I688187B
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Abstract
Description
本發明係有關於一種電壓監控系統,特別是有關於一種具有低功耗之低電壓重置偵測功能的電壓監控系統及其方法。 The invention relates to a voltage monitoring system, in particular to a voltage monitoring system and method with a low voltage reset detection function with low power consumption.
大部分使用電池供電的裝置為了延長使用時間,一般都會在功能性電路(functional circuit)未進行操作的情況下進入省電模式(Power-saving mode),其又稱掉電模式(Power-down mode)下,以降低功耗。 In order to extend the usage time, most battery-powered devices generally enter the power-saving mode when the functional circuit is not operated, which is also called the power-down mode ) To reduce power consumption.
此外,由於電池供電的電源電壓會隨著時間而降低,為了避免電源電壓降的過低而造成功能性電路損壞,會設置一低電壓重置(low-voltage reset,LVR)電路,監控電源電壓是否低於一電壓門檻值,如果是,則低電壓重置電路會輸出一重置(reset)訊號,以重置功能性電路,藉此保護功能性電路。 In addition, since the battery-powered power supply voltage will decrease with time, in order to avoid the functional voltage damage caused by too low power supply voltage drop, a low-voltage reset (LVR) circuit is set to monitor the power supply voltage Whether it is lower than a voltage threshold, if it is, the low voltage reset circuit will output a reset signal to reset the functional circuit, thereby protecting the functional circuit.
然而,在省電模式下,低電壓重置電路的功耗需要進一步降低,以更有效地延長電池的使用時間。 However, in the power saving mode, the power consumption of the low voltage reset circuit needs to be further reduced in order to more effectively extend the battery life.
本發明之目的在於提出一種電壓監控系統,其具有較低功耗而適用省電模式,以解決上述習知問題。 The purpose of the present invention is to propose a voltage monitoring system which has lower power consumption and is suitable for a power saving mode to solve the above-mentioned conventional problems.
為了達成本發明之目的,本發明提出一種電壓監控系統,用於監控提供給一功能性電路的一電源電壓。電壓監控系統包含一時脈訊號產生電 路、一參考電壓產生電路以及一低電壓重置模組。時脈訊號產生電路用以產生一時脈訊號。參考電壓產生電路用以產生一參考電壓,並根據時脈訊號更新參考電壓。在一第一模式,低電壓重置模組連續執行一電壓偵測功能,用以偵測電源電壓是否低於一第一電壓門檻值,當電源電壓低於第一電壓門檻值時,該低電壓重置模組係輸出一重置訊號以重置功能性電路;在一第二模式,低電壓重置模組根據時脈訊號週期性且不連續地執行電壓偵測功能。第一電壓門檻值係對應該參考電壓。 In order to achieve the purpose of the invention, the present invention provides a voltage monitoring system for monitoring a power supply voltage provided to a functional circuit. The voltage monitoring system includes a clock signal to generate electricity Circuit, a reference voltage generating circuit and a low voltage reset module. The clock signal generating circuit is used to generate a clock signal. The reference voltage generating circuit is used to generate a reference voltage and update the reference voltage according to the clock signal. In a first mode, the low voltage reset module continuously executes a voltage detection function to detect whether the power supply voltage is lower than a first voltage threshold, when the power supply voltage is lower than the first voltage threshold, the low The voltage reset module outputs a reset signal to reset the functional circuit; in a second mode, the low voltage reset module periodically and discontinuously performs the voltage detection function according to the clock signal. The first voltage threshold corresponds to the reference voltage.
在一實施例中,低電壓重置模組包含一低電壓重置電路以及一功耗控制單元,低電壓重置電路用以執行電壓偵測功能,功耗控制單元在第二模式下,根據時脈訊號週期性地開啟或關閉低電壓重置電路。 In one embodiment, the low voltage reset module includes a low voltage reset circuit and a power consumption control unit. The low voltage reset circuit is used to perform a voltage detection function. In the second mode, the power consumption control unit is based on The clock signal periodically turns on or off the low voltage reset circuit.
在一實施例中,功耗控制單元包含一第一判斷單元,其根據時脈訊號以及一啟動條件產生低電壓重置電路的一啟動訊號。 In an embodiment, the power consumption control unit includes a first judgment unit that generates a start signal of the low voltage reset circuit according to the clock signal and a start condition.
在一實施例中,功耗控制單元包含一第二判斷單元,其根據時脈訊號以及一遮罩條件產生一用於遮擋低電壓重置電路之輸出訊號的一遮罩訊號。 In one embodiment, the power consumption control unit includes a second determination unit that generates a mask signal for blocking the output signal of the low voltage reset circuit according to the clock signal and a mask condition.
在一實施例中,在第二模式,當電源電壓低於一第二電壓門檻值時,低電壓重置模組係根據一第一頻率以週期性且不連續地執行電壓偵測功能,而當電源電壓高於一第二電壓門檻值時,低電壓重置模組係根據一第二頻率以週期性且不連續地執行電壓偵測功能,且第二頻率低於第一頻率。 In an embodiment, in the second mode, when the power supply voltage is lower than a second voltage threshold, the low voltage reset module performs the voltage detection function periodically and discontinuously according to a first frequency, and When the power supply voltage is higher than a second voltage threshold, the low voltage reset module performs the voltage detection function periodically and discontinuously according to a second frequency, and the second frequency is lower than the first frequency.
在一實施例中,時脈訊號產生電路包含一振盪器以及一計數器,該振盪器係輸出一振盪訊號,該計數器係根據該振盪訊號進行計數,並根據一預設計數量週期性地產生一更新訊號給該參考電壓產生電路。 In one embodiment, the clock signal generation circuit includes an oscillator and a counter, the oscillator outputs an oscillation signal, the counter counts according to the oscillation signal, and periodically generates an update according to a pre-designed amount The signal is given to the reference voltage generating circuit.
在一實施例中,時脈訊號產生電路包含一振盪器以及一計數器,振盪器係輸出一振盪訊號,計數器係根據振盪訊號進行計數,功耗控制單元包 含一第一判斷單元,其根據一啟動條件以及計數器輸出之一計數值,控制低電壓重置電路處於一啟動狀態或是一關閉狀態。 In one embodiment, the clock signal generation circuit includes an oscillator and a counter. The oscillator outputs an oscillation signal. The counter counts according to the oscillation signal. The power consumption control unit includes A first judgment unit is included, which controls the low voltage reset circuit to be in an activated state or an off state according to a starting condition and a count value output by the counter.
在一實施例中,第一模式係為一正常模式,而第二模式係為一省電模式。 In one embodiment, the first mode is a normal mode, and the second mode is a power saving mode.
為了達成本發明之目的,本發明提出一種電壓監控方法,用於監控提供給一功能性電路的一電源電壓。此電壓監控方法包含下列步驟:提供一時脈訊號產生電路,以產生一時脈訊號;提供一參考電壓產生電路,以產生一參考電壓,其中參考電壓產生電路係根據時脈訊號更新參考電壓;提供一低電壓重置模組以執行一電壓偵測功能,用以偵測電源電壓是否低於一第一電壓門檻值,當電源電壓低於第一電壓門檻值時,低電壓重置模組係輸出一重置訊號以重置功能性電路,其中第一電壓門檻值係對應該參考電壓;在一第一模式,使用低電壓重置模組連續執行電壓偵測功能;在一第二模式,使用低電壓重置模組根據時脈訊號週期性且不連續地執行電壓偵測功能。 In order to achieve the purpose of the invention, the present invention provides a voltage monitoring method for monitoring a power supply voltage provided to a functional circuit. The voltage monitoring method includes the following steps: providing a clock signal generating circuit to generate a clock signal; providing a reference voltage generating circuit to generate a reference voltage, wherein the reference voltage generating circuit updates the reference voltage according to the clock signal; providing a The low voltage reset module performs a voltage detection function to detect whether the power supply voltage is lower than a first voltage threshold, and when the power supply voltage is lower than the first voltage threshold, the low voltage reset module outputs A reset signal to reset the functional circuit, where the first voltage threshold corresponds to the reference voltage; in a first mode, a low voltage reset module is used to continuously perform a voltage detection function; in a second mode, use The low voltage reset module periodically and discontinuously performs the voltage detection function according to the clock signal.
在一實施例中,電壓監控方法更包含根據時脈訊號以及一遮罩條件產生一用於遮擋低電壓重置模組之輸出訊號的一遮罩訊號。 In one embodiment, the voltage monitoring method further includes generating a mask signal for blocking the output signal of the low voltage reset module according to the clock signal and a mask condition.
10:穩壓電路 10: Voltage regulator circuit
101:操作電壓 101: Operating voltage
11:線性低壓降電路 11: Linear low-drop circuit
20:低電壓重置模組 20: Low voltage reset module
201:重置訊號 201: Reset signal
21:低電壓重置電路 21: Low voltage reset circuit
211、TH1:第一電壓門檻值 211, TH1: first voltage threshold
212:輸出訊號 212: output signal
22:功耗控制單元 22: Power consumption control unit
221、231:啟動訊號 221, 231: Start signal
23、23a:第一判斷單元 23, 23a: First judgment unit
24、24a:第二判斷單元 24, 24a: second judgment unit
241:遮罩訊號 241: Mask signal
25:選擇單元 25: Select unit
26:或閘 26: OR gate
30:參考電壓產生電路 30: Reference voltage generating circuit
301、311:參考電壓 301, 311: Reference voltage
31:帶隙電路 31: Band gap circuit
40:時脈訊號產生電路 40: Clock signal generation circuit
401:時脈訊號 401: Clock signal
41:振盪器 41: Oscillator
411:振盪訊號 411: Oscillation signal
42:計數器 42: counter
421:計數值 421: count value
422:更新訊號 422: Update signal
50:功能性電路 50: Functional circuit
VDD:電源電壓 VDD: power supply voltage
TH2:第二電壓門檻值 TH2: Second voltage threshold
T0~T8:期間 T0~T8: Period
P0~P5:時間點 P0~P5: time point
EN:啟動訊號輸入端 EN: Start signal input
第1圖係為本發明之電壓監控系統之方塊示意圖。 Figure 1 is a block diagram of the voltage monitoring system of the present invention.
第2圖係為本發明之電壓監控系統之一實施例之方塊示意圖。 FIG. 2 is a block diagram of an embodiment of the voltage monitoring system of the present invention.
第3圖係為本發明之電壓監控系統之功耗控制單元之一實施例之方塊示意圖。 FIG. 3 is a block diagram of an embodiment of the power consumption control unit of the voltage monitoring system of the present invention.
第4圖係為本發明之電壓監控系統之功耗控制單元之一實施例之操作訊號時序圖。 FIG. 4 is a timing diagram of operation signals of an embodiment of the power consumption control unit of the voltage monitoring system of the present invention.
第5圖係為本發明之電壓監控系統之一實施例之操作訊號時序圖。 FIG. 5 is a timing diagram of operation signals of an embodiment of the voltage monitoring system of the present invention.
第6圖係為本發明之電壓監控系統之另一實施例之操作訊號時序圖。 FIG. 6 is a timing diagram of operation signals of another embodiment of the voltage monitoring system of the present invention.
第7圖係為本發明之電壓監控方法之流程圖。 FIG. 7 is a flowchart of the voltage monitoring method of the present invention.
第8圖係為本發明之電壓監控方法之一實施例之流程圖。 FIG. 8 is a flowchart of an embodiment of the voltage monitoring method of the present invention.
以下將配合圖式及實施例來詳細說明本發明之實施方式,藉此對本發明如何應用技術手段來解決技術問題並達成技術功效的實現過程能充分理解並據以實施。 The embodiments of the present invention will be described in detail below in conjunction with the drawings and examples, so as to fully understand and implement the implementation process of how the present invention uses technical means to solve technical problems and achieve technical effects.
請參閱第1圖,其為本發明之電壓監控系統之方塊示意圖。如第1圖所示,本發明之電壓監控系統適用於一電源系統。此電源系統包含穩壓電路10,穩壓電路10之輸入端係電性連接一供電端,穩壓電路10可將供電端上的電源電壓VDD轉換成功能性電路50所需的操作電壓101。在一實施例中,穩壓電路10可為一線性低壓降電路(LDO)。
Please refer to FIG. 1, which is a block diagram of the voltage monitoring system of the present invention. As shown in Figure 1, the voltage monitoring system of the present invention is suitable for a power supply system. The power supply system includes a voltage stabilizing circuit 10. The input end of the voltage stabilizing circuit 10 is electrically connected to a power supply end. The voltage stabilizing circuit 10 can convert the power supply voltage VDD on the power supply end into the operating
在實際應用中,電源系統通常設置在一移動裝置上,使用電池作為電源,因此,經過長時間使用後,電池的電壓會逐漸下降。當電源電壓VDD低於一電壓門檻值時,移動裝置的功能性電路50可能會損壞或是功能不正常。因此,本發明之電壓監控系統可監控電源電壓VDD並且具有較低的功耗。 In practical applications, the power supply system is usually installed on a mobile device and uses a battery as the power supply. Therefore, after a long period of use, the voltage of the battery will gradually decrease. When the power supply voltage VDD is lower than a voltage threshold, the functional circuit 50 of the mobile device may be damaged or malfunction. Therefore, the voltage monitoring system of the present invention can monitor the power supply voltage VDD and has lower power consumption.
如第1圖所示,電壓監控系統包含一時脈訊號產生電路40、一參考電壓產生電路30、以及一低電壓重置模組20。時脈訊號產生電路40可產生時脈訊號401。參考電壓產生電路30可產生參考電壓301並根據時脈訊號401更新參
考電壓301。在一實施例中,參考電壓產生電路30可為一帶隙(Bandgap)電路;時脈訊號產生電路40可包含一振盪器41以及一計數器42。低電壓重置模組20與參考電壓產生電路30共用時脈訊號產生電路40的時脈訊號401,其可以讓低電壓重置模組20與參考電壓產生電路30的帶隙刷新(Bandgap refresh)時間同步,而且也可以節省邏輯閘數(gate count)。
As shown in FIG. 1, the voltage monitoring system includes a clock signal generating circuit 40, a reference voltage generating circuit 30, and a low voltage reset module 20. The clock signal generating circuit 40 can generate the
低電壓重置模組20可執行一電壓偵測功能,以偵測電源電壓VDD是否低於第一電壓門檻值211,而當低電壓重置模組20判斷電源電壓VDD低於第一電壓門檻值211時,低電壓重置模組20輸出一重置(reset)訊號201以重置功能性電路50,藉此避免功能性電路50損壞或是功能不正常。移動裝置通常具有一正常模式以及一省電模式,在正常模式下,為了確保功能正常,功能性電路50正常運作且消耗較高能量;在省電模式下,為了延長使用時間,功能性電路50休眠或關閉,以減少功耗。
The low voltage reset module 20 can perform a voltage detection function to detect whether the power supply voltage VDD is lower than the first voltage threshold 211, and when the low voltage reset module 20 determines that the power supply voltage VDD is lower than the first voltage threshold When the value is 211, the low-voltage reset module 20 outputs a
在一實施例中,低電壓重置模組20可包含一低電壓重置電路21以及一功耗控制單元22,低電壓重置電路21係用以執行上述電壓偵測功能,而功耗控制單元22係在省電模式下,可根據時脈訊號401週期性地開啟或關閉低電壓重置電路21。
In one embodiment, the low-voltage reset module 20 may include a low-
由於低電壓重置模組20的功耗遠低於功能性電路50的功耗,因此在正常模式下,低電壓重置模組20可以連續執行電壓偵測功能,以即時偵測電源系統是否出現電壓突然下降的情況。在省電模式下,為了進一步減少低電壓重置模組20的功耗,低電壓重置模組20可根據時脈訊號401週期性且不連續地執行電壓偵測功能;換句話說,電壓偵測功能是間斷地執行,而當不執行電壓偵測功能時,低電壓重置模組20的功耗極低,藉此以有效地減少低電壓重置模組20在省電模式下的功耗。
Since the power consumption of the low-voltage reset module 20 is much lower than the power consumption of the functional circuit 50, in the normal mode, the low-voltage reset module 20 can continuously perform the voltage detection function to detect whether the power system is in real time There is a sudden voltage drop. In the power saving mode, in order to further reduce the power consumption of the low voltage reset module 20, the low voltage reset module 20 may periodically and discontinuously perform the voltage detection function according to the
應注意的是,第一電壓門檻值211係對應參考電壓301,也就是說,第一電壓門檻值211可從參考電壓301得到,例如,低電壓重置模組20可包含分壓電路,對參考電壓301進行分壓以取得第一電壓門檻值211,第一電壓門檻值211可例如為1.5V,上述1.5V的第一電壓門檻值211僅為舉例,當然第一電壓門檻值211也可為其他數值,而並未侷限於本發明所列舉的範圍;在另一實施例中,低電壓重置模組20可使用多個電壓門檻值,而多個分壓電路可對參考電壓301進行分壓以取得不同的電壓門檻值。此方面的技術為此領域之技術者所熟知,故在此不再贅述。
It should be noted that the first voltage threshold 211 corresponds to the
請參閱第5圖,其為本發明之電壓監控系統之一實施例之操作訊號時序圖。圖中,在時間點P0之前,電壓監控系統處於正常模式,所以電壓偵測功能係連續執行;在時間點P0之後,電壓監控系統進入省電模式,則電壓偵測功能係間斷地執行,亦即,電壓監控系統只在期間T0、T1、T2、T3、以及T4執行電壓偵測功能,而在其他期間關閉電壓偵測功能,藉此有效地降低功耗。 如第5圖所示,當電壓監控系統在期間T4執行電壓偵測功能,可偵測到電源電壓VDD低於第一電壓門檻值TH1,進而由低電壓重置模組20發出重置訊號201至功能性電路50。 Please refer to FIG. 5, which is a timing diagram of operation signals of an embodiment of the voltage monitoring system of the present invention. In the figure, before the time point P0, the voltage monitoring system is in the normal mode, so the voltage detection function is continuously executed; after the time point P0, the voltage monitoring system enters the power saving mode, the voltage detection function is executed intermittently, also That is, the voltage monitoring system only performs the voltage detection function during the periods T0, T1, T2, T3, and T4, and turns off the voltage detection function during other periods, thereby effectively reducing power consumption. As shown in FIG. 5, when the voltage monitoring system performs the voltage detection function during the period T4, it can detect that the power supply voltage VDD is lower than the first voltage threshold TH1, and then the low voltage reset module 20 sends out the reset signal 201 To functional circuit 50.
請參閱第2圖至第4圖,其為本發明之電壓監控系統之一實施例之方塊示意圖、本發明之功耗控制單元之一實施例之方塊示意圖以及操作訊號時序圖。在此實施例中,電壓監控系統包含一低電壓重置電路21、一第一判斷單元23、一第二判斷單元24、一選擇單元25、一帶隙(Bandgap)電路31、一振盪器41以及一計數器42。低電壓重置電路21用以執行上述電壓偵測功能,帶隙電路31可輸出一參考電壓311給低電壓重置電路21。
Please refer to FIGS. 2 to 4, which are block diagrams of an embodiment of the voltage monitoring system of the present invention, block diagrams of an embodiment of the power consumption control unit of the present invention, and operation signal timing diagrams. In this embodiment, the voltage monitoring system includes a low
振盪器41用以輸出一振盪訊號411,其為一週期性訊號。計數器42可根據振盪訊號411進行計數,並根據一預設計數量(predetermined counting
amount)週期性地產生一更新訊號422給參考電壓產生電路30。例如,預設計數量可為1000,則計數器42可計數1000次後歸零,並輸出更新訊號422;如此,更新訊號422的週期(period)為振盪訊號411的1000倍,而振盪訊號411的頻率為更新訊號422的1000倍,計數器42可用為一除頻器或一降頻器。上述”1000倍”僅為舉例,而非為限制本發明;在實際應用,使用者可自行設定更新訊號422與振盪訊號411的頻率之間的倍數關係。
The
第一判斷單元23可根據時脈訊號401以及一啟動條件產生低電壓重置電路21的一啟動訊號231。由於在省電模式下,低電壓重置電路21是間斷性且週期性地執行電壓偵測功能,因此,在一實施例中,啟動條件可為在當計數值在一特定範圍時,第一判斷單元23產生啟動訊號231至低電壓重置電路21的啟動訊號輸入端EN,啟動低電壓重置電路21執行上述電壓偵測功能,以判斷是否產生重置訊號;在此特定範圍以外的計數值,第一判斷單元23不產生啟動訊號231,所以低電壓重置電路21不執行上述電壓偵測功能,藉此達到節省功耗的效果。
The first determining unit 23 can generate a
在一實施例中,啟動條件可設定為”計數值小於等於2”,所以當計數值為時,第一判斷單元23產生啟動訊號231至低電壓重置電路21的啟動訊號輸入端EN,啟動低電壓重置電路21執行上述電壓偵測功能,當計數值為0、1、2時,啟動訊號231為高位準,因此低電壓重置電路21啟動執行電壓偵測功能,在其他計數值,啟動訊號231221為低位準,所以低電壓重置電路21不啟動且不消耗能量。藉此,可達到低電壓重置電路21週期性地開啟與關閉以降低功耗的效果。
In one embodiment, the start condition can be set to "count value less than or equal to 2", so when the count value is reached, the first determining unit 23 generates the
低電壓重置電路21執行電壓偵測功能是為了保護功能性電路50,因此低電壓重置電路21輸出訊號必須有高準確性,但是在省電模式下低電壓重置電路21會被週期性地頻繁開啟與關閉,而剛開啟時低電壓重置電路21的
需要一準備時間,而在準備時間中低電壓重置電路21的輸出訊號是無意義的,不能提供給功能性電路50。因此,在一實施例中,第二判斷單元24可根據時脈訊號401以及一遮罩條件產生一用於遮擋低電壓重置電路21之輸出訊號212的一遮罩訊號241。此遮罩條件係對應低電壓重置電路21剛開啟的期間,避免無意義的訊號傳送至功能性電路50而導致功能性電路50誤動作。
The low
選擇單元25係接收遮罩訊號241以及低電壓重置電路21的輸出訊號212,當選擇單元25接收到遮罩訊號241或是遮罩訊號241處於致能狀態(enabled state)時,則不輸出低電壓重置電路21的輸出訊號212;反之,當選擇單元25沒有接收到遮罩訊號241或是遮罩訊號241處於除能狀態(disabled state)時,則輸出低電壓重置電路21的輸出訊號212。在一實施例中,遮罩條件可為「計數值等於0」,因此當計數值421為0時,遮罩訊號241為高位準,此為致能狀態(enabled state),因此選擇單元25不輸出低電壓重置電路21的輸出訊號212,如第4圖所示。
The
因此,在一實施例中,在計數器42之預設計數量設定為1000而啟動條件設定為「計數值小於等於2」的情況下,在省電模式下,當計數值為0、1、2時,第一判斷單元23產生高位準的啟動訊號231至低電壓重置電路21的啟動訊號輸入端EN,啟動低電壓重置電路21執行上述電壓偵測功能,而當計數值為3~999時,第一判斷單元23產生高位準的啟動訊號231,低電壓重置電路21不執行電壓偵測功能,接著計數值歸零,重複上述操作,藉此在監控電源電壓之狀態的同時,也降低功耗。此外,在另一實施例中,電壓監控系統可增加第二判斷單元24且遮罩條件設定為「計數值等於0」,所以在計數值為0時,選擇單元25不輸出低電壓重置電路21之輸出訊號,以避免功能性電路50誤動作。
Therefore, in one embodiment, when the pre-designed number of the
第3圖為本發明之功耗控制單元之一實施例之方塊示意圖,圖中,選擇單元25以或閘26實現,而重置訊號201的致能狀態是低位準L,例如接
地電壓。第一判斷單元23a的啟動條件為「計數值小於等於2」,第二判斷單元24a的遮罩條件為「計數值等於0」,因此,當計數值421為0,則第一判斷單元23a輸出高位準訊號H,低電壓重置電路21啟動,第二判斷單元24a也輸出高位準訊號H,所以無論低電壓重置電路21的輸出訊號為H或L,或閘26的輸出訊號201皆為H,其為重置訊號201的除能狀態,因此功能性電路50不會重置,藉此達到遮擋低電壓重置電路21剛啟動時產生之訊號的效果。
FIG. 3 is a block diagram of an embodiment of the power consumption control unit of the present invention. In the figure, the
當計數值421為1,第一判斷單元23a輸出高位準訊號H,而第二判斷單元24a輸出低位準訊號L,所以或閘26的輸出訊號201係對應低電壓重置電路21的輸出訊號212。當低電壓重置電路21偵測到電源電壓低於電壓門檻值,低電壓重置電路21輸出低位準訊號L,使得或閘26的輸出訊號201為低位準訊號L,其為重置訊號201的致能狀態,因此功能性電路50重置;反之,低電壓重置電路21偵測到電源電壓高於電壓門檻值,低電壓重置電路21輸出高位準訊號H,功能性電路50不重置。
When the
請參閱第6圖,其為本發明之電壓監控系統之另一實施例之操作訊號時序圖。此實施例與前述實施例不同之處在於此實施例使用兩個電壓門檻值,並在不同階段以不同頻率啟動或關閉低電壓重置電路21。如第6圖所示,此實施例之電壓監控系統使用第一電壓門檻值TH1以及第二電壓門檻值TH2,第二電壓門檻值TH2高於第一電壓門檻值TH1。在省電模式下(亦即,時間點P3之後),當電源電壓VDD高於第二電壓門檻值TH2時(亦即,在時間點P3與時間點P4之間),低電壓重置模組20可根據一第二頻率以週期性且不連續地執行電壓偵測功能;當電源電壓VDD低於第二電壓門檻值TH2時(亦即,時間點P4之後),低電壓重置模組20可根據一第一頻率以週期性且不連續地執行電壓偵測功能,且第二頻率低於第一頻率。
Please refer to FIG. 6, which is a timing diagram of operation signals of another embodiment of the voltage monitoring system of the present invention. This embodiment differs from the previous embodiment in that this embodiment uses two voltage thresholds and activates or shuts down the low
如第6圖所示,在時間點P3與時間點P4之間,電壓偵測功能在期間T0、T1、T2執行,在其他期間不執行;而在時間點P4之後,電壓偵測功能在期間T3、T4、T5、T6、T7、T8執行,並可在期間T8偵測到電源電壓低於第一電壓門檻值TH1。由於更靠近第一電壓門檻值TH1,所以電壓偵測功能更頻繁執行,以確認能及時偵測到電源電壓低於第一電壓門檻值TH1的時刻,發出重置訊號以保護功能性電路。 As shown in Figure 6, between time point P3 and time point P4, the voltage detection function is executed during the period T0, T1, T2, but not executed in other periods; and after the time point P4, the voltage detection function is in the period T3, T4, T5, T6, T7, and T8 are executed, and during the period T8, it is detected that the power supply voltage is lower than the first voltage threshold TH1. Since it is closer to the first voltage threshold TH1, the voltage detection function is executed more frequently to confirm that the power supply voltage can be detected in time when the power voltage is lower than the first voltage threshold TH1, and a reset signal is sent to protect the functional circuit.
請參閱第7圖,其為本發明之電壓監控方法之流程圖。本發明之電壓監控方法可用於監控提供給一功能性電路的一電源電壓,而此電壓監控方法包含步驟S71~S76。在步驟S71,提供一時脈訊號產生電路,以產生一時脈訊號。在步驟S72,提供一參考電壓產生電路,以產生一參考電壓,參考電壓產生電路係根據時脈訊號更新參考電壓。在步驟S73,提供一低電壓重置模組以執行一電壓偵測功能,用以偵測電源電壓是否低於一第一電壓門檻值,當電源電壓低於第一電壓門檻值時,低電壓重置模組係輸出一重置訊號以重置功能性電路,第一電壓門檻值211係對應該參考電壓301。
Please refer to FIG. 7, which is a flowchart of the voltage monitoring method of the present invention. The voltage monitoring method of the present invention can be used to monitor a power supply voltage provided to a functional circuit, and the voltage monitoring method includes steps S71-S76. In step S71, a clock signal generating circuit is provided to generate a clock signal. In step S72, a reference voltage generating circuit is provided to generate a reference voltage. The reference voltage generating circuit updates the reference voltage according to the clock signal. In step S73, a low voltage reset module is provided to perform a voltage detection function for detecting whether the power supply voltage is lower than a first voltage threshold, when the power supply voltage is lower than the first voltage threshold, the low voltage The reset module outputs a reset signal to reset the functional circuit. The first voltage threshold 211 corresponds to the
在步驟S74,判斷是否進入省電模式,若是,則執行步驟S75;若否,則執行步驟S76。在步驟S75,使用低電壓重置模組根據時脈訊號401週期性且不連續地執行電壓偵測功能。在步驟S76,使用低電壓重置模組連續執行電壓偵測功能。上述時脈訊號產生電路、參考電壓產生電路、低電壓重置模組以及相關的操作已在前述內容說明,故在此不再贅述。
In step S74, it is determined whether to enter the power saving mode, if yes, step S75 is executed; if not, step S76 is executed. In step S75, the low voltage reset module is used to periodically and discontinuously perform the voltage detection function according to the
請參閱第8圖,其為本發明之電壓監控方法之一實施例之流程圖。以下將針對此電壓監控方法之實施例在省電模式下的操作進行說明,而在正常模式下的操作與第7圖所述內容相似,故在此不再贅述。如第8圖所示,此電壓監控方法之實施例包含步驟S81~S84。 Please refer to FIG. 8, which is a flowchart of an embodiment of the voltage monitoring method of the present invention. The operation of the embodiment of the voltage monitoring method in the power-saving mode will be described below, and the operation in the normal mode is similar to that described in FIG. 7, so it will not be repeated here. As shown in FIG. 8, the embodiment of the voltage monitoring method includes steps S81-S84.
在步驟S81,提供一帶隙電路、一振盪器以及一計數器,振盪器係輸出一振盪訊號,計數器係根據振盪訊號進行計數,而帶隙電路產生一參考電壓,並根據時脈訊號更新參考電壓。 In step S81, a band gap circuit, an oscillator, and a counter are provided. The oscillator outputs an oscillation signal. The counter counts according to the oscillation signal. The band gap circuit generates a reference voltage and updates the reference voltage according to the clock signal.
在步驟S82,提供一低電壓重置模組以執行一電壓偵測功能,以判斷是否輸出一重置訊號。在步驟S83,提供一第一判斷單元,並設定第一判斷單元之一啟動條件,使用第一判斷單元根據計數器之計數值以及啟動條件產生低電壓重置電路的一啟動訊號。 In step S82, a low voltage reset module is provided to perform a voltage detection function to determine whether to output a reset signal. In step S83, a first judgment unit is provided, and one of the startup conditions of the first judgment unit is set, and the first judgment unit is used to generate a startup signal of the low voltage reset circuit according to the count value of the counter and the startup condition.
在步驟S84,提供一第二判斷單元,並設定第二判斷單元之一遮罩條件,使用第二判斷單元根據計數器之計數值以及遮罩條件產生一用於遮擋低電壓重置電路之輸出的一遮罩訊號。在步驟S85,根據啟動訊號以及遮罩訊號,週期性控制低電壓重置模組之啟動狀態以及關閉狀態。 In step S84, a second judgment unit is provided, and a masking condition of the second judgment unit is set, and the second judgment unit is used to generate an output for blocking the output of the low voltage reset circuit according to the count value of the counter and the masking condition A mask signal. In step S85, according to the activation signal and the mask signal, the activation state and the shutdown state of the low voltage reset module are periodically controlled.
在一實施例中,如第4圖所示,計數器之預設計數量可設定為1000,啟動條件可設定為”計數值小於等於2”而遮罩條件可設定為”計數值等於0”,在省電模式下,當計數值為0、1、2時,第一判斷單元產生高位準的啟動訊號至低電壓重置電路的啟動訊號輸入端,啟動低電壓重置電路執行電壓偵測功能,且在計數值為0時,選擇單元不輸出低電壓重置電路之輸出訊號,以避免功能性電路誤動作。當計數值為3~999時,第一判斷單元產生高位準的啟動訊號,低電壓重置電路不執行電壓偵測功能,接著計數值歸零,重複上述操作,藉此在監控電源電壓之狀態的同時,也降低功耗,同時也避免低電壓重置電路頻繁啟動而初始訊號不穩定可能造成功能性電路誤動作的問題。應注意的是上述計數器之預設計數量、啟動條件以及遮罩條件僅為舉例而非為限制。 In one embodiment, as shown in Figure 4, the pre-designed number of counters can be set to 1000, the start condition can be set to "count value is less than or equal to 2" and the masking condition can be set to "count value equal to 0", in In the power saving mode, when the count values are 0, 1, 2, the first judgment unit generates a high-level start signal to the start signal input terminal of the low voltage reset circuit to start the low voltage reset circuit to perform the voltage detection function, And when the count value is 0, the selection unit does not output the output signal of the low voltage reset circuit to avoid the malfunction of the functional circuit. When the count value is 3~999, the first judgment unit generates a high level start signal, the low voltage reset circuit does not perform the voltage detection function, and then the count value is reset to zero, repeat the above operation, thereby monitoring the status of the power supply voltage At the same time, it also reduces power consumption, and at the same time avoids the problem that the low voltage reset circuit is frequently started and the initial signal is unstable, which may cause the functional circuit to malfunction. It should be noted that the above-mentioned pre-designed number of counters, start-up conditions and masking conditions are only examples and not limitations.
雖然本發明以前述之實施例揭露如上,然其並非用以限定本發明,任何熟習相像技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。 Although the present invention has been disclosed as the foregoing embodiments, it is not intended to limit the present invention. Any person familiar with similar arts can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of patent protection shall be determined by the scope of the patent application attached to this specification.
10:穩壓電路 10: Voltage regulator circuit
101:操作電壓 101: Operating voltage
20:低電壓重置模組 20: Low voltage reset module
201:重置訊號 201: Reset signal
21:低電壓重置電路 21: Low voltage reset circuit
211:第一電壓門檻值 211: first voltage threshold
22:功耗控制單元 22: Power consumption control unit
221:啟動訊號 221: Start signal
30:參考電壓產生電路 30: Reference voltage generating circuit
301:參考電壓 301: Reference voltage
40:時脈訊號產生電路 40: Clock signal generation circuit
401:時脈訊號 401: Clock signal
50:功能性電路 50: Functional circuit
VDD:電源電壓 VDD: power supply voltage
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TW108101073A TWI688187B (en) | 2019-01-10 | 2019-01-10 | Voltage monitoring system and method thereof |
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TWI839985B (en) * | 2022-12-02 | 2024-04-21 | 新唐科技股份有限公司 | Control method and control circuit |
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TW202027365A (en) | 2020-07-16 |
CN111426866A (en) | 2020-07-17 |
CN111426866B (en) | 2023-02-03 |
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