TWI685845B - Flash memory controller - Google Patents

Abstract

A flash memory controller includes: a transmission interface configured to operably receive data to be written into a flash memory; a temperature detecting circuit configured to operably detect an environment temperature, the temperature detecting circuit generates a control signal when the environment temperature goes beyond a predetermined temperature range; and a processing circuit, coupled to the transmission interface and the temperature detecting circuit, configured to operably select one of a plurality of data program schemes to program the data into a first storage block of the flash memory according to the control signal.

Description

Flash memory controller

The invention relates to a flash memory (Flash Memory) controller, in particular to a control circuit for improving the reliability of data in the flash memory.

Flash memory is widely used in many applications, such as solid state drives, memory cards, digital cameras, digital cameras, multimedia players, mobile phones, computers, vehicles, and other electronic devices. These electronic devices are often carried to different ambient temperatures for use.

As we all know, the ambient temperature is becoming more and more extreme, and the difference in temperature changes is also increasing. At this time, when the temperature difference between the ambient temperature for writing data and the ambient temperature for reading data is too large, the flash memory that is more sensitive to temperature is likely to cause a large number of data errors.

In view of this, how to improve the data reliability of flash memory when the ambient temperature difference is large is a problem to be solved in the industry.

This specification provides an embodiment of a flash memory controller, which includes: a transmission interface configured to receive data to be written to a flash memory; a temperature detection circuit configured to detect an ambient temperature, When the ambient temperature exceeds a predetermined temperature range, the temperature detection circuit can generate a control signal; and a processing circuit, coupled to the transmission interface and the temperature detection circuit, is configured to select a plurality according to the control signal One of the data programming modes is to write data to a first storage block in the flash memory.

This specification also provides an embodiment of a flash memory controller, which includes: a temperature detection circuit configured to detect an ambient temperature, and when the ambient temperature exceeds a predetermined temperature range, the temperature detection circuit may Generate a control signal; and a processing circuit, Coupled to the temperature detection circuit, and configured to re-store data of a first storage block stored in a flash memory in a second storage area of the flash memory according to the control signal Block; wherein a first storage unit of the first storage block uses a first bit number as the storage unit, and a second storage unit of the second storage block uses a second bit number as the storage unit , And the number of first bits is greater than the number of second bits.

One of the advantages of the above embodiments is that whether the flash memory controller is in the sleep mode or in normal operation, the temperature detection circuit will continuously detect the ambient temperature of the flash memory controller once the ambient temperature exceeds the predetermined temperature Within the range, the temperature detection circuit can immediately notify the processing circuit for data protection.

Another advantage of the above embodiment is that when the ambient temperature exceeds the predetermined temperature range, no matter the data stored in the flash memory or the newly entered data are properly protected.

Another advantage of the above embodiment is that the capacity of the flash memory can be used properly.

Other advantages of the present invention will be explained in more detail with the following description and drawings.

100‧‧‧Data storage system

110‧‧‧Power management circuit

111‧‧‧Auxiliary power module

112‧‧‧Power Module

120‧‧‧Flash memory controller

121‧‧‧Temperature detection circuit

122‧‧‧ processing circuit

123‧‧‧Temperature detection unit

124‧‧‧Control unit

130‧‧‧Flash memory

140‧‧‧Transmission interface

302, 304, 306, 308, 310, 312, 314, 316, 318, 320

FIG. 1 is a simplified functional block diagram of a data storage system according to an embodiment of the invention.

FIG. 2 is a schematic diagram of ambient temperature distribution according to an embodiment of the invention.

3 is a simplified flowchart of a method for writing data into a flash memory according to an ambient temperature according to an embodiment of the invention.

The embodiments of the present invention will be described below in conjunction with related drawings. In the drawings, the same reference numerals indicate the same or similar elements or method flows.

FIG. 1 is a simplified functional block diagram of a data storage system 100 according to an embodiment of the invention. The data storage system 100 includes a power management circuit 110, a flash memory controller 120, a flash memory 130, and a transmission interface 140. The power management circuit 110 is coupled to the flash memory controller 120 and is configured to provide power to the flash memory controller 120. The flash memory controller 120 is coupled to the flash memory 130 and is configured to write or read data into the flash memory 130.

The transmission interface 140 is coupled to the flash memory controller 120 and is configured to receive data to be written to or output from the flash memory 130. The transmission interface 140 is configured to communicate with a host device (not shown in FIG. 1). In practice, the transmission interface 140 can be compatible with various Serial Advanced Technology Attachment (SATA) series transmission standards, peripheral component interconnect express (PCIe) series transmission standards, and/or universal Serial interface bus (Universal Serial Bus, USB) series transmission standard interface circuit to achieve.

The flash memory controller 120 at least includes a temperature detection circuit 121 and a processing circuit 122. The temperature detection circuit 121 is coupled to the processing circuit 122 and is configured to continuously detect an ambient temperature of the flash memory controller 120. In other words, regardless of whether the flash memory controller 120 is in a normal operation mode or a sleep mode, the temperature detection circuit 121 can detect the ambient temperature of the flash memory controller 120 at intervals. When the ambient temperature exceeds a predetermined temperature range Rn, the temperature detection circuit 121 can generate a control signal Sc to the processing circuit 122. The control signal Sc may contain information about the ambient temperature. When the processing circuit 122 is in the sleep mode, the control signal Sc can wake up the processing circuit 122. Therefore, the processing circuit 122 can select an appropriate data programming mode to program the data according to the size of the ambient temperature exceeding the predetermined temperature range Rn, and write the programmed data into the flash memory 130. Please note that although the control signal Sc may include information on the ambient temperature, the invention is not limited to this, and the information on the ambient temperature may also be transmitted to the processing circuit 122 alone.

In addition, the ambient temperature may be the temperature around or in the flash memory 130, the flash memory controller 120, or the data storage system 100.

Please note that for the sake of simplicity, this embodiment defines the processing circuit 122 as having the function of accessing data to the flash memory 130. However, in practice, the flash memory controller 120 may also include an access circuit (not shown in FIG. 1 ), which is configured to access the flash memory 130 according to the instructions of the processing circuit 122.

When the ambient temperature falls within a predetermined temperature range, the processing circuit 122 uses a predetermined data programming mode to program the data, and writes the programmed data to a first storage block in the flash memory 130. When the ambient temperature exceeds the predetermined temperature range Rn, the processing circuit 122 may select one of the plurality of data programming modes to program the data according to the control signal Sc, and write the programmed data into the flash memory 130 A second storage block. In one embodiment, different data programming modes can access different storage blocks in the flash memory 130, and the processing circuit 122 can record the relationship between a data programming mode and its access storage blocks in the flash memory A storage unit of the body controller 120. Each first storage unit of the first storage block uses a first bit number as the storage unit, and each second storage unit of the second storage block uses a second bit number as the storage unit, And the number of first bits is greater than the number of second bits.

For example, when the flash memory 130 is a 3D NAND flash memory (3D NAND Flash), the storage unit in the flash memory 130 may be a single-level storage unit (SLC) , Virtual multi-level storage units (Pseudo-Multi-level cells, pMLC), virtual third-level storage units (Pseudo-Triple-level cells, pTLC), fourth-level storage units (Quad-level cells, QLC) or higher There are several types of memory cells, including single-level memory cells in the form of one-bit-per-cell (1bpc) programming mode for storing data, and multi-level memory cells in the form of two bits per memory cell. The two-bit-per-cell (2bpc) programming mode is used to store data, and the third-level storage unit is a three-bit (per-cell-per-cell, 3bpc) programming mode for each storage unit. The storage unit format is that each storage unit stores data in a four-bit-per-cell (4bpc) programming mode, and so on. For the convenience of description, the processing circuit 122 uses a four-bit programming mode, a three-bit programming mode, a two-bit programming mode, and a one-bit programming mode. Cell", "third-level storage cell", "multi-level storage cell" and "single-level storage cell".

In practice, the above-mentioned first storage unit may be a fourth-order storage unit, and the above-mentioned first storage unit The second storage unit may be one of a single-level storage unit, a multi-level storage unit, and a third-level storage unit.

The temperature detection circuit 121 includes a temperature detection unit 123 and a control unit 124. The temperature detection unit 123 is coupled to the control unit 124, and is configured to detect the current ambient temperature of the flash memory controller 120 at intervals and transmit the detected ambient temperature to the control unit 124. The control unit 124 is configured to determine whether the ambient temperature exceeds the predetermined temperature range Rn and/or the extent to which the ambient temperature exceeds the predetermined temperature range Rn. For example, the predetermined temperature range Rn may be a normal operating temperature range of the flash memory 130, such as -25 degrees Celsius to 75 degrees Celsius. Please note that this temperature range is not a limitation of the present invention, and flash memory of different manufacturers may have different predetermined temperature ranges. When the control unit 124 determines that the ambient temperature exceeds the predetermined temperature range Rn, it generates a control signal Sc to the processing circuit 122, so that a proper data programming mode corresponding to the ambient temperature is used to write data into the flash memory 130. Further, the control unit 124 is configured to compare the predetermined temperature range Rn with the ambient temperature from the temperature detection unit 123, and determine the degree to which the ambient temperature exceeds the predetermined temperature range Rn to generate the control signal Sc accordingly.

Please note that the present invention does not limit the implementation of the temperature detection unit 123, which can be composed of a semiconductor element or a thermocouple, it can also be provided outside the flash memory controller 120 or built-in flash memory control Device 120 or flash memory 130.

In one embodiment, the control unit 124 determines whether the ambient temperature falls within a first temperature interval R1, a second temperature interval R2, and a third temperature interval R3 outside the predetermined temperature range Rn to generate corresponding control signals Sc. FIG. 2 is a schematic diagram of ambient temperature distribution according to an embodiment of the invention. For example, the predetermined temperature range Rn is between T4 (e.g. -25 degrees Celsius) to T5 (e.g. 65 degrees Celsius), and the first temperature interval R1 is between T3 (e.g. -30 degrees Celsius) to T4 and T5 Between T6 (eg 70 degrees Celsius), the second temperature interval R2 is between T2 (eg -35 degrees Celsius) to T3 and T6 to T7 (eg 75 degrees Celsius), and the third temperature interval is between Between T1 (for example, -40 degrees Celsius) to T2 and T7 to T8 (for example, 80 degrees Celsius).

Please note that the above temperature ranges and ranges are not limitations of the present invention. The temperature difference between T3 and T4 may be the same or different from the temperature difference between T5 and T6. The temperature difference between T2 and T3 may be the same or different from the temperature difference between T6 and T7. The temperature difference between T1 and T2 may be the same or different from the temperature difference between T7 and T8.

In addition, the first temperature interval R1 may only include the range between T3 to T4 or T5 to T6, the second temperature interval R2 may only include the range between T2 to T3 or T6 to T7, and the third temperature interval may only include the range The range between T1 to T2 or T7 to T8.

In order to satisfy the above function, in addition to an arithmetic circuit, the control unit 124 may further include a storage unit for storing the temperature data and the information of the predetermined temperature range Rn.

In practice, when the ambient temperature falls within the first temperature range R1, the processing circuit 122 selects one of the plurality of data programming modes to program the data to write to the storage unit as the storage of the tertiary storage unit In the block. When the ambient temperature falls within the second temperature interval R2, the processing circuit 122 selects one of the plurality of data programming modes to program the data to be written into the storage block where the storage unit is a multi-level storage unit. When the ambient temperature falls within the third temperature interval R3, the processing circuit 122 selects a third data programming mode among the plurality of data programming modes to program the data to be written into the storage block where the storage unit is a single-level storage unit. In other words, when the ambient temperature deviates from the predetermined temperature range Rn, the processing circuit 122 will store data in a data programming mode with a high reliability (and a storage unit with a high reliability). When the ambient temperature deviates from the predetermined temperature range Rn, the processing circuit 122 will store data in a storage unit with a general reliability (that is, without using a storage unit with a higher reliability).

As shown in FIG. 1, the power management circuit 110 includes an auxiliary power module 111 and a power module 112. In practice, the auxiliary power module 111 can be a battery module. Since the auxiliary power module 111 and the power module 112 provide power to the flash memory controller 120 in a complementary manner, regardless of whether the flash memory controller 120 is in the normal operation mode or the sleep mode, the power management circuit 110 will Provide power to the flash memory controller 120.

Further, when the flash memory controller 120 is in the sleep mode, the auxiliary power supply The module 111 is configured to continuously provide a first power P1 to the temperature detection circuit 121 to detect the ambient temperature, and selectively provide a second power P2 to the processing circuit 122 according to the control signal Sc. For example, when the ambient temperature does not exceed the predetermined temperature range Rn, the auxiliary power module 111 does not provide the second power P2 to the processing circuit 122 (that is, the processing circuit 122 is in a power-off state) to achieve power saving. When the ambient temperature exceeds the predetermined temperature range Rn, the temperature detection circuit 121 generates a control signal Sc to notify the auxiliary power module 111 to provide the second power P2 to the processing circuit 122. At this time, the control signal Sc may be an activation signal (Activate signal), and the auxiliary power module 111 will provide the second power P2 to the processing circuit 122 to use a data programming mode corresponding to the ambient temperature to write the data In flash memory 130.

When the flash memory controller 120 is in the normal operation mode, the power module 112 is configured to simultaneously provide a third power P3 and a fourth power P4 to the temperature detection circuit 121 and the processing circuit 122, respectively. Therefore, when the processing circuit 122 is in the normal operation mode, the control signal Sc can be regarded as an interrupt signal. The processing circuit 122 writes the data into the flash memory 130 in a data programming mode corresponding to the ambient temperature according to the control signal Sc. At this time, when the flash memory controller 120 is in the normal operation mode, since the temperature detection circuit 121 detects the ambient temperature at intervals, under the control of the processing circuit 122, the fourth power P4 can be provided at intervals The temperature detection circuit 121 can achieve better power saving effect.

Please note that the present invention does not limit the manner in which the first power supply P1, the second power supply P2, the third power supply P3, and the fourth power supply P4 are transmitted to the flash memory controller 120.

In another embodiment, the auxiliary power module 111 may be integrated in the flash memory controller 120.

For another example, in another embodiment, the power management circuit 110 may also be integrated in the flash memory controller 120.

The operation of the flash memory controller 120 to write data into the flash memory 130 will be further described below with reference to FIG. 2.

FIG. 3 is a simplified flowchart of a method for writing data into the flash memory 130 according to an ambient temperature according to an embodiment of the invention.

In the process 302, the temperature detection unit 123 detects the ambient temperature of the flash memory controller 120 at intervals, and transmits the detected ambient temperature to the control unit 124.

In flow 304, the control unit 124 determines whether the ambient temperature exceeds the predetermined temperature range Rn. If the ambient temperature exceeds the predetermined temperature range Rn, then flow 306 is entered. If the ambient temperature does not exceed the predetermined temperature range Rn, return to the process 302.

In the process 306, the control unit 124 sends a control signal Sc to the processing circuit 122, wherein the control signal Sc may include information about the ambient temperature.

In the process 308, when the processing circuit 122 receives the control signal Sc, the processing circuit 122 first determines whether the current operation mode of the flash memory controller 120 is the sleep mode or the normal operation mode. If the flash memory controller 120 is in the sleep mode, the process 310 is entered. If the flash memory controller 120 is in the normal operation mode, the processes 316 and 320 are entered.

In the process 310, the control signal Sc activates all the functional circuits of the processing circuit 122 or a part of the functional circuits in the processing circuit 122. This part of the functional circuit can be used to read data from the flash memory 130 and rewrite the related circuits in the flash memory 130.

In the process 312, the processing circuit 122 performs data processing in the background, that is, the processing circuit 122 stores the data in the flash memory 130 in a higher data reliability manner for data processing without user intervention protection. Further, the processing circuit 122 reads out the data that has been written into the flash memory 130 using an original data programming mode and rewrites the data into the flash memory 130 in another data programming mode, and the other data is programmed The mode has higher data reliability than the original data programming mode.

Taking flash memory 130 as a 3D flip-flop flash memory as an example, a single-stage storage unit has the highest data reliability, but has a one-bit (lowest) storage capacity. The multi-level storage unit has the second highest data reliability and a two-bit (second lowest) storage capacity. The tertiary storage unit has the third highest data reliability and a three-bit (third lowest) storage capacity. The fourth-order storage unit has the lowest data reliability and four digits Yuan (highest) storage capacity. Other higher-order storage units are similar.

Since the number of bits suitable for writing in each storage unit is different, the processing circuit 122 uses four different data programming modes to write data into different storage units respectively. For the convenience of description, in this process, the processing circuit 122 will use a predetermined data programming mode, a first data programming mode, a second data programming mode, and a third data programming mode to write data into the fourth-level storage unit respectively , Three-level storage unit, multi-level storage unit and single-level storage unit.

In practice, the three-level storage unit, multi-level storage unit and single-level storage unit can be virtual third-level storage unit (Pseudo TLC), virtual multi-level storage unit (Pseudo MLC) and single-level storage unit (SLC ). Therefore, the first data programming mode, the second data programming mode, and the third data programming mode are the data programming mode of the virtual third-level storage unit, the data programming mode of the virtual multi-level storage unit, and the data of the single-level storage unit, respectively. Programming mode.

Further, when the flash memory controller 120 is in the normal operation mode and the ambient temperature falls within the predetermined temperature range Rn, the flash memory 130 is set to store data with the highest storage capacity, that is, flash memory The body 130 stores data in a four-bit programming mode. In other words, when the ambient temperature falls within the predetermined temperature range Rn, the processing circuit 122 uses the predetermined data programming mode (eg, four-bit programming mode) to write the data into the fourth-order storage unit in the flash memory 130 .

When the flash memory controller 120 is in the sleep mode and the ambient temperature exceeds the predetermined temperature range Rn, the processing circuit 122 may decide to write the data in the fourth-level storage unit according to the degree of the ambient temperature exceeding the predetermined temperature range Rn The multi-level storage unit, the multi-level storage unit or the single-level storage unit. For example, as shown in FIG. 1, when the ambient temperature only slightly exceeds the predetermined temperature range Rn (for example, within 5 degrees beyond the predetermined temperature range Rn), the processing circuit 122 may write the data originally in the fourth-order storage unit to the third Level storage unit. When the ambient temperature exceeds 5 to 10 degrees of the predetermined temperature range Rn, the processing circuit 122 may write the original data into the multi-level storage unit. When the ambient temperature is severely exceeded When the predetermined temperature range Rn is reached (for example, 10 degrees beyond the predetermined temperature range Rn), the processing circuit 122 may write the original data into the single-stage storage unit.

In the above example, if the processing circuit 122 rewrites the data into the tertiary storage unit, the processing circuit 122 will use the predetermined data programming mode to program the read data and then use the first data programming mode to program and then write to the storage unit in. If the processing circuit 122 rewrites the data into the multi-level storage unit, the processing circuit 122 will use the predetermined data programming mode to program the read data and then use the second data programming mode to program and write to the storage unit. If the processing circuit 122 rewrites the data into the single-stage storage unit, the processing circuit 122 will use the predetermined data programming mode to reprogram the read data using the third data programming mode and then write the data into the storage unit.

However, to simplify the complexity of the flash memory controller 120, when the ambient temperature exceeds the predetermined temperature range Rn, the processing circuit 122 may also be configured to write the original data directly using the third data programming mode with the highest reliability Data to the storage unit.

In addition, in order to allow the processing circuit 122 to correctly decode the data stored in the storage unit with higher reliability (ie, single-level storage unit, multi-level storage unit, or tertiary storage unit), when the processing circuit 122 uses the first When a data programming mode, the second data programming mode, or the third data programming mode writes data to a third-level storage unit, a multi-level storage unit, or a single-level storage unit, the processing circuit 122 will simultaneously set the current ambient temperature value Mark on the data. When the ambient temperature returns to the predetermined temperature range Rn, and the pen data is to be read out, the processing circuit 122 can know the ambient temperature at which the pen data is stored at that time, and then use a corresponding decoding method to interpret the stored in the three The first-level storage unit, the multi-level storage unit or the single-level storage unit of the data.

In the process 314, when all the data in the flash memory controller 120 is written into the storage block with higher reliability, the flash memory controller 120 will re-enter the sleep mode.

In the process 316, the flash memory controller 120 is in the normal operating mode and the ambient temperature exceeds the predetermined temperature range Rn. At this time, the processing circuit 122 writes the new data into the flash memory with higher data reliability programming. Flash memory 130 to protect newly entered data.

For newly entered data, the processing circuit 122 will select an appropriate data programming mode to program the data according to the control signal Sc and the size of the ambient temperature exceeding the predetermined temperature range Rn. In short, as shown in FIG. 2, when the ambient temperature falls within the first temperature range R1, the processing circuit 122 selects the first data programming mode to program the newly entered data, and writes the programmed data into the storage unit (flow 318 ). When the ambient temperature falls within the second temperature range R2, the processing circuit 122 selects the second data programming mode to program the newly entered data, and writes the programmed data into the storage unit (flow 318). When the ambient temperature falls within the third temperature interval R3, the processing circuit 122 selects the third data programming mode to program the newly entered data, and writes the programmed data into the storage unit (flow 318). However, in order to simplify the complexity of the flash memory controller 120, when the ambient temperature exceeds the predetermined temperature range Rn, the processing circuit 122 may also be configured to directly use the third data programming mode to program the newly entered data, and the programmed data Write to storage unit (process 318). Since the programming and writing methods have been disclosed in detail in the above paragraphs about the processing circuit 122, the detailed contents are not repeated here.

In the process 320, the processing circuit 122 also reprograms the data stored in the flash memory 130 with higher data reliability to write to the flash memory 130. For the data stored in the flash memory 130, as shown in FIG. 2, the processing circuit 122 also selects an appropriate data programming mode to reprogram the data according to the control signal Sc and the size of the ambient temperature exceeding the predetermined temperature range Rn To re-write the data into the storage block where the storage unit is a third-level storage unit, a multi-level storage unit, or a single-level storage unit (flow 318). Since the determination method is similar to the process 312, its detailed content will not be repeated here.

In the process 318, the processing circuit 122 writes the programmed data into the corresponding storage block.

It can be known from the above operation flow of the processing circuit 122 that the processing circuit 122 can select different data programming modes to reprogram the data according to the degree to which the ambient temperature exceeds the predetermined temperature range Rn, and also to the extent that the ambient temperature exceeds the predetermined temperature range Rn At the time, ignore the degree of excess, and directly use the best data reliability programming mode to reprogram Process information.

As can be seen from the foregoing description, regardless of whether the flash memory controller 120 is in the sleep mode or under normal operation, the temperature detection circuit 121 will detect the ambient temperature of the flash memory controller 120 at intervals, once the ambient temperature exceeds the predetermined temperature range Rn At this time, the temperature detection circuit 121 can immediately notify the processing circuit 122 to perform data protection.

When the flash memory controller 120 is in the sleep mode, the processing circuit 122 reads out the data stored in the flash memory 130 and then reprograms the data to write the programmed data into the flash memory 130 In the storage unit with high data reliability. When the flash memory controller 120 is in normal operation, the processing circuit 122, in addition to reprogramming the data already stored in the flash memory 130 and writing to a storage unit with higher data reliability, the processing circuit 122 will also The newly entered data is programmed in a data programming mode with higher data reliability, and the programmed data is written into a storage unit with higher data reliability. Therefore, when the ambient temperature exceeds the predetermined temperature range Rn, no matter the data already stored in the flash memory 130 or newly entered data are properly protected.

In addition, the processing circuit 122 can also select an appropriate data programming mode to program the data according to the degree that the ambient temperature exceeds the predetermined temperature range Rn, so as to write the programmed data into the appropriate storage unit. For example, when the ambient temperature exceeds the predetermined temperature range Rn to a lesser extent, the processing circuit 122 writes the programmed data into a storage unit with lower data reliability but higher storage capacity. When the ambient temperature exceeds the predetermined temperature range Rn to a greater extent, the processing circuit 122 writes the programmed data into a storage unit with higher data reliability but lower storage capacity. In this way, in addition to the data being protected, the capacity of the flash memory 130 can also be used properly.

Please note that the aforementioned circuit architecture in FIG. 1 is only an exemplary embodiment and does not limit the actual implementation of the present invention.

In addition, the foregoing sequence of process execution in FIG. 3 is only an exemplary embodiment, and does not limit the actual implementation of the present invention. For example, the process 320 may be adjusted to be performed between the processes 316 and 318, and the process 320 and the process 316 may also be performed at the same time.

Certain words are used in the specification and patent application scope to refer to specific elements, and those skilled in the art may use different terms to refer to the same element. This specification and the scope of patent application do not use the difference in names as a means of distinguishing elements, but the difference in function of elements as a basis for distinguishing. "Inclusion" mentioned in the description and the scope of patent application is an open term and should be interpreted as "including but not limited to." In addition, the term "coupled" here includes any direct and indirect connection means. Therefore, if it is described that the first element is coupled to the second element, it means that the first element can be directly connected to the second element through electrical connection, wireless transmission, optical transmission, or other signal connection, or through other elements or connections The means is indirectly electrically or signally connected to the second element.

The description method of "and/or" used in the specification includes any one of the listed items or any combination of multiple items. In addition, unless otherwise specified in the specification, any singular expressions also include the plural meaning.

The "control signal" and "power supply" in the specification and patent application scope can be implemented in the form of voltage or current.

The above are only preferred embodiments of the present invention, and any equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

100‧‧‧Data storage system

110‧‧‧Power management circuit

111‧‧‧Auxiliary power module

112‧‧‧Power Module

120‧‧‧Flash memory controller

121‧‧‧Temperature detection circuit

122‧‧‧ processing circuit

123‧‧‧Temperature detection unit

124‧‧‧Control unit

130‧‧‧Flash memory

140‧‧‧Transmission interface

Sc‧‧‧Control signal

P1, P2, P3, P4 ‧‧‧ power supply

Claims (10)

A flash memory controller (120) includes: a transmission interface (140) configured to receive data to be written into a flash memory (130); and a temperature detection circuit (121) configured to detect Measuring an ambient temperature, when the ambient temperature exceeds a predetermined temperature range, the temperature detection circuit (121) can generate a control signal (Sc); and a processing circuit (122), coupled to the transmission interface (140) And the temperature detection circuit (121) is configured to program the data using a predetermined data programming mode when the ambient temperature falls within a predetermined temperature range, and write the programmed data into the flash memory A first storage block in (130); wherein, when the ambient temperature exceeds the predetermined temperature range, the processing circuit (122) is further configured to read out the data stored in the first storage block, And select one of the plurality of data programming modes according to the control signal (Sc) to reprogram the data in the first storage block, and write the reprogrammed data into the flash memory (130) ) A second storage block; wherein, a first storage unit of the first storage block uses a first bit number as a storage unit, and a second storage unit of the second storage block is a A second bit number is a storage unit, and the first bit number is larger than the second bit number. The flash memory controller (120) according to claim 1, wherein the first storage unit is a quad-level storage unit (Quad-level cells, QLC), and the second storage unit is a single-level storage unit (Single -level cells (SLC), virtual multi-level storage cells (Pseudo-Multi-level cells, pMLC) and virtual third-level storage cells (Pseudo-Triple-level cells, pTLC). The flash memory controller (120) according to claim 2, wherein when the ambient temperature falls within a first temperature interval that exceeds the predetermined temperature range, the processing circuit (122) Select one of the plurality of data programming modes in the first data programming mode to write data into the second storage block where the second storage unit is the tertiary storage unit; when the ambient temperature falls below the When a second temperature interval outside the predetermined temperature range, the processing circuit (122) selects a second data programming mode among the plurality of data programming modes to write data into the second storage unit as the multi-level storage unit In the second storage block; when the ambient temperature falls within a third temperature range that exceeds the predetermined temperature range, the processing circuit (122) selects one of the plurality of data programming modes for the third data programming mode to Write data into the second storage block where the second storage unit is the single-stage storage unit; the third temperature interval is different from the second temperature interval, and the second temperature interval is different from the first temperature interval . The flash memory controller (120) according to claim 3, wherein the first data programming mode is a virtual three-bit data programming mode and the second data programming mode is a virtual two-bit data programming The programming mode and the third data programming mode are one-bit data programming modes. The flash memory controller (120) according to claim 1, further comprising: a power management circuit (110), coupled to the temperature detection circuit (121) and the processing circuit (122), configured to be A first power supply (P3) and a second power supply (P4) are provided to the temperature detection circuit (121) and the processing circuit (122), respectively. The flash memory controller (120) according to claim 1, wherein the temperature detection circuit (121) includes: a temperature detection unit (123) configured to detect the flash memory controller (120) the ambient temperature where it is located; and a control unit (124), coupled to the temperature detection unit (123), configured to determine whether the ambient temperature exceeds the predetermined temperature range when the ambient temperature exceeds the predetermined In the temperature range, the control unit (124) generates the control signal (Sc) to the processing circuit (122). A flash memory controller (120), including: A temperature detection circuit (121) configured to detect an ambient temperature, and when the ambient temperature exceeds a predetermined temperature range, the temperature detection circuit (121) can generate a control signal (Sc); and a processing circuit (122), coupled to the temperature detection circuit (121), configured to program a flash memory to be written to using a predetermined data programming mode when the ambient temperature falls within a predetermined temperature range (130) ), and write the programmed data to a first storage block in the flash memory (130); wherein, when the ambient temperature exceeds the predetermined temperature range, the processing circuit (122) is also set Cheng reads the data stored in the first storage block, and selects one of the plurality of data programming modes according to the control signal (Sc) to reprogram the data in the first storage block And writing the reprogrammed data into a second storage block in the flash memory (130); wherein a first storage unit of the first storage block is stored with a first number of bits Unit, a second storage unit of the second storage block uses a second bit number as the storage unit, and the first bit number is greater than the second bit number. The flash memory controller (120) according to claim 7, wherein the first storage unit is a fourth-level storage unit, and the second storage unit is a single-level storage unit, a virtual multi-level storage unit, and a virtual third-level storage unit One of the storage units. The flash memory controller (120) according to claim 7, wherein the temperature detection circuit (121) includes: a temperature detection unit (123) configured to detect the flash memory controller (120) the ambient temperature; and a control unit (124), coupled to the temperature detection unit (123), configured to determine whether the ambient temperature exceeds the predetermined temperature range when the ambient temperature exceeds the predetermined temperature In the range, the control unit (124) generates the control signal (Sc) to the processing circuit (122). The flash memory controller (120) according to claim 7, further comprising: A power management circuit (110), coupled to the temperature detection circuit (121) and the processing circuit (122), is configured to provide a first power supply (P1) to the temperature detection circuit (121) and according to the The control signal (Sc) selectively provides a second power source (P2) to the processing circuit (122).

Images