TWI668549B - Power supply capable of adjusting output voltage and operating system utilizing the same - Google Patents

Power supply capable of adjusting output voltage and operating system utilizing the same Download PDF

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TWI668549B
TWI668549B TW106135461A TW106135461A TWI668549B TW I668549 B TWI668549 B TW I668549B TW 106135461 A TW106135461 A TW 106135461A TW 106135461 A TW106135461 A TW 106135461A TW I668549 B TWI668549 B TW I668549B
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voltage
pin
power path
power supply
detection signal
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TW106135461A
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TW201917510A (en
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張燕雲
孫培華
簡源利
陳凱勛
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技嘉科技股份有限公司
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Abstract

一種可調整輸出電壓之電源供應器,用以供電予一主機板的一連接埠,並包括一電壓產生器、一第一電源路徑、一第二電源路徑、一偵測電路以及一開關電路。電壓產生器用以產生一第一電壓、一第二電壓、一第三電壓以及一第四電壓。第一電源路徑用以傳送第一電壓予連接埠的一第一接腳。第二電源路徑用以傳送第二電壓予連接埠的一第二接腳。偵測電路偵測連接埠的一第三接腳的電壓,用以產生一偵測信號。開關電路根據偵測信號提供一第三電源路徑或是一第四電源路徑。第三電源路徑用以傳送第三電壓予第三接腳。第四電源路徑用以傳送第四電壓予第三接腳。 A power supply capable of adjusting an output voltage for supplying power to a port of a motherboard, and comprising a voltage generator, a first power path, a second power path, a detecting circuit, and a switching circuit. The voltage generator is configured to generate a first voltage, a second voltage, a third voltage, and a fourth voltage. The first power path is configured to transmit a first voltage to a first pin of the port. The second power path is configured to transmit a second voltage to a second pin of the port. The detection circuit detects the voltage of a third pin of the connection port to generate a detection signal. The switch circuit provides a third power path or a fourth power path according to the detection signal. The third power path is configured to transmit a third voltage to the third pin. The fourth power path is configured to transmit a fourth voltage to the third pin.

Description

可調整輸出電壓之電源供應器及操作系統  Power supply and operating system with adjustable output voltage  

本發明係有關於一種電源供應器,特別是有關於一種可調整輸出電壓的電源供應器。 The present invention relates to a power supply, and more particularly to a power supply that can adjust an output voltage.

習知的電源供應器係將交流電壓轉換成直流電壓,再提供予外部裝置,如主機板。然而,電源供應器的輸出電壓的數量係為固定,無法滿足所有的主機板。舉例而言,假設,一電源供應器固定輸出4組3.3V、5組5V以及2組12V。如果一主機板需7組3.3V時,則該電源供應器就無法滿足主機板的需求。 Conventional power supplies convert AC voltage to DC voltage and provide it to an external device, such as a motherboard. However, the number of output voltages of the power supply is fixed and cannot satisfy all the motherboards. For example, assume that a power supply has a fixed output of 4 sets of 3.3V, 5 sets of 5V, and 2 sets of 12V. If a motherboard requires 7 sets of 3.3V, the power supply cannot meet the requirements of the motherboard.

本發明提供一種可調整輸出電壓之電源供應器,用以供電予一主機板的一連接埠,並包括一電壓產生器、一第一電源路徑、一第二電源路徑、一第一偵測電路以及一第一開關電路。電壓產生器用以產生一第一電壓、一第二電壓、一第三電壓以及一第四電壓。第一電源路徑用以傳送第一電壓予連接埠的一第一接腳。第二電源路徑用以傳送第二電壓予連接埠的一第二接腳。第一偵測電路偵測連接埠的一第三接腳的電壓,用以產生一第一偵測信號。第一開關電路根據第一偵測信號提 供一第三電源路徑或是一第四電源路徑。第三電源路徑用以傳送第三電壓予第三接腳。第四電源路徑用以傳送第四電壓予第三接腳。 The present invention provides a power supply capable of adjusting an output voltage for supplying power to a connection port of a motherboard, and includes a voltage generator, a first power supply path, a second power supply path, and a first detection circuit. And a first switching circuit. The voltage generator is configured to generate a first voltage, a second voltage, a third voltage, and a fourth voltage. The first power path is configured to transmit a first voltage to a first pin of the port. The second power path is configured to transmit a second voltage to a second pin of the port. The first detecting circuit detects the voltage of a third pin of the connection port to generate a first detection signal. The first switching circuit provides a third power path or a fourth power path according to the first detection signal. The third power path is configured to transmit a third voltage to the third pin. The fourth power path is configured to transmit a fourth voltage to the third pin.

本發明另提供一種操作系統,包括一主機板以及一可調整輸出電壓之電源供應器。主機板包括一連接埠。連接埠具有一第一接腳、一第二接腳以及一第三接腳。可調整輸出電壓之電源供應器用以供電予該主機板,並包括一電壓產生器、一第一電源路徑、一第二電源路徑、一第一偵測電路以及一第一開關電路。電壓產生器用以產生一第一電壓、一第二電壓、一第三電壓以及一第四電壓。第一電源路徑用以傳送第一電壓予第一接腳。第二電源路徑用以傳送第二電壓予第二接腳。第一偵測電路偵測第三接腳的電壓,用以產生一第一偵測信號。第一開關電路根據第一偵測信號提供一第三電源路徑或是一第四電源路徑。第三電源路徑用以傳送第三電壓予第三接腳。第四電源路徑用以傳送第四電壓予第三接腳。 The invention further provides an operating system comprising a motherboard and a power supply capable of adjusting an output voltage. The motherboard includes a port. The port has a first pin, a second pin and a third pin. The power supply with adjustable output voltage is used for supplying power to the motherboard, and includes a voltage generator, a first power path, a second power path, a first detecting circuit and a first switching circuit. The voltage generator is configured to generate a first voltage, a second voltage, a third voltage, and a fourth voltage. The first power path is configured to transmit the first voltage to the first pin. The second power path is configured to transmit a second voltage to the second pin. The first detecting circuit detects the voltage of the third pin to generate a first detecting signal. The first switching circuit provides a third power path or a fourth power path according to the first detection signal. The third power path is configured to transmit a third voltage to the third pin. The fourth power path is configured to transmit a fourth voltage to the third pin.

100、200‧‧‧操作系統 100, 200‧‧‧ operating system

110、210‧‧‧電源供應器 110, 210‧‧‧ Power supply

120、220‧‧‧主機板 120, 220‧‧‧ motherboard

121、221‧‧‧連接埠 121, 221‧‧‧ Connections

OP1~OP5‧‧‧操作電壓 OP1~OP5‧‧‧ operating voltage

111、211‧‧‧電壓產生器 111, 211‧‧‧ voltage generator

112、212、214、112A、112B‧‧‧開關電路 112, 212, 214, 112A, 112B‧‧‧ switch circuit

113、213、215、113A、113B‧‧‧偵測電路 113, 213, 215, 113A, 113B‧‧‧ detection circuit

114~117、216~222‧‧‧電源路徑 114~117, 216~222‧‧‧ power path

V1~V7、VP13、PS1~PS3‧‧‧電壓 V1~V7, V P13 , PS1~PS3‧‧‧ voltage

P11~P13、P21~P25‧‧‧接腳 P11~P13, P21~P25‧‧‧ pins

SD1~SD4‧‧‧偵測信號 S D1 ~S D4 ‧‧‧Detection signal

SW1、SW2、411~414、421~424‧‧‧開關 SW1, SW2, 411~414, 421~424‧‧‧ switch

118、340‧‧‧信號產生器 118, 340‧‧‧Signal Generator

310、320‧‧‧分壓器 310, 320‧‧ ‧ voltage divider

330‧‧‧比較器 330‧‧‧ Comparator

VD1、VD2‧‧‧分壓 V D1 , V D2 ‧ ‧ partial pressure

R1~R5‧‧‧電阻 R1~R5‧‧‧ resistance

GND‧‧‧接地電壓 GND‧‧‧ Grounding voltage

341‧‧‧上拉元件 341‧‧‧ Pull-up components

T1~T9‧‧‧電晶體 T1~T9‧‧‧O crystal

ND‧‧‧輸出節點 ND‧‧‧ output node

C1、C2‧‧‧儲能元件 C1, C2‧‧‧ energy storage components

第1圖為本發明之操作系統的示意圖。 Figure 1 is a schematic diagram of the operating system of the present invention.

第2圖為本發明之操作系統的另一示意圖。 Figure 2 is another schematic diagram of the operating system of the present invention.

第3A圖為第1圖的偵測電路的一可能實施例。 Figure 3A is a possible embodiment of the detection circuit of Figure 1.

第3B圖為本發明之偵測電路的另一可能實施例。 Figure 3B is another possible embodiment of the detection circuit of the present invention.

第4A圖為第1圖的開關電路的一可能實施例。 Figure 4A is a possible embodiment of the switching circuit of Figure 1.

第4B圖為本發明的開關電路的另一可能實施例。 Figure 4B is another possible embodiment of the switching circuit of the present invention.

為讓本發明之目的、特徵和優點能更明顯易懂,下文特舉出實施例,並配合所附圖式,做詳細之說明。本發明說明書提供不同的實施例來說明本發明不同實施方式的技術特徵。其中,實施例中的各元件之配置係為說明之用,並非用以限制本發明。另外,實施例中圖式標號之部分重覆,係為了簡化說明,並非意指不同實施例之間的關聯性。 In order to make the objects, features and advantages of the present invention more comprehensible, the embodiments of the invention are described in detail below. The present specification provides various embodiments to illustrate the technical features of various embodiments of the present invention. The arrangement of the various elements in the embodiments is for illustrative purposes and is not intended to limit the invention. In addition, the overlapping portions of the drawings in the embodiments are for the purpose of simplifying the description, and do not mean the relationship between the different embodiments.

第1圖為本發明之操作系統的示意圖。如圖所示,操作系統100包括一電源供應器110以及一主機板120。主機板120接收並根據電源供應器110所產生的電壓而動作。在一可能實施例中,主機板120具有一連接埠121。連接埠121耦接電源供應器110,用以接收電源供應器110所產生的電壓,並將接收到的電壓作為操作電壓OP1及OP2,用以提供予主機板120的其它元件(未顯示)。主機板120的內部元件再根據操作電壓OP1及OP2而動作。在本實施例中,第1圖只有列出與本發明有關的元件,並非用以限制本發明。主機板120仍具有其它硬體元件,在此不一一贅述。 Figure 1 is a schematic diagram of the operating system of the present invention. As shown, the operating system 100 includes a power supply 110 and a motherboard 120. The motherboard 120 receives and operates in accordance with the voltage generated by the power supply 110. In a possible embodiment, the motherboard 120 has a port 121. The port 121 is coupled to the power supply 110 for receiving the voltage generated by the power supply 110 and using the received voltage as the operating voltages OP1 and OP2 for providing other components (not shown) of the motherboard 120. The internal components of the motherboard 120 operate in accordance with the operating voltages OP1 and OP2. In the present embodiment, FIG. 1 only shows elements related to the present invention, and is not intended to limit the present invention. The motherboard 120 still has other hardware components, which are not described herein.

電源供應器110供電予主機板120的連接埠121,並可調整輸出電壓的數量。如圖所示,電源供應器110包括一電壓產生器111、一開關電路112、一偵測電路113以及電源路徑114~117。在本實施例中,電壓產生器111用以產生電壓V1~V4。本發明並不限定電壓產生器111產生的電壓的數量。在其它實施例中,電壓產生器111可能產生更少或更多的電壓。在本實施例中,電壓V1不同於電壓V2,在一可能實施例中,電壓V1為3.3V,並且電壓V2為5V。在另一可能實施例中,電壓V3及 V4不等於電壓V1及V2。在其它實施例中,電壓V3等於電壓V1,電壓V4等於電壓V2。 The power supply 110 supplies power to the port 121 of the motherboard 120 and can adjust the amount of output voltage. As shown, the power supply 110 includes a voltage generator 111, a switch circuit 112, a detection circuit 113, and power paths 114-117. In this embodiment, the voltage generator 111 is used to generate voltages V1 VV4. The present invention does not limit the number of voltages generated by the voltage generator 111. In other embodiments, voltage generator 111 may generate less or more voltages. In the present embodiment, the voltage V1 is different from the voltage V2. In a possible embodiment, the voltage V1 is 3.3V and the voltage V2 is 5V. In another possible embodiment, voltages V3 and V4 are not equal to voltages V1 and V2. In other embodiments, voltage V3 is equal to voltage V1 and voltage V4 is equal to voltage V2.

電源路徑114用以傳送電壓V1予連接埠121的一接腳P11。接腳P11接收電壓V1,並將電壓V1作為操作電壓OP1提供予主機板120的其它元件。電源路徑115用以傳送電壓V2予連接埠121的一接腳P12。接腳P12接收電壓V2,並將電壓V2作為操作電壓OP2提供予主機板120的其它元件。在本實施例中,當電源供應器110耦接主機板120時,電源供應器110持續提供電壓V1與V2予主機板120。 The power path 114 is used to transmit the voltage V1 to a pin P11 of the port 121. The pin P11 receives the voltage V1 and supplies the voltage V1 to the other elements of the motherboard 120 as the operating voltage OP1. The power path 115 is used to transmit the voltage V2 to a pin P12 of the port 121. The pin P12 receives the voltage V2 and supplies the voltage V2 to the other elements of the motherboard 120 as the operating voltage OP2. In the embodiment, when the power supply 110 is coupled to the motherboard 120, the power supply 110 continuously supplies the voltages V1 and V2 to the motherboard 120.

偵測電路113偵測連接埠121的一接腳P13的電壓,用以產生一偵測信號SD1。主機板120的設計人員可根據主機板的電源需求,將接腳P13電性連接至接腳P11或P12。舉例而言,假設,接腳P11接收到的電壓V1為3.3V,並且接腳P12接收到的電壓V1為5V。在此例中,如果主機板120需要較多的3.3V時,設計人員可將接腳P13電性連接至接腳P11。相反地,如果主機板120需要較多的5V時,設計人員可將接腳P13電性連接至接腳P12。偵測電路113根據接腳P13的電壓,便可得知主機板120所需的電壓,故可利用偵測信號SD1,控制開關電路112輸出適當的電壓予接腳P13。在其它實施例中,如果主機板120需要較多的3.3V時,設計人員可將接腳P13電性連接至接腳P12。同樣地,如果主機板120需要較多的5V時,設計人員可將接腳P13電性連接至接腳P11。 The detecting circuit 113 detects the voltage of a pin P13 of the port 121 for generating a detecting signal S D1 . The designer of the motherboard 120 can electrically connect the pin P13 to the pin P11 or P12 according to the power requirement of the motherboard. For example, assume that the voltage V1 received by the pin P11 is 3.3V, and the voltage V1 received by the pin P12 is 5V. In this example, if the motherboard 120 requires more 3.3V, the designer can electrically connect the pin P13 to the pin P11. Conversely, if the motherboard 120 requires more 5V, the designer can electrically connect the pin P13 to the pin P12. The detecting circuit 113 can know the voltage required by the motherboard 120 according to the voltage of the pin P13, so that the detecting circuit S D1 can be used to control the switch circuit 112 to output an appropriate voltage to the pin P13. In other embodiments, if the motherboard 120 requires more 3.3V, the designer can electrically connect the pin P13 to the pin P12. Similarly, if the motherboard 120 requires more 5V, the designer can electrically connect the pin P13 to the pin P11.

開關電路112根據偵測信號SD1提供一電源路徑116或是117。在一可能實施例中,開關電路112包括開關SW1及SW2。 當偵測信號SD1導通開關SW1時,電壓產生器111與接腳P13之間的電源路徑116被導通,電壓V3透過電源路徑116被傳送至接腳P13。當偵測信號SD1導通開關SW2時,電壓產生器111與接腳P13之間的電源路徑117被導通,電壓V4透過電源路徑117被傳送至接腳P13。在本實施例中,開關SW1與SW2不會同時導通。在其它實施例中,開關電路112具有更多的開關,每一開關用以傳送適當的電壓予主機板120。 The switch circuit 112 provides a power path 116 or 117 based on the detection signal S D1 . In a possible embodiment, the switch circuit 112 includes switches SW1 and SW2. When the detection signal S D1 turns on the switch SW1, the power path 116 between the voltage generator 111 and the pin P13 is turned on, and the voltage V3 is transmitted to the pin P13 through the power path 116. When the detection signal S D1 turns on the switch SW2, the power path 117 between the voltage generator 111 and the pin P13 is turned on, and the voltage V4 is transmitted to the pin P13 through the power path 117. In this embodiment, the switches SW1 and SW2 are not turned on at the same time. In other embodiments, the switch circuit 112 has more switches, each switch for delivering a suitable voltage to the motherboard 120.

在上述實施例中,開關SW1與SW2係由同一信號(如SD1)所控制,但並非用以限制本發明。在其它實施例中,開關SW1與SW2可能由兩信號控制。在此例中,電源供應器110更包括一信號產生器118。信號產生器118根據偵測信號SD1產生一偵測信號SD2。偵測信號SD1用以導通或不導通開關SW1。偵測信號SD2用以導通或不導通開關SW2。 In the above embodiment, the switches SW1 and SW2 are controlled by the same signal (e.g., S D1 ), but are not intended to limit the present invention. In other embodiments, switches SW1 and SW2 may be controlled by two signals. In this example, power supply 110 further includes a signal generator 118. The signal generator 118 generates a detection signal S D2 according to the detection signal S D1 . The detection signal S D1 is used to turn on or off the switch SW1. The detection signal S D2 is used to turn on or off the switch SW2.

偵測信號SD1反相於偵測信號SD2。舉例而言,當偵測信號SD1為高位準時,偵測信號SD2為低位準。然而,當偵測信號SD1為低位準時,偵測信號SD2為高位準。因此,當開關SW1導通時,開關SW2不導通。同樣地,當開關SW1不導通時,開關SW2導通。 The detection signal S D1 is inverted to the detection signal S D2 . For example, when the detection signal S D1 is at a high level, the detection signal S D2 is at a low level. However, when the detection signal S D1 is at a low level, the detection signal S D2 is at a high level. Therefore, when the switch SW1 is turned on, the switch SW2 is not turned on. Similarly, when the switch SW1 is not turned on, the switch SW2 is turned on.

第2圖為本發明之操作系統的另一可能實施例。第2圖相似第1圖,不同之處在於第2圖的電源供應器210提供更多的電壓予主機板220。在本實施例中,主機板220的連接埠221具有接腳P21~P25,但並非用以限制本發明。在其它實施例中,連接埠221具有更少或更多的接腳。如圖所示,接腳P22電性連接接腳P25。接腳P23電性連接接腳P24。 Figure 2 is another possible embodiment of the operating system of the present invention. Figure 2 is similar to Figure 1 except that the power supply 210 of Figure 2 provides more voltage to the motherboard 220. In the present embodiment, the port 221 of the motherboard 220 has pins P21 to P25, but is not intended to limit the present invention. In other embodiments, the port 221 has fewer or more pins. As shown in the figure, the pin P22 is electrically connected to the pin P25. The pin P23 is electrically connected to the pin P24.

電源供應器210包括一電壓產生器211、開關電路212、214、偵測電路213、215以及電源路徑216~222。電壓產生器211產生電壓V1~V7。在一可能實施例中,電壓V1~V3均不相同。在另一可能實施例中,電壓V1~V3之兩者相同。在其它實施例中,電壓V4可能相同於電壓V1~V3之一者。在此例中,電壓V5可能相同於電壓V1~V3之另一者。在一些實施例中,電壓V6可能相同於電壓V1~V3之一者。在此例中,電壓V7可能相同於電壓V1~V3之另一者。 The power supply 210 includes a voltage generator 211, switch circuits 212, 214, detection circuits 213, 215, and power paths 216-222. The voltage generator 211 generates voltages V1 to V7. In a possible embodiment, the voltages V1 to V3 are different. In another possible embodiment, the voltages V1 V V3 are the same. In other embodiments, voltage V4 may be the same as one of voltages V1 - V3. In this example, the voltage V5 may be the same as the other of the voltages V1 to V3. In some embodiments, voltage V6 may be the same as one of voltages V1 - V3. In this example, voltage V7 may be the same as the other of voltages V1 to V3.

電源路徑216傳送電壓V1予接腳P21。接腳P21將電壓V1作為操作電壓OP3,並提供予主機板220的其它元件使用。電源路徑217傳送電壓V2予接腳P22。接腳P22將電壓V2作為操作電壓OP4,並提供予主機板220的其它元件使用。電源路徑218傳送電壓V3予接腳P23。接腳P23將電壓V3作為操作電壓OP5,並提供予主機板220的其它元件使用。在本實施例中,電源路徑216~218持續傳送電壓V1~V3。因此,當電源供應器210耦接連接埠221時,接腳P21~P23便可立即接收到電壓V1~V3。 The power path 216 transmits the voltage V1 to the pin P21. The pin P21 uses the voltage V1 as the operating voltage OP3 and is supplied to other components of the motherboard 220. The power path 217 transmits the voltage V2 to the pin P22. The pin P22 uses the voltage V2 as the operating voltage OP4 and is supplied to other components of the motherboard 220. The power path 218 transmits the voltage V3 to the pin P23. The pin P23 uses the voltage V3 as the operating voltage OP5 and is supplied to other components of the motherboard 220. In this embodiment, the power paths 216-218 continue to transmit voltages V1 to V3. Therefore, when the power supply 210 is coupled to the port 221, the pins P21 to P23 can immediately receive the voltages V1 to V3.

偵測電路213根據接腳P24的電壓產生一偵測信號SD3。開關電路212根據偵測信號SD3導通電源路徑219或220。電源路徑219傳送電壓V4予接腳P24。電源路徑220用以傳送電壓V5予接腳P24。由於偵測電路213的特性與第1圖的開關電路112相同,故不再贅述。 The detecting circuit 213 generates a detecting signal S D3 according to the voltage of the pin P24. The switch circuit 212 turns on the power path 219 or 220 according to the detection signal S D3 . The power path 219 transmits the voltage V4 to the pin P24. The power path 220 is used to transmit the voltage V5 to the pin P24. Since the characteristics of the detecting circuit 213 are the same as those of the switch circuit 112 of FIG. 1, they will not be described again.

偵測電路215偵測連接埠221的接腳P25的電壓,用以產生一偵測信號SD4。開關電路214根據偵測信號SD4導通電源路徑221或222。電源路徑221用以傳送電壓V6予接腳P25。電源 路徑222用以傳送電壓V7予接腳P25。在一可能實施例中,電壓V6相同於電壓V4及V5之一者。在此例中,電壓V7也可能相同於電壓V4及V5之另一者。 The detecting circuit 215 detects the voltage of the pin P25 of the port 221 to generate a detecting signal S D4 . The switch circuit 214 turns on the power path 221 or 222 according to the detection signal S D4 . The power path 221 is used to transmit the voltage V6 to the pin P25. The power path 222 is used to transmit the voltage V7 to the pin P25. In one possible embodiment, voltage V6 is the same as one of voltages V4 and V5. In this example, voltage V7 may also be the same as the other of voltages V4 and V5.

在其它實施例中,第1圖的信號產生器118也可應用於第2圖中。在此例中,電源供應器210可能具有一第一信號產生器(未顯示)以及一第二信號產生器。第一信號產生器根據偵測信號SD3產生一第一反相信號。開關電路212根據偵測信號SD3與第一反相信號輸出電壓V4或V5予接腳P24。另外,第二信號產生器根據偵測信號SD4產生一第二反相信號。開關電路214根據偵測信號SD4與第二反相信號輸出電壓V6或V7予接腳P25。 In other embodiments, the signal generator 118 of Figure 1 can also be applied to Figure 2. In this example, power supply 210 may have a first signal generator (not shown) and a second signal generator. The first signal generator generates a first inverted signal according to the detection signal S D3 . The switch circuit 212 outputs the voltage V4 or V5 to the pin P24 according to the detection signal S D3 and the first inverted signal. In addition, the second signal generator generates a second inverted signal according to the detection signal S D4 . The switch circuit 214 outputs the voltage V6 or V7 to the pin P25 according to the detection signal S D4 and the second inverted signal.

第3A圖為第1圖的偵測電路的一可能實施例。第3A圖的偵測電路亦可應用於第2圖中。偵測電路113A包括分壓器310、320及一比較器330。分壓器310根據主機板120上的連接埠121的接腳P13的電壓VP13產生一分壓VD1。在本實施例中,分壓器310包括電阻R1及R2。電阻R1串聯電阻R2於電壓VP13與接地電壓GND之間。 Figure 3A is a possible embodiment of the detection circuit of Figure 1. The detection circuit of Figure 3A can also be applied to Figure 2. The detection circuit 113A includes voltage dividers 310, 320 and a comparator 330. The voltage divider 310 generates a divided voltage V D1 according to the voltage V P13 of the pin P13 of the connection port 121 on the motherboard 120. In the present embodiment, voltage divider 310 includes resistors R1 and R2. The resistor R1 is connected in series with the resistor R2 between the voltage V P13 and the ground voltage GND.

分壓器320根據一電壓PS1產生一分壓VD2。在一可能實施例中,電壓PS1係由第1圖的電壓產生器111所產生。電壓PS1可能相同於電壓V1~V2之一者,或是不同於電壓V1及V2。在本實施例中,分壓器320包括電阻R3及R4。電阻R3串聯電阻R4於電壓PS1與接地電壓GND之間。 The voltage divider 320 generates a divided voltage V D2 according to a voltage PS1. In a possible embodiment, the voltage PS1 is generated by the voltage generator 111 of FIG. The voltage PS1 may be the same as one of the voltages V1 to V2 or different from the voltages V1 and V2. In the present embodiment, voltage divider 320 includes resistors R3 and R4. The resistor R3 is connected in series with the resistor R4 between the voltage PS1 and the ground voltage GND.

比較器330比較分壓VD1及VD2,用以產生偵測信號SD1。在本實施例中,比較器330的非反相輸入端接收分壓VD1, 比較器330的反相輸入端接收分壓VD2。當分壓VD1大於分壓VD2時,偵測信號SD1的位準約略等於電壓PS2。在一可能實施例中,電壓PS2係由電壓產生器111所產生。在此例中,電壓PS2可能大於電壓V1及V2,但並非用以限制本發明。在其它實施例中,電壓PS2約略等於電壓V1或V2。當分壓VD1小於分壓VD2時,偵測信號SD1的位準約略等於接地電壓GND。 The comparator 330 compares the divided voltages V D1 and V D2 for generating the detection signal S D1 . In the present embodiment, the non-inverting input of the comparator 330 receives the divided voltage V D1 , and the inverting input of the comparator 330 receives the divided voltage V D2 . When the divided voltage V D1 is greater than the divided voltage V D2 , the level of the detection signal S D1 is approximately equal to the voltage PS2. In a possible embodiment, voltage PS2 is generated by voltage generator 111. In this example, voltage PS2 may be greater than voltages V1 and V2, but is not intended to limit the invention. In other embodiments, voltage PS2 is approximately equal to voltage V1 or V2. When the divided voltage V D1 is smaller than the divided voltage V D2 , the level of the detection signal S D1 is approximately equal to the ground voltage GND.

在另一可能實施例中,分壓器310更包括一儲能元件C1。儲能元件C1並聯電阻R2,用以控制分壓VD1的延遲時間。在此例中,儲能元件C1可避免比較器330產生不正確的偵測信號SD1。在一可能實施例中,儲能元件C1係為一電容。 In another possible embodiment, the voltage divider 310 further includes an energy storage component C1. The energy storage component C1 is connected in parallel with the resistor R2 for controlling the delay time of the divided voltage V D1 . In this example, the energy storage component C1 can prevent the comparator 330 from generating an incorrect detection signal S D1 . In a possible embodiment, the energy storage component C1 is a capacitor.

第3B圖為本發明之偵測電路的另一可能實施例。第3B圖相似第3A圖,不同之處在於第3B圖多了一信號產生器340。在其它實施例中,信號產生器340係獨立於偵測電路113B之外。信號產生器340根據偵測信號SD1產生偵測信號SD2。偵測信號SD1反相於偵測信號SD2Figure 3B is another possible embodiment of the detection circuit of the present invention. Figure 3B is similar to Figure 3A except that a signal generator 340 is added to Figure 3B. In other embodiments, signal generator 340 is independent of detection circuit 113B. The signal generator 340 generates the detection signal S D2 according to the detection signal S D1 . The detection signal S D1 is inverted to the detection signal S D2 .

信號產生器340包括一上拉元件341以及一電晶體T1。上拉元件341接收一電壓PS3並耦接一輸出節點ND,用以將輸出節點ND的電壓上拉至電壓PS3。在本實施例中,上拉元件341係為電阻R5。 The signal generator 340 includes a pull-up element 341 and a transistor T1. The pull-up element 341 receives a voltage PS3 and is coupled to an output node ND for pulling up the voltage of the output node ND to the voltage PS3. In the present embodiment, the pull-up element 341 is a resistor R5.

電晶體T1耦接輸出節點ND,並接收偵測信號SD1。電晶體T1作為一下拉元件,用以輸出節點ND的電壓下拉至接地電壓GND。舉例而言,當偵測信號SD1為高位準時,電晶體T1導通。因此,輸出節點ND的電壓等於接地電壓GND,也就是偵測信號SD2為低位準。當偵測信號SD1為低位準時,電晶體 T1不導通。因此,輸出節點ND的電壓等於電壓PS3,也就是偵測信號SD2為高位準。在一可能實施例中,電壓PS3等於電壓PS2。舉例而言,電壓PS2與PS3均為+12V。在其它實施例中,電壓PS3不等於電壓PS2。在此例中,電壓PS3可能相同於電壓V1或V2,或是不同於電壓V1及V2。 The transistor T1 is coupled to the output node ND and receives the detection signal S D1 . The transistor T1 acts as a pull-down element for pulling down the voltage of the output node ND to the ground voltage GND. For example, when the detection signal S D1 is at a high level, the transistor T1 is turned on. Therefore, the voltage of the output node ND is equal to the ground voltage GND, that is, the detection signal S D2 is at a low level. When the detection signal S D1 is at a low level, the transistor T1 is not turned on. Therefore, the voltage of the output node ND is equal to the voltage PS3, that is, the detection signal S D2 is at a high level. In a possible embodiment, voltage PS3 is equal to voltage PS2. For example, the voltages PS2 and PS3 are both +12V. In other embodiments, voltage PS3 is not equal to voltage PS2. In this example, voltage PS3 may be the same as voltage V1 or V2 or different from voltages V1 and V2.

在另一實施例中,信號產生器340更包括一儲能元件C2。儲能元件C2耦接輸出節點ND,用以避免偵測信號SD2的位準相同於偵測信號SD1。在一可能實施例中,儲能元件C2係為一電容。在此例中,電容的容值約為560u。 In another embodiment, the signal generator 340 further includes an energy storage component C2. The energy storage component C2 is coupled to the output node ND to prevent the detection signal S D2 from being the same level as the detection signal S D1 . In a possible embodiment, the energy storage component C2 is a capacitor. In this case, the capacitance of the capacitor is approximately 560u.

第4A圖為第1圖的開關電路的一可能實施例。第4A圖的開關電路亦可應用於第2圖中。開關電路112A包括開關411~414。如圖所示,電源路徑116具有開關411及412。開關411耦接開關412並接收電壓V3。開關412耦接於開關411與接腳P13之間。電源路徑117具有開關413及414。開關413耦接開關414並接收電壓V4。開關414耦接於開關413與接腳P13之間。 Figure 4A is a possible embodiment of the switching circuit of Figure 1. The switching circuit of Fig. 4A can also be applied to Fig. 2. The switch circuit 112A includes switches 411 to 414. As shown, power path 116 has switches 411 and 412. The switch 411 is coupled to the switch 412 and receives the voltage V3. The switch 412 is coupled between the switch 411 and the pin P13. Power path 117 has switches 413 and 414. Switch 413 is coupled to switch 414 and receives voltage V4. The switch 414 is coupled between the switch 413 and the pin P13.

當偵測信號SD1為一第一位準(如低位準)時,開關411與412導通,並且開關413及414不導通。因此,電源路徑116傳送電壓V3予接腳P13。當偵測信號SD1為一第二位準(如高位準)時,開關411與412不導通,並且開關413及414導通。因此,電源路徑117傳送電壓V4予接腳P13。 When the detection signal S D1 is at a first level (such as a low level), the switches 411 and 412 are turned on, and the switches 413 and 414 are not turned on. Therefore, the power path 116 transmits the voltage V3 to the pin P13. When the detection signal S D1 is at a second level (such as a high level), the switches 411 and 412 are not turned on, and the switches 413 and 414 are turned on. Therefore, the power supply path 117 transmits the voltage V4 to the pin P13.

本發明並不限定開關411~414的種類。在本實施例中,開關411與412分別為P型電晶體T2與T3,開關413與414分別為N型電晶體T4與T5,但並非用以限制本發明。在其它實施例中,開關411與412為N型電晶體,並且開關413與414為P型電 晶體。 The present invention does not limit the types of switches 411 to 414. In the present embodiment, switches 411 and 412 are P-type transistors T2 and T3, respectively, and switches 413 and 414 are N-type transistors T4 and T5, respectively, but are not intended to limit the present invention. In other embodiments, switches 411 and 412 are N-type transistors, and switches 413 and 414 are P-type transistors.

在一些實施例中,電源路徑116可能具有更多或更少的開關。同樣地,電源路徑117可能具有更多或更少的開關。電源路徑116的開關數量可能相同或不同於電源路徑117的開關數量。另外,開關412及414可能被省略。在此例中,電源路徑116僅具有單一開關411,並且電源路徑117亦僅具有單一開關413。 In some embodiments, power path 116 may have more or fewer switches. Likewise, power path 117 may have more or fewer switches. The number of switches of power path 116 may be the same or different than the number of switches of power path 117. Additionally, switches 412 and 414 may be omitted. In this example, power path 116 has only a single switch 411, and power path 117 also has only a single switch 413.

第4B圖為第1圖的開關電路的另一可能實施例。第4B圖相似第4A圖,不同之處在於,開關421~424均為相同型態的電晶體,如N型電晶體T6~T9,但並非用以限制本發明。在其它實施例中,開關421~424可能均為P型電晶體。另外,開關電路112B根據偵測信號SD1及SD2,傳送電壓V3或V4予接腳P13。 Figure 4B is another possible embodiment of the switching circuit of Figure 1. Figure 4B is similar to Figure 4A, except that switches 421-424 are all of the same type of transistor, such as N-type transistors T6-T9, but are not intended to limit the invention. In other embodiments, switches 421-424 may all be P-type transistors. In addition, the switch circuit 112B transmits the voltage V3 or V4 to the pin P13 according to the detection signals S D1 and S D2 .

在本實施例中,當偵測信號SD1為一第一位準(如低位準)並且偵測信號SD2為一第二位準(如高位準)時,開關421及422導通並且開關423及424不導通。因此,電源路徑116傳送電壓V3予接腳P13。然而,當偵測信號SD1為第二位準(如高位準)並且偵測信號SD2為第一位準(如低位準)時,開關421及422不導通並且開關423及424導通。因此,電源路徑117傳送電壓V3予接腳P13。 In this embodiment, when the detection signal S D1 is at a first level (such as a low level) and the detection signal S D2 is at a second level (such as a high level), the switches 421 and 422 are turned on and the switch 423 And 424 does not conduct. Therefore, the power path 116 transmits the voltage V3 to the pin P13. However, when the detection signal S D1 is at the second level (eg, high level) and the detection signal S D2 is at the first level (eg, low level), the switches 421 and 422 are not turned on and the switches 423 and 424 are turned on. Therefore, the power supply path 117 transmits the voltage V3 to the pin P13.

由於本發明的電源供應器除了提供基本的電壓(如一個3.3V以及一個5V)予主機板外,更可根據主機板上的接腳的位準,提供額外的電壓(如至少一個3.3V、至少一個5V或是一個3.3V以及一個5V)予主機板,故可符合主機板的電源需求。 因此,設計人員只要根據主機板上的元件特性,設定一特定接腳(如第1圖的接腳P13)的位準,便可命令外部電源供應器提供所需的電源。 Since the power supply of the present invention provides basic voltage (such as a 3.3V and a 5V) to the motherboard, it can provide additional voltage (such as at least one 3.3V, according to the level of the pins on the motherboard). At least one 5V or one 3.3V and one 5V) is given to the motherboard, so it can meet the power requirements of the motherboard. Therefore, the designer can command the external power supply to supply the required power by setting the level of a specific pin (such as pin P13 in Figure 1) according to the component characteristics on the motherboard.

除非另作定義,在此所有詞彙(包含技術與科學詞彙)均屬本發明所屬技術領域中具有通常知識者之一般理解。此外,除非明白表示,詞彙於一般字典中之定義應解釋為與其相關技術領域之文章中意義一致,而不應解釋為理想狀態或過分正式之語態。 Unless otherwise defined, all terms (including technical and scientific terms) are used in the ordinary meaning Moreover, unless expressly stated, the definition of a vocabulary in a general dictionary should be interpreted as consistent with the meaning of an article in its related art, and should not be interpreted as an ideal state or an overly formal voice.

雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾。舉例來,本發明實施例所系統、裝置或是方法可以硬體、軟體或硬體以及軟體的組合的實體實施例加以實現。因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. . For example, the system, apparatus or method of the embodiments of the present invention may be implemented in a physical embodiment of a combination of hardware, software or hardware and software. Therefore, the scope of the invention is defined by the scope of the appended claims.

Claims (12)

一種可調整輸出電壓之電源供應器,用以供電予一主機板的一連接埠,並包括:一電壓產生器,用以產生一第一電壓、一第二電壓、一第三電壓以及一第四電壓;一第一電源路徑,用以傳送該第一電壓予該連接埠的一第一接腳;一第二電源路徑,用以傳送該第二電壓予該連接埠的一第二接腳;一第一偵測電路,偵測該連接埠的一第三接腳的電壓,用以產生一第一偵測信號;以及一第一開關電路,根據該第一偵測信號導通一第三電源路徑或是一第四電源路徑,其中當該第三電源路徑被導通時,該第三電源路徑持續傳送該第三電壓予該第三接腳,當該第四電源路徑被導通時,該第四電源路徑持續傳送該第四電壓予該第三接腳。 A power supply capable of adjusting an output voltage for supplying power to a connection port of a motherboard, and comprising: a voltage generator for generating a first voltage, a second voltage, a third voltage, and a first a first voltage path for transmitting the first voltage to a first pin of the port; a second power path for transmitting the second voltage to a second pin of the port a first detecting circuit for detecting a voltage of a third pin of the port for generating a first detecting signal; and a first switching circuit for turning a third according to the first detecting signal The power path or a fourth power path, wherein when the third power path is turned on, the third power path continuously transmits the third voltage to the third pin, when the fourth power path is turned on, The fourth power path continuously transmits the fourth voltage to the third pin. 如申請專利範圍第1項所述之可調整輸出電壓之電源供應器,其中該第一電壓不同於該第二電壓,該第三電壓相同於該第一電壓,該第四電壓相同於該第二電壓。 The power supply of the adjustable output voltage according to claim 1, wherein the first voltage is different from the second voltage, the third voltage is the same as the first voltage, and the fourth voltage is the same as the first Two voltages. 如申請專利範圍第1項所述之可調整輸出電壓之電源供應器,更包括:一第二偵測電路,偵測該連接埠的一第四接腳的電壓,用以產生一第二偵測信號; 一第二開關電路,根據該第二偵測信號提供一第五電源路徑或是一第六電源路徑,其中該第五電源路徑用以傳送一第五電壓予該第四接腳,該第六電源路徑用以傳送一第六電壓予該第四接腳。 The power supply of the adjustable output voltage according to the first aspect of the patent application, further comprising: a second detecting circuit for detecting a voltage of a fourth pin of the connecting port to generate a second detecting Measuring signal a second switching circuit, configured to provide a fifth power path or a sixth power path according to the second detection signal, wherein the fifth power path is configured to transmit a fifth voltage to the fourth pin, the sixth The power path is configured to transmit a sixth voltage to the fourth pin. 如申請專利範圍第3項所述之可調整輸出電壓之電源供應器,其中該第五電壓相同或不同於該第六電壓。 The power supply of the adjustable output voltage according to claim 3, wherein the fifth voltage is the same or different from the sixth voltage. 如申請專利範圍第1項所述之可調整輸出電壓之電源供應器,更包括:一信號產生器,根據該第一偵測信號產生一第二偵測信號,其中該第一開關電路根據該第一偵測信號提供該第三電源路徑,用以傳送該第三電壓予該第三接腳,並且根據該第二偵測信號提供該第四電源路徑,用以傳送該第四電壓予該第三接腳。 The power supply of the adjustable output voltage according to the first aspect of the patent application, further comprising: a signal generator, generating a second detection signal according to the first detection signal, wherein the first switching circuit is configured according to the The first detection signal provides the third power path for transmitting the third voltage to the third pin, and the fourth power supply path is provided according to the second detection signal, for transmitting the fourth voltage to the The third pin. 如申請專利範圍第5項所述之可調整輸出電壓之電源供應器,其中該第三電壓不同於該第四電壓。 The power supply of the adjustable output voltage according to claim 5, wherein the third voltage is different from the fourth voltage. 如申請專利範圍第5項所述之可調整輸出電壓之電源供應器,其中該第一偵測信號反相於該第二偵測信號。 The power supply of the adjustable output voltage according to claim 5, wherein the first detection signal is inverted to the second detection signal. 如申請專利範圍第5項所述之可調整輸出電壓之電源供應器,其中該信號產生器包括:一上拉元件,接收一操作電壓,並耦接一輸出節點;一電晶體,耦接該輸出節點,並接收該第一偵測信號;以及一儲能元件,耦接該輸出節點。 The power supply of the adjustable output voltage according to claim 5, wherein the signal generator comprises: a pull-up element, receiving an operating voltage, and coupled to an output node; a transistor coupled to the Outputting a node and receiving the first detection signal; and an energy storage component coupled to the output node. 如申請專利範圍第1項所述之可調整輸出電壓之電源供 應器,其中該第一偵測電路包括:一第一分壓器,根據該第三接腳的電壓產生一第一分壓;一第二分壓器,根據一第五電壓產生一第二分壓;一比較器,比較該第一分壓及該第二分壓,用以產生該第一偵測信號,其中該第五電壓係由該電壓產生器所產生並等於該第一電壓或該第二電壓。 Power supply for adjustable output voltage as described in item 1 of the patent application The first detecting circuit includes: a first voltage divider, generating a first partial voltage according to the voltage of the third pin; and a second voltage divider generating a second according to a fifth voltage a voltage divider; a comparator that compares the first divided voltage and the second divided voltage to generate the first detected signal, wherein the fifth voltage is generated by the voltage generator and is equal to the first voltage or The second voltage. 如申請專利範圍第9項所述之可調整輸出電壓之電源供應器,其中當該第一分壓大於該第二分壓時,該第一偵測信號的位準等於一特定電壓,該特定電壓大於該第一電壓及該第二電壓。 The power supply of the adjustable output voltage according to claim 9 , wherein when the first partial pressure is greater than the second partial pressure, the level of the first detection signal is equal to a specific voltage, the specific The voltage is greater than the first voltage and the second voltage. 一種操作系統,包括:一主機板,包括一連接埠,該連接埠具有一第一接腳、一第二接腳以及一第三接腳;以及一可調整輸出電壓之電源供應器,供電予該主機板,並包括:一電壓產生器,用以產生一第一電壓、一第二電壓、一第三電壓以及一第四電壓;一第一電源路徑,用以傳送該第一電壓予該第一接腳;一第二電源路徑,用以傳送該第二電壓予該第二接腳;一第一偵測電路,偵測該第三接腳的電壓,用以產生一第一偵測信號;以及 一第一開關電路,根據該第一偵測信號導通一第三電源路徑或是一第四電源路徑,其中當該第三電源路徑被導通時,該第三電源路徑持續傳送該第三電壓予該第三接腳,當該第四電源路徑被導通時,該第四電源路徑持續傳送該第四電壓予該第三接腳。 An operating system includes: a motherboard including a port, the port having a first pin, a second pin, and a third pin; and a power supply capable of adjusting an output voltage, supplying power to the motherboard The motherboard includes: a voltage generator for generating a first voltage, a second voltage, a third voltage, and a fourth voltage; a first power path for transmitting the first voltage to the a first power supply path for transmitting the second voltage to the second pin; a first detecting circuit detecting the voltage of the third pin for generating a first detection Signal; a first switching circuit, according to the first detection signal, conducting a third power path or a fourth power path, wherein when the third power path is turned on, the third power path continuously transmits the third voltage to The third pin, when the fourth power path is turned on, the fourth power path continuously transmits the fourth voltage to the third pin. 如申請專利範圍第11項所述之操作系統,其中該第三接腳電性連接該第一接腳或該第二接腳。 The operating system of claim 11, wherein the third pin is electrically connected to the first pin or the second pin.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200609742A (en) * 2004-09-10 2006-03-16 Mediatek Inc Multiple apparatuses connection system and the method thereof
TW201017585A (en) * 2008-10-28 2010-05-01 Tsint Distributed type environment monitoring and security system
TW201207411A (en) * 2010-06-30 2012-02-16 Silicon Image Inc Detection of cable connections for electronic devices
TWM488804U (en) * 2014-05-23 2014-10-21 jian-quan Wang Power supply device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200609742A (en) * 2004-09-10 2006-03-16 Mediatek Inc Multiple apparatuses connection system and the method thereof
TW201017585A (en) * 2008-10-28 2010-05-01 Tsint Distributed type environment monitoring and security system
TW201207411A (en) * 2010-06-30 2012-02-16 Silicon Image Inc Detection of cable connections for electronic devices
TWM488804U (en) * 2014-05-23 2014-10-21 jian-quan Wang Power supply device

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