TWI657670B - I/Q imbalance calibration device - Google Patents

I/Q imbalance calibration device Download PDF

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TWI657670B
TWI657670B TW106145780A TW106145780A TWI657670B TW I657670 B TWI657670 B TW I657670B TW 106145780 A TW106145780 A TW 106145780A TW 106145780 A TW106145780 A TW 106145780A TW I657670 B TWI657670 B TW I657670B
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signal
calibration
imbalance
calibration signal
phase
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TW201929445A (en
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管延城
周泓廷
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國家中山科學研究院
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Abstract

一種I/Q不平衡校準裝置,包括:一校準信號產生器,用於選擇性地產生一第一同相校準信號、一第一正交校準信號或者該第一同相校準信號和該第一正交校準信號的兩者;一I/Q不平衡校準器,電連接該校準信號產生器,用於在收到一I/Q增益不平衡值後,對該第一同相校準信號和該第一正交校準信號進行一I/Q增益不平衡補償;一信號強度獲取電路,電連接該發射機系統的該前端電路,用於選擇性地獲取並輸出一第一至第四校準信號強度中的其中一者;一I/Q不平衡估計器,電連接該信號強度獲取電路,用以使用一差值估計選擇性地估計該第一至第四校準信號強度中的其中一者。藉此,藉由估計和補償I和Q通道的增益不平衡和相位不平衡,可不需使用類比至數位轉換器,以達到降低成本和功耗的目的。 An I/Q imbalance calibration apparatus includes: a calibration signal generator for selectively generating a first in-phase calibration signal, a first quadrature calibration signal or the first in-phase calibration signal and the first Both of the orthogonal calibration signals; an I/Q imbalance calibrator electrically coupled to the calibration signal generator for receiving the first in-phase calibration signal and the after receiving an I/Q gain imbalance value The first orthogonal calibration signal performs an I/Q gain imbalance compensation; a signal strength acquisition circuit electrically connects the front end circuit of the transmitter system for selectively acquiring and outputting a first to fourth calibration signal strength One of the I/Q imbalance estimators electrically coupled to the signal strength acquisition circuit for selectively estimating one of the first to fourth calibration signal strengths using a difference estimate. Thereby, by estimating and compensating the gain imbalance and phase imbalance of the I and Q channels, it is not necessary to use an analog to digital converter to achieve the purpose of reducing cost and power consumption.

Description

一種I/Q不平衡校準裝置 I/Q imbalance calibration device

本發明係關於一種不平衡校準裝置,特別是關於一種用於在一I/Q不平衡校準模式運行下的一發射機系統中的I/Q不平衡校準裝置。 This invention relates to an unbalanced calibration apparatus, and more particularly to an I/Q imbalance calibration apparatus for use in a transmitter system operating in an I/Q imbalance calibration mode.

在發射機系統中,基頻信號經過數為類比轉換、低通濾波、本地振盪(LO)信號混合、同相和正交信號組合、帶通濾波和中頻(IF)信號混頻處理後,會產生射頻(RF)信號,上述處理可以由多個電路來實現,然而,分別由同相和正交通道(I和Q通道)的電路所處理的同相和正交基頻信號會因半導體製程變化,而可能有偏移。前述偏移又稱為I/Q不平衡,得將偏移進行校准或校正以處理I/Q不平衡(包括I/Q增益和相位不平衡)。 In the transmitter system, the baseband signal is subjected to analog conversion, low-pass filtering, local oscillation (LO) signal mixing, in-phase and quadrature signal combination, band-pass filtering, and intermediate frequency (IF) signal mixing. Generating a radio frequency (RF) signal, the above processing can be implemented by multiple circuits, however, the in-phase and quadrature fundamental signals processed by the circuits of the in-phase and quadrature channels (I and Q channels), respectively, vary due to the semiconductor process. There may be an offset. The aforementioned offset, also known as I/Q imbalance, has to be calibrated or corrected to handle I/Q imbalances (including I/Q gain and phase imbalance).

習知技術中,類比數位轉換器(ADC)可用於採樣處理後的射頻信號以校準I/Q不平衡,但ADC的採樣率應大於RF信號的信號帶寬,然而,對於採用毫米波通信頻段的發射機系統來說,信號帶寬是超大的,例如幾千兆赫(GHz),因此ADC應該具有幾個千兆比特每秒的採樣速率(Gb/s),設計超高採樣率的類比數位轉換器是一個挑戰,即使是超高 采樣率的類比數位轉換器也可以設計得很好,超高採樣率所帶來的巨大功耗也會影響發射機系統的散熱。 In the prior art, an analog digital converter (ADC) can be used to sample the processed RF signal to calibrate the I/Q imbalance, but the sampling rate of the ADC should be greater than the signal bandwidth of the RF signal, however, for the millimeter wave communication band. For transmitter systems, the signal bandwidth is very large, such as a few gigahertz (GHz), so the ADC should have a sampling rate (Gb/s) of several gigabits per second, and an analog digital converter with an ultra-high sampling rate. Is a challenge, even if it is super high The analog-to-digital converter with sampling rate can also be designed very well, and the huge power consumption caused by the ultra-high sampling rate will also affect the heat dissipation of the transmitter system.

因此目前業界極需發展出一種可用於在一I/Q不平衡校準模式運行下的一發射機系統中,能不需要高速類比至數位轉換器即可完成同向與正交不平衡量估算(與校正),如此一來,方能同時兼具降低功率消耗與發射機熱量產出,以達到降低發射機成本和功耗之目的。 Therefore, there is a great need in the industry to develop a transmitter system that can be used in an I/Q unbalanced calibration mode to perform the estimation of the same direction and orthogonal unbalance without the need of a high speed analog to digital converter. Correction), in order to reduce power consumption and transmitter heat output at the same time, in order to reduce transmitter cost and power consumption.

鑒於上述習知技術之缺點,本發明之主要目的在於提供一種I/Q不平衡校準裝置,整合一校準信號產生器、一I/Q不平衡校準器、一信號強度獲取電路及一I/Q不平衡估計器等,以製備出低功率消耗與低熱量產出之發射機。 In view of the above disadvantages of the prior art, the main object of the present invention is to provide an I/Q imbalance calibration apparatus, which integrates a calibration signal generator, an I/Q imbalance calibrator, a signal strength acquisition circuit and an I/Q. Unbalance estimators, etc., to produce transmitters with low power consumption and low heat output.

為了達到上述目的,根據本發明所提出之一方案,提供一種I/Q不平衡校準裝置,用於在一I/Q不平衡校準模式運行下的一發射機系統中,包括:一校準信號產生器,用於選擇性地產生一第一同相校準信號、一第一正交校準信號或者該第一同相校準信號和該第一正交校準信號的兩者;一I/Q不平衡校準器,電連接該校準信號產生器,用於在收到一I/Q增益不平衡值後,對該第一同相校準信號和該第一正交校準信號進行一I/Q增益不平衡補償,以產生一第二同相校準信號和一第二正交校準信號,並且選擇性地將該第一同相校準信號、該第一正交校準信號、該第二同相校準信號或該第二 同相校準信號和該第二正交校準信號的兩者輸出到該發射機系統的一前端電路;一信號強度獲取電路,電連接該發射機系統的該前端電路,用於選擇性地獲取並輸出一第一至第四校準信號強度中的其中一者,其中該第一至第四校準信號強度對應於一第一到第四校準信號,該第一至第四校準信號為該前端電路分別處理該第一同相校準信號、該第一正交校準信號、該第二同相校準信號以及該第二同相校準信號和該第二正交校準信號的兩者後產生的多個處理信號;一I/Q不平衡估計器,電連接該信號強度獲取電路,用以使用一差值估計選擇性地估計該第一至第四校準信號強度中的其中一者,根據一第一校準信號估計強度和一第二校準信號估計強度計算該I/Q增益不平衡值,以及根據一第三校準信號估計強度和一第四校準信號估計強度計算一I/Q相位不平衡值。 In order to achieve the above object, according to one aspect of the present invention, an I/Q imbalance calibration apparatus is provided for use in a transmitter system operating in an I/Q imbalance calibration mode, including: a calibration signal generation For selectively generating a first in-phase calibration signal, a first quadrature calibration signal, or both of the first in-phase calibration signal and the first quadrature calibration signal; an I/Q imbalance calibration And electrically connecting the calibration signal generator, for performing an I/Q gain imbalance compensation on the first in-phase calibration signal and the first quadrature calibration signal after receiving an I/Q gain imbalance value a second in-phase calibration signal and a second quadrature calibration signal, and selectively the first in-phase calibration signal, the first quadrature calibration signal, the second in-phase calibration signal, or the second Both the in-phase calibration signal and the second orthogonal calibration signal are output to a front end circuit of the transmitter system; a signal strength acquisition circuit electrically connecting the front end circuit of the transmitter system for selectively acquiring and outputting One of the first to fourth calibration signal strengths, wherein the first to fourth calibration signal strengths correspond to a first to fourth calibration signals, the first to fourth calibration signals being separately processed by the front end circuit a plurality of processing signals generated by the first in-phase calibration signal, the first quadrature calibration signal, the second in-phase calibration signal, and the second in-phase calibration signal and the second orthogonal calibration signal; a /Q imbalance estimator electrically coupled to the signal strength acquisition circuit for selectively estimating one of the first to fourth calibration signal strengths using a difference estimate, estimating an intensity sum based on a first calibration signal A second calibration signal estimate strength calculates the I/Q gain imbalance value, and an I/Q phase imbalance value is calculated based on a third calibration signal estimate strength and a fourth calibration signal estimate strength.

上述中在執行I/Q增益不平衡值的計算之後,進行執行I/Q相位不平衡值的計算;在執行I/Q增益不平衡值的計算之後,I/Q增益不平衡值被傳送到I/Q不平衡校準器以設置I/Q增益不平衡補償值;以及在執行I/Q相位不平衡值的計算之後,I/Q相位不平衡值被傳送到I/Q不平衡校準器以設置I/Q相位不平衡補償值。 In the above, after performing the calculation of the I/Q gain imbalance value, the calculation of the I/Q phase imbalance value is performed; after the calculation of the I/Q gain imbalance value is performed, the I/Q gain imbalance value is transmitted to The I/Q imbalance calibrator sets the I/Q gain imbalance compensation value; and after performing the calculation of the I/Q phase imbalance value, the I/Q phase imbalance value is transmitted to the I/Q imbalance calibrator to Set the I/Q phase imbalance compensation value.

本發明的信號強度獲取電路包括:一平方計算電路,電連接該前端電路,用以對接收的該第一至第四校準信號中的其中一者進行平方計算;以及一低通濾波器,電連接 該平方計算電路和該I/Q不平衡估計器,用於以對第一到第四校準信號的平方之其中一者進行低通濾波,以產生第一至第四校準信號強度的其中一者。 The signal strength acquisition circuit of the present invention comprises: a square calculation circuit electrically connected to the front end circuit for performing square calculation on one of the received first to fourth calibration signals; and a low pass filter, connection The square calculation circuit and the I/Q imbalance estimator are configured to low pass filter one of the squares of the first to fourth calibration signals to generate one of the first to fourth calibration signal strengths .

上述系統中,I/Q不平衡估計器包括:一差值估計器,電連接該信號強度獲取電路,用以根據一累加資料信號產生一參考信號強度,將該參考信號強度與該第一至第四校準信號強度的其中一者進行比較,該累加資料信號逐漸遞增直到該參考信號強度接近並且不小於該第一至第四校準信號強度的其中對應一者;以及一控制器,電性連接該差值估計器、該I/Q不平衡校準器及該校準信號產生器,用以依據該第一及第二校準信號估計強度計算該I/Q增益不平衡值,以及依據該該第三及第四校準信號估計強度計算該I/Q相位不平衡值。 In the above system, the I/Q imbalance estimator includes: a difference estimator electrically connected to the signal strength acquisition circuit for generating a reference signal strength according to an accumulated data signal, the reference signal strength and the first to Comparing one of the fourth calibration signal strengths, the accumulated data signal is gradually incremented until the reference signal strength is close to and not less than a corresponding one of the first to fourth calibration signal strengths; and a controller is electrically connected The difference estimator, the I/Q imbalance calibrator, and the calibration signal generator are configured to calculate the I/Q gain imbalance value according to the first and second calibration signal estimated intensities, and according to the third And the fourth calibration signal estimated strength calculates the I/Q phase imbalance value.

本發明的差值估計器包括:一數位類比轉換器,電性連接該控制器,用以接收該控制器根據一累加信號所產生的該累加資料信號,該數位類比轉換器由來自該控制器的第一時脈信號所觸發,以對該累加資料信號進行數位類比轉換,以生成該參考信號強度;一比較器,電連接該信號強度獲取電路和該數位類比轉換器,用以將該參考信號強度與該第一至第四校準信號強度的其中一者進行比較,當該參考信號強度小於該第一至第四校準信號強度的其中對應一者時,輸出一差值信號,並且當該參考信號強度不小於該第一至第 四校準信號強度的其中對應一者時,輸出零;一延時單元,以及一加法器,電連接該延遲單元和該比較器,其中該延遲單元由來自該控制器的一第二時脈信號觸發,以延遲從該加法器輸出的該累加信號,該加法器將該延遲單元的一輸出信號和該比較器的一輸出信號相加,以產生該累加信號。 The difference estimator of the present invention comprises: a digital analog converter electrically connected to the controller for receiving the accumulated data signal generated by the controller according to an accumulated signal, the digital analog converter being derived from the controller The first clock signal is triggered to perform digital analog conversion on the accumulated data signal to generate the reference signal strength; a comparator electrically connecting the signal strength obtaining circuit and the digital analog converter for using the reference The signal strength is compared with one of the first to fourth calibration signal strengths, and when the reference signal strength is less than a corresponding one of the first to fourth calibration signal strengths, a difference signal is output, and when The reference signal strength is not less than the first to the first When one of the four calibration signal strengths corresponds to one, a zero is output; a delay unit, and an adder electrically connecting the delay unit and the comparator, wherein the delay unit is triggered by a second clock signal from the controller To delay the accumulated signal output from the adder, the adder adds an output signal of the delay unit and an output signal of the comparator to generate the accumulated signal.

以上之概述與接下來的詳細說明及附圖,皆是為了能進一步說明本創作達到預定目的所採取的方式、手段及功效。而有關本創作的其他目的及優點,將在後續的說明及圖式中加以闡述。 The above summary and the following detailed description and drawings are intended to further illustrate the manner, means and effects of the present invention in achieving its intended purpose. Other purposes and advantages of this creation will be explained in the following description and drawings.

1‧‧‧發射機系 1‧‧‧Transmitter

111‧‧‧校準信號產生器 111‧‧‧Calibration signal generator

12‧‧‧I/Q不平衡校準器 12‧‧‧I/Q imbalance calibrator

13‧‧‧前端電路 13‧‧‧ front-end circuit

14‧‧‧信號強度獲取電路 14‧‧‧Signal strength acquisition circuit

15‧‧‧I/Q不平衡估計器 15‧‧‧I/Q imbalance estimator

151‧‧‧Delta估計器 151‧‧‧Delta estimator

S301-S316‧‧‧步驟 S301-S316‧‧‧Steps

I-DAC‧‧‧同相通道數位至類比轉換器 I-DAC‧‧‧Non-phase channel digital to analog converter

Q-DAC‧‧‧正交通道數位至類比轉換器 Q-DAC‧‧‧Orthogonal Channel Digital to Analog Converter

I-LPF‧‧‧同相通道低通濾波器 I-LPF‧‧‧Non-phase channel low-pass filter

Q-LPF‧‧‧正交通道數低通濾波器 Q-LPF‧‧‧Orthogonal channel number low pass filter

I-MIX‧‧‧同相混頻器 I-MIX‧‧‧In-phase mixer

Q-MIX‧‧‧正交混頻器 Q-MIX‧‧‧Orthogonal Mixer

IQ-PLL‧‧‧同相與正交鎖相迴路 IQ-PLL‧‧‧phase and quadrature phase-locked loop

COMB‧‧‧合併器 COMB‧‧‧Combiner

IF-BPF‧‧‧中頻帶通濾波器 IF-BPF‧‧‧ medium-frequency pass filter

SQ‧‧‧平方器 SQ‧‧‧ squarer

SQ-LPF‧‧‧接受平方器輸出之低通濾波器 SQ-LPF‧‧‧ low-pass filter accepting squarer output

IF-PLL‧‧‧中頻鎖相迴路 IF-PLL‧‧‧ medium frequency phase-locked loop

IF-MIX‧‧‧中頻混頻器 IF-MIX‧‧‧Intermediate frequency mixer

COMP‧‧‧比較器 COMP‧‧‧ comparator

ACC-ADD‧‧‧累加加法器 ACC-ADD‧‧‧Addition Adder

ACC-REG‧‧‧累加暫存器 ACC-REG‧‧‧Accumulate register

CTRL‧‧‧控制器 CTRL‧‧‧ controller

DAC-1‧‧‧接受控制器輸出之數位至類比轉換器 DAC-1‧‧‧ accepts controller output digital to analog converter

第一圖係為本發明一種I/Q不平衡校準裝置的發射機示意圖;第二圖係為本發明一種I/Q不平衡量估算程序流程圖。 The first figure is a schematic diagram of a transmitter of an I/Q imbalance calibration device of the present invention; the second figure is a flow chart of an I/Q imbalance estimation procedure of the present invention.

以下係藉由特定的具體實例說明本創作之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地了解本創作之優點及功效。 The embodiments of the present invention are described by way of specific examples, and those skilled in the art can readily understand the advantages and effects of the present invention from the disclosure of the present disclosure.

本發明提供一種I/Q不平衡校準裝置,用於在I/Q不平衡校準模式運行下的發射機系統中,其能夠估計和補償I和Q通道的增益不平衡和相位不平衡(即,I/Q增益和相位 失衡),而不使用超高採樣率ADC,從而可以降低成本和功耗。另外,前述I/Q不平衡校準裝置可應用於毫米波通信頻帶的發射機系統,諸如第五代移動通信系統。 The present invention provides an I/Q imbalance calibration apparatus for estimating and compensating for gain imbalance and phase imbalance of I and Q channels in a transmitter system operating in an I/Q imbalance calibration mode (ie, I/Q gain and phase Unbalanced) without the use of ultra-high sample rate ADCs, which can reduce cost and power consumption. In addition, the aforementioned I/Q imbalance calibration apparatus can be applied to a transmitter system of a millimeter wave communication band, such as a fifth generation mobile communication system.

請參閱第一圖,為本發明一種包含有I/Q不平衡校準裝置的發射機示意圖。如圖所示,本發明所提供一種I/Q不平衡校準裝置用於在I/Q不平衡校準模式運行下的發射機系統1中,且包括校準信號產生器111、I/Q不平衡校準器12、信號強度獲取電路14與I/Q不平衡估計器15,其中校準信號產生器111電性連接I/Q不平衡校準器12,I/Q不平衡校準器12電性連接發射機系統1的前端電路13,信號強度獲取電路14電性連接前端電路13與I/Q不平衡估計器15,I/Q不平衡估計器15電性連接校準信號產生器111與I/Q不平衡校準器12。 Please refer to the first figure, which is a schematic diagram of a transmitter including an I/Q imbalance calibration device according to the present invention. As shown, the present invention provides an I/Q imbalance calibration apparatus for use in a transmitter system 1 operating in an I/Q imbalance calibration mode, and includes a calibration signal generator 111, an I/Q imbalance calibration. 12, the signal strength acquisition circuit 14 and the I/Q imbalance estimator 15, wherein the calibration signal generator 111 is electrically connected to the I/Q imbalance calibrator 12, and the I/Q imbalance calibrator 12 is electrically connected to the transmitter system The front end circuit 13 of the first, the signal strength acquisition circuit 14 is electrically connected to the front end circuit 13 and the I/Q imbalance estimator 15, and the I/Q imbalance estimator 15 is electrically connected to the calibration signal generator 111 and the I/Q imbalance calibration. 12

實施流程 Implementation process

請參閱第二圖,為本發明一種I/Q不平衡量估算程序流程圖。如圖所示,本實施例首先在步驟S301中,校準信號產生器111產生第一同相校準信號(I(n)=A*cos(w*n),Q(n)=0)給I/Q不平衡校準器12;然後,I/Q不平衡校準器12轉傳第一同相校準信號給前端電路13;接著,前端電路13處理第一同相校準信號以產生第一校準信號;之後,信號強度獲取電路14獲取第一校準信號強度,並將第一校準信號強度傳送給I/Q不平衡估計器15。 Please refer to the second figure, which is a flow chart of an I/Q imbalance estimation procedure according to the present invention. As shown in the figure, in the first embodiment, in step S301, the calibration signal generator 111 generates a first in-phase calibration signal (I(n)=A*cos(w*n), Q(n)=0) to I. /Q imbalance calibrator 12; then, the I/Q imbalance calibrator 12 relays the first in-phase calibration signal to the front end circuit 13; then, the front end circuit 13 processes the first in-phase calibration signal to generate a first calibration signal; Thereafter, the signal strength acquisition circuit 14 acquires the first calibration signal strength and transmits the first calibration signal strength to the I/Q imbalance estimator 15.

接著在步驟S302中,I/Q不平衡估計器15使用差值估計對第一校準信號強度,進一步地,I/Q不平衡估計器15係逐漸提升累加資料信號DAC-DATA(n),直到累加信號ACC(n)接近又不小於第一校準信號估計強度。 Next, in step S302, the I/Q imbalance estimator 15 uses the difference estimate to compare the first calibration signal strength. Further, the I/Q imbalance estimator 15 gradually increases the accumulated data signal DAC-DATA(n) until The accumulated signal ACC(n) is close to not less than the estimated strength of the first calibration signal.

在步驟S303中,I/Q不平衡估計器15獲取相應於第一校準信號估計強度的累加資料信號DAC-DATA(n),M0=DAC-DATA(n)。 In step S303, I / Q imbalance estimator 15 obtains the estimated intensity corresponding to the first calibration signal accumulated data signal DAC-DATA (n), M 0 = DAC-DATA (n).

在步驟S304中,校準信號產生器111產生第一正交校準信號(Q(n)=A*cos(w*n),I(n)=0)給I/Q不平衡校準器12;然後,I/Q不平衡校準器12轉傳第一正交校準信號給前端電路13;接著,前端電路13處理第一正交校準信號以產生第二校準信號;之後,信號強度獲取電路14獲取第二校準信號強度,並將第二校準信號強度傳送給I/Q不平衡估計器15。 In step S304, the calibration signal generator 111 generates a first orthogonal calibration signal (Q(n)=A*cos(w*n), I(n)=0) to the I/Q imbalance calibrator 12; The I/Q imbalance calibrator 12 relays the first orthogonal calibration signal to the front end circuit 13; then, the front end circuit 13 processes the first orthogonal calibration signal to generate a second calibration signal; thereafter, the signal strength acquisition circuit 14 acquires The signal strength is calibrated and the second calibration signal strength is transmitted to the I/Q imbalance estimator 15.

在步驟S305中,I/Q不平衡估計器15使用差值估計對第二校準信號強度,進一步地,I/Q不平衡估計器15係逐漸提升累加資料信號DAC-DATA(n),直到累加信號ACC(n)接近又不小於第二校準信號估計強度。在步驟S306中,I/Q不平衡估計器15獲取相應於第二校準信號估計強度的累加資料信號DAC-DATA(n),M1=DAC-DATA(n)。 In step S305, the I/Q imbalance estimator 15 uses the difference estimate to compare the second calibration signal strength. Further, the I/Q imbalance estimator 15 gradually increases the accumulated data signal DAC-DATA(n) until accumulated. The signal ACC(n) is close to not less than the estimated strength of the second calibration signal. In step S306, I / Q imbalance estimator 15 obtains the estimated intensity corresponding to the second calibration signal accumulated data signal DAC-DATA (n), M 1 = DAC-DATA (n).

然後,在步驟S307中,I/Q不平衡估計器15根據第一與第二校準信號估計強度計算出I/Q增益不平衡值△G,△G=SQRT(M1/M0)-1,SQRT為平方根函數;之後,在步驟S308中, I/Q增益不平衡值△G被傳送給I/Q不平衡校準器12,以讓I/Q不平衡校準器12之後可以對收到的信號進行I/Q增益不平衡的校正。 Then, in step S307, the I/Q imbalance estimator 15 calculates an I/Q gain imbalance value ΔG, ΔG = SQRT(M 1 /M 0 )-1 based on the first and second calibration signal estimated intensities. SQRT is a square root function; thereafter, in step S308, the I/Q gain imbalance value ΔG is transmitted to the I/Q imbalance calibrator 12 so that the I/Q imbalance calibrator 12 can be received afterwards The signal is corrected for I/Q gain imbalance.

在步驟S309中,校準信號產生器111產生第一同相校準信號(I(n)=A*cos(w*n),Q(n)=0)給I/Q不平衡校準器12;然後,I/Q不平衡校準器12對第一同相校準信號進行I/Q增益不平衡的校正,以產生第二同相校準信號給前端電路13;接著,前端電路13處理第二同相校準信號以產生第三校準信號;之後,信號強度獲取電路14獲取第三校準信號強度,並將第三校準信號強度傳送給I/Q不平衡估計器15。 In step S309, the calibration signal generator 111 generates a first in-phase calibration signal (I(n)=A*cos(w*n), Q(n)=0) to the I/Q imbalance calibrator 12; The I/Q imbalance calibrator 12 performs I/Q gain imbalance correction on the first in-phase calibration signal to generate a second in-phase calibration signal to the front end circuit 13; then, the front end circuit 13 processes the second in-phase calibration signal to A third calibration signal is generated; thereafter, the signal strength acquisition circuit 14 acquires the third calibration signal strength and transmits the third calibration signal strength to the I/Q imbalance estimator 15.

在步驟S310中,I/Q不平衡估計器15使用差值估計對第三校準信號強度,進一步地,I/Q不平衡估計器15係逐漸提升累加資料信號DAC-DATA(n),直到累加信號ACC(n)接近又不小於第三校準信號估計強度。 In step S310, the I/Q imbalance estimator 15 uses the difference estimate to compare the third calibration signal strength. Further, the I/Q imbalance estimator 15 gradually increases the accumulated data signal DAC-DATA(n) until accumulation. The signal ACC(n) is close to not less than the estimated strength of the third calibration signal.

在步驟S311中,I/Q不平衡估計器15獲取相應於第三校準信號估計強度的累加資料信號DAC-DATA(n),K0=DAC-DATA(n)。 In step S311, I / Q imbalance estimator 15 to obtain the corresponding estimated intensity of the calibration signal of the third data signal accumulated DAC-DATA (n), K 0 = DAC-DATA (n).

在步驟S312中,校準信號產生器111產生第一同相與正交校準信號(I(n)=A*cos(w*n),Q(n)=A*cos(w*n))給I/Q不平衡校準器12;然後,I/Q不平衡校準器12對第一同相與正交校準信號進行I/Q增益不平衡的校正,以產生第二同相與正交校準信號給前端電路13;接著,前端電路13處理第二同相與正 交校準信號以產生第四校準信號;之後,信號強度獲取電路14獲取第四校準信號強度,並將第四校準信號強度傳送給I/Q不平衡估計器15。 In step S312, the calibration signal generator 111 generates a first in-phase and quadrature calibration signal (I(n)=A*cos(w*n), Q(n)=A*cos(w*n)). I/Q imbalance calibrator 12; then, I/Q imbalance calibrator 12 performs I/Q gain imbalance correction on the first in-phase and quadrature calibration signals to generate second in-phase and quadrature calibration signals Front end circuit 13; then, front end circuit 13 processes second in-phase and positive The calibration signal is passed to generate a fourth calibration signal; thereafter, the signal strength acquisition circuit 14 acquires the fourth calibration signal strength and transmits the fourth calibration signal strength to the I/Q imbalance estimator 15.

在步驟S313中,I/Q不平衡估計器15使用差值估計對第四校準信號強度,進一步地,I/Q不平衡估計器15係逐漸提升累加資料信號DAC-DATA(n),直到累加信號ACC(n)接近又不小於第四校準信號估計強度。 In step S313, the I/Q imbalance estimator 15 uses the difference estimate to compare the fourth calibration signal strength. Further, the I/Q imbalance estimator 15 gradually increases the accumulated data signal DAC-DATA(n) until accumulation. The signal ACC(n) is close to not less than the estimated strength of the fourth calibration signal.

在步驟S314中,I/Q不平衡估計器15獲取相應於第四校準信號估計強度的累加資料信號DAC-DATA(n),K1=DAC-DATA(n)。 In step S314, I / Q imbalance estimator 15 to obtain the corresponding estimated intensity fourth calibration signal accumulated data signal DAC-DATA (n), K 1 = DAC-DATA (n).

在步驟S315中,I/Q不平衡估計器15根據第一與第二校準信號估計強度計算出I/Q相位不平衡值△θ,△θ=sin-1{[1-(K1/2K0)]}。 In step S315, the I/Q imbalance estimator 15 calculates an I/Q phase imbalance value Δθ, Δθ = sin -1 {[1-(K 1 /2K) based on the first and second calibration signal estimated intensities. 0 )]}.

在步驟S316中,I/Q相位不平衡值△θ被傳送給I/Q不平衡校準器12,以讓I/Q不平衡校準器12之後可以對收到的信號進行I/Q相位不平衡的校正。 In step S316, the I/Q phase imbalance value Δθ is transmitted to the I/Q imbalance calibrator 12 to allow the I/Q imbalance calibrator 12 to perform an I/Q phase imbalance on the received signal. Correction.

上述之實施例僅為例示性說明本創作之特點及功效,非用以限制本創作之實質技術內容的範圍。任何熟悉此技藝之人士均可在不違背創作之精神及範疇下,對上述實施例進行修飾與變化。因此,本創作之權利保護範圍,應如後述之申請專利範圍所列。 The above-described embodiments are merely illustrative of the features and functions of the present invention and are not intended to limit the scope of the technical content of the present invention. Any person skilled in the art can modify and change the above embodiments without departing from the spirit and scope of the creation. Therefore, the scope of protection of this creation should be as listed in the scope of the patent application described later.

Claims (6)

一種I/Q不平衡校準裝置,用於在一I/Q不平衡校準模式運行下的一發射機系統中,包括:一校準信號產生器,用於選擇性地產生一第一同相校準信號、一第一正交校準信號或者該第一同相校準信號和該第一正交校準信號的兩者;一I/Q不平衡校準器,電連接該校準信號產生器,用於在收到一I/Q增益不平衡值後,對該第一同相校準信號和該第一正交校準信號進行一I/Q增益不平衡補償,以產生一第二同相校準信號和一第二正交校準信號,並且選擇性地將該第一同相校準信號、該第一正交校準信號、該第二同相校準信號或該第二同相校準信號和該第二正交校準信號的兩者輸出到該發射機系統的一前端電路;一信號強度獲取電路,電連接該發射機系統的該前端電路,用於選擇性地獲取並輸出一第一至第四校準信號強度中的其中一者,其中該第一至第四校準信號強度對應於一第一到第四校準信號,該第一至第四校準信號為該前端電路分別處理該第一同相校準信號、該第一正交校準信號、該第二同相校準信號以及該第二同相校準信號和該第二正交校準信號的兩者後產生的多個處理信號;一I/Q不平衡估計器,電連接該信號強度獲取電路,用以使 用一差值估計選擇性地估計該第一至第四校準信號強度中的其中一者,根據一第一校準信號估計強度和一第二校準信號估計強度計算該I/Q增益不平衡值,以及根據一第三校準信號估計強度和一第四校準信號估計強度計算一I/Q相位不平衡值;以及該I/Q不平衡估計器又包含一差值估計器,該差值估計器電連接該信號強度獲取電路,用以根據一累加資料信號產生一參考信號強度,將該參考信號強度與該第一至第四校準信號強度的其中一者進行比較,該累加資料信號逐漸遞增直到該參考信號強度接近並且不小於該第一至第四校準信號強度的其中對應一者。 An I/Q imbalance calibration apparatus for use in a transmitter system operating in an I/Q imbalance calibration mode, comprising: a calibration signal generator for selectively generating a first in-phase calibration signal a first orthogonal calibration signal or both of the first in-phase calibration signal and the first orthogonal calibration signal; an I/Q imbalance calibrator electrically coupled to the calibration signal generator for receipt After an I/Q gain imbalance value, an I/Q gain imbalance compensation is performed on the first in-phase calibration signal and the first quadrature calibration signal to generate a second in-phase calibration signal and a second orthogonal Calibrating the signal and selectively outputting the first in-phase calibration signal, the first quadrature calibration signal, the second in-phase calibration signal, or both the second in-phase calibration signal and the second quadrature calibration signal to a front end circuit of the transmitter system; a signal strength acquisition circuit electrically connected to the front end circuit of the transmitter system for selectively acquiring and outputting one of the first to fourth calibration signal strengths, wherein The first to fourth calibration signals Corresponding to a first to fourth calibration signals, the first to fourth calibration signals are respectively processed by the front end circuit, the first in-phase calibration signal, the first orthogonal calibration signal, the second in-phase calibration signal, and the a plurality of processed signals generated by both the second in-phase calibration signal and the second orthogonal calibration signal; an I/Q imbalance estimator electrically connected to the signal strength acquisition circuit for enabling Selecting one of the first to fourth calibration signal strengths selectively by using a difference estimate, and calculating the I/Q gain imbalance value according to a first calibration signal estimated intensity and a second calibration signal estimated intensity, And calculating an I/Q phase imbalance value according to a third calibration signal estimated intensity and a fourth calibration signal estimated intensity; and the I/Q imbalance estimator further includes a difference estimator, the difference estimator Connecting the signal strength obtaining circuit to generate a reference signal strength according to an accumulated data signal, comparing the reference signal strength with one of the first to fourth calibration signal strengths, and the accumulated data signal is gradually incremented until the The reference signal strength is close to and not less than a corresponding one of the first to fourth calibration signal strengths. 如申請專利範圍第1項所述之I/Q不平衡校準裝置,其中,在執行該I/Q增益不平衡值的計算之後,執行該I/Q相位不平衡值的計算;在執行該I/Q增益不平衡值的計算之後,該I/Q增益不平衡值被傳送到該I/Q不平衡校準器以設置I/Q增益不平衡補償值;以及在執行該I/Q相位不平衡值的計算之後,該I/Q相位不平衡值被傳送到該I/Q不平衡校準器以設置I/Q相位不平衡補償值。 The I/Q imbalance calibration apparatus according to claim 1, wherein the calculation of the I/Q phase imbalance value is performed after the calculation of the I/Q gain imbalance value is performed; After the calculation of the /Q gain imbalance value, the I/Q gain imbalance value is transmitted to the I/Q imbalance calibrator to set the I/Q gain imbalance compensation value; and the I/Q phase imbalance is performed After the value is calculated, the I/Q phase imbalance value is passed to the I/Q imbalance calibrator to set the I/Q phase imbalance compensation value. 如申請專利範圍第1項所述之I/Q不平衡校準裝置,其中,該信號強度獲取電路包括:一平方計算電路,電連接該前端電路,用以對接收的該第一至第四校準信號中的其中一者進行平方計算;以及一低通濾波器,電連接該平方計算 電路和該I/Q不平衡估計器,用於以對該第一到第四校準信號的平方之其中一者進行低通濾波,以產生該第一至第四校準信號強度的其中一者。 The I/Q imbalance calibration device of claim 1, wherein the signal strength acquisition circuit comprises: a square calculation circuit electrically connected to the front end circuit for receiving the first to fourth calibrations One of the signals is squared; and a low pass filter is electrically connected to the squared calculation And an I/Q imbalance estimator for low pass filtering the one of the squares of the first to fourth calibration signals to generate one of the first to fourth calibration signal strengths. 如申請專利範圍第1項所述之I/Q不平衡校準裝置,其中,該I/Q不平衡估計器包括:一控制器,電性連接該差值估計器、該I/Q不平衡校準器及該校準信號產生器,用以依據該第一及第二校準信號估計強度計算該I/Q增益不平衡值,以及依據該第三及第四校準信號估計強度計算該I/Q相位不平衡值。 The I/Q imbalance calibration device of claim 1, wherein the I/Q imbalance estimator comprises: a controller electrically connected to the difference estimator, the I/Q imbalance calibration And the calibration signal generator, configured to calculate the I/Q gain imbalance value according to the first and second calibration signal estimated intensities, and calculate the I/Q phase according to the third and fourth calibration signal estimated intensities Balance value. 如申請專利範圍第4項所述之I/Q不平衡校準裝置,其中,該差值估計器包括:一數位類比轉換器,電性連接該控制器,用以接收該控制器根據一累加信號所產生的該累加資料信號,該數位類比轉換器由來自該控制器的第一時脈信號所觸發,以對該累加資料信號進行數位類比轉換,以生成該參考信號強度;一比較器,電連接該信號強度獲取電路和該數位類比轉換器,用以將該參考信號強度與該第一至第四校準信號強度的其中一者進行比較,當該參考信號強度小於該第一至第四校準信號強度的其中對應一者時,輸出一差值信號,並且當該參考信號強度不小於該第一至第四校準信號強度的其中對應一者時,輸出零;一延時單元;以及 一加法器,電連接該延遲單元和該比較器,其中該延遲單元由來自該控制器的一第二時脈信號觸發,以延遲從該加法器輸出的該累加信號,該加法器將該延遲單元的一輸出信號和該比較器的一輸出信號相加,以產生該累加信號。 The I/Q imbalance calibration apparatus of claim 4, wherein the difference estimator comprises: a digital analog converter electrically connected to the controller for receiving the controller according to an accumulated signal Generating the accumulated data signal, the digital analog converter is triggered by a first clock signal from the controller to perform digital analog conversion on the accumulated data signal to generate the reference signal strength; a comparator, Connecting the signal strength acquisition circuit and the digital analog converter to compare the reference signal strength with one of the first to fourth calibration signal strengths, wherein the reference signal strength is less than the first to fourth calibrations Outputting a difference signal when one of the signal strengths corresponds to one, and outputting zero when the reference signal strength is not less than a corresponding one of the first to fourth calibration signal strengths; a delay unit; An adder electrically connecting the delay unit and the comparator, wherein the delay unit is triggered by a second clock signal from the controller to delay the accumulated signal output from the adder, the adder delaying the delay An output signal of the unit is summed with an output signal of the comparator to generate the accumulated signal. 如申請專利範圍第1項所述之I/Q不平衡校準裝置,其中,對應於該第一校準信號估計強度的一累加數據信號被表示為M0,對應於該第二校準信號估計強度的該累加數據信號被表示為M1,該I/Q增益不平衡值被表示為△G,並且△G=SQRT(M1/M0)-1;其中該第三校準信號估計強度的該累加數據信號被表示為K0,對應於該第四校準信號估計強度的該累加數據信號被表示為K1,該I/Q相位不平衡值被表示為△θ,並且△θ=sin-1{[1-(K1/2K0)]}。 The I/Q imbalance calibration apparatus of claim 1, wherein an accumulated data signal corresponding to the estimated strength of the first calibration signal is represented as M 0 , and the estimated intensity is corresponding to the second calibration signal. The accumulated data signal is represented as M 1 , the I/Q gain imbalance value is represented as ΔG, and ΔG=SQRT(M 1 /M 0 )-1; wherein the third calibration signal estimates the accumulation of the intensity The data signal is represented as K 0 , the accumulated data signal corresponding to the estimated strength of the fourth calibration signal is represented as K 1 , the I/Q phase imbalance value is expressed as Δθ, and Δθ=sin -1 { [1-(K 1 /2K 0 )]}.
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US20040224715A1 (en) * 2003-05-07 2004-11-11 Rosenlof John R. System and method for correcting transmitter impairments
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