TWI654602B - Storage device and operating method thereof - Google Patents

Abstract

The invention discloses a storage device comprising a first connector, a second connector and a memory circuit. The first connector is selectively coupled to a first electronic device, and the second connector is selectively coupled to a second electronic device. The memory circuit is connected between the first connector and the second connector. When the first connector is connected to the first electronic device and the second connector is connected to the second electronic device, the second connector is switched from a device mode to a charging mode, so that the first electronic device The device charges the second electronic device through the storage device, the second electronic device does not supply power to the storage device via the second connector, and the first electronic device stores the memory circuit via the first connector Take the information.

Description

 Storage device and method of operating same  

The present invention relates to a storage device, and more particularly to a storage device having two connectors.

Flash memory devices (such as flash flash drives) are very popular electronic products today, and are widely used in various fields due to their small size, light weight, and the ability to store large amounts of data. A flash memory device generally uses a Universal Serial Bus Connector, which can be plugged into a USB universal serial bus connection port of another electronic device (such as a desktop computer, a notebook computer, or a tablet computer). USB port), so that the electronic device can read or write data to the flash memory device.

However, the design of a notebook or tablet is becoming more and more simple, so that a notebook or tablet may have only one universal serial bus connection, so when the user connects the flash memory device to a unique universal sequence. When the bus is connected to access data, it is no longer possible to connect the notebook or tablet to other electronic devices (such as smart phones) to charge the smart phone.

In view of this, a flash memory device capable of simultaneously transmitting data and charging another electronic device is a subject worthy of study today.

In view of this, the present invention proposes a storage device to solve the above problems.

The invention discloses a storage device comprising a first connector, a second connector, a switching circuit, a controller circuit and a memory circuit. The switching circuit is electrically connected between the first connector and the second connector, and the switching circuit comprises a power switching circuit, a control switching circuit and a data switching circuit. The controller circuit is disposed between the first connector and the second connector. The memory circuit is disposed between the first connector and the second connector. Wherein, when the first connector is connected to a first electronic device and the second connector is connected to a second electronic device, the first connector receives a supply voltage from the first electronic device. The data switching circuit switches from a second device state to a first device state according to the supply voltage, so that the first electronic device stores the memory circuit via the first connector, the data switching circuit, and the controller circuit. Take the information. The control switching circuit switches from a second control state to a first control state according to the supply voltage, so that the second connector is switched from a device mode to a charging mode. The power switching circuit switches from an off state to an on state according to the supply voltage, so that the supply voltage charges the second electronic device via the second connector.

The invention further discloses a storage device comprising a first connector, a second connector and a memory circuit. The first connector is selectively coupled to a first electronic device, and the second connector is selectively coupled to a second electronic device. The memory circuit is connected between the first connector and the second connector. When the first connector is connected to the first electronic device and the second connector is connected to the second electronic device, the second connector is switched from a device mode to a charging mode, so that the first electronic device The device charges the second electronic device through the storage device, the second electronic device does not supply power to the storage device via the second connector, and the first electronic device stores the memory circuit via the first connector Take the information.

The present invention further discloses a method of operating a storage device. The storage device includes a first connector, a second connector, and a memory circuit. The first connector is selectively connected to a first electronic device. The second connector is selectively connected to a second electronic device, and the method includes: when the first connector is connected to the first electronic device and the second connector is connected to the second electronic device, The storage device draws a voltage from one of the first electronic devices by the first connector; the second connector switches from a device mode to a charging mode according to the supply voltage; the storage device is configured by the second connector Providing the supply voltage to the second electronic device, wherein the second electronic device does not supply power to the storage device via the second connector; and the memory circuit transmits data to the first electronic device via the first connector .

The present invention provides a storage device including a first connector and a second connector, when the first connector is connected to the first electronic device (for example, a tablet) and the second connector is connected to the second electronic device (for example, smart type) The mobile phone switching circuit automatically switches to the on state according to the supply voltage provided by the first electronic device, and controls the switching circuit to switch to the first control state, so that the second connector is switched from the device mode to the charging mode. Therefore, the supply voltage provided by the first electronic device can charge the second electronic device through the storage device, and the first electronic device can also access the data to the storage device at the same time. During use, the user does not need to manually switch the storage device, and the foregoing operation process can be completed by connecting the storage device to the first electronic device and the second electronic device. Therefore, in the prior art, the problem that the number of peripheral bus bars of the tablet is insufficient to simultaneously connect the flash memory device and charge the smart phone is solved.

100‧‧‧ storage device

102‧‧‧First connector

104‧‧‧Second connector

106‧‧‧Switching circuit

108‧‧‧Controller Circuit

110‧‧‧ memory circuit

112‧‧‧Power switching circuit

114, 114'‧‧‧Control switching circuit

116‧‧‧Data switching circuit

117‧‧‧Common serial bus switcher

200‧‧‧First electronic device

300‧‧‧Second electronic device

A, B‧‧‧ contacts

C‧‧‧ capacitor

ID‧‧‧Control pin

CC‧‧‧Configure channel pin

F1‧‧‧First optical coupling relay

F11‧‧‧ first end

F12‧‧‧ second end

F13‧‧‧ third end

F14‧‧‧ fourth end

F2‧‧‧Second optical coupling relay

F21‧‧‧ first end

F22‧‧‧ second end

F23‧‧‧ third end

F24‧‧‧ fourth end

M1‧‧‧first transistor

M2‧‧‧second transistor

R1‧‧‧first resistance

R2‧‧‧second resistance

R3‧‧‧ third resistor

R4‧‧‧fourth resistor

R5‧‧‧ fifth resistor

R6‧‧‧ sixth resistor

R7‧‧‧ seventh resistor

R8‧‧‧ eighth resistor

R9‧‧‧ ninth resistor

R10‧‧‧10th resistor

S1‧‧‧The first set of signal ends

S2‧‧‧Second group signal end

S3‧‧‧ third group signal end

SE‧‧‧Selection

Steps S100, S102, S104, S106, S108, S110, S112, S114, S116‧‧

1 is a schematic diagram of a storage device and an external device according to an embodiment of the present invention; FIG. 2 is a schematic diagram of a power switching circuit according to an embodiment of the present invention; and FIG. 3 is a control switching circuit according to an embodiment of the present invention; FIG. 4 is a schematic diagram of a control switching circuit according to another embodiment of the present invention; FIG. 5 is a schematic diagram of a data switching circuit according to an embodiment of the present invention; and FIG. 6A and FIG. A flow chart of a method of operation of a storage device of an embodiment.

Various embodiments of the invention are described in detail in the associated drawings. The same reference numbers are used in the drawings to refer to the same or similar elements. The examples are intended to illustrate the general principles of the invention and should not be construed in a limiting sense. Detailed descriptions of well-known functions and structures will be omitted to avoid obscuring the subject matter of the present invention.

It is to be noted that the various "one" or "one" embodiments referred to in the present invention are not necessarily the same embodiment, and reference is made to at least one. In addition, when a particular feature, structure, or characteristic is described in connection with an embodiment, it can be appreciated that the skilled artisan can incorporate such feature or structure within the scope of the art, whether or not described in detail. Or the features are linked to the remaining embodiments.

Please refer to FIG. 1. FIG. 1 is a schematic diagram of a storage device 100 and an external device according to an embodiment of the present invention. The storage device 100 can be designed to be the size of the appearance of the flash drive, so that the user can carry it conveniently. The storage device 100 can include a first connector 102, a second connector 104, a switching circuit 106, a controller circuit 108, and a memory circuit 110. The first connector 102 can be a Universal Serial Bus Type-A Connector (USB Type-A connector) or a mini universal serial bus type B connector (mini USB Type-B connector). ), a micro USB Type-B connector or a Universal Type-C USB connector. The second connector 104 can be a mini USB Type-B connector, a micro USB Type-B connector or a universal serial bus. Type C connector (USB Type-C connector). The first connector 102 is selectively connectable to an external first electronic device 200, such as a notebook computer or a tablet computer, and the second connector 104 is selectively connectable to an external second. The electronic device 300 is, for example, a smart phone or a mobile device.

The switching circuit 106 is electrically connected between the first connector 102 and the second connector 104. The switching circuit 106 can include a power switching circuit 112, a control switching circuit 114, and a data switching circuit 116. The power switching circuit 112 switches between a closed state and an open state according to the received voltage, and the control switching circuit 114 switches between a first control state and a second control state according to the received voltage. And the data switching circuit 116 switches between a first device state and a second device state according to a received voltage. The voltage may be a supply voltage Vbus provided by the first electronic device 200 via the first connector 102 when the first connector 102 is connected to the first electronic device 200.

The controller circuit 108 is disposed between the first connector 102 and the second connector 104, and the memory circuit 110 is disposed between the first connector 102 and the second connector 104. The memory circuit 110 can be a flash memory, such as a reverse flash memory (NOR Flash) or a reverse flash memory (NAND Flash), for storing various digital data. When the first connector 102 or the second connector 104 is connected to an external device, the external device can access the data in the memory circuit 110 through the controller circuit 108, such as reading data or writing data.

Please refer to FIG. 2, which is a schematic diagram of a power switching circuit 112 according to an embodiment of the present invention. The power switching circuit 112 includes a first resistor R1, a capacitor C, a first transistor M1, a second resistor R2, a third resistor R3, a second transistor M2, and a fourth resistor R4. The first resistor R1 has a first end and a second end. The first end of the first resistor R1 is connected to a power pin of the first connector 102, that is, the connection shown in the figure. Point A. The capacitor C has a first end and a second end. The first end of the capacitor C is connected to the second end of the first resistor R1, and the second end of the capacitor C is connected to a ground. The first transistor M1 has a first end, a second end, and a control end. The first end of the first transistor M1 is connected to the power pin of the first connector 102, and the first transistor M1 The second end is connected to one of the power pins of the second connector 104, that is, the contact B shown in the figure. The second resistor R2 has a first end and a second end. The first end of the second resistor R2 is connected to the control end of the first transistor M1. The third resistor R3 has a first end and a second end. The first end of the third resistor R3 is connected to the second end of the first transistor M1. The second transistor M2 has a first end, a second end, and a control end. The first end of the second transistor M2 is connected to the second end of the second resistor R2 and the third resistor R3. The second end of the second transistor M2 is connected to the ground end, and the control end of the second transistor M2 is connected to the first end of the capacitor C. The fourth resistor R4 has a first end and a second end. The first end of the fourth resistor R4 is connected to the control end of the second transistor M2, and the second end of the fourth resistor R4 is connected to the second end. The ground terminal. In this embodiment, the first transistor M1 can be a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and the second transistor M2 can be a bipolar junction transistor (Bipolar). Junction Transistor, BJT), but not limited to this.

When the first connector 102 is not connected to the first electronic device 200, the first connector 102 does not draw the supply voltage Vbus from the first electronic device 200, so the first connector 102 does not provide any contact by the contact A. At this time, the first transistor M1 and the second transistor M2 are both turned off, and no voltage is supplied from the contact A to the contact B through the first transistor M1. The state at this time is the closed state of the power supply switching circuit 112 described above. When the first connector 102 is connected to the first electronic device 200, the first connector 102 captures the supply voltage Vbus of the first electronic device 200, and the first connector 102 provides the supply voltage Vbus to the power supply by the contact A. Switching circuit 112. When the power supply switching circuit 112 receives the supply voltage Vbus provided by the first electronic device 200, the second transistor M2 is turned on, and the first transistor M1 is also turned on, so that the contact A and the contact B are electrically connected. The state at this time is the on state of the power supply switching circuit 112 described above. Therefore, the supply voltage Vbus is supplied from the contact A to the contact B via the turned-on first transistor M1.

Please refer to FIG. 3, which is a schematic diagram of the control switching circuit 114 according to an embodiment of the present invention. When the second connector 104 is a universal serial bus type B connector (such as a mini USB Type B connector or a micro USB Type B connector), the control switching circuit 114 can be designed to include a fifth resistor R5 and a first light. Coupling relay F1. The fifth resistor R5 has a first end and a second end, and the first end is connected to the power pin (contact A) of the first connector 102. The first photo coupling relay F1 has a first end F11, a second end F12, a third end F13 and a fourth end F14. The first end F11 of the first photo coupling relay F1 is connected to the second end of the fifth resistor R5, and the second end F12 and the third end F13 of the first photo coupling relay F1 are connected to a ground end, and The fourth end F14 of the first photo coupling relay F1 is connected to one of the control ends of the second connector 104 (that is, a control pin ID).

When the control switching circuit 114 does not receive the supply voltage Vbus (that is, the first connector 102 is not connected to the first electronic device 200), the third end F13 of the first photo coupling relay F1 and the fourth end F14 are short-circuited. That is, the control pin ID will be grounded. The state at this time is the second control state of the aforementioned control switching circuit 114. When the control switching circuit 114 receives the supply voltage Vbus (that is, the first connector 102 is connected to the first electronic device 200), the third end F13 and the fourth end F14 of the first photo coupling relay F1 are open, that is, The control pin ID will not be grounded. The state at this time is the first control state of the aforementioned control switching circuit 114.

Please refer to FIG. 4, which is a schematic diagram of a control switching circuit 114' according to another embodiment of the present invention. In this embodiment, the second connector 104 is a universal serial bus type C (USB Type C) connector. The control switching circuit 114' includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a second photo coupling relay F2. The sixth resistor R6 has a first end and a second end. The first end of the sixth resistor R6 is connected to the power pin (contact A) of the first connector 102. The seventh resistor R7 has a first end and a second end. The first end of the seventh resistor R7 is connected to the power pin of the first connector 102. The second optical coupling relay F2 has a first end F21, a second end F22, a third end F23 and a fourth end F24. The first end F21 of the second photo coupling relay F2 is connected to the seventh resistor R7. The second end F22 of the second optical coupling relay F2 is connected to the ground end, and the fourth end F24 of the second optical coupling relay F2 is connected to one of the control ends of the second connector 104 (that is, One configures the channel pin CC) and the second end of the sixth resistor R6. The eighth resistor R8 has a first end and a second end. The first end of the eighth resistor R8 is connected to the third end F23 of the second photo coupling relay F2, and the second end of the eighth resistor R8 is Connected to the ground.

When the control switching circuit 114' does not receive the supply voltage Vbus, the third end F23 of the second photo coupling relay F2 and the fourth end F24 are short-circuited, that is, the configuration channel pin CC is connected to the ground. The state at this time is the second control state of the aforementioned control switching circuit 114'. When the control switching circuit 114' receives the supply voltage Vbus, the third terminal F23 and the fourth terminal F24 of the second photo coupling relay F2 are open, that is, the configuration channel pin CC is not grounded. The state at this time is the first control state of the aforementioned control switching circuit 114'.

Please refer to FIG. 5. FIG. 5 is a schematic diagram of a data switching circuit 116 according to an embodiment of the present invention. The data switching circuit 116 can include a universal serial bus switch 117 (USB switch) and a component voltage resistor. The universal serial bus switch 117 has a first group of signal terminals S1 and a second group of signal terminals S2. The third group of signal terminals S3 and a selection terminal SE. The component voltage resistor includes a ninth resistor R9 and a tenth resistor R10. The first group of signal terminals S1 are connected to the signal pins of the first connector 102, the second group of signal terminals S2 are connected to the signal pins of the second connector 104, and the third group of signal terminals S3 are connected to the controller circuit. 108, the selection terminal SE is connected to a voltage contact between the ninth resistor R9 and the tenth resistor R10. The first end of the ninth resistor R9 is connected to the power pin of the first connector 102, and the first end of one of the tenth resistor R10 and the second end of the ninth resistor R9 are connected to the select terminal SE. And a second end of the tenth resistor R10 is connected to the ground.

When the first terminal of the ninth resistor R9 does not receive the supply voltage Vbus, the selection terminal SE does not receive any voltage input, and the second group of signal terminals S2 is electrically connected to the third group of signal terminals S3, and this The state of the time is the second control state of the data switching circuit 116 described above.

When the first end of the ninth resistor R9 receives the supply voltage Vbus, the selection terminal SE receives the supply voltage Vbus and divides the voltage contact (that is, the second end of the ninth resistor R9) into a voltage. The connection between the third group of signal terminals S3 and the second group of signal terminals S2 is disconnected, and the third group of signal terminals S3 is electrically connected to the first group of signal terminals S1. The state at this time is the first control state of the aforementioned data switching circuit 116. Therefore, when the first connector 102 is connected to the first electronic device 200, the data switching circuit 116 is switched from the second device state to the first device state, so that the first group of signal terminals S1 are configured by the first connector 102. The received signal can be transmitted to the third group of signal terminals S3.

Next, various usage conditions of the storage device 100 will be described. When the first connector 102 is not connected to the first electronic device 200 and the second connector 104 is not connected to the second electronic device 300, since the first connector 102 does not provide the supply voltage Vbus, the power switching circuit 112 is in the off state. The control switching circuit 114 is in the second control state, and the data switching circuit 116 is in the second device state. Moreover, at this time, the first connector 102 can be defined as a device mode, and the second connector 104 is defined as the device mode.

When only the first connector 102 is connected to the first electronic device 200, the first electronic device 200 provides the supply voltage Vbus to the data switching circuit 116, the controller circuit 108, and the memory circuit 110 via the first connector 102. The data switching circuit 116 switches from the second device state to the first device state according to the supply voltage Vbus as described above, so that the first electronic device 200 passes through the first connector 102, the data switching circuit 116, and the controller circuit 108. Access data to the memory circuit.

When only the second connector 104 is connected to the second electronic device 300, the second electronic device 300 supplies the supply voltage Vbus to the controller circuit 108 and the memory circuit 110 via the second connector 300. Since the data switching circuit 116 does not receive the supply voltage Vbus from the first connector 102, the data switching circuit 116 will remain in the second device state. Therefore, the second electronic device 300 can access the memory circuit 110 via the second connector 104, the data switching circuit 116, and the controller circuit 108.

When the first connector 102 is connected to the first electronic device 200 and the second connector 104 is connected to the second electronic device 300, the first connector 102 receives the supply voltage Vbus from the first electronic device 200 and provides the power supply switching circuit 112, The switching circuit 114, the data switching circuit 116, the controller circuit 108, and the memory circuit 110 are controlled. Therefore, the data switching circuit 116 switches from the second device state to the first device state according to the supply voltage Vbus from the first connector 102, so that the first electronic device 200 can be connected to the first connector 102 and the data switching circuit. 116 and controller circuit 108 access data to memory circuit 110. The control switching circuit 114 switches from the second control state to the first control state according to the supply voltage Vbus from the first connector 102, so that the second connector 104 is switched from the device mode to a charging mode. That is, when the control terminal of the second connector 104 is grounded, the second connector 104 is in the device mode, and when the control terminal of the second connector 104 is not grounded, the second connector 104 is the The charging mode, and when the second connector 104 is in the charging mode, the second electronic device 300 is not powered to the storage device 100 via the second connector 104. Moreover, the power switching circuit 112 switches from the off state to the on state according to the supply voltage Vbus from the first connector 102, so the supply voltage Vbus provided by the first connector 102 is via the power switching circuit 112 and the second The connector 104 is provided to the second electronic device 300 to charge the second electronic device 300.

6A and 6B are flowcharts showing a method of operating the storage device 100 according to an embodiment of the present invention. In step S100, it is detected whether the first connector 102 is connected to the first electronic device 200 and the second connector 104 is connected to the second electronic device 300. If yes, step S102 is performed. If no, step S110 is performed. In the step S102, when the first connector 102 is connected to the first electronic device 200 and the second connector 104 is connected to the second electronic device 300, the storage device 100 captures the first electronic device 200 by using the first connector 102. One of the supply voltages Vbus.

In step S104, the second connector 104 switches from a device mode to a charging mode according to the supply voltage Vbus. In step S106, the storage device 100 provides the supply voltage Vbus to the second electronic device 300 via the second connector 104, wherein the second electronic device 300 does not supply power to the storage device 100 via the second connector 104. In step S108, the data switching circuit 116 switches from a second device state to a first device state according to the supply voltage Vbus, so that the first electronic device 200 passes the first connector 102, the data switching circuit 116, and the controller circuit 108. The data is accessed to the memory circuit 110. That is, the memory circuit 110 transmits data to the first electronic device 200 via the first connector 102.

In step S110, it is detected whether only the first connector 102 is connected to the first electronic device 200. If yes, go to step S112; if no, go to step S114. In step S112, when only the first connector 102 is connected to the first electronic device 200, the first electronic device 200 provides the supply voltage Vbus to the data switching circuit 116, the controller circuit 108, and the memory circuit 110 via the first connector 102. And the data switching circuit 116 switches from the second device state to the first device state according to the supply voltage Vbus, so that the first electronic device 200 accesses the memory via the first connector 102, the data switching circuit 116, and the controller circuit 108. Circuit 110 accesses the data.

In step S114, it is detected whether only the second connector 104 is connected to the second electronic device 300 and the first connector 102 is not connected to the first electronic device 200. If yes, step S116 is performed. If no, that is, when the second connector 104 is not connected to the second electronic device 300 and the first connector 102 is not connected to the first electronic device 200, the process of the operator is terminated. In step S116, when only the second connector 104 is connected to the second electronic device 300, the second connector 104 transmits one of the supply voltages Vbus provided by the second electronic device 300 to the controller circuit 108 and the memory circuit 110. The second electronic device 300 is caused to access the memory circuit 110 via the second connector 104, the data switching circuit 116, and the controller circuit 108.

Compared with the prior art, the present invention provides a storage device 100 including a first connector 102 and a second connector 104, when the first connector 102 is connected to the first electronic device 200 (eg, a tablet) and the second connection When the device 104 is connected to the second electronic device 300 (for example, a smart phone), the power switching circuit 112 automatically switches to the on state according to the supply voltage Vbus provided by the first electronic device 200, and the control switching circuit 114 switches to the first A control state causes the second connector 104 to switch from the device mode to the charging mode. Therefore, the supply voltage Vbus provided by the first electronic device 200 can charge the second electronic device 300 through the storage device 100, and the first electronic device 200 can also access the storage device 100 at the same time. During the use, the user does not need to manually switch the storage device 100. The foregoing operation process can be completed by connecting the storage device 100 to the first electronic device 200 and the second electronic device 300. Therefore, in the prior art, the problem that the number of peripheral bus bars of the tablet is insufficient to simultaneously connect the flash memory device and charge the smart phone is solved.

It will be understood that the elements and features described in the appended claims can be combined in various ways to produce new claims and are also within the scope of the invention. Therefore, in view of the fact that the attached items attached below are attached only to a single item or a subsidiary item, it can be understood that these items can be selectively attached to any request item before or after it, and this new item Combinations may be understood as forming part of the specification of the invention.

While the invention has been described by way of illustration and preferred embodiments, it is understood that Various alternatives or modifications can be made by those skilled in the art without departing from the scope and spirit of the invention. The scope of the invention is therefore defined and protected by the following claims and their equivalents.

Claims (16)

A storage device comprising: a memory circuit for accessing a data; and a first connector and a second connector respectively connected to the memory circuit; wherein, when the first connector is connected When the first electronic device is connected to the second electronic device, the first connector receives a supply voltage from the first electronic device, so that the first electronic device transmits the second device through the storage device The electronic device is charged, and the first electronic device accesses the data to the memory circuit via the first connector. The storage device of claim 1, wherein the storage device further comprises: a control switching circuit disposed between the first connector and the second connector for receiving a voltage according to the supply voltage The second control state is switched to a first control state, such that the second connector is switched from a device mode to a charging mode. The storage device of claim 2, further comprising: a controller circuit; and a data switching circuit disposed between the first connector and the second connector for The second device state is switched to a first device state, such that the first electronic device accesses the memory circuit via the first connector, the data switching circuit, and the controller circuit. The storage device of claim 3, further comprising: a power switching circuit disposed on the first connector and the second connector And switching from the off state to an on state according to the supply voltage, so that the supply voltage charges the second electronic device via the second connector. The storage device of claim 1, wherein the second electronic device does not supply power to the storage device via the second connector. The storage device of claim 4, wherein: when only the first connector is connected to the first electronic device, the first electronic device provides the supply voltage to the data switching circuit via the first connector The controller circuit and the memory circuit, the data switching circuit is switched from the second device state to the first device state according to the supply voltage, so that the first electronic device passes the first connector, the data switching circuit And the controller circuit accesses the data to the memory circuit. The storage device of claim 4, wherein: when only the second connector is connected to the second electronic device, the second electronic device provides a supply voltage to the controller circuit via the second connector And the memory circuit, the data switching circuit is maintained in the second device state, such that the second electronic device accesses the memory circuit via the second connector, the data switching circuit, and the controller circuit. The storage device of claim 4, wherein when the first connector is not connected to the first electronic device and the second connector is not connected to the second electronic device, the first connector is set to In the device mode, the second connector is set to the device mode, the power switching circuit is set to the off state, the control switching circuit is set to the second control state, and the data switching circuit is the second device state. An operating method for a storage device, the storage device comprising a memory circuit, a first connector, a second connector and a controller circuit, the method comprising: detecting whether the first connector is connected a first electronic device; detecting whether the second connector is connected to a second electronic device different from the first electronic device; when the first connector is connected to a first electronic device and the second connector When the second electronic device is connected to the second electronic device, the first electronic device receives a supply voltage; the first electronic device charges the second electronic device through the storage device; and the first electronic device is enabled by the supply voltage The data is accessed to the memory circuit via the first connector. The operating method for the storage device of claim 9, further comprising: providing a control switching circuit between the first connector and the second connector; and a second according to the supply voltage The control state is switched to a first control state such that the second connector is switched from a device mode to a charging mode. The method for operating a storage device according to claim 10, further comprising: setting a data switching circuit between the first connector and the second connector; and using a second according to the supply voltage Switching the device state to a first device The first electronic device accesses the memory circuit via the first connector, the data switching circuit, and the controller circuit. The operating method for the storage device of claim 11, further comprising: providing a power switching circuit between the first connector and the second connector; and a closed state according to the supply voltage Switching to an on state, the supply voltage charges the second electronic device via the second connector. The operating method for a storage device according to claim 9, wherein the second electronic device does not supply power to the storage device via the second connector. The operating method for a storage device according to claim 12, further comprising: when only the first connector is connected to the first electronic device, the first electronic device provides the supply via the first connector Voltage to the data switching circuit, the controller circuit, and the memory circuit; switching from the second device state to the first device state according to the supply voltage; and via the first connector, the data switching circuit, and the control The circuit accesses the data to the memory circuit. The operating method for a storage device according to claim 12, further comprising: when only the second connector is connected to the second electronic device, the second electronic device provides a supply via the second connector Voltage to the controller circuit and The memory circuit maintains the data switching circuit in the second device state; and accesses the memory circuit via the second connector, the data switching circuit, and the controller circuit. The method for operating a storage device according to claim 12, further comprising: setting when the first connector is not connected to the first electronic device and the second connector is not connected to the second electronic device The first connector is in the device mode; the second connector is set to the device mode; the power switching circuit is set to the off state; the control switching circuit is set to the second control state; and the data switching circuit is set to The second device state.