TWI653840B - Method and apparatus for polar code puncturing - Google Patents

Abstract

The invention provides a polarization code drilling method and device. The method includes receiving a mother polarization code comprising a sequence of code bits having an index {0, ..., N-1} and including code bits with indices of {0, ..., i-1} The first block, the second block of the code bit with the index {i, ..., i+k-1} and the third bit of the code bit with the index {i+k, ..., i+k+k-1 } Blocking; interleaving the second block of code bits with the third block of code bits to form a sequence of rearranged code bits comprising N code bits; and from the sequence of code bits after rearrangement The last M code bits are extracted to generate a punctured code of length M. The length of the polarization code can be adjusted by the polarization code puncturing technique of the present invention such that the coded bits match the allocated transmission resources.

Description

Polarization code punching method and device

The present invention relates to polarization code encoding, and more particularly to a method and apparatus for puncturing a polarized code.

The background description of the invention provided herein is merely intended to generally illustrate the context of the present application. The work done by the inventor currently mentioned should not be directly or indirectly determined to be the subject of this application in terms of the work described in the prior art section and the various aspects of the related description that are not prior art at the time of application. Prior art.

Polar code is a type of error correction code that can be used to achieve the capacity of various communication channels. The construction of the polarization code relies on a specific recursive encoding procedure. The recursive encoding operation synthesizes a set of virtual channels from a plurality of usages of the transmission channel. When the code length is infinite, the synthesized virtual channel tends to be either no noise or completely full of noise. This phenomenon is called channel polarization. In their initial construction, the polarization code only allowed code lengths of two powers of two. The puncturing technique can be used to modify the polarization code to achieve an arbitrary code length. When puncturing, one or more coded bits are selected for transmission.

In order to match the coded bits with the allocated transmission resources, the present invention provides a polarization code puncturing method and apparatus.

In an embodiment, a polarization code puncturing method is provided, the method comprising: receiving a mother polarization code comprising a sequence of encoded bits, the sequence of encoded bits having an index {0, ..., N-1} And including the first block of the encoded bit with the index {0, ..., i-1}, the second block of the encoded bit with the index {i, ..., i+k-1}, and the index { a third block of coded bits of i+k, ..., i+k+k-1 }; interleaving the second block of coded bits with the third block of coded bits to form N a sequence of the rearranged encoded bits of the encoded bits; and extracting the last M encoded bits from the rearranged encoded bit sequence to generate a punctured code of length M.

In another embodiment, an apparatus for polarization code puncturing is provided, the apparatus comprising an interleave circuit and a bit selector, the interleave circuit configured to receive a mother polarization code comprising a sequence of encoded bits, The encoded bit sequence has an index {0, ..., N-1} and includes the first block of the encoded bit with an index of {0, ..., i-1}, the index is {i, ..., i+k The second block of the coded bit of -1} and the third block of the coded bit indexed {i+k, ..., i+k+k-1 }, and the second block of the coded bit The block is interleaved with the third block of coded bits to form a rearranged sequence of coded bits comprising N coded bits; the bit selector is configured to be from the rearranged coded bits The last M coded bits are extracted from the sequence to generate a punctured code of length M.

In another embodiment, a polarization code puncturing method is provided, the method comprising: receiving a mother polarization code comprising a sequence of encoded bits, the sequence of encoded bits being generated by a polarization coder, the polarization The encoder encodes the input bit sequence with the index {0, ..., N-1} according to the polarization map to generate the mother polarization code, wherein the parent polarization code has a length N and N is a power of n. 2n; and generating a punctured code, the punctured code including an encoded bit sequence excluding P punctured coded bits, where P=2q+p, q<=n-2, q is a maximum exponent such that 0 <= p <= 2q -1, and wherein the first portion of the punctured encoded bit includes the index in the polarization map included in the index set A = {0, ..., 2q - The encoded bit in the 1} input bit is directly connected.

In another embodiment, an apparatus for polarization code puncturing is provided, the apparatus comprising a bit selector circuit configured to: receive a parent polarization comprising a sequence of encoded bits a coded sequence of the encoded bit sequence generated by a polarization coder that encodes an input bit sequence indexed {0, ..., N-1} according to a polarization map to generate the mother polarization code Wherein the parent polarization code has a length N, N is an nth power of 2n; and a punctured code is generated, the punctured code including an encoded code that excludes P punctured coded bits a sequence of bits, where P = 2q + p, q <= n-2, q is the largest exponent such that 0 <= p <= 2q -1 , and wherein the first portion of the punctured encoded bit includes the pole Encoded bits in the map that are directly connected to the input bits contained in the index set A={0, ..., 2q - 1}.

When channel coding is performed, the length of the polarization code can be adjusted by the polarization code puncturing technique of the present invention to match the coded bits with the allocated transmission resources.

FIG. 1 is a schematic diagram of a wireless communication system 100 in accordance with an embodiment of the present invention. The wireless communication system 100 includes a mobile device 110 and a base station (BS) 120. The mobile device 110 includes an uplink (UL) channel encoder 111 and a downlink (DL) channel decoder 112. The base station 120 includes a UL channel decoder 121 and a DL channel encoder 122. These components are coupled together as shown in Figure 1.

In one embodiment, wireless communication system 100 is a mobile communication network that conforms to one of a variety of wireless communication standards, such as various wireless communication standards developed by the Third Generation Partnership Project (3GPP). The mobile device 110 can be a mobile phone, a laptop, a flat computer, and the like. Base station 120 can include one or more antennas. These antennas can be used to transceive wireless signals to communicate with a plurality of mobile devices including mobile device 110. Accordingly, base station 120 can receive data from mobile device 110 and transmit the data to another mobile device or another communication network, and vice versa.

In one embodiment, the UL channel encoder 111 of the mobile device 110 performs channel coding with the polarization code and transmits control information from the mobile device 110 to the base station 120. The control information may be UL control information generated at a physical layer or an upper layer of a protocol stack of the mobile device 110. Therefore, the block of the UL control information can be encoded as a polarization code. In addition, when channel coding is performed, the UL channel encoder 111 is configured to adjust the length of the polarization code using the polarization code puncturing technique described in this specification so that the coded bit and the assigned transmission are transmitted. The resources are matched. By way of example, the transmission resource may be a plurality of resource elements in a time-frequency resource grid in an orthogonal frequency division multiplexing (OFDM) modulation system. The UL channel decoder 121 of the base station 120 acts as a counterpart of the UL channel encoder 111 for performing channel decoding.

In operation, the mobile device 110 generates control information, such as UL control information, and performs a channel encoding operation to transmit control information. The information bit block 113 of the control information may be received at the UL channel encoder 111 during the channel encoding operation. The UL channel encoder 111 can then encode the information bit block 113 as a polarization code using a polarization coder. Subsequently, the UL channel encoder 111 may employ a polarization code puncturing technique to extract a certain number of coded bits from the polarization code based on the allocated transmission resources. The punctured code 132 formed by the puncturing operation is then transmitted to the base station 120. At the UL channel decoder 121, the punctured code 132 can be received and processed, and the decoded bit 123 corresponding to the information bit 113 can be generated accordingly.

The DL channel encoder 122 at the base station 120 and the DL channel decoder 112 at the mobile device 110 have similar functions and structures as the UL channel encoder 111 and the DL channel decoder 121, respectively, but operate in the opposite direction. In operation, information bit block 124 may be generated at base station 120 and encoded as a polarization code at DL channel encoder 122. After the polarization code puncturing operation, the punctured code 134 can be extracted from the polarization code. The punctured code 134 can then be received and processed at the DL channel decoder 112. Accordingly, the decoded bit 114 corresponding to the information bit 124 can be acquired.

2 is a schematic diagram of an apparatus 200 for rate matching in accordance with an embodiment of the present invention. Apparatus 200 uses a polarization code puncturing technique to modify the polarization code to generate a punctured code to match the encoded bits to the allocated transmission resources. The plurality of functions and operations described by the reference device 200 can be used for the mobile device 110 or the base station 120 for transmitting UL or DL control information as exemplified in FIG. In an example, device 200 includes channel encoder 240 and modulator 230. Channel encoder 240 includes a polarization encoder 210 and a rate matching module 220. The rate matching module 220 includes a puncturing controller 222 and a bit selector 224. These components are coupled together as shown in Figure 2.

Device 200 can be a mobile device or a base station. The device 200 can be configured to transmit data to a remote device (eg, a mobile device or a base station) over a wireless channel. The channel encoder 240 is configured to perform a channel encoding operation to encode the data to be transmitted. The modulator 230 is further configured to process the encoded data to generate a modulated signal. For example, interleaving, Quadrature Amplitude Modulation (QAM), or Quadrature Phase Shift Keying (QPSK) modulation, antenna mapping, transmission resource mapping, etc., can be used in the modulator 230 executions. The modulated signal can then be sent to the remote device.

In an embodiment, polarization encoder 220 is used to encode information bit 201 as a polarization code. In general, the polarization code can be constructed based on a particular recursive encoding operation. During the recursive encoding operation, a set of N virtual channels can be synthesized from N usages of the transmission channel W, where N represents the code length of the polarization code. The plurality of composite channels are also referred to as bit channels. For example, a Successive Cancellation (SC) decoder can be used to reverse the recursive encoding operation at the receiver end. When the code length N becomes larger, due to the polarization effect of the channel, the reliability of a portion of the bit channel gradually increases and becomes better, while the reliability of the other portion gradually decreases and becomes worse. The former bit channel can be referred to as the preferred channel, while the latter bit channel can be referred to as the poor channel. In one example, polarization encoder 210 encodes UL control information using a polarization code length of N = 1024 bits and encodes DL control information using a polarization code length of N = 512 bits.

Accordingly, one coding strategy is to transmit information bits on a better channel and a fixed bit (called a frozen bit) for a poor channel. Specifically, in one example, the reliability of the N bit channels can be calculated based on the channel conditions of the transmission channel W. Based on the calculated reliability, the most reliable bit channel can be used to transmit information bits, while the least reliable bit channel can be set to a fixed value, for example, zero.

A linear transformation can be obtained by applying a linear transformation to a data vector (input bit vector), where the data vector contains information bits and frozen bits. Specifically, the transformation can be expressed as the following expression:

(1)

among them, Represents a polar code vector, Represents the input bit vector, Representing a reversal permutation matrix, On behalf of Kronecker product, Representative basic matrix The nth-order Kronecker product, where N represents the length of the polarization code (which is a power of 2) and ,as well as It is a square matrix and represents a generation matrix of polarization codes.

Input bit vector Including N input bits, the index of the input bit is from 0 to N-1, also known as the input bit index. Each input bit and corresponding input bit index correspond to a generation matrix A column in the middle. In addition, each bit channel or synthesis channel corresponds to a generation matrix One of the columns. Therefore, each input bit corresponds to a one-bit channel. Therefore, the input bit index is also used to generate the matrix The bit channels and columns in the index are indexed.

In an example, the polarization code has a codeword length of N=8. Input bit vector is . The input bit includes an information bit of length K=4 and a frozen bit of length F=4. The index of the information bit is contained in the information bit index set {3, 5, 6, 7}, and the index of the frozen bit is contained in the frozen bit index set {0, 1, 2, 4}. Assuming the information bit set is {i1, i2, i3, i4}, and the frozen bit is set to 0, the input bit can be represented as follows:

At polarization encoder 210, the location of the information bits and freeze bits in the input bit can be determined first. For example, the reliability of the bit lanes during polarization encoding can be determined first. This reliability can be calculated on the line based on the estimated channel conditions. Alternatively, the reliability can be calculated off-line for different channel conditions and stored in memory and retrieved based on the current estimated channel conditions. Moreover, polarization encoder 210 can receive the frozen bit location 204 of number P determined at rate matching module 220. Each frozen bit position received corresponds to a punctured coded bit.

It is assumed that the input bit length (polarization code length) used for polarization encoding is N (corresponding to N input bit positions) and the information bit length is K. Thus, polarization encoder 210 can exclude P frozen bit locations from the N input bit locations. The polarization encoder 210 can then select K locations from the remaining N-P input bit locations for the information location. The selected K positions correspond to the bit channels having the highest reliability among the bit channels corresponding to the remaining N-P input bit positions.

Based on the determined information bit location and frozen bit location, polarization encoder 210 may map the information bits to the input vector of polarization encoder 210. The input vector can then be encoded as a polarization code 202 based on the production matrix GN. Polarization code 202 has a length N and is then punctured at rate matching module 220. Therefore, the polarization code 202 is referred to as a mother polarization code or mother code 202, and the code generated from the mother code 202 after the puncturing operation is referred to as a punctured code. The code length N of the mother code 202 is referred to as the mother code length.

The rate matching module 220 receives the mother code 202 and performs a puncturing operation to generate the punctured code 203. The puncturing controller 222 is configured to determine the bit position 205 of the mother code 202 to be punctured. In one example, the determination process can be based on the generation matrix GN, the mother code length N, and the punctured code length M. In one example, the punctured code length M is determined at one element of the device 200, for example, based on the channel condition of the transmission channel or the allocation of transmission resources. Additionally, the punch controller 222 is also configured to determine the freeze bit position 204. For polarization codes, the punching operation may affect the reliability of the channel. When the output bit in the mother code 202 is punctured, the bit channel associated with the punctured output bit becomes the difference channel. The input bit corresponding to this difference channel cannot be decoded at the receiving end. Therefore, the input bit will be determined as a frozen bit in the input bit.

The bit selector 224 is configured to receive the mother code 202 and extract an unpunched bit from the mother code 202 to form the punctured code 203. Extraction may be performed based on information of the bit position 205 to be to-be-punctured received from the punch controller 222. In one example, the information of the bit position 205 to be punctured is represented as a puncture pattern. The puncturing pattern can be represented by a binary vector. For example, a zero in the puncturing pattern vector may indicate the bit position of the punctured bit, and 1 indicates the bit position that is not punctured. More details of the function and structure of the rate matching module 220 are described below.

Although the rate matching module 220 shown in FIG. 2 employs a puncturing scheme to implement the rate matching function, it should be understood that in other examples, the rate matching module 220 may use more than one rate matching scheme to optimize its rate matching. performance. For example, the rate matching module 220 can select one of the plurality of rate matching schemes, such as puncturing, shortening, repeating, and the like. The selection may be based, for example, on conditions such as whether the mother code rate (defined as the ratio between the length of the information bit and the length of the polarization code) is greater than a threshold, whether the length of the mother code is greater than the code length required for the configuration of the transmission resource, and the like. Different rate matching schemes can be selected for different scenarios to achieve optimal rate matching performance.

3A to 3C are diagrams showing a recursive construction operation of constructing a polar graph 300C according to an embodiment of the present invention. The constructed polarization map 300C corresponds to the generation matrix in the expression (1) , where N=8. The polar drawing constructed from the production matrix can be used as an analysis tool for the coding and puncturing operations performed by the production matrix. Figure 3A shows that corresponds to The first polarization map 300A. The polarization map 300A includes two input bits u0 and u1 represented by two circles 321 and 322 and two output bits x0 and x1 represented by two circles 341 and 342. The polarization map 300A illustrates an encoding operation represented by the following expression: [x0 x1]=[u0 u1]

Meanwhile, the polarization map 300A can exemplify a channel polarization operation. In particular, squares 301 and 302 may represent two virtual bit lanes corresponding to the encoding operation, upper channel 301 and lower channel 302. The input bit u0 is transmitted through the upper channel 301, however, the transmission of u0 is interfered by the input bit u1. Accordingly, the reliability of the upper channel 301 for transmitting the input bit u0 is lowered. Instead, the input bit u1 is transmitted through the lower channel 302, however, the transmission of u1 is by means of the upper channel 301 because the portion u1 is transmitted through the upper channel 301. Thus, the upper channel 301 is degraded and the lower channel 302 is enhanced.

Figure 3B shows a second polarization map 300B, and the second polarization map 300B corresponds to

The polarization map 300B includes four input bits u0-u3 and four output bits x0-x3. The polarization map 300B illustrates an encoding operation represented by the following expression: [x0 x1 x2 x3]=[u0 u1 u2 u3]

As shown, the polarization map 300B uses the polarization map 300A as a building block for constructing the polarization map 300B. The polarization map 300B includes a first stage 361 and a second stage 362. The first stage 361 includes an upper block 371 and a lower block 372, and the second stage 362 includes an upper block 373 and a lower block 374. The first stage upper block 371 utilizes the upper passage of the second stage 362 and the first stage lower block 372 utilizes the lower passage of the second stage 362. Therefore, four bit channels are formed by the four pairs of sub-bit channels in the polarization map 300B: first bit channels 303 and 307, second bit channels 304 and 309, third bit channels 305 and 308, Four bit channels 306 and 310. Among the four bit channels, the first bit channels 303 and 307 have the largest noise because the two bit channels 303 and 307 are the worst bit channels in the corresponding block 371 or 373; the fourth bit channel 306 and 310 are the most reliable because the two bit lanes 306 and 310 are the better ones of the corresponding blocks 372 or 374. The reliability of the other two bit lanes 304 and 309 and 305 and 308 is between the first bit lanes 303 and 307 and the fourth bit lanes 306 and 310.

Figure 3C shows the matrix corresponding to the polarization code generation The third polarization map 300C. The polarization map 300C includes eight input bits u0-u7 and eight output bits x0-x7. Similarly, the polarization map 300C illustrates an encoding operation corresponding to the generation matrix G8. As shown, polarization map 300C utilizes polarization maps 300A and 300B as building blocks for constructing polarization map 300C. Similarly, polarization map 300C includes a first stage 363 and a second stage 364. The first stage 363 includes an upper block 375 and a lower block 376, and the second stage 364 includes four blocks 377-380. The first stage upper block 375 utilizes the upper channel of the second stage 364 and the first stage lower block 376 utilizes the lower channel of the second stage 364.

Based on the above construction, eight bit channels are formed. For example, one of the eight bit channels is formed by concatenating three sub-bit channels 311, 312, and 313. The other of the eight bit channels is formed by joining three sub-bit channels 314, 315, and 316. Each of the eight bit lanes ends at the output channel starting with the input bit. Thus, the input bits associated with the corresponding bit lane are used to identify the corresponding bit lane. For example, the bit lanes 311-312-313 start from the input bit u1, and therefore, the bit lanes 311-312-313 are referred to as the bit lane u1.

When the output bit is connected to the input bit through one of the eight bit channels u0-u7, the output bit is directly connected to the corresponding input bit. For example, output bit x4 is directly connected to input bit u1, and output bit x3 is directly connected to input bit u6. Furthermore, as in Figure 3C, the bit-reversed index of the output bit is the index of the input bit to which the output bit is directly connected. In particular, the binary index of output bits x0-x7 is shown in column 391, the bit reverse index of output bits x0-x7 is shown in row 392, and the binary index of input bits u0-u7 is in the row. 393 is shown. As an example, output bit x4 has a binary index of 100, and the bit reverse index of output bit x4 is 001 (ie, the index of input bit u1). Input bit u1 is directly connected to output bit x4 via bit channel u1. Thus, given an input bit, an index of the output bit directly connected to the input bit can be determined by performing a bit reverse operation on the index of the input bit.

The bit channels u0-u7 have polarization characteristics due to a polarization effect. In general, for a given channel condition for transmitting a polarization code based on a polarization map, the upper part meta-channel associated with the input bit located near the top of the polarization map has poor reliability, and is located in the polarization map. The lower part meta-channel related to the input bit near the bottom has better reliability. The lower the position of the bit channel in the polarization map, the better the reliability. Therefore, the lower input bit is preferentially used as the information bit, and the upper input bit is used as the frozen bit. The input bit used as the information bit is called the preferred bit, and the input bit used as the frozen bit is called the poor bit. In the example of FIG. 3C, preferred bits are shown with circles with intersecting lines, and poor bits are shown with circles with rising diagonal lines.

Figure 4 shows a polarization map 400 of a first conventional puncturing strategy. The polarization map 400 is similar to the polarization map 300C in Figure 3C. The polarization map 400 includes a first stage 401 and a second stage 402. The second stage 402 includes output block sequences 421-424. The polarization map 400 includes eight input bits u0-u7 and eight output bits x0-x7. The eight bit channels u0-u7 are connected to eight pairs of input bits and output bits, respectively. The first conventional puncturing strategy is to first punctate the output bits at the upper output block. For example, for to-be-punctured bits of different lengths P, the output bits are punctured in order from top to bottom from the top bit x0 to the Pth output bit.

The first conventional puncturing strategy limits the puncturing range to the upper channel on the input side of the first level block. As shown, in one example, the bit length P to be punctured is equal to 4, and therefore, the output bits x0-x3 are selected and punctured. Therefore, the input bits u0, u2, u4, u6 directly connected to the punctured output bits x0, x1, x2, x3, respectively, are affected by the bit channels u0, u2, u4, u6. In particular, since the punctured bit is not transmitted, the bit channel corresponding to the punctured bit becomes useless. Therefore, the input bits u0, u2, u4, u6 cannot be decoded and are used as freeze bits.

A disadvantage of this first conventional puncturing strategy is that in the case of low to medium puncturing rates, good bits (e.g., input bits u4 and u6) are discarded. The puncturing rate is defined as the ratio of the length of the punctured bit to the length of the mother polarization code. When the transmission channel used to transmit the polarization code has a low signal-to-noise ratio (SNR), a low code rate (the ratio between the input bit length and the punctured code length can be used) ). For example, the low code rate used can be 1/5, 1/3 or 2/5. In this case, the number of information bits is relatively small compared to the high code rate, and a good bit channel becomes critical for reliable transmission of information bits. Therefore, the performance of the first conventional puncturing strategy is affected by early good bit loss, resulting in poor performance at low code rate transmission.

Figure 5 shows a polarization map 500 of a second conventional puncturing strategy. In terms of the construction of the polarization code, the polarization map 500 is similar to the polarization map 300C in the 3C diagram. For example, the bit reverse index of the output bit may be the index of the input bit to which the output bit is directly connected through the bit channel. The polarization map 500 includes a first stage 501 and a second stage 502. The second stage 502 includes two output blocks 521-522. The polarization map 500 includes eight input bits u0-u7 and eight output bits x0-x7. The eight bit channels u0-u7 are connected to eight pairs of input bits and output bits, respectively. The second conventional puncturing strategy begins by first puncturing the upper output bits of each of the output blocks 521-522 of the second stage 502, down to the lower output bits of each of the output blocks 521-522 until reaching The total length of the bit to be punched. Therefore, the position of the input bit that mirrors the position of the punctured output bit is affected by the puncturing operation. For example, when the output bits x0, x1, x4, x5 are punctured, the input bits u0, u1, u4, u5 are affected.

This second conventional puncturing strategy preserves good bits near the bottom of the polarization map compared to the first conventional puncturing strategy. However, for high code rates used for transmission channels with higher SNR, such as code rates of 5/6 or 8/9, puncturing of good bits (eg, input bits u4-u5) would result in a second conventional puncturing strategy. The performance is degraded.

Figure 6 shows a polarization diagram 600 of an example of a first polarization code puncturing technique in accordance with an embodiment of the present invention. Matrix can be generated based on polarization code Create a polarization map 600. The length of the mother polarization code in the polarization map 600 is 16. The polarization map 600 includes 16 input bits u0-u15 and 16 output bits x0-x15. Polarization map 600 includes an input stage 601 and an output stage 602. Input stage 601 includes two input blocks 611-612, and output stage 602 includes output block sequences 621-628. In addition, FIG. 6 also illustrates a binary index 613 of input bits and a binary index 614 of output bits. Corresponding to the parent polarization code length 16=24, each binary index includes n=4 bits.

The first polarization code puncturing technique takes into account the effects of both the input bit side and the output bit side when selecting the bit channel to be punctured. A bit channel connected to the to-be-punctured output bits is referred to as a bit channel to be punctured, and an input bit connected to the bit channel to be punctured is It is called the input bit to be punctured. Therefore, the first puncturing technique may include: preferentially selecting an output bit to be punctured in an upper channel of the upper output block on the output bit side; and preferentially selecting an upper input bit on the input bit side; As an input bit to be punctured.

In one example, the length of the mother polarization code is N=2n, and the length of the bit to be punctured is P. P can be expressed as: Where q <= n-2, q is the maximum exponent such that 0 <= p <= 2q -1. For example, for P=13, P can be expressed as , where q=3, p=5. Therefore, based on the first puncturing technique strategy, the puncturing process can include the following steps.

In the first step, the first portion 2q of output bits to be punctured can be determined. Specifically, 2q output bits to be punctured may be selected as output bits directly connected to the input bits whose indices are included in the input bit index set A={0, ..., 2q-1}. In the example shown in Figure 6, N=16, n=4, P=6, P can be expressed as . Therefore, q=2, p=2. The number of output bits of the first part 2q to be punctured is 4. Therefore, the input bit index set A can be determined to be {0, 1, 2, 3} or in the form of n(n=4) bit binary {0000, 0001, 0010, 0011}. The input bit corresponding to index set A is u0-u3. The index of the output bit directly connected to the input bit u0-u3 can be determined by bit-inverting the binary index of index set A. For example, by inverting the index set A={0000, 0001, 0010, 0011} bits, the corresponding output bit index can be obtained as {0000, 1000, 0100, 1100}. Therefore, the output bits to be punctured can be determined to be x0, x8, x4, x12, respectively.

In the second step, the remaining second portion of p output bits to be punctured can be determined. Specifically, the p output bit to be punctured may be selected as an output bit directly connected to the input bit indexed in the input bit index set B, wherein the index set B={2q + q bits The bit of (0, ..., (p-1)) is reversed}= {2q + q bit 0 bit reversed, 2q + q bit 1 bit reversed, ..., 2q + The p-1 bit of the q-bit is inverted}. Each element in index set B is equal to the sum of one of the bit reversals of 2q and q bits of 0, ..., (p-1). For example, in the example of the first step, q=2 and p=2. Therefore, the bit reversal of 0, ..., (p-1) of the q-bit is the bit reversal of the {00, 01} of the 2-bit, or {00, 10} according to the bit-reverse form. Therefore, the index set B = {22 + "00", 22 + "10"} = {4, 6}, or in the n-bit binary form is {0100, 0110}. Therefore, the input bits corresponding to the index set B are u4 and u6. By performing a 4-bit bit reverse operation on index set B, the index of the second portion of p output bit bits to be punctured can be determined as {0010, 0110} corresponding to output bits x2 and x6. In the third step, its index is included in the index set. The input bit in can be determined as a frozen bit.

Figures 7A through 7C show a comparison of block error rate (BLER) performance for different puncturing methods by the same simulation experiment. The vertical axis represents the BLER, and the horizontal axis represents the SNR of the transmission channel for transmitting the punctured polarization code. Further, the solid line indicates the performance of the first conventional puncturing strategy described in accordance with FIG. The dotted line indicates the performance of the second conventional puncturing strategy described in FIG. The dashed lines indicate the performance of the first puncturing technique described in accordance with FIG.

Figure 7A shows two schematic diagrams on the right and on the left, which correspond to high code rates of 5/6 and 8/9, respectively. As shown, for high code rate polarization code encoding, the performance of the first puncturing technique (dash) is better than the traditional puncturing strategy. Figure 7B shows the performance of the three methods at three different medium code rates of 1/2, 2/3, 3/4. As shown, for the code rate encoding of the medium code rate, the performance of the first puncturing technique (dashed line) is better than the traditional puncturing strategy. However, in Figure 7C, where Figure 7C shows performance at three different low code rates of 1/5, 1/3, and 2/5, the first hole punching technique is compared to the conventional punching strategy. (Dash) shows moderate performance.

Figure 8 shows a polarization diagram 800 of an example of a second polarization code puncturing technique in accordance with an embodiment of the present invention. The second puncturing technique solves the low performance problem of the first puncturing technique shown in Figure 7C when using a low code rate. Figure 8 shows the results of the example shown in Figure 6, where N = 16, n = 4, P = 6, , q=2, p=2. As shown, output bit x6 is punctured. However, since the output bit x6 assists in the transfer of the bit channel 801 (the bit channel 801 is connected to the output bit x7 and the input bit u14), puncturing the output bit x6 will degrade the reliability of the bit channel 801. Therefore, the probability of error in decoding good input bits u14 and u15 will increase. During low code rate transmission, input bits near the bottom of the polarization map are used as information bits. Therefore, puncturing the output bit x6 affects the performance of low bit rate transmission. To solve this problem, the position of the input bit to be punctured can be moved down from the position of u6 to the position of u8. The output bit to be punctured corresponding to u8 is x1. Punting the x1 has no significant effect on the good bits near the bottom of the polarization map 800.

Therefore, the punching process implementing the second punching technique may include the following steps.

In the first step, the same operations as in the first puncturing technique can be performed to determine the first portion of the output bit to be punctured. Using the same example as in FIG. 6, in which six output bits to be punctured are to be determined, the input bits u0-u3 are determined to be input bits to be punctured, thus outputting the bit x0, X4, x8, x12 are determined to be output bits to be punctured.

In the second step, when the code rate is higher than the threshold, the second step in the first technique can be maintained and executed; when the code rate is lower than the threshold, the bit to be punctured is determined as an output bit, the output bit The element is directly connected to the input bit contained in the input bit index set B', where B' is: B'={2q + (0, ..., p/2-1)}U{2n-1 + ( 0, ..., p/2-1)} ={2q +0, 2q +1, ..., 2q +(p/2-1)}U{2n-1+0, 2n-1+1, ..., 2n -1+ (p/2-1)}.

The first part of the index set B' {2q +0, 2q +1, ..., 2q +(p/2-1)} includes p/2 input bit indices and corresponds to the input bit u0 to be punctured -u3 adjacent input bits. The second part of the index set B' {2n-1+0, 2n-1+1, ..., 2n-1+ (p/2-1)} includes an additional p/2 input bit indices and corresponds to the slave index 2n-1 starts the downward input bit. In various examples, when p/2 is not an integer, p-2 can be mapped to the nearest integer using a floor down or ceiling function.

Figure 9 shows a comparison of BLER performance for different perforation methods by simulation experiments. Figure 9 is similar to Figure 7C showing the low code rate performance of the first and second conventional puncturing strategies. However, the dashed line in Fig. 9 indicates the performance of the second punching technique described in Fig. 8. As shown in Fig. 9, for the low code rate of 1/5, 1/3, 2/5, the performance of the second punching technique has been improved as compared with the first and second conventional punching strategies.

Figure 10 illustrates a method 1000 of polarizing code puncturing in accordance with an embodiment of the present invention. Method 1000 can be performed by channel encoder 240 as shown in FIG. The method 1000 begins in step S1001 and ends in step S1099.

At step S1010, a parameter set may be received, for example, at the puncturing controller 222 shown in FIG. 2 for determining the encoded bit to be punctured in the parent polarization code. The parameters may include the mother code length N and the code length M after the punch. Therefore, the length of the coded bit to be punctured can be determined as P = N - M. The parameters may also include information for generating a matrix GN of the parent polarization code. Based on the information of the generation matrix GN, the connection relationship between the input bit of the polarization map and the bit channel between the output bits can be determined.

At step S1020, the puncturing controller 222 determines the first portion of the encoded bit to be punctured based on the parameters. In one example, the first portion of the encoded bit to be punctured is the encoded bit that is directly connected to the input bit having the lowest index. In particular, the coded bit length P to be punctured may be expressed in the form of P = 2q + p, where q <= n-2 and q is the maximum exponent such that 0 <= p <= 2q-1. Therefore, 2q <= 2n - 2 = N / 4. According to the polarization map corresponding to the generation matrix GN, the first part of the coded bits to be punctured can be determined as the following code bits: the code bits and the index are included in the input bit index set A={0, ... The input bits in 2q -1} are directly connected. A direct connection of the input bit and the output bit in the polarization map indicates that the input bit and the output bit are connected via a virtual bit channel in the polarization map. For generating matrices By reversing the binary index of the input bit, an index of the output bit directly connected to the input bit can be obtained.

At step S1030, the second portion of the encoded bit to be punctured may be determined, for example, by the puncturing controller 222. In one example, in the second portion of p coded bits to be punctured, the p/2 bits to be punctured are the following coded bits: these coded bits are distributed in the index from The p/2 input bits in the input bit partition starting at N/2 are directly connected. In particular, according to the polarization map corresponding to the generation matrix GN, the second portion of the coded bits to be punctured may be determined as the following coded bits: the coded bits and the index are included in the input bit index set The input bits in B are directly connected, where the index set B = {2q + (0, ..., p/2-1)}U{2n-1 + (0, ..., p/2-1)} = {2q +0, 2q +1, ..., 2q +(p/2-1)}U{2n-1 + 0, 2n-1 + 1, ..., 2n-1 + (p/2-1)} . The element in the first portion {2q + (0, ..., p/2-1)} of the index set B is an input bit adjacent to the first portion of the encoded bit to be punctured determined in step S1020. The element in the second part of the index set B {2n-1 + (0, ..., p/2-1)} is from the input bit indexed as 2n-1=N/2 in the polarization map. p/2 input bits. In one example, the number of 2q input bits is equal to N/4. Therefore, the input bit of the first part of index set B has the index {N/4+ (0, ..., p/2-1)}, and the input bit of the second part of index set B has the index {N/2 + (0, ..., p/2-1)}. Therefore, 2q input bits corresponding to 2q output bits to be punctured are included in the first 1/4 of the N input bits, and the input of the first part and the second part of the index set B The bits are distributed in the second 1/4 and the third 1/4 of the N input bits.

At step S1040, the mother code of length N generated by the polarization coder may be received, for example, at the bit selector 224 shown in FIG. For example, the mother code can be stored in a buffer.

In step S1050, the punctured code may be generated based on the determination result in step S1020 and step S1030. For example, location information can be received from the puncturing controller 222. The location information may be an index sequence indicating the bits to be punctured. Alternatively, the location information may be a 0 and 1 binary vector indicating the location to be punctured. Based on the location information, the bit selector 224 can exclude the unpunctured bits from the mother code to output the punctured bits. The method 1000 then proceeds to step S1099 and ends.

11A through 11C are diagrams showing a recursive construction operation for constructing a second type of polarization map. As described above, Figures 3A through 3C provide a matrix based on generation An example of constructing a polarization map, this type of polarization map is called a first type of polarization map, generating a matrix It is called the first type of production matrix. Conversely, the second type of polarization map can be based on a second type of production matrix. The second type of production matrix can be The form does not use the inverse permutation matrix BN, where N = 2n.

Figure 11A shows the generation matrix Corresponding base polarization map 1100A. The structure of the polarization map 1100A is similar to the polarization diagram 300A of FIG. 3A. Element 1101 represents the addition of modulo-2 of two input bits u0-u1. Two virtual bit lanes 1102 and 1103 are formed between two pairs of input and output bits: one between u0 and x0 and the other between u1 and x1. Two bit channels 1102 and 1103 are included in the combined channel W2. The combined channel W2 combines the two usages of the transmission channels for independent transmission of x0 and x1.

Figure 11B shows the generation matrix Corresponding base polarization map 1100B. Polarization map 1100B is constructed based on polarization map 1100A. The two W2 channels are further combined to form a W4 combined channel. Four bit channels 1104-1107 are formed. Unlike the examples of FIGS. 3A to 3C, the bit channels of FIG. 11B are placed at a level. Therefore, the indices of the input and output bits connected by the bit lanes in the polarization map are the same. Figure 11C shows how the N-dimensional polarization map 1100C is constructed based on the combined channel WN/2.

In terms of the nature of the polarization code, the second type of polarization map and generation matrix are identical to the first type of polarization map and generation matrix. The difference between the two encoding methods is that for the same set of input bits, the two output bit sequences produced by the two encodings are arranged in a different order. In particular, performing an inverse permutation operation on one output sequence will generate another output sequence.

Therefore, the polarization code puncturing technique described with reference to the first type of polarization map is also applicable to the second type of polarization map. For example, in the first and second puncturing techniques, the encoded bits to be punctured may be determined with reference to an index directly connected to the input bit of the encoded bit to be punctured. However, since the selection of these input bits is independent of which type of polarization map is employed, for both types of polarization maps, using the input bit index to describe the puncturing selection is a general method. Specifically, for a second type of polarization map, an output bit corresponding to the input bit (which is directly connected to the input bit) is connected to the input bit by a level line indicating the bit channel. Therefore, the index of the output bit is the same as the index of the corresponding input bit. Thus, the first and second puncturing techniques are applicable to the polarization patterns and generation matrices of the first type and the second type.

Thus, at step S1010 of method 1000, generating information for the matrix may include generating a type of matrix. Based on the type of the generated matrix, an index of the output bit to be punctured can be obtained. For example, generating a matrix for the first type The index of the output bit to be punctured can be obtained by reversing the index of the corresponding input bit directly connected to the output bit to be punctured. Instead, generate a matrix for the second type The index of the output bit to be punctured is the same as the index of the corresponding input bit directly connected to the output bit to be punctured. Alternatively, in one example, the rate matching module 220 of FIG. 2 can include a bit inversion module between the polarization encoder 210 and the bit selector 224. When the polarization encoder 210 generates a matrix based on the first type In operation, the bit reverse module can be used to perform bit reverse permutation on the output bits of the polar encoder 210. Therefore, the replaced output bits are reordered to generate a matrix from the second type. The resulting output bits are the same. Therefore, it is possible to follow the generation matrix The way in which the output bits are generated is the same, and the index of the output bit to be punctured is obtained.

Figure 12 illustrates a polarization code puncturing process 1200 in accordance with an embodiment of the present invention. Process 1200 provides the basis for deriving the third polarization code puncturing technique. Process 1200 generates a matrix based on the second type Corresponding polarization map 1204. The mother polarization code generated based on the polarization map 1204 has a length N. At process 1200, the punctured code to be generated has a length M, and the encoded bit to be punctured has a length P = 2q + p. As shown, input bits 1201 with indices of {0, ..., N-1} are equally divided into four input blocks I0-I3. Output bits 1202 with indices of {0, ..., N-1} are equally divided into four output blocks B0-B3.

Process 1200 corresponds to the special case of process 1000 in FIG. Specifically, for the low code rate case, as determined in steps S1020 and S1030, the input bit to be punctured includes the first part (index set A = {0, ..., 2q - 1}) and the second part ( The index set B = {2q + (0, ..., p / 2-1)} U {2n-1 + (0, ..., p / 2-1)}). The first partial index set A includes 2q input bits, and the second partial index set B includes p input bits. For index set B, the first part and the second part of index set B can be represented by two index sets H1 and H2, H1={2q + (0, ..., p/2-1)}, H2={2n-1 + (0, ..., p/2-1)}.

In Fig. 12, when the number (2q) of the first partial input bit 1211 (index set A) is equal to N/4 (i.e., P = 2q + p = N / 4 + p), the second partial input bit ( The index set B) can be equally distributed among the input blocks I1 and I2; the input bit 1212 of the index set H1 is located in the input block I1, and the input bit 1213 of the index set H2 is located in the input block I2. This situation is a special case of process 1000. Therefore, the output bit to be punctured can be determined. Since the polarization map 1204 is a polarization map of the second type, the index of the output bit to be punctured is the same as the index of the input bit to be punctured. As shown, the first portion of the output bit 1221 to be punctured and the second portion of the output bits 1222 and 1223 to be punctured can be determined.

In addition, the input bit to be punctured corresponding to the first portion corresponding to the first input block I0 may be rearranged to facilitate the extraction of the output bits 1221, 1222 and 1223 to be punctured. In particular, output bit 1202 can be rearranged into rearranged output bits 1203. As shown, the output bits 1222-1223 in output blocks B1 and B2 are interleaved with each other in the rearranged output bits 1203. Thus, the output bits in output bits 1222 and 1223 to be punctured are consecutive to each other in an interleaved manner, forming an encoded bit block 1232 to be punctured. Therefore, a continuous range 1233 including the block B0 1231 and the block 1232 of length P can be formed. The continuous range 1233 includes output bits to be punctured. Thus, in one example, when the rearranged output bit 1203 is stored in memory, extracting the output bit to form the punctured code becomes a continuous range 1233 of reading the output bit from the memory, Simplified extraction operations.

Based on the above process 1200, a third polarization code puncturing technique can be derived. Specifically, in an example of the third puncturing technique, when the number P of output bits to be punctured is smaller than the size of the block B0 in the rearranged output bit 1203, the first block B0 Group P output bits are punctured. Conversely, when the number P of output bits to be punctured is greater than the size of block B0, then the first set of P output bits in the rearranged output bit 1203 are punctured. Thus, the rearrangement of the output bits shown in block 1203 in FIG. 12 causes the extraction operation of the output code to be unified and simplified: the last M output bits 1234 are extracted from the rearranged output bits 1203 to generate The code after punching.

Figure 13 illustrates an example method 1300 implementing a third polarization code puncturing technique in accordance with an embodiment of the present invention. The method 1300 begins in step S1301 and ends in step S1399.

At step S1310, the mother polarization code is received. Can be based on a second type of production matrix The mother code is generated by a polarization encoder. Or for the generation matrix by the first type The generated polarization code may perform bit reverse permutation to convert the first type of polarization code into the received second type of mother code. The received second type of mother code may comprise a sequence of encoded bits. The index of the encoded bit sequence is in the index set {0, ..., N-1}. Furthermore, the encoded bit sequence may include a first block indexed {0, ..., i-1}, a second block indexed {i, ..., i+k-1}, index {i+ The third block of k, ..., i+k+k-1}, the second block and the third block each have a length k. For example, where i=N/4, i+k=N/2.

In step S1320, the second block and the third block are interleaved with each other to form a rearranged sequence of encoded bits. For example, the rearranged sequence can be stored in a buffer.

In step S1330, the last M coded bits are extracted from the rearranged encoded bit sequence to generate a punctured code of length M. For example, the last M encoded bits can be read from the buffer. The method 1300 proceeds to step S1399 and ends.

Figure 14 shows an apparatus 1400 for polarization code matching in accordance with an embodiment of the present invention. Device 1400 implements a third polarization code puncturing technique. Device 1400 includes channel encoder 1440 and modulator 1430. Channel encoder 1440 includes a polarization encoder 1410 and a rate matching module 1420. These components are coupled in the manner shown in Figure 14. Device 1400 is similar in function and structure to device 200. The components 1440, 1410, 1430 of Figure 14 are similar in function and structure to the components 240, 210, 230 in the device 200. However, the rate matching module 1420 is different from the rate matching module 220.

Specifically, the rate matching module 1420 can include a bit inversion module 1422, an interleaver 1423, a rearranged output bit buffer 1425, and a bit selector 1424. The rate matching module 1420 is configured to receive the mother code 1402 of length N and thus generate a punctured code 1403 of length M. When the received mother code 1402 is generated based on the polarization map of the second type, the bit reverse module 1422 is configured to perform a bit reverse permutation operation on the received mother code 1402 to generate a reordered mother code. The interleaver 1423 is configured to interleave two encoded bit blocks in the mother code 1402 or to rearrange the rearranged mother codes to generate a rearranged output bit sequence. The rearranged output bit buffer 1425 is configured to store the rearranged output bits. Bit selector 1424 is configured to exclude unpunctured output bits from rearranged output bit buffer 1425 to generate punctured code 1403.

In operation, polarization encoder 1410 performs polarization encoding. In one example, the polarization encoding is based on a first type of generation matrix Generated. Thus, the bit reversal module 1422 can receive the first type of mother code 1402 and perform a bit reverse permutation operation to reorder the mother code. Or, in another example, when the polarization coding is based on a second type of generation matrix The generated bit reverse transposition operation is not performed on the mother code 1402.

Next, the interleaver 1423 can perform an interleaving operation. For example, the initial mother code 1402 or the rearranged mother code may include a sequence of output bits. The output bit sequence can include first, second, and third contiguous blocks. The first block may include A output bits in the sequence. The second and third blocks are of the same length and each include B output bits in the sequence. Thus, rate matching module 1420 can interleave the second and third blocks. Thus, the rearranged sequence can be created and stored into the rearranged output bit buffer 1425. The bit selector 1424 then extracts the last M output bits from the rearranged output bit buffer 1425 and outputs the M output bits as the punctured code 1403.

In various embodiments, channel encoders 240 and 1440 in FIG. 2 or FIG. 14 can be implemented as hardware, software, or a combination thereof. For example, channel encoders 240 and 1440 can be implemented using one or more integrated circuits (ICs), such as dedicated integrated circuits (ASICs), field programmable gate arrays (FPGAs), and the like. For another embodiment, channel encoders 240 and 1440 can be implemented as software or firmware containing a plurality of instructions stored in a computer readable non-volatile storage medium. When the processor circuitry executes these instructions, it will cause the processor circuitry to perform multiple functions of channel encoders 240 and 1440.

Although the rate matching module 1420 shown in FIG. 14 employs a puncturing scheme to implement the rate matching function, it should be understood that in other examples, the rate matching module 1420 can optimize rate matching using more than one rate matching scheme. performance. For example, the rate matching module 1420 can select a rate matching scheme from a variety of rate matching schemes, such as puncturing, shortening, repeating, and the like. The selection may be based, for example, on conditions such as whether the mother code rate (defined as the ratio between the information bit length and the length of the polarization code) is greater than a threshold, whether the mother code length is greater than the code length required for the transmission resource configuration, and the like. Different rate matching schemes can be selected for different scenarios to achieve optimal rate matching performance.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and it is to be understood by those of ordinary skill in the art without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100‧‧‧Wireless communication system

110‧‧‧ mobile devices

111‧‧‧UL channel encoder

112‧‧‧DL channel decoder

113, 124, 201‧‧‧ information bits

114, 123‧‧‧ decoded bits

120‧‧‧Base station

121‧‧‧UL channel decoder

122‧‧‧DL channel encoder

132, 134, 203‧‧‧ code after punching

200, 1400‧‧‧ devices

202‧‧‧ mother polarization code

240‧‧‧Channel Encoder

230‧‧‧ modulator

210‧‧‧Polar encoder

220‧‧‧ rate matching module

222‧‧‧punch controller

224‧‧‧ bit selector

204‧‧‧Freebit location

205‧‧‧ bit position to be punched

300A, 300B, 300C, 400, 500, 600, 800‧‧ ‧ polarization map

321, 322‧‧‧ input bits

341, 342‧‧‧ output bits

301, 302‧‧‧virtual bit channel

361, 363, 401, 501, 601‧‧ first level

362, 364, 402, 502, 602‧‧‧ second level

371, 373, 375‧‧‧ upper block

372, 374, 376‧‧‧ lower blocks

377~380, 421~424, 521~522, 621~628‧‧‧ output blocks

303, 304, 305, 306, 307, 308, 309, 310, 801 ‧ ‧ bit channel

311, 312, 313, 314, 315 and 316‧‧ ‧ sub-bit channels

391, 614‧‧‧ binary index of output bits

392‧‧‧ bit reverse index of output bits

393, 613‧‧‧ binary index of input bits

611~612‧‧‧Input block

1000‧‧‧ method

S1001, S1010~S1050, S1099‧‧‧ steps

1100A, 1100B, 1100C, 1204‧‧‧ polarization map

1102~1103, 1104~1107‧‧‧ bit channel

1201, 1211, 1212, 1213‧‧‧ input bits

1202, 1221, 1222, 1223‧‧‧ output bits

1203‧‧‧ Rearranged output bits

1231, 1232‧‧‧ Coded bit block to be punched

1233‧‧‧Continuous range

1234‧‧‧Last M output bits

1300‧‧‧ method

S1301, S1310~S1330, S1399‧‧‧ steps

1440‧‧‧Channel encoder

1430‧‧‧Transformer

1410‧‧‧Polar encoder

1420‧‧‧ rate matching module

1422‧‧‧ bit reverse module

1423‧‧‧Interlacer

1425‧‧‧Reordered output bit buffer

1424‧‧‧ bit selector

1402‧‧‧ mother code

1403‧‧‧After the punched code

1 is a schematic diagram of a wireless communication system in accordance with an embodiment of the present invention. 2 is a schematic diagram of an apparatus for rate matching according to an embodiment of the present invention. 3A through 3C are schematic diagrams of recursive construction operations for constructing a polarization map, in accordance with an embodiment of the present invention. Figure 4 shows the polarization map of the first conventional puncturing strategy. Figure 5 shows the polarization map of the second conventional puncturing strategy. Figure 6 shows a polarization diagram of an example of a first polarization code puncturing technique in accordance with an embodiment of the present invention. Figures 7A through 7C show a comparison of block error rate (BLER) performance for different puncturing methods by the same simulation experiment. Figure 8 shows a polarization diagram of an example of a second polarization code puncturing technique in accordance with an embodiment of the present invention. Figure 9 shows a comparison of BLER performance for different perforation methods by simulation experiments. Figure 10 illustrates a method of polarization code puncturing in accordance with an embodiment of the present invention. 11A through 11C are diagrams showing a recursive construction operation for constructing a second type of polarization map. Figure 12 illustrates a polarization code puncturing process in accordance with an embodiment of the present invention. Figure 13 illustrates an example process for implementing a third polarization code puncturing technique in accordance with an embodiment of the present invention. Figure 14 shows an apparatus for polarization code matching in accordance with an embodiment of the present invention.

Claims (20)

A method of polarization code puncturing, the method comprising: receiving a mother polarization code comprising a sequence of encoded bits, the sequence of encoded bits having an index {0, ..., N-1}, and including an index of {0, The first block of the coded bit of ..., i-1}, the second block of the coded bit with index {i, ..., i+k-1} and the index are {i+k, ..., i+ a third block of coded bits of k+k-1 }; interleaving the second block of coded bits with the third block of coded bits to form a rearrangement comprising N coded bits a sequence of encoded bits; and extracting the last M encoded bits from the rearranged sequence of encoded bits to generate a perforated code of length M, where i, N, k, M Is a positive integer. According to the polarization code puncturing method of claim 1, wherein i=N/4, i+k=N/2. According to the polarization code puncturing method of claim 1, wherein the mother polarization code is based on a form Generation matrix G _N generated, where Representing the basic matrix The nth-order Kronecker. According to the polarized code punching method of claim 1, wherein the method further comprises: receiving based on the form a polarization code generated by the matrix G _N , where B _N represents a bit inverse permutation matrix, Representing the basic matrix And an nth-order Kronecker product; and performing bit reverse permutation on the received polarization code to generate the mother polarization code. The polarization code puncturing method according to claim 1, wherein the method further comprises: storing the rearranged encoded bit sequence in a buffer, wherein the rearranged encoded bit sequence is extracted from the rearranged encoded bit sequence The last M coded bits include reading the last M coded bits of the rearranged encoded bit sequence from the buffer. An apparatus for polarization code puncturing, the apparatus comprising: an interleaving circuit configured to receive a mother polarization code comprising a sequence of encoded bits, the sequence of encoded bits having an index {0, ..., N-1 } and includes the first block of the encoded bit with the index {0, ..., i-1}, the second block of the encoded bit with the index {i, ..., i+k-1}, and the index { a third block of encoded bits of i+k, ..., i+k+k-1 }, and interleaving the second block of encoded bits with the third block of encoded bits to form a rearranged sequence of encoded bits of N coded bits; and a bit selector configured to extract the last M coded bits from the rearranged sequence of encoded bits to generate a length The code after punching for M. A device for polarizing code punching according to item 6 of the patent application, wherein i = N / 4, i + k = N/2. The device for polarizing code punching according to claim 6 of the patent application scope, wherein the parent polarization code is based on a form Generation matrix G _N generated, where Representing the basic matrix The nth-order Kronecker. An apparatus for polarized code puncturing according to claim 6 of the patent application, further comprising a bit reverse circuit configured to: receive based on a form a polarization code generated by the matrix G _N , where B _N represents a bit inverse permutation matrix, Representing the basic matrix And an nth-order Kronecker product; and performing bit reverse permutation on the received polarization code to generate the mother polarization code. The apparatus for polarized code puncturing according to claim 6 of the patent application, further comprising a buffer configured to store the rearranged sequence of encoded bits, the bit selector being configured to The buffer reads the last M coded bits. A polarization code puncturing method, the method comprising: receiving a mother polarization code comprising a sequence of encoded bits, the sequence of encoded bits being generated by a polarization coder, the polarization coder indexing according to a polarization map An input bit sequence of {0, ..., N-1} is encoded to generate the parent polarization code, wherein the parent polarization code has a length N, N is an n-th power of 2 ⁿ , and generates a punctured a code, the punctured code including an encoded bit sequence excluding P punctured coded bits, where P = 2 ^q + p, q <= n-2, q such that 0 <= p <=2 ^q -1 maximum exponent, and wherein the first portion of the punctured encoded bit includes the input in the polarization map and the index contained in the index set A={0, ..., 2 ^q - 1} The encoded bit that the bit is directly connected to. The polarization code puncturing method according to claim 11, wherein the second portion of the punctured coded bit includes a direct connection of the polarization bit to an input bit indexed in the index set B1. Encoded bit, where B1={2 ^q +0, 2 ^q +1, ..., 2 ^q +(p/2-1)}U{2 ^n-1 +0, 2 ^n-1 +1, ..., 2 ^n-1 + (p/2-1)}. According to the polarization code puncturing method of claim 11, wherein the second portion of the punctured coded bit includes the direct connection of the input bit in the polarization map and the index included in the index set B2. Encoded bit, where B2 = {2 ^q + q bit 0 bit reverse, 2 ^q + q bit 1 bit reverse, ..., 2 ^q + q bit (p-1 The bit reverses}. According to the polarization code puncturing method of claim 11, further comprising: determining the first portion of the punctured coded bit; and determining that the second portion of the punctured coded when the code rate is greater than a threshold The bit is an encoded bit in the polarization map directly connected to the input bit indexed in the index set B1, wherein the code rate is equal to the ratio of the information bit length to the punctured code length, where B1 ={2 ^q +0, 2 ^q +1, ..., 2 ^q +(p/2-1)}U{2 ^n-1 +0, 2 ^n-1 +1, ..., 2 ^n-1 + (p /2-1)}. According to the polarized code puncturing method of claim 14, the method further comprises: when the code rate is less than the threshold, determining that the second portion of the punctured coded bit is included in the polarization map and the index The coded bit in the index set B2 is directly connected to the coded bit, where B2 = {2 ^q + q bit 0 bit reverse, 2 ^q + q bit 1 bit reverse, ..., 2 (p-1) bit inversion of ^q + q bits}. An apparatus for polarization code puncturing, the apparatus comprising a bit selector circuit configured to: receive a mother polarization code comprising a sequence of encoded bits, the sequence of encoded bits being Generating by a polarization coder that encodes an input bit sequence indexed {0, ..., N-1} according to a polarization map to generate the mother polarization code, wherein the mother polarization code length is N, N is a power of 2 ^{n n} 2 ; and generates a punctured code, the punctured code including an encoded bit sequence excluding P punctured coded bits, where P = 2 ^q +p,q<=n-2,q is the maximum exponent such that 0<=p<=2 ^q -1 , and wherein the first portion of the punctured encoded bit includes the index and the index The encoded bit directly connected to the input bit in the index set A={0, ..., 2 ^q - 1}. The apparatus for polarized code puncturing according to claim 16 wherein the second portion of the punctured coded bit includes an input bit in the polarization map and the index included in the index set B1. Directly connected coded bits, where B1={2 ^q +0, 2 ^q +1, ..., 2 ^q +(p/2-1)}U{2 ^n-1 +0, 2 ^n-1 +1 , ..., 2 ^n-1 + (p/2-1)}. The apparatus for polarizing code puncturing according to claim 16 wherein the second portion of the punctured coded bit includes an input bit in the polarization map and the index included in the index set B2. Directly connected code bit, where B2 = {2 ^q + q bit 0 bit reverse, 2 ^q + q bit 1 bit reverse, ..., 2 ^q + q bit (p -1) bit reverse}. The apparatus for polarizing code puncturing according to claim 16 of the patent application, further comprising a puncturing controller circuit configured to: determine the first portion of the punctured encoded bit; When the code rate is greater than the threshold, determining that the second portion of the punctured coded bit is an encoded bit in the polarization map directly connected to the input bit indexed in the index set B1, wherein the code rate Is equal to the ratio of the length of the information bit to the length of the code after the puncturing, where B1={2 ^q +0, 2 ^q +1, ..., 2 ^q +(p/2-1)}U{2 ^n-1 + 0, 2 ^n-1 +1, ..., 2 ^n-1 + (p/2-1)}. According to the apparatus for polarizing code puncturing in claim 19, the puncturing controller circuit is further configured to: when the code rate is less than the threshold, determine the second portion of the punctured coded bit The element is the coded bit in the polarization map directly connected to the input bit indexed in the index set B2, where B2 = {2 ^q + q bit 0 bit reverse, 2 ^q + q bit The bit of 1 of the element is reversed, ..., the bit of (p-1) of 2 ^q + q bits is reversed}.