TWI646871B - Multi-layer circuit board - Google Patents
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Abstract
一種多層電路板,包含一下電路層、一上電路層以及一中間層。下電路層具有一基底設置面以及一基底電路,基底電路設置於基底設置面。基底電路具有複數條導線以及一疊合結構,疊合結構由至少兩條導線交錯疊合組成的疊合結構。疊合結構的厚度,大於基底電路其他部分的厚度。上電路層具有一上層設置面及一上層電路,上層電路設置於上層設置面,並且上電路層以上層設置面朝向基底設置面設置。中間層設置於基底設置面以及上層設置面之間;中間層還具有一容置空間,容置空間的位置對應於疊合結構。疊合結構中的導線交錯疊合處位於容置空間中,避免中間層直接對疊於疊合結構上。A multilayer circuit board comprising a lower circuit layer, an upper circuit layer, and an intermediate layer. The lower circuit layer has a substrate mounting surface and a base circuit, and the base circuit is disposed on the substrate mounting surface. The base circuit has a plurality of wires and a stacked structure, and the stacked structure is a stacked structure in which at least two wires are alternately stacked. The thickness of the laminated structure is greater than the thickness of other portions of the substrate circuit. The upper circuit layer has an upper layer setting surface and an upper layer circuit, the upper layer circuit is disposed on the upper layer setting surface, and the upper circuit layer upper layer setting surface is disposed toward the substrate setting surface. The intermediate layer is disposed between the substrate setting surface and the upper layer setting surface; the intermediate layer further has an accommodating space, and the position of the accommodating space corresponds to the overlapping structure. The staggered overlap of the wires in the laminated structure is located in the accommodating space, so that the intermediate layer is not directly overlapped on the stacked structure.
Description
本發明係有關於電路板的層結構,特別是關於一種多層電路板。 The present invention relates to a layer structure of a circuit board, and more particularly to a multilayer circuit board.
如圖1,多層電路板,例如用於筆記型電腦鍵盤模組的多層電路板,係以一絕緣的中間層2,隔離兩個不同的電路層4、6,讓兩個電路層4、6上的導線各自走線,而不發生不必要的短路。以圖1下層的電路層6為例,由於線路的安排,有時導線1、1a需要交錯配置但不互相導通,就需要設置跳線結構。跳線結構是由導線1、電絕緣層3以及導線1a互相交疊的疊合結構,最後上層的電路層4在覆蓋於疊合結構上。如圖1所示,在疊合結構的影響下,多層電路板上會出現局部厚度增加的凸起部分,而影響多層電路板的平整度。 As shown in FIG. 1, a multi-layer circuit board, such as a multi-layer circuit board for a notebook computer keyboard module, is separated by an insulating intermediate layer 2 to separate two different circuit layers 4, 6 so that the two circuit layers 4, 6 The wires on the wires are routed without unnecessary short circuits. Taking the circuit layer 6 in the lower layer of FIG. 1 as an example, due to the arrangement of the lines, sometimes the wires 1 and 1a need to be staggered but not electrically connected to each other, and a jumper structure needs to be provided. The jumper structure is a laminated structure in which the wires 1, the electrically insulating layer 3, and the wires 1a overlap each other, and finally the circuit layer 4 of the upper layer is overlaid on the laminated structure. As shown in Fig. 1, under the influence of the laminated structure, a convex portion having a local thickness increase occurs on the multilayer circuit board, which affects the flatness of the multilayer circuit board.
疊合結構造成局部厚度增加的狀況,也會出現在多層電路板的其他部分。 The situation in which the laminated structure causes an increase in local thickness also occurs in other parts of the multilayer circuit board.
如圖2及圖3所示,位於多層電路板下層的電路層6,具有對外延伸形成的排線段7,排線段7上彙整所有需要對外連接的導線1,並分別連接到接觸墊5。排線段7上除了接觸墊5之外,需要以保護膜8進行保護 導線1。一般而言,保護膜8觸了覆蓋於排線段7之外,也會局部地疊合於上層的電路層4之上,或是局部地插入上層的電路層4與中間層2之間。前述的狀況,會形成由保護膜8、上層電路層4、中間層2以及下層電路層6依序層疊的疊合結構。前述過度堆疊的疊合結構,同樣造成局部厚度增加的狀況,而影響多層電路板的平整度。 As shown in FIG. 2 and FIG. 3, the circuit layer 6 located on the lower layer of the multi-layer circuit board has a cable segment 7 extending outwardly. The wire segment 7 is connected to all the wires 1 to be externally connected, and is respectively connected to the contact pads 5. In addition to the contact pad 5, the wire segment 7 needs to be protected by the protective film 8. Wire 1. In general, the protective film 8 touches the outside of the wiring section 7, and is partially overlapped on the upper circuit layer 4 or partially inserted between the upper circuit layer 4 and the intermediate layer 2. In the above-described situation, a superposed structure in which the protective film 8, the upper circuit layer 4, the intermediate layer 2, and the lower circuit layer 6 are sequentially laminated is formed. The aforementioned over-stacked superposed structure also causes a local thickness increase condition and affects the flatness of the multilayer circuit board.
鑑於上述問題,本發明提出一種多層電路板,避免形成過度堆疊的疊合結構,而維持多層電路板的平整度。 In view of the above problems, the present invention proposes a multilayer circuit board that avoids forming an over-stacked stacked structure while maintaining the flatness of the multilayer circuit board.
為達成上述目的,本發明提出一種多層電路板,包含一下電路層、一上電路層以及一中間層。下電路層具有一基底設置面以及一基底電路,基底電路設置於基底設置面,基底電路具有複數條導線以及一疊合結構,疊合結構由至少兩條導線交錯疊合組成,其中疊合結構的厚度,大於基底電路其他部分的厚度。上電路層具有一上層設置面及一上層電路,上層電路設置於上層設置面,並且上電路層以上層設置面朝向基底設置面。中間層設置於基底設置面以及上層設置面之間。中間層具有一容置空間,容置空間的位置對應於疊合結構,並且疊合結構中的導線交錯疊合處位於容置空間中。藉由疊合結構中的導線交錯疊合處位於容置空間,避免了疊合結構上進一步堆疊層結構,從而避免局部凸起增加厚度的狀況。 To achieve the above object, the present invention provides a multilayer circuit board comprising a lower circuit layer, an upper circuit layer and an intermediate layer. The lower circuit layer has a substrate mounting surface and a base circuit, the base circuit is disposed on the substrate mounting surface, the base circuit has a plurality of wires and a stacked structure, and the stacked structure is composed of at least two wires alternately stacked, wherein the laminated structure The thickness is greater than the thickness of other portions of the substrate circuit. The upper circuit layer has an upper layer setting surface and an upper layer circuit, the upper layer circuit is disposed on the upper layer setting surface, and the upper circuit layer upper layer setting surface faces the substrate setting surface. The intermediate layer is disposed between the substrate setting surface and the upper layer setting surface. The intermediate layer has an accommodating space, and the position of the accommodating space corresponds to the merging structure, and the staggered overlapping of the wires in the merging structure is located in the accommodating space. By staggering the overlapping portions of the wires in the overlapping structure in the accommodating space, the stacked structure is further stacked on the overlapping structure, thereby avoiding the situation in which the local bulging increases the thickness.
於本發明至少一實施例中,多層電路板更包含一電絕緣層,設置於疊合結構中,隔離交錯疊合的導線。 In at least one embodiment of the present invention, the multilayer circuit board further includes an electrically insulating layer disposed in the stacked structure to isolate the interleaved wires.
於本發明至少一實施例中,中間層具有至少一穿孔,且基底電路以及上層電路分別具有一開關接觸墊,二開關接觸墊的位置對應於穿孔的位置。 In at least one embodiment of the invention, the intermediate layer has at least one perforation, and the base circuit and the upper circuit respectively have a switch contact pad, and the positions of the two switch contact pads correspond to the positions of the perforations.
於本發明至少一實施例中,疊合結構中的導線交錯疊合處與上層設置面之間具有一間隔距離。 In at least one embodiment of the present invention, the staggered overlap of the wires in the stacked structure has a separation distance from the upper set surface.
本發明又提出一種多層電路板,包含一下電路層、一上電路層、一中間層以及一保護層。下電路層具有一基底設置面以及一基底電路,基底電路設置於基底設置面,基底電路具有複數條導線,且基底設置面的一側邊緣向外延伸形成一連接部,基底電路延伸至連接部。上電路層具有一上層設置面以及一上層電路,上層電路設置於上層設置面,上電路層以上層設置面朝向基底設置面設置。中間層設置於基底設置面以及上層設置面之間。保護層覆蓋於連接部上的基底電路。保護層與上電路層不重複交疊於中間層上,從而避免局部凸起增加厚度的狀況。 The invention further proposes a multilayer circuit board comprising a lower circuit layer, an upper circuit layer, an intermediate layer and a protective layer. The lower circuit layer has a substrate mounting surface and a base circuit. The base circuit is disposed on the substrate mounting surface. The base circuit has a plurality of wires, and one side edge of the substrate mounting surface extends outward to form a connecting portion, and the base circuit extends to the connecting portion. . The upper circuit layer has an upper layer setting surface and an upper layer circuit, the upper layer circuit is disposed on the upper layer setting surface, and the upper circuit layer upper layer setting surface is disposed toward the substrate setting surface. The intermediate layer is disposed between the substrate setting surface and the upper layer setting surface. The protective layer covers the base circuit on the connection portion. The protective layer and the upper circuit layer are not repeatedly overlapped on the intermediate layer, thereby avoiding a situation in which the local protrusions are increased in thickness.
於本發明至少一實施例中,中間層具有一退縮區,退縮區使得中間層130的邊緣跟連接部之間保持間隔距離。 In at least one embodiment of the invention, the intermediate layer has a retraction zone that maintains a spacing between the edges of the intermediate layer 130 and the connection.
於本發明至少一實施例中,連接部具有一連接部末端,遠離基底設置面的一端,連接部末端設置複數個導電接觸墊,連接於基底電路延伸於連接部的部份,且保護層暴露導電接觸墊。 In at least one embodiment of the present invention, the connecting portion has a connecting end end away from the end of the substrate receiving surface, and the connecting portion end is provided with a plurality of conductive contact pads connected to the portion of the base circuit extending from the connecting portion, and the protective layer is exposed. Conductive contact pads.
於本發明至少一實施例中,保護層與中間層為一體成形,而自中間層向外延伸。 In at least one embodiment of the invention, the protective layer is integrally formed with the intermediate layer and extends outwardly from the intermediate layer.
於本發明至少一實施例中,連接部包含一連接部根部,連接基底設置面與連接部,且上電路層具有延伸部,延伸覆蓋連接部接近連接部根部的部份,且連接部由保護層覆蓋。 In at least one embodiment of the present invention, the connecting portion includes a connecting portion root portion that connects the base mounting surface and the connecting portion, and the upper circuit layer has an extending portion that extends over the portion of the connecting portion that is close to the root portion of the connecting portion, and the connecting portion is protected Layer coverage.
於本發明至少一實施例中,保護層自上電路層向外延伸。 In at least one embodiment of the invention, the protective layer extends outwardly from the upper circuit layer.
於本發明至少一實施例中,中間層形成一退縮區使得中間層的邊緣跟連接部之間保持間隔距離。 In at least one embodiment of the invention, the intermediate layer forms a recessed region such that the edges of the intermediate layer are spaced apart from the connecting portion.
本發明又提出一種多層電路板,包含一中間層、一第一電路層以及一第二電路層。中間層具有一容置空間與一穿孔。第一電路層設置於中間層的第一側,第一電路層具有一第一導線、一第二導線以及一電絕緣層,於容置空間的垂直投影區域中,第一導線、電絕緣層和第二導線間依序堆疊而形成一疊合結構,第二導線跨過電絕緣層而延伸在第一導線的兩相對側,且藉由電絕緣層阻隔使第一導線和第二導線間保持電性隔離。第二電路層設置於中間層的第二側,第一電路層與第二電路層分別位於中間層的兩相對側,第二電路層具有一第三導線,多層電路板可被按壓變形,使第三導線穿過穿孔而與第一導線及第二導線其中之一導通。疊合結構高度大於第一導線高度,在垂直方向上,疊合結構部分進入容置空間中。避免了疊合結構上進一步堆疊層結構,從而避免局部凸起增加厚度的狀況。 The invention further provides a multilayer circuit board comprising an intermediate layer, a first circuit layer and a second circuit layer. The intermediate layer has an accommodating space and a perforation. The first circuit layer is disposed on the first side of the intermediate layer, the first circuit layer has a first wire, a second wire, and an electrically insulating layer. The first wire and the electrically insulating layer are in a vertical projection area of the accommodating space. And stacking a second wire to form a stacked structure, the second wire extends across the electrically insulating layer on opposite sides of the first wire, and is blocked by the electrically insulating layer to make the first wire and the second wire Maintain electrical isolation. The second circuit layer is disposed on the second side of the intermediate layer, the first circuit layer and the second circuit layer are respectively located on opposite sides of the intermediate layer, and the second circuit layer has a third wire, and the multilayer circuit board can be pressed and deformed, so that The third wire passes through the through hole and is electrically connected to one of the first wire and the second wire. The height of the laminated structure is greater than the height of the first wire, and in the vertical direction, the overlapping structure portion enters the accommodating space. Further stacking of the layer structure on the laminated structure is avoided, thereby avoiding the situation in which the local protrusions are increased in thickness.
如於本發明至少一實施例中,疊合結構在水平方向上具有一第一尺寸,容置空間在水平方向上具有一第二尺寸,第一尺寸小於第二尺寸,使得疊合結構週緣與中間層在水平方向上保持分離。 In at least one embodiment of the present invention, the superposed structure has a first dimension in a horizontal direction, and the accommodating space has a second dimension in a horizontal direction, and the first dimension is smaller than the second dimension, so that the periphery of the superposed structure is The intermediate layer remains separated in the horizontal direction.
本發明又提出一種多層電路板,包含一中間層、一第一電路層以及一第二電路層。第一電路層設置於中間層的第一側,第一電路層具有一第一導線、一導電接觸墊、一第一本體部以及一連接部,連接部具有相對的一連接部根部與一連接部末端,連接部根部和第一本體部相連結,導電接觸墊位於連接部末端,第一導線自第一本體部延伸至連接部而電性耦接於導電接觸墊。第二電路層設置於中間層的第二側,第一電路層與第二電路層分別位於中間層的兩相對側,第二電路層僅延伸在第一本體部垂直投影區域內,但未延伸到連接部垂直投影區域內。保護層具有相對的一保護層根部與一保護層末端,保護層根部與第二電路層部分重疊,但保護層根部並未延伸到中間層垂直投影區域內,保護層覆蓋導電接觸墊以外的連接部表面。 The invention further provides a multilayer circuit board comprising an intermediate layer, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the first side of the intermediate layer, the first circuit layer has a first wire, a conductive contact pad, a first body portion, and a connecting portion, the connecting portion has an opposite connecting portion and a connecting portion The end of the connecting portion is connected to the first body portion, and the conductive contact pad is located at the end of the connecting portion. The first wire extends from the first body portion to the connecting portion and is electrically coupled to the conductive contact pad. The second circuit layer is disposed on the second side of the intermediate layer, the first circuit layer and the second circuit layer are respectively located on opposite sides of the intermediate layer, and the second circuit layer extends only in the vertical projection area of the first body portion, but is not extended Go to the vertical projection area of the connection. The protective layer has an opposite protective layer root and a protective layer end, and the protective layer root partially overlaps the second circuit layer, but the protective layer root does not extend into the vertical projection area of the intermediate layer, and the protective layer covers the connection other than the conductive contact pad. Surface.
本發明又提出一種多層電路板,包含一中間層、一第一電路層以及一第二電路層。第一電路層設置於中間層的第一側,第一電路層具有一第一導線、一導電接觸墊、一第一本體部、以及一連接部,連接部具有相對的一連接部根部與一連接部末端,連接部根部和第一本體部相連結,導電接觸墊位於連接部末端,第一導線自第一本體部延伸至連接部而電性耦接於導電接觸墊。第二電路層設置於中間層的第二側,第一電路層與第二電路層分別位於中間層的兩相對側,第二電路層僅延伸在第一本體部垂直投影區域內,但未延伸到連接部垂直投影區域內。中間層自第一本體部垂直投影區域延伸到連接部垂直投影區域,且中間層覆蓋導電接觸墊以外的連接部表面。 The invention further provides a multilayer circuit board comprising an intermediate layer, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the first side of the intermediate layer, the first circuit layer has a first wire, a conductive contact pad, a first body portion, and a connecting portion, the connecting portion has an opposite connecting portion root and a The connecting portion has a root portion connected to the first body portion, and the conductive contact pad is located at the end of the connecting portion. The first wire extends from the first body portion to the connecting portion to be electrically coupled to the conductive contact pad. The second circuit layer is disposed on the second side of the intermediate layer, the first circuit layer and the second circuit layer are respectively located on opposite sides of the intermediate layer, and the second circuit layer extends only in the vertical projection area of the first body portion, but is not extended Go to the vertical projection area of the connection. The intermediate layer extends from the vertical projection area of the first body portion to the vertical projection area of the connection portion, and the intermediate layer covers the surface of the connection portion other than the conductive contact pads.
本發明又提出一種多層電路板,包含一中間層、一第一電路層以及一第二電路層。第一電路層設置於中間層的第一側,第一電路層具有一第一導線、一導電接觸墊、一第一本體部、以及一連接部,連接部具有相對的一連接部根部與一連接部末端,連接部根部和第一本體部相連結,導電接觸墊位於連接部末端,第一導線自第一本體部延伸至連接部而電性耦接於導電接觸墊。第二電路層設置於中間層的第二側,第一電路層與第二電路層分別位於中間層的兩相對側,第二電路層自第一本體部垂直投影區域延伸到連接部垂直投影區域,且第二電路層覆蓋導電接觸墊以外的連接部表面。 The invention further provides a multilayer circuit board comprising an intermediate layer, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the first side of the intermediate layer, the first circuit layer has a first wire, a conductive contact pad, a first body portion, and a connecting portion, the connecting portion has an opposite connecting portion root and a The connecting portion has a root portion connected to the first body portion, and the conductive contact pad is located at the end of the connecting portion. The first wire extends from the first body portion to the connecting portion to be electrically coupled to the conductive contact pad. The second circuit layer is disposed on the second side of the intermediate layer, the first circuit layer and the second circuit layer are respectively located on opposite sides of the intermediate layer, and the second circuit layer extends from the vertical projection area of the first body portion to the vertical projection area of the connection portion And the second circuit layer covers the surface of the connection other than the conductive contact pads.
本發明主要係針對多層電路板中,可能發生層結構過度堆疊的部份,移除局部層結構,藉以避免過度的層結構堆疊而導致局部厚度過大的問題,維持了多層電路板的平整度以及平均厚度。 The present invention is mainly directed to a portion of a multi-layer circuit board in which excessive layer stacking may occur, and the partial layer structure is removed, thereby avoiding excessive layer structure stacking and causing excessive local thickness, maintaining the flatness of the multilayer circuit board and The average thickness.
1‧‧‧導線 1‧‧‧ wire
1a‧‧‧導線 1a‧‧‧Wire
2‧‧‧中間層 2‧‧‧Intermediate
3‧‧‧電絕緣層 3‧‧‧Electrical insulation
4‧‧‧電路層 4‧‧‧ circuit layer
5‧‧‧接觸墊 5‧‧‧Contact pads
6‧‧‧電路層 6‧‧‧ circuit layer
7‧‧‧排線段 7‧‧‧Line segment
8‧‧‧保護膜 8‧‧‧Protective film
10‧‧‧筆記型電腦鍵盤模組 10‧‧‧Note Computer Keyboard Module
13‧‧‧按鍵座 13‧‧‧Keypad
14‧‧‧按鍵帽 14‧‧‧ button cap
16‧‧‧彈性裝置 16‧‧‧Flexible device
18‧‧‧底板 18‧‧‧floor
100‧‧‧多層電路板 100‧‧‧Multilayer circuit board
110‧‧‧下電路層 110‧‧‧lower circuit layer
111‧‧‧基底設置面 111‧‧‧Base setting surface
112‧‧‧基底電路 112‧‧‧Base circuit
112a‧‧‧導線 112a‧‧‧Wire
112b‧‧‧開關接觸墊 112b‧‧‧Switch contact pad
112c‧‧‧導電接觸墊 112c‧‧‧Electrical contact pads
116‧‧‧電絕緣層 116‧‧‧Electrical insulation
117‧‧‧本體部 117‧‧‧ Body Department
118‧‧‧疊合結構 118‧‧‧Multilayer structure
120‧‧‧上電路層 120‧‧‧Upper circuit layer
121‧‧‧上層設置面 121‧‧‧Upper setting surface
122‧‧‧上層電路 122‧‧‧Upper Circuit
122a‧‧‧開關接觸墊 122a‧‧‧Switch contact pad
122b‧‧‧開關接觸墊 122b‧‧‧Switch contact pad
128‧‧‧延伸部 128‧‧‧Extension
130‧‧‧中間層 130‧‧‧Intermediate
132‧‧‧穿孔 132‧‧‧Perforation
134‧‧‧容置空間 134‧‧‧ accommodating space
138‧‧‧退縮區 138‧‧‧Retraction zone
140‧‧‧連接部 140‧‧‧Connecting Department
140a‧‧‧連接部根部 140a‧‧‧Connector root
140b‧‧‧連接部末端 140b‧‧‧End of the joint
150‧‧‧保護層 150‧‧‧protection layer
200‧‧‧多層電路板 200‧‧‧Multilayer circuit board
210‧‧‧第一電路層 210‧‧‧First circuit layer
211‧‧‧第一本體部 211‧‧‧First Body Department
212‧‧‧第一導線 212‧‧‧First wire
213‧‧‧連接部 213‧‧‧Connecting Department
213a‧‧‧連接部根部 213a‧‧‧Connecting root
213b‧‧‧連接部末端 213b‧‧‧End of the joint
214‧‧‧第二導線 214‧‧‧second wire
216‧‧‧電絕緣層 216‧‧‧Electrical insulation
217‧‧‧導電接觸墊 217‧‧‧Electrical contact pads
218‧‧‧疊合結構 218‧‧ ‧ superposed structure
220‧‧‧第二電路層 220‧‧‧Second circuit layer
222‧‧‧第三導線 222‧‧‧ Third wire
230‧‧‧中間層 230‧‧‧Intermediate
230a‧‧‧第一側 230a‧‧‧ first side
230b‧‧‧第二側 230b‧‧‧ second side
232‧‧‧穿孔 232‧‧‧Perforation
234‧‧‧容置空間 234‧‧‧ accommodating space
250‧‧‧保護層 250‧‧‧protective layer
250a‧‧‧保護層根部 250a‧‧‧protection root
250b‧‧‧保護層末端 250b‧‧‧End of protective layer
W1‧‧‧第一尺寸 W1‧‧‧ first size
W2‧‧‧第二尺寸 W2‧‧‧ second size
圖1為先前技術中的多層電路板之剖面圖,揭示層結構直接堆疊於疊合結構上;圖2及圖3為先前技術中的多層電路板之剖面圖,揭示保護層與其他層結構的過度堆疊;圖4為應用本發明實施例之筆記型電腦鍵盤模組的分解立體圖;圖5為本發明第一實施例的分解立體圖;圖6為本發明第一實施例中,部分元件結合後的立體圖; 圖7為本發明第一實施例中,多層電路板的立體圖;圖8為本發明第一實施例中,疊合結構的放大立體圖;圖9為本發明第一實施例中,多層電路板的剖面圖;圖10為本發明第二實施例中,疊合結構的放大立體圖;圖11為本發明第二實施例中,多層電路板的剖面分解圖;圖12為本發明第三實施例的分解立體圖;圖13及圖14為本發明第三實施例之剖面圖,揭示保護層與其他層結構的堆疊狀態;圖15為本發明第四實施例中,多層電路板的剖面分解圖;圖16為本發明第五實施例的分解立體圖;圖17為本發明第六實施例的分解立體圖;圖18為本發明第六實施例中,多層電路板的立體圖;圖19為本發明第六實施例之剖面圖,揭示保護層與其他層結構的堆疊狀態;圖20為本發明第七實施例中,多層電路板的剖面分解圖;圖21為本發明第八實施例的分解立體圖;圖22為本發明第八實施例之剖面圖,揭示保護層與其他層結構的堆疊狀態;圖23為本發明第九實施例中,多層電路板的剖面分解圖。 1 is a cross-sectional view of a prior art multilayer circuit board, revealing that the layer structure is directly stacked on the stacked structure; FIGS. 2 and 3 are cross-sectional views of the prior art multilayer circuit board, revealing the protective layer and other layer structures. FIG. 4 is an exploded perspective view of a notebook computer keyboard module according to an embodiment of the present invention; FIG. 5 is an exploded perspective view of the first embodiment of the present invention; Stereogram Figure 7 is a perspective view of a multilayer circuit board in a first embodiment of the present invention; Figure 8 is an enlarged perspective view of a laminated structure in a first embodiment of the present invention; Figure 9 is a multilayer circuit board in a first embodiment of the present invention; FIG. 10 is an enlarged perspective view of a laminated structure according to a second embodiment of the present invention; FIG. 11 is a cross-sectional exploded view of a multilayer circuit board according to a second embodiment of the present invention; FIG. 13 and FIG. 14 are cross-sectional views showing a stacked state of a protective layer and other layer structures according to a third embodiment of the present invention; FIG. 15 is an exploded perspective view showing a multilayer circuit board according to a fourth embodiment of the present invention; 16 is an exploded perspective view of a fifth embodiment of the present invention; FIG. 17 is an exploded perspective view of a sixth embodiment of the present invention; FIG. 18 is a perspective view of a multilayer circuit board according to a sixth embodiment of the present invention; FIG. 20 is a cross-sectional exploded view of a multilayer circuit board in accordance with a seventh embodiment of the present invention; FIG. 21 is an exploded perspective view of the eighth embodiment of the present invention; FIG. For the present invention Sectional view of the eighth embodiment, the protective layer is disclosed in a stacked state with other layers of the structure; the ninth embodiment, the cross section of the multilayer circuit board 23 is an exploded view of the present disclosure.
為使得對本發明的內容有更清楚及更準確的理解,現將結合附圖詳細說明,說明書附圖示出本發明的實施例的示例,其中,相同的標號表示相同的組件。可以理解的是,說明書附圖示出的比例並非本發明實際實施的比例,其僅為示意說明為目的,並未依照原尺寸作圖。 The present invention will be described in detail with reference to the accompanying drawings, in which FIG. It is to be understood that the proportions shown in the drawings are not intended to be a
請參閱圖4所示,為本發明第一實施例所揭露的一種多層電路板100。所述多層電路板100可為一軟式電路板(Flexible Printed Circuit,FPC),可作為筆記型電腦鍵盤模組10的開關電路層。前述的圖中所示鍵盤模組10係為簡化示意說明,並非限定本發明所適用之配置形式。鍵盤模組10包含複數個按鍵帽14、複數個彈性裝置16以及一底板18。按鍵帽14的底面具有一碰觸結構15。該複數個彈性裝置16設置於多層電路板100上,並各別抵接於一碰觸結構15。多層電路板100設置於複數個按鍵帽14與底板18之間。 Please refer to FIG. 4, which illustrates a multilayer circuit board 100 according to a first embodiment of the present invention. The multi-layer circuit board 100 can be a flexible printed circuit (FPC) and can be used as a switch circuit layer of the notebook computer keyboard module 10. The keyboard module 10 shown in the foregoing figures is a simplified schematic description and does not limit the configuration form to which the present invention is applicable. The keyboard module 10 includes a plurality of button caps 14, a plurality of elastic devices 16, and a bottom plate 18. The bottom surface of the button cap 14 has a contact structure 15. The plurality of elastic devices 16 are disposed on the multilayer circuit board 100 and respectively abut against a touch structure 15 . The multilayer circuit board 100 is disposed between the plurality of button caps 14 and the bottom plate 18.
如圖5、圖6以及圖7所示,多層電路板100包含一下電路層110、一上電路層120以及一中間層130。下電路層110、中間層130以及上電路層120層疊結合而構成多層電路板100,且中間層130位於下電路層110以及上電路層120之間。 As shown in FIGS. 5, 6, and 7, the multilayer circuit board 100 includes a lower circuit layer 110, an upper circuit layer 120, and an intermediate layer 130. The lower circuit layer 110, the intermediate layer 130, and the upper circuit layer 120 are laminated to form a multilayer circuit board 100, and the intermediate layer 130 is located between the lower circuit layer 110 and the upper circuit layer 120.
如圖5所示,下電路層110具有一基底設置面111以及一基底電路112,基底電路112設置於基底設置面111。基底電路112具有複數條導線112a以及一疊合結構118,疊合結構118由至少兩條導線112a交錯疊合組成。疊合結構118的厚度,大於基底電路112其他部分的厚度。疊合結構118可為一條導線112a交錯疊合於另一條導線112a、一條導線112a交錯疊合於多條導線112a,或是多條導線112a與多條導線112a交錯。 As shown in FIG. 5, the lower circuit layer 110 has a substrate mounting surface 111 and a base circuit 112, and the base circuit 112 is disposed on the substrate mounting surface 111. The base circuit 112 has a plurality of wires 112a and a stacking structure 118, and the stacked structure 118 is composed of at least two wires 112a alternately stacked. The thickness of the laminated structure 118 is greater than the thickness of other portions of the substrate circuit 112. The laminated structure 118 may be one in which one wire 112a is alternately laminated on the other wire 112a, one wire 112a is alternately laminated on the plurality of wires 112a, or a plurality of wires 112a are interlaced with the plurality of wires 112a.
如圖8以及圖9所示,多層電路板100更包含一電絕緣層116,設置於疊合結構118中,隔離交錯疊合的導線112a。電絕緣層116可由紫外線膠(UV膠)等粘著膠料固化而成,或是由絕緣材料製作的薄膜貼附於下方的導線112a上。電絕緣層116使兩條導線112a不會互相短路。 As shown in FIG. 8 and FIG. 9, the multilayer circuit board 100 further includes an electrically insulating layer 116 disposed in the laminated structure 118 to isolate the interleaved wires 112a. The electrically insulating layer 116 may be formed by curing an adhesive such as a UV adhesive or a film made of an insulating material attached to the lower wire 112a. The electrically insulating layer 116 prevents the two wires 112a from being shorted to each other.
如圖8所示,位於下方的導線112a設置先以印刷電路製程設置於基底設置面111,接著於導線112a上覆蓋電絕緣層116。前述的電絕緣層116除了覆蓋於導線112a上,也會延伸覆蓋於導線112a兩側的基底設置面111。最後再製作另一條交錯於其上的導線112a,使上方的導線112a延伸於下方導線112a的兩相對側。疊合結構118的最大厚度是兩條導線112a厚度加上電絕緣層116的厚度,疊合結構118其餘部分的厚度則是導線112a的厚度加上電絕緣層116的厚度。因此,疊合結構118的厚度大於基底電路112其他部分的厚度,而在疊合結構118及周遭部分形成一個在基底設置面111上局部凸起的區域。需注意的是圖式中的厚度比例係為了凸顯並說明疊合結構118中的厚度變化狀況,並非實際厚度比例。 As shown in FIG. 8, the lower wire 112a is disposed on the substrate mounting surface 111 in a printed circuit process, and then the electrically insulating layer 116 is covered on the wire 112a. The foregoing electrically insulating layer 116 extends over the wire 112a and also extends over the substrate mounting surface 111 on both sides of the wire 112a. Finally, another wire 112a interleaved thereon is fabricated such that the upper wire 112a extends over opposite sides of the lower wire 112a. The maximum thickness of the laminated structure 118 is the thickness of the two wires 112a plus the thickness of the electrically insulating layer 116. The thickness of the remainder of the laminated structure 118 is the thickness of the wires 112a plus the thickness of the electrically insulating layer 116. Therefore, the thickness of the laminated structure 118 is greater than the thickness of other portions of the base circuit 112, and a region partially raised on the substrate seating surface 111 is formed in the laminated structure 118 and the peripheral portion. It should be noted that the thickness ratio in the drawings is intended to highlight and illustrate the thickness variation in the laminated structure 118, not the actual thickness ratio.
如圖5所示,上電路層120具有一上層設置面121以及一上層電路122,上層電路122設置於上層設置面121。上電路層120以上層設置面121朝向基底設置面111,而設置於基底設置面111上方。 As shown in FIG. 5, the upper circuit layer 120 has an upper layer mounting surface 121 and an upper layer circuit 122, and the upper layer circuit 122 is disposed on the upper layer mounting surface 121. The upper circuit layer 120 above the layer installation surface 121 faces the substrate installation surface 111 and is disposed above the substrate installation surface 111.
如圖5、圖6以及圖7所示,中間層130由絕緣材料製作,設置於基底設置面111以及上層設置面121之間,並透過紫外線膠等絕緣膠結合於下電路層110的基底設置面111以及上電路層120的上層設置面121。藉由中間層130之隔離,下電路層110與上電路層120之間保持間隔 距離,並且使基底電路112及上層電路122常態地互相絕緣,而不會發生任意性的短路。 As shown in FIG. 5, FIG. 6, and FIG. 7, the intermediate layer 130 is made of an insulating material, and is disposed between the substrate installation surface 111 and the upper layer installation surface 121, and is bonded to the base of the lower circuit layer 110 through an insulating glue such as ultraviolet glue. The surface 111 and the upper layer of the upper circuit layer 120 are provided with a surface 121. The isolation between the lower circuit layer 110 and the upper circuit layer 120 is maintained by the isolation of the intermediate layer 130. The distance and the base circuit 112 and the upper layer circuit 122 are normally insulated from each other without arbitrarily short-circuiting.
如圖5、圖6以及圖7所示,於一具體實施例中,中間層130具有複數個穿孔132,且多層電路板100具有複數對開關接觸墊112b、122b,各對開關接觸墊112b、122b分別設置於基底電路112以及上層電路122,各對開關接觸墊112b、122b的位置係對應於該複數個穿孔132其中之一的位置。 As shown in FIG. 5, FIG. 6, and FIG. 7, in an embodiment, the intermediate layer 130 has a plurality of through holes 132, and the multilayer circuit board 100 has a plurality of pairs of switch contact pads 112b, 122b, each pair of switch contact pads 112b, 122b is disposed on the base circuit 112 and the upper circuit 122, respectively, and the positions of the pair of switch contact pads 112b, 122b correspond to the position of one of the plurality of through holes 132.
如圖4所示,前述的開關接觸墊112b、122a可用於作為觸發開關,例如作為鍵盤模組10的觸發開關。當按鍵帽14受到使用者按壓向下時,碰觸結構15向下移動並壓縮彈性裝置16。碰觸結構15接觸到上電路層120開關接觸墊122b後,上電路層120變形,而讓開關接觸墊112b、122a互相接觸而導通,發出對應的電訊號。 As shown in FIG. 4, the aforementioned switch contact pads 112b, 122a can be used as trigger switches, for example, as trigger switches for the keyboard module 10. When the button cap 14 is pressed down by the user, the bumping structure 15 moves downward and compresses the elastic means 16. After the touch structure 15 contacts the switch contact pad 122b of the upper circuit layer 120, the upper circuit layer 120 is deformed, and the switch contact pads 112b, 122a are brought into contact with each other to conduct, and a corresponding electrical signal is emitted.
如圖5、圖6、圖8以及圖9所示,中間層130具有容置空間134,容置空間134的位置對應於疊合結構118。 As shown in FIG. 5 , FIG. 6 , FIG. 8 and FIG. 9 , the intermediate layer 130 has an accommodating space 134 , and the position of the accommodating space 134 corresponds to the overlapping structure 118 .
如圖5、圖8以及圖9所示,當中間層130結合於基底設置面111時,導線112a交錯疊合處的疊合結構118係位於容置空間134中。此外,在厚度的安排上,容置空間134的高度較佳係略大於疊合結構118的厚度。當上電路層122與中間層130互相結合時,疊合結構118與上電路層122之間具有一間隔距離,如此避免疊合結構118抵接上電路層122,而發生上電路層122向上凸起狀況。在這種結構下,多層電路板100對應於疊合結構118的部份就不會因疊合結構118的存在而凸起增加局部厚度,有助於維持多層電路板100的平整度。 As shown in FIG. 5, FIG. 8 and FIG. 9, when the intermediate layer 130 is bonded to the substrate setting surface 111, the overlapping structure 118 where the wires 112a are alternately overlapped is located in the accommodating space 134. In addition, the height of the accommodating space 134 is preferably slightly larger than the thickness of the laminated structure 118 in the thickness arrangement. When the upper circuit layer 122 and the intermediate layer 130 are coupled to each other, the overlapping structure 118 and the upper circuit layer 122 have a separation distance, so that the overlapping structure 118 is prevented from abutting the upper circuit layer 122, and the upper circuit layer 122 is convex upward. The situation. Under this configuration, the portion of the multilayer circuit board 100 corresponding to the laminated structure 118 does not have a local thickness due to the presence of the laminated structure 118, contributing to maintaining the flatness of the multilayer circuit board 100.
換言之,於本發明係針對疊合結構118,移除對應的中間層130形成容置空間134,使得多層電路板100不會因為局部過度堆疊增加厚度而改變平整度。 In other words, in the present invention, for the laminated structure 118, the corresponding intermediate layer 130 is removed to form the accommodating space 134, so that the multilayer circuit board 100 does not change the flatness due to the local excessive stacking to increase the thickness.
如圖10以及圖11所示,第一實施例的多層電路板可以進一步簡化如第二實施例,而不在以上、下區分各層結構。 As shown in FIGS. 10 and 11, the multilayer circuit board of the first embodiment can be further simplified as in the second embodiment without distinguishing the layer structures above and below.
第二實施例的多層電路板200包含一中間層230、一第一電路層210以及一第二電路層220。 The multilayer circuit board 200 of the second embodiment includes an intermediate layer 230, a first circuit layer 210, and a second circuit layer 220.
中間層230具有一容置空間234與一穿孔232,且中間層230具有相對的第一側230a以及第二側230b。 The intermediate layer 230 has an accommodating space 234 and a through hole 232, and the intermediate layer 230 has an opposite first side 230a and a second side 230b.
如圖11所示,第一電路層210設置於中間層230的第一側230a。第一電路層210具有一第一導線212、一第二導線214以及一電絕緣層216。於容置空間234的垂直投影區域中,第一導線212、電絕緣層216和第二導線214間依序堆疊而形成一疊合結構218。 As shown in FIG. 11, the first circuit layer 210 is disposed on the first side 230a of the intermediate layer 230. The first circuit layer 210 has a first wire 212, a second wire 214, and an electrically insulating layer 216. In the vertical projection area of the accommodating space 234, the first wire 212, the electrically insulating layer 216 and the second wire 214 are sequentially stacked to form a stacked structure 218.
如圖10及圖11所示,第二導線214跨過電絕緣層216而延伸在第一導線212的兩相對側,且藉由電絕緣層216阻隔使第一導線212和第二導線214間保持電性隔離。 As shown in FIGS. 10 and 11, the second wire 214 extends across the electrically insulating layer 216 on opposite sides of the first wire 212 and is blocked by the electrically insulating layer 216 to cause the first wire 212 and the second wire 214 to be interposed. Maintain electrical isolation.
如圖11所示,第二電路層220設置於中間層230的第二側230b,並且第一電路層210與第二電路層220分別位於中間層230的兩相對側。第二電路層220具有一第三導線222。當按鍵帽14受到使用者按壓向下移動時,多層電路板200也因應地變形,使第三導線222穿過穿孔232而與第一導線212及第二導線214其中之一導通。此外,疊合結構218高度係為第一導線212、電絕緣層216和第二導線214三者高度的總和;在垂直方 向上,容置空間234高度略大於疊合結構218高度,如此疊合結構218進入容置空間234中,且不會接觸擠壓到第二電路層220,而使第二電路層220向上凸起,有助於維持多層電路板100的平整度。另一方面,疊合結構218在水平方向上具有一第一尺寸W1,容置空間234在水平方向上具有一第二尺寸W2,第一尺寸W1小於第二尺寸W2,使得疊合結構218週緣與中間層230在水平方向上保持分離,使兩者間不會有堆疊狀況發生。 As shown in FIG. 11, the second circuit layer 220 is disposed on the second side 230b of the intermediate layer 230, and the first circuit layer 210 and the second circuit layer 220 are respectively located on opposite sides of the intermediate layer 230. The second circuit layer 220 has a third wire 222. When the button cap 14 is pressed downward by the user, the multilayer circuit board 200 is also deformed correspondingly, so that the third wire 222 passes through the through hole 232 to be electrically connected to one of the first wire 212 and the second wire 214. In addition, the height of the laminated structure 218 is the sum of the heights of the first wire 212, the electrically insulating layer 216 and the second wire 214; Upward, the height of the accommodating space 234 is slightly larger than the height of the overlapping structure 218, so that the overlapping structure 218 enters the accommodating space 234, and does not contact the second circuit layer 220, and the second circuit layer 220 is convex upward. It helps to maintain the flatness of the multilayer circuit board 100. On the other hand, the superposed structure 218 has a first dimension W1 in the horizontal direction, and the accommodating space 234 has a second dimension W2 in the horizontal direction, and the first dimension W1 is smaller than the second dimension W2 such that the periphery of the superposed structure 218 The separation from the intermediate layer 230 in the horizontal direction is maintained so that no stacking condition occurs between the two.
移除部分層結構,減少多層結構之間的層疊次數的結構設計,也可以應用於多層電路板的其他部分,避免局部厚度因為過度堆疊而增加。 The structural design of removing the partial layer structure and reducing the number of laminations between the multilayer structures can also be applied to other portions of the multilayer circuit board, avoiding the local thickness increasing due to excessive stacking.
如圖12所示,為本發明第三實施例所揭露的一種多層電路板100,包含一下電路層110、一上電路層120以及一中間層130。前述下電路層110、中間層130以及上電路層120依序層疊結合而形成多層電路板100。 As shown in FIG. 12, a multilayer circuit board 100 according to a third embodiment of the present invention includes a lower circuit layer 110, an upper circuit layer 120, and an intermediate layer 130. The lower circuit layer 110, the intermediate layer 130, and the upper circuit layer 120 are sequentially laminated and combined to form the multilayer circuit board 100.
如圖12所示,下電路層110具有一基底設置面111以及一基底電路112,基底電路112設置於基底設置面111。基底電路112具有複數條導線112a,而且基底設置面111具有一本體部117與一連接部140,該連接部140係自本體部117的一側邊緣向外延伸形成,且基底電路112的導線112a延伸至連接部140。此處本體部117指的是基底電路112位於底板18垂直投影內的部分,而連接部140指的是基底電路112超出底板18垂直投影部分。連接部140具有一連接部根部140a以及一連接部末端140b。連接部根部140位於該連接部140以及基底設置面111連結處,而連接部末端140b係遠離基底設置面111末端處。連接部末端140b設置複數個導電接 觸墊112c,該複數個導電接觸墊112c電性藕接於基底電路112延伸於連接部140的部份。 As shown in FIG. 12, the lower circuit layer 110 has a substrate mounting surface 111 and a base circuit 112, and the base circuit 112 is disposed on the substrate mounting surface 111. The base circuit 112 has a plurality of wires 112a, and the substrate mounting surface 111 has a body portion 117 and a connecting portion 140. The connecting portion 140 is formed to extend outward from a side edge of the body portion 117, and the wire 112a of the base circuit 112 It extends to the connecting portion 140. Here, the body portion 117 refers to a portion of the base circuit 112 that is vertically projected within the bottom plate 18, and the connection portion 140 refers to a portion of the base circuit 112 that extends beyond the vertical projection of the bottom plate 18. The connecting portion 140 has a connecting portion root portion 140a and a connecting portion end 140b. The joint root portion 140 is located at the joint of the joint portion 140 and the base installation surface 111, and the joint end 140b is away from the end of the base installation surface 111. The connecting end 140b is provided with a plurality of conductive connections The plurality of conductive contact pads 112c are electrically connected to the portion of the base circuit 112 extending from the connecting portion 140.
如圖12所示,上電路層120具有一上層設置面121及一上層電路122。上層設置面121係上電路層120下表面,亦即上層設置面121係與該基底設置面111相對,上層電路122設置於上層設置面121;上電路層120延伸覆蓋部分下電路層110,但上電路層120不延伸覆蓋於下電路層110的連接部140。 As shown in FIG. 12, the upper circuit layer 120 has an upper layer mounting surface 121 and an upper layer circuit 122. The upper layer mounting surface 121 is the lower surface of the circuit layer 120, that is, the upper layer mounting surface 121 is opposite to the substrate mounting surface 111, and the upper layer circuit 122 is disposed on the upper layer mounting surface 121; the upper circuit layer 120 extends over the portion of the lower circuit layer 110, but The upper circuit layer 120 does not extend over the connection portion 140 of the lower circuit layer 110.
如圖12、圖13以及圖14所示,中間層130設置於基底設置面111以及上層設置面121之間,並透過紫外線膠等絕緣膠料結合於下電路層110以及上電路層120。藉由中間層130之隔離,下電路層110與上電路層120之間保持間隔距離,並且使基底電路112及上層電路122常態地互相絕緣,而不會發生任意性的短路。中間層130具有一退縮區138,對應連接部根部140a的部份,退縮區138使得中間層130的邊緣跟連接部140之間保持間隔距離。在此退縮區138中,沒有下電路層110、中間層130以及上電路層120依序層疊的結構。 As shown in FIG. 12, FIG. 13, and FIG. 14, the intermediate layer 130 is provided between the base installation surface 111 and the upper layer installation surface 121, and is bonded to the lower circuit layer 110 and the upper circuit layer 120 through an insulating material such as ultraviolet glue. By the isolation of the intermediate layer 130, the lower circuit layer 110 and the upper circuit layer 120 are spaced apart from each other, and the base circuit 112 and the upper layer circuit 122 are normally insulated from each other without arbitrarily short-circuiting. The intermediate layer 130 has a recessed region 138 that corresponds to the portion of the root portion 140a of the joint, and the recessed region 138 maintains a spacing between the edges of the intermediate layer 130 and the connecting portion 140. In this recessed region 138, there is no structure in which the lower circuit layer 110, the intermediate layer 130, and the upper circuit layer 120 are sequentially stacked.
如圖12以及圖13以及圖14所示,第三實施例的多層電路板100還包含一保護層150。保護層150結合於連接部140,而覆蓋連接部140上的基底電路112,但保護層150不覆蓋導電接觸墊112c,並暴露導電接觸墊112c。因此,保護層150可以保護設置於連接部140上的基底電路112,而導電接觸墊112c仍可外露用於需要對外電性連接,使得連接部140作為多層電路板100的訊號排線。 As shown in FIGS. 12 and 13 and 14, the multilayer circuit board 100 of the third embodiment further includes a protective layer 150. The protective layer 150 is bonded to the connection portion 140 to cover the base circuit 112 on the connection portion 140, but the protective layer 150 does not cover the conductive contact pads 112c and exposes the conductive contact pads 112c. Therefore, the protective layer 150 can protect the base circuit 112 disposed on the connecting portion 140, and the conductive contact pads 112c can still be exposed for the external electrical connection, so that the connecting portion 140 serves as the signal wiring of the multilayer circuit board 100.
圖13以及圖14所示是第三實施例中,兩種不同的層結構層疊態樣。因為中間層130具有退縮區138,在連接部根部140a的位置,保護層150至多僅重疊於上電路層120以及下電路層110,保護層150與中間層130兩者間不交疊。因此,從剖面結構觀察第二實施例的結構,至多僅有下電路層110、上電路層120以及保護層150的層疊結構,不會有局部區域發生下電路層110、中間層130、上電路層120以及保護層150同時層疊的狀況。多層電路板100不會因為過度的層結構堆疊,而導致局部厚度過大的問題。由於保留了退縮區138的設置,因此即使保護層150黏貼偏斜,仍可避免保護層150與中間層130層疊的情形;在可確保保護層黏貼正確性的情況下,只要讓保護層150邊緣確實對正接續於上電路層120邊緣,也可以省略退縮區138的設置。 13 and 14 show two different layer structure stacking patterns in the third embodiment. Since the intermediate layer 130 has the retraction region 138, at the position of the connection portion root portion 140a, the protective layer 150 overlaps at most only the upper circuit layer 120 and the lower circuit layer 110, and the protective layer 150 and the intermediate layer 130 do not overlap. Therefore, when the structure of the second embodiment is observed from the cross-sectional structure, at most only the laminated structure of the lower circuit layer 110, the upper circuit layer 120, and the protective layer 150, the lower circuit layer 110, the intermediate layer 130, and the upper circuit do not have local regions. The situation in which the layer 120 and the protective layer 150 are simultaneously laminated. The multilayer circuit board 100 does not cause a problem of excessive local thickness due to excessive layer structure stacking. Since the setting of the retracting area 138 is retained, even if the protective layer 150 is adhered and skewed, the case where the protective layer 150 and the intermediate layer 130 are laminated can be avoided; in the case where the correctness of the protective layer can be ensured, only the edge of the protective layer 150 is allowed It is true that the alignment is continued to the edge of the upper circuit layer 120, and the setting of the retraction region 138 may be omitted.
如圖15所示,第四實施例的多層電路板可以進一步簡化如第四實施例,而不在以上、下區分各層結構。 As shown in Fig. 15, the multilayer circuit board of the fourth embodiment can be further simplified as in the fourth embodiment without distinguishing the layer structures above and below.
如圖15所示,第四實施例的多層電路板200包含一中間層230、一第一電路層210、一第二電路層220以及一保護層250。 As shown in FIG. 15, the multilayer circuit board 200 of the fourth embodiment includes an intermediate layer 230, a first circuit layer 210, a second circuit layer 220, and a protective layer 250.
如圖15所示,中間層230具有一第一側230a以及一第二側230b,第一電路層210設置於中間層的第一側230a,第一電路層210具有一第一導線212、一導電接觸墊217、一第一本體部211(立體圖示可參考圖12實施例中的本體部117)以及一連接部213。連接部213係自第一本體部211的一側邊緣向外延伸形成,且第一導線212延伸至連接部213。此處第一本體部211是用以承載第一導線212位於底板18垂直投影內的部分,而連接部213是用以承載第一導線212超出底板18垂直投影部分。連接部 213具有相對的一連接部根部213a與一連接部末端213b(立體圖示可參考圖12實施例中的連接部根部140a以及連接部末端140b)。連接部根部213a係位於連接部213和第一本體部211相連結處,而連接部末端213b係遠離第一本體部211的末端處。導電接觸墊217位於連接部末端213b,第一導線212自第一本體部211延伸至連接部213而電性耦接於導電接觸墊217。 As shown in FIG. 15, the intermediate layer 230 has a first side 230a and a second side 230b. The first circuit layer 210 is disposed on the first side 230a of the intermediate layer. The first circuit layer 210 has a first wire 212 and a first The conductive contact pad 217, a first body portion 211 (see the body portion 117 in the embodiment of FIG. 12 for a three-dimensional illustration), and a connecting portion 213. The connecting portion 213 is formed to extend outward from a side edge of the first body portion 211, and the first wire 212 extends to the connecting portion 213. Here, the first body portion 211 is for carrying a portion of the first wire 212 located in the vertical projection of the bottom plate 18, and the connecting portion 213 is for carrying the first wire 212 beyond the vertical projection portion of the bottom plate 18. Connection The 213 has an opposite connecting portion root portion 213a and a connecting portion end portion 213b (see the connecting portion root portion 140a and the connecting portion end 140b in the embodiment of FIG. 12 for a perspective view). The connecting portion root portion 213a is located at a joint of the connecting portion 213 and the first body portion 211, and the connecting portion end 213b is away from the end of the first body portion 211. The conductive contact pad 217 is located at the end 213b of the connecting portion. The first wire 212 extends from the first body portion 211 to the connecting portion 213 and is electrically coupled to the conductive contact pad 217.
如圖15所示,第二電路層220設置於中間層230的第二側230b。第一電路層210與第二電路層220分別位於中間層230的兩相對側,第二電路層220僅延伸在第一本體部211垂直投影區域內,但未延伸到連接部213垂直投影區域內。 As shown in FIG. 15, the second circuit layer 220 is disposed on the second side 230b of the intermediate layer 230. The first circuit layer 210 and the second circuit layer 220 are respectively located on opposite sides of the intermediate layer 230. The second circuit layer 220 extends only in the vertical projection area of the first body portion 211, but does not extend into the vertical projection area of the connecting portion 213. .
如圖15所示,保護層250具有相對的一保護層根部250a與一保護層末端250b。保護層根部250a第二電路層250b部分重疊,但保護層根部250a並未延伸到中間層230垂直投影區域內,保護層250覆蓋導電接觸墊217以外的連接部213表面。因此,從剖面結構觀察第四實施例的結構,至多僅有第一電路層210、第二電路層220以及保護層250的層疊結構,不會有局部區域發生第一電路層210、第二電路層220、中間層230以及保護層250同時層疊的狀況。 As shown in FIG. 15, the protective layer 250 has an opposite protective layer root 250a and a protective layer end 250b. The second circuit layer 250b of the protective layer root portion 250a partially overlaps, but the protective layer root portion 250a does not extend into the vertical projection region of the intermediate layer 230, and the protective layer 250 covers the surface of the connecting portion 213 other than the conductive contact pads 217. Therefore, when the structure of the fourth embodiment is viewed from the cross-sectional structure, at most only the laminated structure of the first circuit layer 210, the second circuit layer 220, and the protective layer 250, the first circuit layer 210 and the second circuit do not occur in a local region. The state in which the layer 220, the intermediate layer 230, and the protective layer 250 are simultaneously laminated.
如圖16所示,為本發明第五實施例所揭露的一種多層電路板100。本實施例為不設置退縮區138,而是讓上電路層120額外具有一延伸部128,該延伸部128係自本體部向外延伸,但僅局部地延伸覆蓋連接部140接近連接部根部140a的部份,其餘部分仍由保護層150進行覆蓋;同時保護層150長度配合地適度縮減,同樣地也可以避免保護層150層疊於中間層130上方的問題。 As shown in FIG. 16, a multilayer circuit board 100 according to a fifth embodiment of the present invention is shown. In this embodiment, the retraction zone 138 is not provided, but the upper circuit layer 120 additionally has an extension portion 128 extending outward from the body portion, but only partially extending to cover the connection portion 140 and approaching the connection portion root portion 140a. The remaining portion is still covered by the protective layer 150; at the same time, the protective layer 150 is appropriately reduced in length, and the problem that the protective layer 150 is stacked above the intermediate layer 130 can also be avoided.
如圖17、圖18以及圖19所示,所示,為本發明第六實施例所揭露的一種多層電路板100,包含一下電路層110、一上電路層120以及一中間層130。下電路層110以及上電路層120的設置,大致與第三及第四實施例相同,以下不再贅述。以下僅就差異部分進行說明。 As shown in FIG. 17, FIG. 18 and FIG. 19, a multilayer circuit board 100 according to a sixth embodiment of the present invention includes a lower circuit layer 110, an upper circuit layer 120, and an intermediate layer 130. The arrangement of the lower circuit layer 110 and the upper circuit layer 120 is substantially the same as that of the third and fourth embodiments, and will not be described below. The following only describes the differences.
如圖17、圖18以及圖19所示,保護層150與中間層130為一體成形,而自中間層130的一側邊緣向外延伸。保護層150覆蓋於連接部140上的基底電路112,但暴露導電接觸墊112c。因此,位於連接部140的基底電路112可以完整的受到覆蓋保護。位於連接部末端140b的導電接觸墊112c則可以作為訊號端子,用以連接電連接器或作為其他外部電路的焊接點。 As shown in FIGS. 17, 18, and 19, the protective layer 150 and the intermediate layer 130 are integrally formed, and extend outward from one side edge of the intermediate layer 130. The protective layer 150 covers the base circuit 112 on the connection portion 140, but exposes the conductive contact pads 112c. Therefore, the base circuit 112 at the connection portion 140 can be completely covered and protected. The conductive contact pads 112c at the end 140b of the connection can serve as signal terminals for connecting electrical connectors or solder joints for other external circuits.
如圖19所示,因此,從剖面結構觀察第六實施例的結構,至多僅有下電路層110、中間層130以及上電路層120的層疊結構,在連接部140的部份甚至只有中間層130與連接部140層疊。這種結構同樣使得保護層150與上電路層120不重複交疊於中間層130,多層電路板100不會因為過度的層結構堆疊,而導致局部厚度過大的問題。 As shown in FIG. 19, therefore, the structure of the sixth embodiment is observed from the cross-sectional structure, and at most only the laminated structure of the lower circuit layer 110, the intermediate layer 130, and the upper circuit layer 120, and even the intermediate layer is even at the portion of the connecting portion 140. 130 is laminated with the connecting portion 140. This structure also causes the protective layer 150 and the upper circuit layer 120 to overlap without overlapping the intermediate layer 130. The multilayer circuit board 100 does not cause stacking due to excessive layer structure, resulting in a problem of excessive local thickness.
如圖20所示,第六實施例的多層電路板可以進一步簡化如第七實施例,而不在以上、下區分各層結構。 As shown in Fig. 20, the multilayer circuit board of the sixth embodiment can be further simplified as in the seventh embodiment without distinguishing the layer structures above and below.
第七實施例的多層電路板200包含一中間層230、一第一電路層210以及一第二電路層220。 The multilayer circuit board 200 of the seventh embodiment includes an intermediate layer 230, a first circuit layer 210, and a second circuit layer 220.
如圖20所示,中間層230具有一第一側230a以及一第二側230b。第一電路層210設置於中間層230的第一側230a。第一電路層210具有一第一導線212、一導電接觸墊217、一第一本體部211(立體圖示可 參考圖12實施例中的本體部117)、以及一連接部213。連接部213係自第一本體部211的一側邊緣向外延伸形成,且第一導線212延伸至連接部213。此處第一本體部211是用以承載第一導線212位於底板18垂直投影內的部分,而連接部213是用以承載第一導線212超出底板18垂直投影部分。連接部213具有相對的一連接部根部213a與一連接部末端213b(立體圖示可參考圖12實施例中的連接部根部140a以及連接部末端140b)。連接部根部213a位於第一本體部211和連接部213相連結處,而連接部末端213b係遠離第一本體部211的末端處。導電接觸墊217位於連接部末端213b,第一導線212自第一本體部211延伸至連接部213而電性耦接於導電接觸墊217。 As shown in FIG. 20, the intermediate layer 230 has a first side 230a and a second side 230b. The first circuit layer 210 is disposed on the first side 230a of the intermediate layer 230. The first circuit layer 210 has a first wire 212, a conductive contact pad 217, and a first body portion 211. Referring to the body portion 117) in the embodiment of Fig. 12, and a connecting portion 213. The connecting portion 213 is formed to extend outward from a side edge of the first body portion 211, and the first wire 212 extends to the connecting portion 213. Here, the first body portion 211 is for carrying a portion of the first wire 212 located in the vertical projection of the bottom plate 18, and the connecting portion 213 is for carrying the first wire 212 beyond the vertical projection portion of the bottom plate 18. The connecting portion 213 has an opposite connecting portion root portion 213a and a connecting portion end portion 213b (see the connecting portion root portion 140a and the connecting portion end 140b in the embodiment of FIG. 12 for a perspective view). The connecting portion root portion 213a is located at a joint of the first body portion 211 and the connecting portion 213, and the connecting portion end 213b is away from the end of the first body portion 211. The conductive contact pad 217 is located at the end 213b of the connecting portion. The first wire 212 extends from the first body portion 211 to the connecting portion 213 and is electrically coupled to the conductive contact pad 217.
如圖20所示,第二電路層220設置於中間層230的第二側230b。第一電路層210與第二電路層220分別位於中間層230的兩相對側,第二電路層210僅延伸在第一本體部211垂直投影區域內,但未延伸到連接部213垂直投影區域內。同時,中間層230自第一本體部211垂直投影區域延伸到連接部213垂直投影區域,且中間層230覆蓋導電接觸墊以外的連接部213表面。 As shown in FIG. 20, the second circuit layer 220 is disposed on the second side 230b of the intermediate layer 230. The first circuit layer 210 and the second circuit layer 220 are respectively located on opposite sides of the intermediate layer 230. The second circuit layer 210 extends only in the vertical projection area of the first body portion 211, but does not extend into the vertical projection area of the connecting portion 213. . At the same time, the intermediate layer 230 extends from the vertical projection area of the first body portion 211 to the vertical projection area of the connection portion 213, and the intermediate layer 230 covers the surface of the connection portion 213 other than the conductive contact pads.
第六、第七實施例,實質上即為延伸中間層130、230,取代額外增加保護層,從而避免了過度的層結構堆疊,而導致局部厚度過大的問題。 The sixth and seventh embodiments substantially extend the intermediate layers 130, 230 instead of additionally adding a protective layer, thereby avoiding excessive layer structure stacking, resulting in a problem of excessive local thickness.
參閱圖21以及圖22所示,為本發明第八實施例所揭露的一種多層電路板100,包含一下電路層110、一上電路層120以及一中間層130。下電路層110大致與第三及第四實施例相同,以下不再贅述。 Referring to FIG. 21 and FIG. 22, a multilayer circuit board 100 according to an eighth embodiment of the present invention includes a lower circuit layer 110, an upper circuit layer 120, and an intermediate layer 130. The lower circuit layer 110 is substantially the same as the third and fourth embodiments, and will not be described below.
於第八實施例中,保護層150自上電路層120的一側邊緣向外延伸,覆蓋於連接部140上的基底電路112,但暴露導電接觸墊112c,且保護層150與連接部140之間不設置中間層130。因此,保護層150不會與中間層130重複交疊,而使得多層電路板100對應於連接部140的部分,不會有額外增加的厚度。此外,為了使連接部根部140a與保護層150可以緊密貼合而不會在邊緣處產生未貼合的縫隙,於對應連接部根部140a的部份,中間層130可進一步形成一退縮區138,使得中間層130的邊緣跟連接部140之間保持間隔距離。藉以使得連接部根部140a與保護層150的基部可以緊密貼合。 In the eighth embodiment, the protective layer 150 extends outward from one edge of the upper circuit layer 120 to cover the base circuit 112 on the connection portion 140, but exposes the conductive contact pads 112c, and the protective layer 150 and the connection portion 140 The intermediate layer 130 is not provided between. Therefore, the protective layer 150 does not repeatedly overlap the intermediate layer 130, so that the multilayer circuit board 100 corresponds to the portion of the connecting portion 140 without an additional thickness. In addition, in order to make the connecting portion root portion 140a and the protective layer 150 fit snugly without creating an unattached gap at the edge, the intermediate layer 130 may further form a retracting region 138 at a portion corresponding to the connecting portion root portion 140a. The edge of the intermediate layer 130 is kept at a spaced distance from the connecting portion 140. Thereby, the base portion 140a of the joint portion and the base portion of the protective layer 150 can be closely fitted.
如圖23所示,第八實施例的多層電路板可以進一步簡化如第九實施例,而不在以上、下區分各層結構。 As shown in Fig. 23, the multilayer circuit board of the eighth embodiment can be further simplified as in the ninth embodiment without distinguishing the layer structures above and below.
第九實施例的多層電路板200包含一中間層230、一第一電路層210以及一第二電路層220。 The multilayer circuit board 200 of the ninth embodiment includes an intermediate layer 230, a first circuit layer 210, and a second circuit layer 220.
如圖23所示,中間層230具有一第一側230a以及一第二側230b。第一電路層210設置於中間層230的第一側230a。第一電路層210具有一第一導線212、導電接觸墊217、第一本體部211(立體圖示可參考圖12實施例中的本體部117)以及一連接部213。連接部213係自第一本體部211的一側邊緣向外延伸形成,且第一導線212延伸至連接部213。此處第一本體部211是用以承載第一導線212位於底板18垂直投影內的部分,而連接部213是用以承載第一導線212超出底板18垂直投影部分。連接部213具有相對的一連接部根部213a與一連接部末端213b(立體圖示可參考圖12實施例中的連接部根部140a以及連接部末端140b)。連接部根部213a 位於該連接部213和第一本體部211相連結處,而連接部末端213b係遠離第一本體部211的末端處。導電接觸墊217位於連接部末端231b,第一導線212自第一本體部211延伸至連接部213而電性耦接於導電接觸墊217。 As shown in FIG. 23, the intermediate layer 230 has a first side 230a and a second side 230b. The first circuit layer 210 is disposed on the first side 230a of the intermediate layer 230. The first circuit layer 210 has a first wire 212, a conductive contact pad 217, a first body portion 211 (see the body portion 117 in the embodiment of FIG. 12 for a perspective view), and a connecting portion 213. The connecting portion 213 is formed to extend outward from a side edge of the first body portion 211, and the first wire 212 extends to the connecting portion 213. Here, the first body portion 211 is for carrying a portion of the first wire 212 located in the vertical projection of the bottom plate 18, and the connecting portion 213 is for carrying the first wire 212 beyond the vertical projection portion of the bottom plate 18. The connecting portion 213 has an opposite connecting portion root portion 213a and a connecting portion end portion 213b (see the connecting portion root portion 140a and the connecting portion end 140b in the embodiment of FIG. 12 for a perspective view). Connection root 213a The connecting portion 213 is coupled to the first body portion 211, and the connecting portion end 213b is away from the end of the first body portion 211. The conductive contact pad 217 is located at the end 231b of the connecting portion. The first conductive line 212 extends from the first body portion 211 to the connecting portion 213 and is electrically coupled to the conductive contact pad 217.
第二電路層220設置於中間層230的第二側230b。第一電路層210與第二電路層220分別位於中間層230的兩相對側,第二電路層220自第一本體部211垂直投影區域延伸到連接部213垂直投影區域,且第二電路層220覆蓋導電接觸墊217以外的連接部213表面。延伸覆蓋連接部213表面的第二電路層220,取代了額外設置的保護層,從而避免了層結構過度堆疊的狀況。 The second circuit layer 220 is disposed on the second side 230b of the intermediate layer 230. The first circuit layer 210 and the second circuit layer 220 are respectively located on opposite sides of the intermediate layer 230. The second circuit layer 220 extends from the vertical projection area of the first body portion 211 to the vertical projection area of the connection portion 213, and the second circuit layer 220 The surface of the connection portion 213 other than the conductive contact pad 217 is covered. The second circuit layer 220 extending over the surface of the connection portion 213 is extended instead of the additionally provided protective layer, thereby avoiding a situation in which the layer structure is excessively stacked.
第八、第九實施例,實質上即為延伸上電路層120或第二電路層220,取代額外增加保護層,從而避免了過度的層結構堆疊,而導致局部厚度過大的問題。 The eighth and ninth embodiments substantially extend the upper circuit layer 120 or the second circuit layer 220 instead of additionally adding a protective layer, thereby avoiding excessive layer structure stacking, resulting in a problem of excessive local thickness.
此外,於第一實施例及第二實施例中所應用的容置空間134、234,仍可應用於第三至第九實施例,以解決疊合結構118、218造成多層電路板100、200局部厚度增加的問題。 In addition, the accommodating spaces 134, 234 applied in the first embodiment and the second embodiment can still be applied to the third to ninth embodiments to solve the laminated structures 118, 218 to cause the multilayer circuit boards 100, 200. The problem of increased local thickness.
本發明主要係針對多層電路板100、200中,可能發生層結構過度堆疊的部份,移除局部層結構,藉以避免過度的層結構堆疊而導致局部厚度過大的問題,維持了多層電路板的平整度以及平均厚度。 The present invention is mainly directed to a portion of the multilayer circuit board 100, 200 in which excessive layer stacking may occur, and the partial layer structure is removed, thereby avoiding excessive layer structure stacking and causing excessive local thickness, maintaining the multilayer circuit board. Flatness and average thickness.
然,本發明還可有其他多種實施例,在不背離本發明精神及其實質的情況下,熟悉本領域的技術人員可根據本發明作出各種相應的改變和變形,但這些相應的改變和變形都應屬於本發明所附的權利要求的保護範圍。 The invention may be embodied in a variety of other various modifications and changes in the present invention without departing from the spirit and scope of the invention. All should fall within the scope of protection of the appended claims.
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