TWI616090B - Hevc intra prediction method by using data reusing and architecture thereof - Google Patents

Abstract

The invention provides a high-efficiency video coding intra-picture prediction method and an architecture thereof, which comprise the following steps: the controller generates a position to be calculated, a first parameter and a second parameter; and the first register stores an image map. a complex reference pixel value of the frame; the complex interpolation operation unit performs an interpolation operation on the position, the first parameter, and the second parameter of the controller to calculate the complex reference pixel value of the image frame in the Angular mode to output the complex number Predicting a position; the second register stores the complex reference image values transmitted from the complex interpolating unit; and the adder operates the complex reference image values stored in the second register in the Planar mode, and outputs the complex Planar Value, and in DC mode, outputs a DC value of one of the complex reference image values.

Description

High-efficiency video coding intra-picture prediction method using arithmetic data sharing and its architecture

The present invention relates to a high efficiency video coding intra-picture prediction method using arithmetic data sharing and an architecture thereof.

With the advancement of technology, the rapid development of the Internet and digital multimedia technology, people are increasingly demanding image resolution, and the proportion of high-definition video and audio streams is increasing. As a result, the ability to transfer multimedia files and images has become an important part, and it has also been regarded as one of the main development issues, and video compression coding has emerged.

Video compression standards have been developed for some time to date, for example, ITU-T H.261, H.262, H.263; ISO/IEC MPEG series; Google's VPX; or RealNetwork's rmvb, etc. . The most commonly used H.264/AVC on the market is JCT-VC (Joint Collaborative Team on Video Coding) consisting of ITU-T's VCEG (Video Coding Experts Group) and ISO/IEC MPEG (Motion Picture Experts Group). A set of video compression standards jointly developed.

However, in the face of the latest high-resolution UHD (4k × 2k) images or existing HD (720p and 1080p) images, H.264/AVC is no longer sufficient. Therefore, JCT-VC has been working since 2010. Developed a new generation of video compression standard HEVC (High Efficiency Video Coding), based on the H.264/AVC encoding architecture, providing more prediction modes, quatree coding units, and adjustable conversion units ( Quatree transform unit), etc., the goal is to reduce the bit rate (bitrate) by 50% than H.264/AVC, improve compression efficiency, improve the network transmission bandwidth requirement and video file size caused by high-resolution images. .

In the HEVC standard, there are more ways to reduce the bit rate than the previous generation of H.264/AVC, where H.264/AVC uses 8 prediction directions in the Intra Prediction. In a pattern, HEVC has increased to 35 modes in 33 directions. In H.264/AVC, intra-picture prediction uses only 4 × 4 and 16 × 16 coding units; however, 4 × 4, 8 × 8, 16 × 16, 32 × 32, used in HEVC. 64 × 64 five sizes, each size of the coding unit has to do intra-picture prediction, and then need to do transformation (transformation), quantization (entropy coding) and entropy coding (entropy coding), so the complexity is far Exceeding H.264/AVC, especially in-picture prediction, it is necessary to reduce its computational complexity.

Therefore, how to improve the overall efficiency and reduce the hardware cost of the above-mentioned shortcomings caused by intra-picture prediction is one of the current important topics.

In view of the shortcomings of the prior art, the main object of the present invention is to provide a frame rate increase conversion method and a period structure, which adopts a prediction or compensation method, which greatly improves the prediction accuracy.

To achieve the foregoing objective, the present invention provides a high efficiency video coding (HEVC) intra prediction method using arithmetic data sharing, comprising the following steps: generating by a controller a position (x, y), a first parameter (d), and a second parameter (mode) to be operated; storing a plurality of reference pixel values of an image frame by using a first buffer; An interpolation computing unit, in an Angular mode, for the position, the first parameter, and the second parameter to be calculated from the controller, and the complex reference pixel value of the image frame Inserting a bit to output a complex prediction position; storing a plurality of reference image values transmitted from the complex interpolating unit by a second register; and adding, by an adder, in a Planar mode The complex reference image value stored by the second register is operated to output a complex Planar value, and in a DC mode, a DC average value of the complex reference image value is output.

In addition, the present invention also proposes a high-efficiency video coding intra-picture prediction architecture using arithmetic data sharing, which includes: a controller, which generates a position (x, y), a first parameter (d), and a a second mode (mode); a first buffer to store a plurality of reference pixel values of an image frame; a complex interpolating unit, in an Angular mode, for the position to be operated from the controller Interpolating the first parameter and the second parameter with the complex reference pixel value of the image frame to output a complex prediction position; and a second temporary register storing the transfer from the complex interpolation operation unit a plurality of reference image values; and an adder, in a Planar mode, calculating the complex reference image value stored by the second register to output a complex Planar value, and in a DC mode, A DC average of one of the complex reference image values is output.

The embodiments of the present invention are described below by way of specific examples, and those skilled in the art can readily appreciate the other advantages and functions of the present invention. The invention may be embodied or applied in various other specific embodiments, and various modifications and changes may be made without departing from the spirit and scope of the invention.

It is to be understood that the structure, the proportions, the size and the like of the present invention are only used in conjunction with the disclosure of the specification, and are intended to be understood and read by those skilled in the art, and are not intended to limit the implementation of the invention. The conditions are not technically meaningful, and any modification of the structure, change of the proportional relationship or adjustment of the size should be disclosed in the present invention without affecting the effects and achievable effects of the present invention. The technical content can be covered.

Hereinafter, in accordance with an embodiment of the present invention, a high efficiency video coding (HEVC) intra prediction method using arithmetic data sharing is described, and the method includes three core modes: an Angular mode, a Planar mode, and In DC mode, this method is used in hardware architecture and data operations to improve hardware performance and image quality.

The following is a detailed description of the Angular model:

First, based on a 4×4 prediction unit (PU), the reference pixels of all d values and the analysis of wy are performed for each pixel position, as shown in the horizontal direction prediction shown in FIG. Vertical direction prediction.

After sorting, as shown in FIG. 3, it can be found that the reference pixel R used in two adjacent positions is repeated regardless of whether it is in the horizontal direction prediction or the vertical direction prediction, and the sum of the coefficients is 32.

If you add a pipeline operation, you can divide the 4×4 PU into 4 levels. The second level can start using the data after the 1st level operation. After adjustment, it can be used as a reference pixel product. One level and so on, you can save a multiplication operation.

Therefore, each position (PE1, 1~PE4, 4) of the 4×4 PU is treated as a processing element (PE), and each PE is interpolated in the picture. Then divide the 16 PEs into 4 levels of pipeline operations, as shown in Figure 4.

) (1) Taking Figure 5 as an example, when d=2 is predicted in the vertical direction, PE1,1 is calculated as follows:

) (1)

) (2) After the second level, PE2,1 operates as follows:

) (2)

(3)

(4) Will be level 1 of 2. R2,0 passed to level 2, and then created by displacement. R2,0, in the end, you can replace the original multiplication by subtracting. The third level and the fourth level are also the same as the second level. The calculation data of the previous level is used, and the complement processing is performed after the calculation. The result is as follows:

(3)

(4)

When the level 4 operation is completed, the next vertical direction d value can be calculated. When the 17 vertical values of the d values have been calculated, the horizontal direction d value operation can be performed.

The horizontal direction operation is the same as the vertical direction, but the way to divide the pipeline operation is somewhat different, as shown in Figure 6.

The following is a detailed description of the Planar mode:

The operation mode of Angular mode is similar to that of Planar mode. It is composed of a multiple of reference pixels Rx, 0 or R0, y. Table 1 shows the operations of the Planar mode in the 4×4 PU are listed for analysis:

It can be seen from Table 1 that, besides the operation of the Planar mode is similar to the operation of the Angular mode, it can be found that in the 4×4 size PU, the reference pixel R used in the Planar mode has only 0, 1, 2, 3, 4 coefficients. Five kinds, except that the coefficient 3 needs to be obtained by multiplication, 0, 1, 2, and 4 can be obtained by substituting the displacement of the value for the multiplication. Table 1: Planar operation analysis of 4×4 PU

That is to say, if the method of obtaining the reference pixel R of the coefficient 3 is found, the operation of the Planar mode can be completed without multiplication.

Because the operation of the Planar mode is similar to the operation of the Angular mode, it can be searched in the Angular mode. In the Angualr mode, the reference pixel R has a coefficient range of 0~32.

After analyzing the Angular operation, although it is found that the reference pixel R with coefficient 3 cannot be directly obtained, regardless of the horizontal direction prediction or the vertical direction prediction, when d=2, a reference pixel R with a coefficient of 6 is generated, as shown in FIG. 7. Shown.

As long as the reference pixel R of the coefficient 6 is extracted, the reference pixel R having the coefficient of 3 can be obtained by performing the divide by 2 operation. Such a Planar mode operation of a 4×4 size PU can be obtained without any multiplication operation.

Figure 8 is a timing diagram of the hardware when calculating the Angular mode. The operation situation is that one cycle will calculate a prediction data. Because of the pipelined operation mode, it will have three cycles longer than the simultaneous hardware.

Figure 9 is a timing diagram of the hardware when calculating the Planar mode and the DC mode. The main reason is that when the Angular mode operation is performed, the reference pixel R with a coefficient of three times is collected first. When the collection is completed, the values of the DC mode and the Planar mode can be directly calculated. That is, when the Angular mode is calculated, the Planar mode and the DC mode are also calculated.

A detailed operation flow of the high efficiency video coding (HEVC) intra prediction method using the arithmetic data sharing of the present invention is as shown in FIG. 10, and the method includes the following steps S11 to S19: S11: generating a position (x, y), a first parameter (d), and a second parameter (mode) of the desired operation by using a controller; Step S13: using a first buffer (first buffer) Storing a plurality of reference pixel values of an image frame; Step S15: by means of an interpolation computing unit, in an Angular mode, for the position, first parameter, and second operation of the slave controller The parameter and the complex reference pixel value of the image frame are interpolated to output a complex prediction position; Step S17: storing a plurality of reference images transmitted from the complex interpolation unit by a second buffer a value; and step S19: performing an operation on the complex reference image value stored in the second register in an Planar mode by an adder to output a complex Planar value, and In a DC mode, the output of one of the reference image a plurality of DC average value.

In addition, the present invention also proposes a high-efficiency video coding intra-picture prediction architecture using arithmetic data sharing. The main hardware architecture block is as shown in FIG. 11. The hardware architecture includes: a controller 10, which generates a desired The position of the operation (x, y), the first parameter (d) and the second parameter (mode); a first buffer 12, storing a plurality of reference pixel values of an image frame; complex interpolation operations Unit 14, in an Angular mode, interpolating the position, the first parameter, and the second parameter to be calculated from the controller and the complex reference pixel value of the image frame to output a complex prediction position; a second temporary storage a second buffer 16 storing a plurality of reference image values transmitted from the complex interpolation unit; and an adder 18 for storing a plurality of reference image values for the second register in a Planar mode An operation is performed to output a complex Planar value, and in a DC mode, a DC average of one of the complex reference image values is output.

Specifically, after the signal is obtained, the input image value is captured and stored in the first register 12. When all the inputs are received, the Angular mode is performed by the complex interpolation unit. Operation and output. When the Angular mode operation in 33 directions is completed, the Planar mode and the DC mode operation are started and the values of the Planar mode and the DC mode are output.

The high-efficiency video coding intra-picture prediction architecture using the operation data sharing of the present invention is implemented by an Application-Specific Integrated Circuit (ASIC) method, and the high-efficiency video coding of the present invention is first implemented in a Verilog hardware description language. The hardware architecture of the intra-frame prediction architecture and hardware implementation using the TSMC 0.18um process.

In summary, the present invention adopts a pipelined operation method to enhance hardware operation efficiency, and utilizes the characteristics of pipelined operation, so that the operation data can be reused without re-accessing and then performing operations. Therefore, the high-efficiency video coding intra-picture prediction architecture using the arithmetic data sharing of the present invention can effectively improve the hardware performance.

Although the embodiments have been described with reference to the embodiments of the present invention, it will be understood that Inside. In particular, various changes and modifications can be made in the components and/or arrangements of the subject combination. Alternative uses will be apparent to those skilled in the art, in addition to variations and modifications in the component parts and/or arrangements.

10‧‧‧ Controller

12‧‧‧First register

14‧‧‧Multiple Interpolation Unit

16‧‧‧Second register

18‧‧‧Adder

S11~S19‧‧‧Steps

1 is a schematic diagram showing horizontal direction prediction of a 4×4 prediction unit (PU); FIG. 2 is a schematic diagram showing vertical direction prediction of a 4×4 prediction unit; FIG. 3(a) and FIG. 3(b) The system displays the horizontal direction prediction and the vertical direction prediction of the 4×4 prediction unit respectively; FIG. 4 shows a schematic diagram of the 4×4 prediction unit pipeline operation; FIG. 5 shows the 4×4 prediction unit pipeline operation. Schematic diagram of (vertical direction prediction); FIG. 6 is a schematic diagram showing 4×4 prediction unit pipeline operation (horizontal direction prediction); FIG. 7 is a schematic diagram showing analysis of 4×4 prediction unit; FIG. 8 is a diagram showing the present invention. Timing diagram of Angular mode; FIG. 9 is a timing diagram showing Planar mode and DC mode of the present invention; FIG. 10 is a diagram showing high efficiency video coding (HEVC) intra-screen prediction using arithmetic data sharing according to the present invention. A flowchart of the intra prediction method; and FIG. 11 is a block diagram showing a high efficiency video coding intra-picture prediction hardware architecture using arithmetic data sharing.

S11~S19‧‧‧Steps

Claims (6)

A high efficiency video coding (HEVC) intra prediction method using arithmetic data sharing includes the following steps: generating a position (x, y) of a desired operation by a controller a first parameter (d) and a second parameter (mode); storing a plurality of reference pixel values of an image frame by a first buffer; and an interpolation computing unit And in an Angular mode, performing interpolation operations on the position, the first parameter, and the second parameter to be calculated from the controller and the complex reference pixel value of the image frame to output a complex prediction position; And storing, by a second register, a plurality of reference image values transmitted from the complex interpolating unit; and storing by an adder in a Planar mode for the second register The complex reference image value is operated to output a complex Planar value, and in a DC mode, a DC average of the complex reference image values is output. The high-efficiency video coding intra-picture prediction method using the operation data sharing as described in claim 1, wherein the interpolation operation is performed based on a pipeline operation level in the Angular mode. The high-efficiency video coding intra-picture prediction method using the operation data sharing as described in claim 1, wherein the Angular mode includes 33 direction predictions. A high-efficiency video coding intra-picture prediction architecture using arithmetic data sharing includes: a controller generating a position (x, y), a first parameter (d), and a second parameter (mode) to be operated; a first buffer storing a plurality of reference pixel values of an image frame; a complex interpolation operation unit, in an Angular mode, for the position to be operated from the controller, the first parameter, and the The second parameter is interpolated with the complex reference pixel value of the image frame to output a complex prediction position; a second temporary register stores the complex reference image values transmitted from the complex interpolation operation unit; An adder, in a Planar mode, operates on the complex reference image value stored in the second register to output a complex Planar value, and outputs the complex reference image value in a DC mode. A DC average. The high-efficiency video coding intra-picture prediction architecture using the operation data sharing as described in claim 4, wherein in the Angular mode, the complex interpolation operation unit performs the interpolation based on the pipelined operation level. Operation. The high-efficiency video coding intra-picture prediction architecture using the operation data sharing as described in claim 4, wherein each of the complex interpolation operation units includes a multiplier or a multiplier and a subtractor.