TWI615847B - Solid state storage device and data processing method thereof - Google Patents

Abstract

A data processing method for a solid state storage device, the solid state storage device comprising a non-volatile memory having at least one data segment. The data processing method includes: determining whether a piece of data stored in the data section is invalid according to a predetermined condition. Wherein, at least one voltage is applied to the data segment, and a number of memory cells corresponding to the voltage in the data segment is read, wherein the voltage is predetermined to correspond to a predetermined number; and the number of cells is turned on according to the memory cell Whether the relationship with the predetermined value satisfies the predetermined condition to determine whether the material is invalid data.

Description

Solid state storage device and data processing method thereof

The present invention relates to a solid state storage device, and more particularly to a solid state storage device and a data processing method thereof.

Solid state devices (SSDs) are known to use non-volatile memory as the primary storage component. That is to say, when the data is written to the non-volatile memory, once the system power is turned off, the data is still stored in the solid-state storage device.

When reading the stored data in the non-volatile memory, if the stored data has a certain range of error rate, the data can be recovered by an error recovery procedure. The above error condition means that the stored data is completely written into the non-volatile memory, but the storage characteristics of the non-volatile memory, such as the loss of stored electrons, cause errors in the stored data. Most of the data errors caused by such factors will fall within a certain error rate, and since the stored data is completely written into the non-volatile memory, the data can be recovered through the error response procedure.

However, if invalid data is generated during writing due to an erroneous write or erase procedure, since the invalid data represents that the data stored in the non-volatile memory is incomplete, the data cannot be replied by the error reply procedure. . Moreover, when reading the stored data in the non-volatile memory, it is generally impossible to determine whether the read data is invalid data. Therefore, once the read data is found to be in error, it will directly enter the error recovery program, and Trying to reply to the information.

However, as mentioned above, invalid data cannot be replied by the error response procedure, so the error replies will take a considerable amount of time to process the invalid data, but in the end it will not be able to reply to the data, which will take a considerable amount of time, resulting in solid storage. The reading and writing efficiency of the entire device is degraded.

The invention relates to a solid-state storage device and a data processing method thereof, which improve the access efficiency of the solid-state storage device by determining the invalid data.

According to a first aspect of the present invention, a data processing method for a solid-state storage device is provided. The solid-state storage device includes a non-volatile memory having at least one data segment, the data segment including a plurality of memory cells. The data processing method includes: determining whether a piece of data stored in the data section is invalid according to a predetermined condition. Wherein, at least one voltage is applied to the data segment, and a number of memory cells corresponding to the voltage in the data segment is read, wherein the voltage is predetermined to correspond to a predetermined number; and the number of cells is turned on according to the memory cell Whether the relationship with the predetermined value satisfies the predetermined condition to determine whether the data is invalid data.

According to a second aspect of the present invention, a solid state storage device is provided, comprising: a non-volatile memory having at least one data segment, the data segment comprising a plurality of memory cells; and a controller. The controller includes: an invalid determination unit configured to determine whether a material stored in the data section is invalid according to a predetermined condition; and an error response unit to execute an error response (Error Recover) procedure. Wherein, if the invalidation determining unit determines that the data is invalid data, and the data has a reading error, the error replying unit does not execute the error replying procedure for the data.

According to a third aspect of the present invention, a data processing method for a solid-state storage device is provided. The solid-state storage device includes a non-volatile memory having at least one data segment, the data segment including a plurality of memory cells. The data processing method comprises: determining whether a material stored in the data section is invalid according to a predetermined condition; and if the data is determined to be valid data, and the data is read incorrectly, performing an error reply for the data (Error Recover) program; and if the data is judged to be invalid, and the data is read incorrectly, the error replying program is not executed for the data.

In order to better understand the above and other aspects of the present invention, the preferred embodiments are described below, and in conjunction with the drawings, the detailed description is as follows:

300‧‧‧Solid storage device

310‧‧‧ Non-volatile memory

320‧‧‧ Controller

322‧‧‧Reading unit

324‧‧‧ invalid judgment unit

328‧‧‧Error response unit

S410, S420, S440‧‧‧ process steps

S510~S550‧‧‧ Process steps

D‧‧‧Preset error

P0~P3, P0’~P2’‧‧‧ memory cell conduction number

T0~T3‧‧‧Predetermined values

V0~V3‧‧‧ voltage

FIG. 1 is a diagram showing a distribution of different read voltages and corresponding number of memory cell conductions to a data segment of a non-volatile memory.

FIG. 2 is a diagram showing a distribution of different reading voltages and corresponding number of memory cell conductions for a data section storing valid data and a data section storing invalid data.

FIG. 3 is a schematic diagram of a solid state storage device in accordance with an embodiment of the present invention.

FIG. 4 is a flow chart of a data processing method according to an embodiment of the invention.

FIG. 5 is a flow chart showing whether data is invalid data according to an embodiment of the invention.

FIG. 6 is a schematic diagram showing the relationship between the number of memory cells of a valid data and invalid data and a predetermined value by applying a specific read voltage to a data section according to an embodiment of the invention.

FIG. 7 is a schematic diagram showing the relationship between the number of memory cells of the valid data and the invalid data and the corresponding predetermined values by applying a plurality of read voltages to the data section according to another embodiment of the present invention.

FIG. 8 is a schematic view showing another embodiment of setting predetermined conditions of the present invention.

Various embodiments are described below in detail, which utilizes voltages applied to a plurality of memory cells in a data section of a non-volatile memory, and obtains the number of conductive cells in the data section, thereby determining the number. Whether the data in the data section is invalid. However, the examples are for illustrative purposes only and are not intended to limit the scope of the invention. In addition, the figure in the embodiment omits part of the element In order to clearly show the technical features of the present invention.

Please refer to FIG. 1 , which shows a distribution diagram of applying different read voltages and corresponding number of memory cells to the data segment of the non-volatile memory. The non-volatile memory can be divided into a plurality of data segments, for example, the data segment can be a word line of non-volatile memory, or a plurality of word lines of non-volatile memory, and the data segment includes a plurality of data segments. Memory cells, which can be a single-level cell (SLC) that stores 1-bit data, a multi-level cell (MLC) that stores 2-bit data, and a 3-bit memory cell. A triple-level cell (TLC) or other type of storage unit of metadata.

The vertical axis of the profile shown in Fig. 1 indicates the number of conduction of the memory cell to which the specific read voltage is applied, and the horizontal axis indicates the read voltage applied to the memory cell. It can be seen from Fig. 1 that when the read voltage is applied to the data section of the non-volatile memory from small to large progressively, as the applied read voltage gradually becomes larger, there will be more in the data section. The more memory cells are turned on, and when the applied read voltage is large enough, all the memory cells in this data segment are turned on.

In the process of reading or writing or wiping the data of the volatilized memory, if an interruption or other factors are affected, invalid data may be generated, and the data stored in the data section may be invalid. The cause of the invalid data, for example, may be that when the data is written to the data section, the step of writing the data is interrupted and not completed, resulting in incomplete data writing, and the data stored in the data section is invalid. When the data is erased or the data in the data section is erased, the step of erasing the data is interrupted and not completed, resulting in incomplete data erasure, so that the data stored in the data section is invalid. material. Therefore, the data stored in the data section may be invalid.

In the embodiment of the present invention, the valid data means that the content of the data stored in the non-volatile memory is complete, so that when reading, the error of the valid data can be replied by the error replying procedure. Invalid data means that the content of the data stored in non-volatile memory is incomplete. In other words, the original data has been lost, so invalid data cannot be replied by the error response procedure.

In order to determine whether the data stored in the data section is invalid data, the embodiment of the present invention achieves the difference in physical characteristics between the data sections storing the valid data and the data sections storing the invalid data. After many tests, it is found that when the reading voltage is applied to the data section of the non-volatile memory from small to large, the data section corresponding to the storage of the valid data and the data section storing the invalid data are presented. There is a big difference in the distribution curve of the number of memory cells that are coming out.

Please refer to FIG. 2, which shows that when the data section of the non-volatile memory stores the valid data and the invalid data respectively, different reading voltages are applied to the data section storing the valid data and the data section storing the invalid data. A distribution map of the number of memory cells. The vertical axis represents the number of conduction of the memory cell to which a specific read voltage is applied, the horizontal axis represents the read voltage applied to the memory cell, the second diagram shows two different distribution curves, and the solid line represents the data of the non-volatile memory. When a valid data is stored in a segment, a distribution curve of different read voltages and corresponding number of memory cells is applied, and a broken line indicates that when the data segment of the non-volatile memory stores invalid data, different read voltages are applied thereto. The corresponding distribution curve of the number of memory cells. By the second The figure shows that in a specific read voltage range, when the appropriate same read voltage is applied to the data section storing the valid data and the invalid data, the number of memory cells obtained by the corresponding valid data and the invalid data is obtained. Not the same. In other words, according to the above characteristics, the data stored in the data section can be judged to be valid data or invalid data according to the number of memory cells in the data section by applying an appropriate read voltage to the data section.

Please refer to FIG. 3, which illustrates a schematic diagram of a solid state storage device 300 in accordance with an embodiment of the present invention. The solid state storage device 300 includes a non-volatile memory 310 and a controller 320. The controller 320 is coupled to the non-volatile memory 310 and controls data access and other operations of the non-volatile memory 310. The non-volatile memory 310 is the primary data storage medium for the solid state storage device 300. Outside the solid state storage device 300, the controller 320 can transmit instructions and data through an external bus bar and a host (not shown).

The controller 320 is operative to execute various control programs or calculation programs. For example, the controller 320 can be a wafer, a circuit block within the wafer, a firmware circuit, a circuit board containing a plurality of electronic components and wires, or a storage medium storing a complex array of code. In this embodiment, the controller 320 includes a read determination unit 322, an invalid determination unit 324, and an error recovery unit 328. The read determination unit 322 is configured to determine whether a data has a read error. The invalidation determining unit 324 is configured to determine whether the data is invalid data. The error response unit 328 is configured to execute an Error Recover program. The read determination unit 322, the invalidation determination unit 324, and the error recovery unit 328 can be, for example, a wafer, a circuit within the wafer. A block, a firmware circuit, a circuit board containing a plurality of electronic components and wires, or a storage medium storing a complex array of code.

Next, please refer to FIG. 4, which is a flowchart of a data processing method according to an embodiment of the invention. In order to clearly explain the operation of the above various elements and the data processing method of the solid state storage device of the embodiment of the present invention, the following is a detailed description of the following flowchart. However, those skilled in the art to which the present invention pertains can understand that the data processing method of the embodiment of the present invention is not limited to the solid-state storage device 300 of FIG. 3, nor is it limited to the sequence of steps of the flowchart.

Please refer to Figures 3 and 4 at the same time. According to an embodiment of the invention, in step S410, the read determination unit 322 of the controller 320 can read the data section of the non-volatile memory 310 and determine whether a data read by the data section has a read error. In the embodiment of the present invention, the read determination unit 322 can use, for example, Error-Correcting Codes (ECC), Hamming Codes, BCH codes, and Reed-Solomon. Codes) or similar error judgment method to perform error correction (Error Correction) on the read data, and judge whether the data has a read error according to the error correction result. There are many reasons for the read errors in the stored data. For example, due to environmental factors such as temperature or time, the data stored in the data section is shifted or lost. Therefore, when the data is read, the correct data cannot be recovered by error correction and a reading error occurs. Or because during the operation of reading or writing or erasing the data section, the operation interruption or the operation is incomplete, the data stored in the data section is incomplete, and the data can not be replied by error correction when the data is read. Correct capital A read error occurred.

In step S410, when the read data cannot be returned to the correct data by error correction, the read determination unit 322 determines that the data stored in the data section has a read error. In step S410, when the read data can be returned to the correct data by error correction, the read determination unit 322 determines that the data stored in the data section has not been read. At this time, the controller 320 can obtain the correct reading data. If the data reading is based on the read command of the host, the controller 320 can transmit the read correct data to the host.

Next, in step S420, when the reading determination unit 322 determines that the data stored in the data section has a reading error, the invalidation determining unit 324 further determines whether the data is invalid according to a predetermined condition. The reason for invalid data, for example, when writing data to the data section, the writing step is interrupted and not completed, resulting in incomplete data writing, making the data stored in the data section invalid, or erasing the data. When the data is stored in the section, the erasing step is interrupted and not completed, resulting in incomplete data erasing and invalidation of the data stored in the data section.

After the judgments of step S410 and step S420, the stored data is judged in three cases. The first case (No in step S410): the data stored in the data section is valid data, and no reading error occurs when the data is read. The second case (YES in step S410 and NO in step S420): the data stored in the data section is valid data, but the valid data stored in the data section is offset or lost due to environmental factors such as temperature or time. Therefore, it cannot pass when the data is read. Error correction to reply to the correct data, resulting in a read error. The third case (YES in step S410 and YES in step S420): the data stored in the data section is invalid data, for example, because the operation interruption or operation does not occur during the operation of reading or writing or erasing the data section. Completely, the data stored in the data section is incomplete and invalid, and data reading errors occur.

Subsequently, when the invalidity determining unit 324 determines that the material is invalid according to the predetermined condition, the controller 320 ends the flow. If the data reading is based on the read command of the host, the controller 320 can transmit a read error result to the host, indicating that the data is unreadable. When the invalidity determining unit 324 determines that the data is valid according to the predetermined condition, in step 440, the error replying unit 328 executes an error response (Error Recover) procedure for the data. In the embodiment of the present invention, the Error Recover program is different from Error Correction. Error Correction is, for example, using Error-Correcting Codes (ECC), Hamming Codes, BCH Codes, Reed-Solomon Codes, or similar error corrections. The reply method performs error correction on the read data. The Error Recover program uses different reading conditions to re-read the data.

In an embodiment of the invention, the error recovery unit 328 can re-read the data using different read conditions according to a Retry Table until the data can be read correctly without a read error. The reading conditions may be, for example, different read voltages, different error correction codes, or different error correction methods. The error recovery unit 328 can re-read the data using different read voltages, or will re-read The data obtained is corrected by different error correction codes or different error correction methods until the data can be read correctly without reading errors.

In another embodiment of the present invention, the controller 320 may perform determination of invalid data in advance to decide whether to perform a data reading process. Specifically, when the controller 320 wants to read the stored data of the data section of the non-volatile memory 310, the invalidity determining unit 324 may first determine whether the stored data is invalid according to a predetermined condition. If the stored data is invalid, the controller 320 may not perform the data reading process of the data section. And if the data reading is based on the read command of the host, the controller 320 can transmit a read error result to the host, indicating that the data is unreadable. Conversely, if the stored data is valid data, the controller 320 performs a data reading process of the data section, that is, steps S410 and S440. Since the controller 320 has previously determined the invalidation data (step S420), it is not necessary to judge the invalidation data when the data reading process of the data section is performed (step S420).

Please refer to FIG. 5, which shows a flow chart for judging whether the data is invalid data. In step S420 of Fig. 4, the invalidation determining unit 324 determines whether the material stored in the data section is invalid data based on a predetermined condition. Steps S510 to S550 of Fig. 5 further explain the flow of determining whether the material is invalid data in step S420 of Fig. 4. In step S510, the invalidity determining unit 324 applies at least one read voltage to the data section, and in step S520, the invalidity determining unit 324 reads the number of memory cells that are corresponding to the read voltage in the data section. Next, in step S530, the invalidity determining unit 324 determines whether the relationship between the number of corresponding memory cells and a predetermined value of the corresponding read voltage satisfies a predetermined one. Conditions to determine whether the data stored in this data section is invalid or valid.

Please refer to Figure 6. FIG. 6 is a schematic diagram showing the relationship between the effective data and the number of memory cells of the invalid data and a predetermined value according to an embodiment of the present invention for applying a specific read voltage to the data segment of the non-volatile memory. The vertical axis represents the number of memory cell conduction to which a specific read voltage is applied, and the horizontal axis represents the read voltage applied to the memory cell. In this embodiment, in step S510, the invalidity determining unit 324 applies a read voltage V0 to the data section, and in step S520, the invalidity determining unit 324 reads the number of memory cells in the data section. Next, in step S530, the invalidity determining unit 324 determines whether the data stored in the data section is invalid data or valid data according to whether the relationship between the number of conductions and a predetermined value T0 of the corresponding read voltage V0 satisfies a predetermined condition. . In the example of Fig. 6, at the application of the read voltage V0, the memory cell conduction number P0 of the invalid data is larger than the predetermined value T0, and the memory cell conduction number P0' of the valid data is smaller than the predetermined value T0.

Therefore, in the example of Fig. 6, the predetermined condition can be set such that the number of conductions is greater than a predetermined number. When the read voltage V0 is applied, if the relationship between the number of turns and the predetermined value T0 satisfies a predetermined condition, that is, the number of turns is greater than the predetermined value T0, then in step 540, the invalidity determining unit 324 determines that the data segment is stored. The information is invalid. Conversely, when the read voltage V0 is applied, if the relationship between the number of turns and the predetermined value T0 does not satisfy the predetermined condition, that is, the number of turns is less than the predetermined value T0, then in step 550, the invalidity determining unit 324 determines the data. The information stored in the section is valid.

Please refer to FIG. 7, which applies multiple readings according to another embodiment of the present invention. Taking the voltage in the non-volatile memory data section, the relationship between the effective data and the number of memory cells of the invalid data and the corresponding predetermined values. The vertical axis represents the number of memory cell conduction to which a specific read voltage is applied, and the horizontal axis represents the read voltage applied to the memory cell. In this embodiment, the invalidity determining unit 324 applies the first read voltage V1 and the second read voltage V2 to the data section of the non-volatile memory, respectively (step S510), and reads the corresponding first memory cell conduction. The number and the number of second memory cells are turned on (step S520). In this embodiment, the first read voltage V1 and the second read voltage V2 respectively have a corresponding first predetermined value T1 and a second predetermined value T2, and the invalid determination unit 324 is configured according to the corresponding first read voltage V1. Judging whether the relationship between the number of first memory cells and the first predetermined value T1 and whether the relationship between the number of second memory cells corresponding to the second read voltage V2 and the second predetermined value T2 satisfies a predetermined condition The data stored in this data section is invalid or valid.

In the example of FIG. 7, when the first read voltage V1 is applied, the memory cell conduction number P1 of the invalid data is smaller than the first predetermined value T1, and the memory cell conduction number P1' of the valid data is greater than the first predetermined. a value T1; and when the second read voltage V2 is applied, the memory cell conduction number P2 of the invalid data is greater than the second predetermined value T2, and the memory cell conduction number P2' of the valid data is less than the second predetermined value T2 . Therefore, in the example of FIG. 7, the predetermined condition may be set such that the first memory cell corresponding to the first read voltage V1 is smaller than the first predetermined value T1, and the second memory corresponding to the second read voltage V2 The number of cell conduction is greater than the second predetermined value T2. Under the respective application of the read voltages V1 and V2, if the corresponding number of conductions is predetermined If the relationship of the values satisfies the predetermined condition described above, then in step 540, the invalidity determining unit 324 determines that the data stored in the data section is invalid. On the contrary, when the read voltages V1 and V2 are respectively applied, if the relationship between the corresponding number of turns and the predetermined value does not satisfy the predetermined condition, then in step 550, the invalidity determining unit 324 determines that the data segment is stored. The information is valid.

Since there are many reasons for invalid data, in the examples of FIG. 6 and FIG. 7, the data section storing the valid data and the data section storing the invalid data are subjected to different reading voltages, and the resulting memory is obtained. The distribution curve of the number of cell conduction is not the same. In an embodiment of the present invention, a corresponding read voltage, a predetermined value, and a predetermined condition may be set for each of the effective data and the distribution curve of the number of memory cells of the invalid data. Wherein, the read voltage may be a single read voltage or a plurality of read voltages, depending on the characteristics of the distribution curve. In another embodiment of the present invention, the distribution curve of the number of memory cells of different valid data and invalid data can be integrated by analysis, and the read voltage that satisfies the characteristics of various distribution curves can be set, which depends on the integrated Distribution curve characteristics.

Please refer to FIG. 8 , which illustrates a schematic diagram of another embodiment of the present invention for setting predetermined conditions. The vertical axis represents the number of memory cell conduction to which a specific read voltage is applied, and the horizontal axis represents the read voltage applied to the memory cell. In this embodiment, the invalidity determining unit 324 sets a preset error D, and the predetermined condition is set such that the absolute value of the difference between the number of memory cells and the predetermined number is greater than the preset error D. In the example of FIG. 8, when a read voltage V3 is applied to the data section, if the absolute value of the difference between the number of memory cells and the predetermined value T3 is greater than the preset error D, then the determination is made. The data stored in the data section is invalid. In this embodiment, the predetermined value T3 can be set as the number of memory cell conduction in the case where a specific read voltage V3 is applied and the stored data is valid data.

For example, if there is 1000 memory cells in a data segment of the non-volatile memory, when the data stored in the data segment is valid data, the memory cells in the data segment are turned on when a read voltage is applied. When the number is 100, the predetermined value T3 is set to 100, and the preset error D is set to 30. Therefore, if the same read voltage is applied to the data segment, the number of memory cells in the data segment is 200, because the absolute value of the difference between the number of memory cells and the predetermined value T3 is greater than The preset error D is determined by judging that the data stored in the data section at this time is invalid.

In the embodiment of the present invention, by reading at least one specific read voltage in the data section of the non-volatile memory, the number of memory cells in the data section is read, and according to whether the number of memory cells is related to a predetermined value The predetermined condition is met to determine whether the data stored in the data section of the non-volatile memory is invalid. When the above-mentioned embodiment can make the data stored in the data section of the non-volatile memory read error, before entering the process of the error recovery procedure, it is first determined whether the data stored in the data section is invalid data to avoid Unnecessary error recovery procedures, avoiding wasted computing costs, saving time and improving data processing efficiency.

In conclusion, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the present invention. Those skilled in the art to which the invention pertains can make various changes and changes without departing from the spirit and scope of the invention. Decoration. Therefore, the scope of the invention is defined by the scope of the appended claims.

S410, S420, S440‧‧‧ process steps

Claims (8)

A data processing method for a solid-state storage device, the solid-state storage device comprising a non-volatile memory, the non-volatile memory having at least one data segment, the data segment comprising a plurality of memory cells, the data processing method comprising: according to a predetermined The condition determines whether a material stored in the data section is invalid data, wherein the step of determining whether the data is invalid according to the predetermined condition comprises: applying at least one voltage to the data section, and reading the data section a number of memory cells corresponding to the voltage, wherein the voltage is predetermined to correspond to a predetermined value; and determining whether the data is invalid according to whether the relationship between the number of memory cells and the predetermined value satisfies the predetermined condition The data, wherein the predetermined condition is determined according to a relationship between a data segment storing the valid data and a distribution curve of the number of memory cells corresponding to the different reading voltages applied to the data segment storing the invalid data. . The method for processing data according to item 1 of the patent application scope further includes: if the data is determined to be valid data, and the data is read incorrectly, performing an error response (Error Recover) procedure for the data; If the data is invalid and the data is read incorrectly, the error response procedure is not executed for the data. For example, the data processing method described in claim 1 is wherein the data is invalid and the information stored in the data section is incomplete. The data processing method of claim 1, further comprising: determining whether the data stored in the data section has a reading error; and when the data is read incorrectly, determining the predetermined condition Whether the information is invalid. The data processing method of claim 1, wherein the step of determining whether the data is invalid according to the predetermined condition comprises: applying a first voltage to the data segment, and reading a pair in the data segment A first memory cell of the first voltage should be turned on, wherein the first voltage is predetermined to correspond to a first predetermined value; a second voltage is applied to the data segment, and the corresponding data segment is read a second memory cell of the second voltage is turned on, wherein the second voltage is predetermined to correspond to a second predetermined value; and the relationship between the first memory cell conduction number and the first predetermined value and the first Whether the relationship between the number of memory cells and the second predetermined value satisfies the predetermined condition to determine whether the data is invalid data. A solid state storage device comprising: a non-volatile memory having at least one data segment, the data segment comprising a plurality of memory cells; and a controller comprising: an invalidation determining unit for determining storage according to a predetermined condition Whether the data in the data section is invalid data; wherein the invalidation determining unit applies at least one electricity to the data section Pressing, and reading a number of memory cells corresponding to the voltage in the data segment, wherein the voltage is predetermined to correspond to a predetermined value; and whether the relationship between the number of memory cells and the predetermined value satisfies Predetermining conditions for determining whether the data is invalid data, wherein the predetermined condition is based on a memory cell corresponding to the data segment storing the valid data and the different reading voltages applied to the data segment storing the invalid data. The relationship between the distribution curves of the numbers is determined. The solid state storage device of claim 6, further comprising an error recovery unit for performing an error recovering process, wherein if the invalidation determining unit determines that the data is valid data, and the data When a read error occurs, the error replying unit executes the error replying program for the data. If the invalidity determining unit determines that the data is invalid data, and the data has a reading error, the error replying unit does not execute the data for the data. Error reply procedure. The solid state storage device of claim 6, wherein the data is invalid data represents that the data stored in the data section is incomplete.