TWI606346B - Detecting circuit - Google Patents

Detecting circuit Download PDF

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TWI606346B
TWI606346B TW105139560A TW105139560A TWI606346B TW I606346 B TWI606346 B TW I606346B TW 105139560 A TW105139560 A TW 105139560A TW 105139560 A TW105139560 A TW 105139560A TW I606346 B TWI606346 B TW I606346B
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signal
potential
resistor
hard disk
input
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TW105139560A
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TW201820162A (en
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韓應賢
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英業達股份有限公司
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Description

偵測電路Detection circuit

本發明係關於一種偵測電路,特別是一種針對硬碟類型的偵測電路。The present invention relates to a detection circuit, and more particularly to a detection circuit for a hard disk type.

隨著科技生活的來臨,電腦早已經成為生活中不可或缺的工具,同時市場對電腦設備的要求也越來越高。電腦設備中很重要的一個物件就是伺服器系統。一般來說,為了滿足市場的需求,伺服器系統通常必須具備有強大的數據處理能力與大容量的儲存容量。為了符合市場需求, 通常需要於伺服器中設置多個硬碟。然而,這些硬碟可所具有的類型可能係為不相同的。因此,當多個不同類型的硬碟混合搭配時,要區分出每個硬碟所對應的硬碟類型成為一個極大的挑戰與考驗。With the advent of technology life, computers have become an indispensable tool in life, and the market demand for computer equipment is getting higher and higher. One of the most important objects in computer equipment is the server system. In general, in order to meet the needs of the market, server systems usually have to have powerful data processing capabilities and large capacity storage capacity. In order to meet market demand, it is usually necessary to set multiple hard disks in the server. However, the types of these hard disks may be different. Therefore, when multiple different types of hard disks are mixed and matched, it is a great challenge and challenge to distinguish the hard disk type corresponding to each hard disk.

本發明所提出的偵測電路,可以藉由一組判斷信號,於一個預設資訊表進行查找,從而判斷硬碟的類型。The detection circuit proposed by the present invention can perform a search in a preset information table by using a set of judgment signals to determine the type of the hard disk.

依據本發明之一實施例揭露一種偵測電路,包含第一背板、主板與處理器。第一背板用於讓多個硬碟可插拔地插設於第一背板,其中每個硬碟提供輸入信號。主板電性連接第一背板。主板用以依據輸入信號與多個參考電壓,產生一組判斷信號。處理器電性連接主板,處理器依據該組判斷信號,查找預設資訊表,以判斷該些硬碟其中之一所對應的硬碟類型。According to an embodiment of the invention, a detection circuit is disclosed, including a first backplane, a motherboard, and a processor. The first backplane is configured to allow a plurality of hard disks to be pluggably inserted into the first backplane, wherein each hard disk provides an input signal. The main board is electrically connected to the first backboard. The main board is configured to generate a set of judgment signals according to the input signal and the plurality of reference voltages. The processor is electrically connected to the motherboard, and the processor searches the preset information table according to the group judgment signal to determine the type of the hard disk corresponding to one of the hard disks.

其中該些參考電壓包含第一參考電壓、第二參考電壓與第三參考電壓,該組判斷信號包含第一信號、第二信號與第三信號。主板包含判斷電路,電性連接第一背板,判斷電路包含第一比較電路、第二比較電路與第三比較電路。第一比較電路用以比較輸入信號與第一參考電壓,產生第一信號。第二比較電路用以比較輸入信號與第二參考電壓,產生第二信號。第三比較電路,用以比較輸入信號與第三參考電壓,產生第三信號。The reference voltages include a first reference voltage, a second reference voltage, and a third reference voltage, and the set of determination signals includes a first signal, a second signal, and a third signal. The main board includes a judging circuit electrically connected to the first backboard, and the judging circuit includes a first comparing circuit, a second comparing circuit and a third comparing circuit. The first comparison circuit is configured to compare the input signal with the first reference voltage to generate the first signal. The second comparison circuit is configured to compare the input signal with the second reference voltage to generate a second signal. The third comparison circuit is configured to compare the input signal with the third reference voltage to generate a third signal.

其中,第三參考電壓的電位大於第二參考電壓的電位,第二參考電壓的電位大於第一參考電壓的電位,處理器依據第一信號的電位、第二信號的電位與第三信號的電位,查找預設資訊表並判斷該些硬碟其中之一所對應的硬碟類型。The potential of the third reference voltage is greater than the potential of the second reference voltage, the potential of the second reference voltage is greater than the potential of the first reference voltage, and the processor is based on the potential of the first signal, the potential of the second signal, and the potential of the third signal. Find the default information table and determine the type of hard disk corresponding to one of the hard disks.

其中預設資訊表包含多個硬碟類型,處理器依據第一信號的電位、第二信號的電位與第三信號的電位,自預設資訊表辨識出該些硬碟類型其中之一,被辨識出的硬碟類型係為該些硬碟其中之一所對應的硬碟類型。The preset information table includes a plurality of hard disk types, and the processor identifies one of the hard disk types from the preset information table according to the potential of the first signal, the potential of the second signal, and the potential of the third signal. The type of hard disk recognized is the type of hard disk corresponding to one of the hard disks.

其中該些硬碟類型包含第一硬碟類型、第二硬碟類型與第三硬碟類型,當輸入信號的電位大於第一參考電壓的電位且小於等於第二參考電壓的電位時,處理器判斷該些硬碟其中之一所對應的硬碟類型係為第一硬碟類型,當輸入信號的電位大於第二參考電壓且小於等於第三參考電壓的電位時,處理器判斷該些硬碟其中之一所對應的硬碟類型係為第二硬碟類型,當輸入信號的電位大於第三參考電壓的電位時,處理器判斷該些硬碟其中之一所對應的硬碟類型係為第三硬碟類型。The hard disk type includes a first hard disk type, a second hard disk type, and a third hard disk type. When the potential of the input signal is greater than a potential of the first reference voltage and less than or equal to a potential of the second reference voltage, the processor Determining that the hard disk type corresponding to one of the hard disks is a first hard disk type, and when the potential of the input signal is greater than the second reference voltage and less than or equal to the potential of the third reference voltage, the processor determines the hard disks The hard disk type corresponding to one of the hard disk types is a second hard disk type. When the potential of the input signal is greater than the potential of the third reference voltage, the processor determines that the hard disk type corresponding to one of the hard disks is the first type. Three hard disk types.

其中處理器判斷第三信號的電位,若處理器判斷第三信號的電位為低電位時,處理器更判斷第二信號的電位,若處理器判斷第二信號的電位與第三信號的電位均為低電位時,處理器更判斷第一信號的電位,用以判斷些硬碟其中之一所對應的硬碟類型。The processor determines the potential of the third signal. If the processor determines that the potential of the third signal is low, the processor further determines the potential of the second signal, and if the processor determines the potential of the second signal and the potential of the third signal, When the potential is low, the processor further determines the potential of the first signal to determine the type of hard disk corresponding to one of the hard disks.

其中當處理器判斷第二信號的電位為高電位後,處理器更判斷第三信號的電位,當處理器判斷第二信號的電位為低電位後,處理器更判斷第一信號的電位,用以判斷該些硬碟其中之一所對應的硬碟類型。When the processor determines that the potential of the second signal is high, the processor further determines the potential of the third signal. When the processor determines that the potential of the second signal is low, the processor further determines the potential of the first signal. To determine the type of hard disk corresponding to one of the hard disks.

其中第一比較電路包含第一比較器、第一電阻、第二電阻、第三電阻、第一電容與第二電容。第一比較器具有第一輸入端、第二輸入端與第一輸出端,第一輸入端接收輸入信號。第一電阻具有第一端與第二端,第一電阻的第一端電性連接第二輸入端,第一電阻的第二端接收待機電壓。第二電阻具有第一端與第二端,第二電阻的第一端電性連接第二輸入端,第二電阻的第二端接收接地電壓。第三電阻具有第一端與第二端,第三電阻的第一端電性連接第一輸入端,第三電阻的第二端電性連接第一輸出端。第一電容具有第一端與第二端,第一電容的第一端接收第一工作電壓,第一電容的第二端接收接地電壓。第二電容具有第一端與第二端,第二電容的第一端電性連接第二輸入端,第二電容的第二端接收接地電壓。The first comparison circuit includes a first comparator, a first resistor, a second resistor, a third resistor, a first capacitor and a second capacitor. The first comparator has a first input, a second input, and a first output, and the first input receives the input signal. The first resistor has a first end and a second end. The first end of the first resistor is electrically connected to the second input end, and the second end of the first resistor receives the standby voltage. The second resistor has a first end and a second end. The first end of the second resistor is electrically connected to the second input end, and the second end of the second resistor receives the ground voltage. The third resistor has a first end and a second end. The first end of the third resistor is electrically connected to the first input end, and the second end of the third resistor is electrically connected to the first output end. The first capacitor has a first end and a second end, the first end of the first capacitor receives the first operating voltage, and the second end of the first capacitor receives the ground voltage. The second capacitor has a first end and a second end. The first end of the second capacitor is electrically connected to the second input end, and the second end of the second capacitor receives the ground voltage.

其中第二比較電路與第三比較電路分別包含第二比較器、第四電阻、第五電阻、第六電阻、第三電容與第四電容。第二比較器具有第一輸入端、第二輸入端與第一輸出端,第一輸入端接收輸入信號。第四電阻具有第一端與第二端,第四電阻的第一端電性連接第二輸入端,第四電阻的第二端接收待機電壓。第五電阻具有第一端與第二端,第五電阻的第一端電性連接第二輸入端,第五電阻的第二端接收接地電壓。第六電阻具有第一端與第二端,第六電阻的第一端電性連接第一輸入端,第六電阻的第二端電性連接第一輸出端。第三電容具有第一端與第二端,第三電容的第一端電性連接第一輸出端,第三電容的第二端接收接地電壓。第四電容具有第一端與第二端,第四電容的第一端電性連接第二輸入端,第四電容的第二端接收接地電壓。The second comparison circuit and the third comparison circuit respectively include a second comparator, a fourth resistor, a fifth resistor, a sixth resistor, a third capacitor and a fourth capacitor. The second comparator has a first input, a second input and a first output, and the first input receives the input signal. The fourth resistor has a first end and a second end. The first end of the fourth resistor is electrically connected to the second input end, and the second end of the fourth resistor receives the standby voltage. The fifth resistor has a first end and a second end. The first end of the fifth resistor is electrically connected to the second input end, and the second end of the fifth resistor receives the ground voltage. The sixth resistor has a first end and a second end. The first end of the sixth resistor is electrically connected to the first input end, and the second end of the sixth resistor is electrically connected to the first output end. The third capacitor has a first end and a second end. The first end of the third capacitor is electrically connected to the first output end, and the second end of the third capacitor receives the ground voltage. The fourth capacitor has a first end and a second end. The first end of the fourth capacitor is electrically connected to the second input end, and the second end of the fourth capacitor receives the ground voltage.

其中主板包含上拉電阻,具有第一端與第二端,上拉電阻的第一端接收待機電壓,上拉電阻的第二端電性連接第一背板與判斷電路,上拉電阻的電阻值實質為5.1千歐姆。The motherboard includes a pull-up resistor having a first end and a second end, the first end of the pull-up resistor receives the standby voltage, and the second end of the pull-up resistor is electrically connected to the first backplane and the judging circuit, and the resistor of the pull-up resistor The value is essentially 5.1 kilo ohms.

綜上所述,於本發明所提供的偵測電路的運作中,係藉由硬碟所提供的輸入信號以及參考信號來產生一組判斷信號,且利用該組判斷信號與預設資訊表,進而判斷硬碟所對應的硬碟類型。In summary, in the operation of the detecting circuit provided by the present invention, a set of determining signals is generated by using an input signal and a reference signal provided by the hard disk, and the set of determining signals and the preset information table are utilized. Then determine the type of hard disk corresponding to the hard disk.

以上之關於本揭露內容之說明及以下之實施方式之說明係用以示範與解釋本發明之精神與原理,並且提供本發明之專利申請範圍更進一步之解釋。The above description of the disclosure and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.

以下在實施方式中詳細敘述本發明之詳細特徵以及優點,其內容足以使任何熟習相關技藝者了解本發明之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。以下之實施例係進一步詳細說明本發明之觀點,但非以任何觀點限制本發明之範疇。The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.

請參照圖1,圖1係依據本發明之一實施例所繪示的偵測電路的功能方塊圖。如圖1所示,偵測電路1包含第一背板10、主板12與處理器14。第一背板10係用以讓第一硬碟102、第二硬碟104與第三硬碟106可插拔地插設於第一背板10上。第一硬碟102、第二硬碟104與第三硬碟106分別提供輸入信號Vin。於此實施例中,第一硬碟102、第二硬碟104與第三硬碟106均係為不同類型的硬碟。主板12電性連接第一背板10且接收輸入信號Vin。主板12依據輸入信號Vin與多個參考信號,進而產生一組判斷信號Vdet。處理器14電性連接主板12,且依據該組判斷信號Vdet,查找一個預設資訊表,進而判斷第一硬碟102、第二硬碟104與第三硬碟106其中一個的硬碟類型。Please refer to FIG. 1. FIG. 1 is a functional block diagram of a detection circuit according to an embodiment of the invention. As shown in FIG. 1, the detection circuit 1 includes a first backplane 10, a motherboard 12, and a processor 14. The first backplane 10 is configured to allow the first hard disk 102, the second hard disk 104, and the third hard disk 106 to be plugged into the first backplane 10. The first hard disk 102, the second hard disk 104, and the third hard disk 106 respectively provide an input signal Vin. In this embodiment, the first hard disk 102, the second hard disk 104, and the third hard disk 106 are all different types of hard disks. The main board 12 is electrically connected to the first backboard 10 and receives an input signal Vin. The main board 12 generates a set of determination signals Vdet according to the input signal Vin and the plurality of reference signals. The processor 14 is electrically connected to the main board 12, and searches for a preset information table according to the set of determination signals Vdet, thereby determining the hard disk type of one of the first hard disk 102, the second hard disk 104, and the third hard disk 106.

於一實施例中,如圖1所示,主板12包含判斷電路120,電性連接第一背板10。所述的多個參考電壓包含第一參考電壓Vf1、第二參考電壓Vf2與第三參考電壓Vf3。判斷電路120包含第一比較電路1201、第二比較電路1203與第三比較電路1205。第一比較電路1201用以比較輸入信號Vin與第一參考電壓Vf1,以產生第一信號Va。第二比較電路1203用以比較輸入信號Vin與該第二參考電壓Vf2,以產生第二信號Vb。第三比較電路1205用以比較輸入信號Vin與第三參考電壓Vf3,以產生第三信號Vf3。於實務上,所述的比較電路係為常見的比較器,可以針對輸入的電壓與一個參考電壓進行比較,並依據比較結果從而產生高準位或低準位的信號,以供後續的電路使用。In an embodiment, as shown in FIG. 1 , the main board 12 includes a judging circuit 120 electrically connected to the first back board 10 . The plurality of reference voltages include a first reference voltage Vf1, a second reference voltage Vf2, and a third reference voltage Vf3. The determination circuit 120 includes a first comparison circuit 1201, a second comparison circuit 1203, and a third comparison circuit 1205. The first comparison circuit 1201 is configured to compare the input signal Vin with the first reference voltage Vf1 to generate the first signal Va. The second comparison circuit 1203 is configured to compare the input signal Vin with the second reference voltage Vf2 to generate a second signal Vb. The third comparison circuit 1205 is configured to compare the input signal Vin with the third reference voltage Vf3 to generate a third signal Vf3. In practice, the comparison circuit is a common comparator, which can compare the input voltage with a reference voltage, and generate a high-level or low-level signal according to the comparison result for use in subsequent circuits. .

於一實施例中,第三參考電壓Vf3的電位大於第二參考電壓Vf2的電位,第二參考電壓Vf2的電位大於第一參考電壓Vf1的電位,處理器14依據第一信號Va的電位、第二信號Vb的電位與第三信號Vc的電位,查找預設資訊表並判斷該些硬碟其中之一所對應的硬碟類型。於一實施例中,第一參考電壓Vf1的電位係為0.5伏特,第二參考電壓Vf2的電位係為1.5伏特,第三參考電壓Vf3的電位係為2.5伏特。In one embodiment, the potential of the third reference voltage Vf3 is greater than the potential of the second reference voltage Vf2, the potential of the second reference voltage Vf2 is greater than the potential of the first reference voltage Vf1, and the processor 14 is based on the potential of the first signal Va. The potential of the second signal Vb and the potential of the third signal Vc are searched for a preset information table and judge the type of the hard disk corresponding to one of the hard disks. In one embodiment, the potential of the first reference voltage Vf1 is 0.5 volts, the potential of the second reference voltage Vf2 is 1.5 volts, and the potential of the third reference voltage Vf3 is 2.5 volts.

請一併參照表一,表一係為依據本發明之一實施例所示的預設資訊表。如表一所示,當輸入信號Vin的電位小於第一參考電壓Vf1,且小於等於第二參考電壓Vf2的電位時,處理器14判斷硬碟類型為第一硬碟類型。當輸入信號Vin的電位大於第一參考電壓Vf1,且小於等於第二參考電壓Vf2的電位時,處理器14判斷提供輸入信號Vin的硬碟所對應的硬碟類型為第一硬碟類型。當輸入信號Vin的電位大於第二參考電壓Vf2,且小於等於第三參考電壓Vf3的電位時,處理器14判斷提供輸入信號Vin的硬碟所對應的硬碟類型為第二硬碟類型。當輸入信號Vin的電位大於第三參考電壓Vf3,處理器14判斷提供輸入信號Vin的硬碟所對應的硬碟類型為第三硬碟類型。要注意的是,於表一中所示的輸入信號Vin的電位僅是作為舉例說明,本發明並不以此為限。 表一 <TABLE border="1" borderColor="#000000" width="85%"><TBODY><tr><td> 輸入信號 Vin的電位 </td><td> 第一信號 Va的電位 </td><td> 第二信號 Vb的電位 </td><td> 第三信號 Vc的電位 </td><td> 硬碟類型 </td></tr><tr><td> Vin<0.5(伏特) </td><td> 0 </td><td> 0 </td><td> 0 </td><td> N/A </td></tr><tr><td> 0.5(伏特)< Vin<1.5(伏特) </td><td> 1 </td><td> 0 </td><td> 0 </td><td> 第一硬碟類型 </td></tr><tr><td> 1.5(伏特)< Vin<2.5(伏特) </td><td> 1 </td><td> 1 </td><td> 0 </td><td> 第二硬碟類型 </td></tr><tr><td> Vin>2.5(伏特) </td><td> 1 </td><td> 1 </td><td> 1 </td><td> 第三硬碟類型 </td></tr></TBODY></TABLE>Referring to Table 1, Table 1 is a preset information table according to an embodiment of the present invention. As shown in Table 1, when the potential of the input signal Vin is less than the first reference voltage Vf1 and less than or equal to the potential of the second reference voltage Vf2, the processor 14 determines that the hard disk type is the first hard disk type. When the potential of the input signal Vin is greater than the first reference voltage Vf1 and less than or equal to the potential of the second reference voltage Vf2, the processor 14 determines that the hard disk type corresponding to the hard disk providing the input signal Vin is the first hard disk type. When the potential of the input signal Vin is greater than the second reference voltage Vf2 and less than or equal to the potential of the third reference voltage Vf3, the processor 14 determines that the hard disk type corresponding to the hard disk providing the input signal Vin is the second hard disk type. When the potential of the input signal Vin is greater than the third reference voltage Vf3, the processor 14 determines that the hard disk type corresponding to the hard disk providing the input signal Vin is the third hard disk type. It should be noted that the potential of the input signal Vin shown in Table 1 is for illustrative purposes only, and the present invention is not limited thereto. Table I         <TABLE border="1" borderColor="#000000" width="85%"><TBODY><tr><td> Potential of input signal Vin</td><td> Potential of first signal Va</td ><td> Potential of second signal Vb</td><td> Potential of third signal Vc</td><td> Hard disk type</td></tr><tr><td> Vin<0.5 (Volts) </td><td> 0 </td><td> 0 </td><td> 0 </td><td> N/A </td></tr><tr><td > 0.5 (volts) < Vin < 1.5 (volts) </td><td> 1 </td><td> 0 </td><td> 0 </td><td> first hard disk type </ Td></tr><tr><td> 1.5 (volts) < Vin<2.5 (volts) </td><td> 1 </td><td> 1 </td><td> 0 </td ><td> Second hard disk type</td></tr><tr><td> Vin>2.5 (volts) </td><td> 1 </td><td> 1 </td>< Td> 1 </td><td> Third hard drive type</td></tr></TBODY></TABLE>

於一實施例中,處理器14係藉由判斷第一信號 Va、第二信號 Vb與第三信號 Vc的準位,於預設資訊表中進行查找,進而判斷硬碟類型。舉例來說,於一個實施例中,處理器14會先判斷第三信號Vc的電位,若是處理器14判斷第三信號Vc的電位為低電位時,處理器14會進一步地判斷第二信號Vb的電位。若是處理器14判斷第二信號Vb的電位與第三信號Vc的電位均為低電位時,處理器更進一步地判斷第一信號Va的電位,用以判斷該些硬碟其中之一所對應的硬碟類型。其中本發明所述的低電位與高電位分別是以0與1來表示。以一個具體的例子來說,假設第一硬碟102提供輸入信號Vin至判斷電路120,第一比較電路1201、第二比較電路1203與第三比較電路1205分別對應輸出第一信號 Va、第二信號 Vb與第三信號 Vc至處理器14。In one embodiment, the processor 14 determines the hard disk type by determining the level of the first signal Va, the second signal Vb, and the third signal Vc in the preset information table. For example, in one embodiment, the processor 14 first determines the potential of the third signal Vc. If the processor 14 determines that the potential of the third signal Vc is low, the processor 14 further determines the second signal Vb. Potential. If the processor 14 determines that the potential of the second signal Vb and the potential of the third signal Vc are both low, the processor further determines the potential of the first signal Va to determine that one of the hard disks corresponds to Hard disk type. The low potential and the high potential described in the present invention are represented by 0 and 1, respectively. In a specific example, it is assumed that the first hard disk 102 provides the input signal Vin to the determining circuit 120, and the first comparing circuit 1201, the second comparing circuit 1203 and the third comparing circuit 1205 respectively output the first signal Va and the second. The signal Vb and the third signal Vc are supplied to the processor 14.

首先,處理器14先判斷第三信號Vc的電位,若是第三信號Vc的電位為低電位(也就是0) ,此時,處理器14進一步地判斷第二信號Vb的電位。若是第二信號Vb的電位亦為低電位(也就是0) ,處理器14再進一步地判斷第一信號Va的電位。假設於此例子中,第一信號Va的電位係為高電位(也就是1) ,處理器14便可以得到第一信號 Va、第二信號 Vb與第三信號 Vc的電位分別是1,0,0。如此一來,處理器14便可以於表一中查找到第一硬碟類型,從而判斷第一硬碟102所對應係為第一硬碟類型。First, the processor 14 first determines the potential of the third signal Vc. If the potential of the third signal Vc is low (i.e., 0), the processor 14 further determines the potential of the second signal Vb. If the potential of the second signal Vb is also low (i.e., 0), the processor 14 further determines the potential of the first signal Va. It is assumed that in this example, the potential of the first signal Va is high (that is, 1), and the processor 14 can obtain the potentials of the first signal Va, the second signal Vb, and the third signal Vc, respectively, being 1,0. 0. In this way, the processor 14 can find the first hard disk type in Table 1, thereby determining that the first hard disk 102 corresponds to the first hard disk type.

於前述的例子中,處理器14係先由第三信號Vc的電位開始進行判斷。而於另一實施例中,處理器14係先由第二信號Vb的電位開始進行判斷。當處理器14判斷第二信號Vb的電位為高電位後,處理器14進一步判斷第三信號Vc的電位。當處理器14判斷第二信號Vb的電位為低電位後,處理器14進一步判斷第一信號Va的電位,用以判斷該些硬碟其中之一所對應的硬碟類型。以實際的例子來說明,假設第二硬碟104提供輸入信號Vin 至判斷電路120,產生對應的第一信號 Va、第二信號 Vb與第三信號 Vc。處理器14先判斷第二信號Vb的電位。假設第二信號Vb的電位係為高電位,此時,處理器14進一步判斷第三信號Vc的電位。若是第三信號Vc的電位係為低電位,處理器14便可以於表一中查找出第二硬碟104所對應的係為第二硬碟類型。要注意的是,於表一的實施例中,當第一信號 Va、第二信號 Vb與第三信號 Vc均為低電位時,並無法查找到對應的硬碟類型。In the foregoing example, the processor 14 first determines the potential of the third signal Vc. In another embodiment, the processor 14 first determines by the potential of the second signal Vb. When the processor 14 determines that the potential of the second signal Vb is high, the processor 14 further determines the potential of the third signal Vc. After the processor 14 determines that the potential of the second signal Vb is low, the processor 14 further determines the potential of the first signal Va to determine the type of the hard disk corresponding to one of the hard disks. As a practical example, it is assumed that the second hard disk 104 supplies the input signal Vin to the decision circuit 120 to generate the corresponding first signal Va, second signal Vb and third signal Vc. The processor 14 first determines the potential of the second signal Vb. Assuming that the potential of the second signal Vb is high, at this time, the processor 14 further determines the potential of the third signal Vc. If the potential of the third signal Vc is low, the processor 14 can find in the first table that the second hard disk 104 corresponds to the second hard disk type. It should be noted that in the embodiment of Table 1, when the first signal Va, the second signal Vb, and the third signal Vc are both at a low potential, the corresponding hard disk type cannot be found.

請參照圖2,圖2係依據本發明之一實施例所繪示的判斷電路的電路架構圖。於此實施例中,如圖2所示,第一比較電路1201包含比較器OP1、電阻R1~R3與電容C1~C2。比較器OP1具有第一輸入端、第二輸入端與第一輸出端。第一輸入端接收輸入信號Vin。電阻R1具有第一端與第二端,其第一端電性連接比較器OP1的第二輸入端,其第二端接收待機電壓VST。第二電阻R2具有第一端與第二端,其第一端電性連接比較器OP1的第二輸入端,其第二端接收接地電壓GND。電阻R3具有第一端與第二端,其第一端電性連接比較器OP1的第一輸入端,其第二端電性連接比較器OP1的第一輸出端。電容C1具有第一端與第二端,其第一端接收工作電壓VD,其第二端接收接地電壓GND。電容C2具有第一端與第二端,其第一端電性連接比較器OP1的第二輸入端,其第二端接收接地電壓GND。Please refer to FIG. 2. FIG. 2 is a circuit diagram of a judging circuit according to an embodiment of the invention. In this embodiment, as shown in FIG. 2, the first comparison circuit 1201 includes a comparator OP1, resistors R1 to R3, and capacitors C1 to C2. The comparator OP1 has a first input, a second input and a first output. The first input receives the input signal Vin. The resistor R1 has a first end and a second end, the first end of which is electrically connected to the second input end of the comparator OP1, and the second end of which receives the standby voltage VST. The second resistor R2 has a first end and a second end, the first end of which is electrically connected to the second input end of the comparator OP1, and the second end of which receives the ground voltage GND. The resistor R3 has a first end and a second end, the first end of which is electrically connected to the first input end of the comparator OP1, and the second end of which is electrically connected to the first output end of the comparator OP1. The capacitor C1 has a first end and a second end, the first end of which receives the operating voltage VD and the second end of which receives the ground voltage GND. The capacitor C2 has a first end and a second end, the first end of which is electrically connected to the second input end of the comparator OP1, and the second end of which receives the ground voltage GND.

具體來說,於此實施例中,第一比較電路1201係由第一輸入端接收來自硬碟的輸入信號Vin,且比較第一參考電壓Vf1與輸入信號Vin,進而產生對應的第一信號Va。於一個例子中,電阻R1的電阻值為5.62千歐姆。電阻R2的電阻值為1千歐姆。電阻R3的電阻值為10兆歐姆。電容C1與電容C2的電容值均為0.1微法拉。於此例子中,第一比較電路1201包含電阻R10,具有第一端與第二端,其第一端接收待機電壓VST,其第二端電性連接比較器OP1的第一輸出端。於此例子中,電阻R10為4.7千歐姆。上述實施例中的電阻值與電容值僅是作為舉例說明,本發明並不以此為限。Specifically, in this embodiment, the first comparison circuit 1201 receives the input signal Vin from the hard disk by the first input terminal, and compares the first reference voltage Vf1 with the input signal Vin, thereby generating a corresponding first signal Va. . In one example, the resistance of resistor R1 is 5.62 kilohms. The resistance value of the resistor R2 is 1 kilo ohm. The resistance value of the resistor R3 is 10 megaohms. The capacitance values of capacitor C1 and capacitor C2 are both 0.1 microfarads. In this example, the first comparison circuit 1201 includes a resistor R10 having a first end and a second end, the first end of which receives the standby voltage VST and the second end of which is electrically coupled to the first output of the comparator OP1. In this example, the resistor R10 is 4.7 kilo ohms. The resistance values and capacitance values in the above embodiments are merely illustrative, and the invention is not limited thereto.

於一實施例中,如圖2所示,第二比較電路1203包含比較器OP2、電阻R4~R6與電容C3~C4。比較器OP2具有第一輸入端、第二輸入端與第一輸出端,其第一輸入端接收輸入信號Vin。電阻R4具有第一端與第二端,其第一端電性連接第二輸入端,其第二端接收待機電壓VST。電阻R5具有第一端與第二端,其第一端電性連接比較器OP2的第二輸入端,其第二端接收接地電壓GND。電阻R6具有第一端與第二端,其第一端電性連接比較器OP2的第一輸入端,其第二端電性連接比較器OP2的第一輸出端。電容C3具有第一端與第二端,其第一端電性連接比較器OP2的第一輸出端,其第二端接收接地電壓GND。電容C4具有第一端與第二端,其第一端電性連接第二輸入端,其第二端接收接地電壓GND。In one embodiment, as shown in FIG. 2, the second comparison circuit 1203 includes a comparator OP2, resistors R4 to R6, and capacitors C3 to C4. The comparator OP2 has a first input, a second input and a first output, the first input of which receives the input signal Vin. The resistor R4 has a first end and a second end, the first end of which is electrically connected to the second input end, and the second end of which receives the standby voltage VST. The resistor R5 has a first end and a second end, the first end of which is electrically connected to the second input end of the comparator OP2, and the second end of which receives the ground voltage GND. The resistor R6 has a first end and a second end, the first end of which is electrically connected to the first input end of the comparator OP2, and the second end of which is electrically connected to the first output end of the comparator OP2. The capacitor C3 has a first end and a second end, the first end of which is electrically connected to the first output end of the comparator OP2, and the second end of which receives the ground voltage GND. The capacitor C4 has a first end and a second end, the first end of which is electrically connected to the second input end, and the second end of which receives the ground voltage GND.

具體來說,第二比較電路1203係由第一輸入端接收來自硬碟的輸入信號Vin,且比較第二參考電壓Vf2與輸入信號Vin,進而產生對應的第二信號Vb。於一個例子中,電阻R4的電阻值為1.21千歐姆,電阻R5的電阻值為1千歐姆,而電阻R6的電阻值為10兆歐姆。電容C3與電容C4的電容值均為0.1微法拉。於此實施例中,第三比較電路1205包含比較器OP3、電阻R7~R9與電容C5~C6。由圖2可得知,第三比較電路1205的電路架構與前述的第二比較電路1203的電路架構相同,因此不予贅述。具體來說,第三比較電路1205係由第一輸入端接收來自硬碟的輸入信號Vin,且比較第三參考電壓Vf3與輸入信號Vin,進而產生對應的第三信號Vc。於一個例子中,電阻R7的電阻值為374歐姆,電阻R8的電阻值為1千歐姆,而電阻R9的電阻值為10兆歐姆。電容C5與電容C6的電容值均為0.1微法拉。於此實施例中,如圖2所示,第二比較電路1203包含電阻R11,具有第一端與第二端,其第一端接收待機電壓VST,其第二端電性連接比較器OP2的第一輸出端。於此實施例中,電阻R11的電阻值為4.7千歐姆。第三比較電路1205包含電阻R12,具有第一端與第二端,其第一端接收待機電壓VST,其第二端電性連接比較器OP3的第一輸出端。於此實施例中,電阻R12的電阻值為4.7千歐姆。上述實施例中的電阻值與電容值僅是作為舉例說明,本發明並不以此為限。Specifically, the second comparison circuit 1203 receives the input signal Vin from the hard disk by the first input terminal, and compares the second reference voltage Vf2 with the input signal Vin, thereby generating a corresponding second signal Vb. In one example, the resistance of resistor R4 is 1.21 kilo ohms, the resistance of resistor R5 is 1 kilo ohm, and the resistance of resistor R6 is 10 megaohms. Capacitor C3 and capacitor C4 have a capacitance of 0.1 microfarad. In this embodiment, the third comparison circuit 1205 includes a comparator OP3, resistors R7-R9, and capacitors C5-C6. As can be seen from FIG. 2, the circuit structure of the third comparison circuit 1205 is the same as that of the second comparison circuit 1203 described above, and therefore will not be described again. Specifically, the third comparison circuit 1205 receives the input signal Vin from the hard disk by the first input terminal, and compares the third reference voltage Vf3 with the input signal Vin, thereby generating a corresponding third signal Vc. In one example, the resistance of resistor R7 is 374 ohms, the resistance of resistor R8 is 1 kilo ohm, and the resistance of resistor R9 is 10 megaohms. Capacitor C5 and capacitor C6 have a capacitance of 0.1 microfarad. In this embodiment, as shown in FIG. 2, the second comparison circuit 1203 includes a resistor R11 having a first end and a second end, the first end of which receives the standby voltage VST, and the second end of which is electrically connected to the comparator OP2. The first output. In this embodiment, the resistance of the resistor R11 is 4.7 kilohms. The third comparison circuit 1205 includes a resistor R12 having a first end and a second end, the first end of which receives the standby voltage VST and the second end of which is electrically connected to the first output end of the comparator OP3. In this embodiment, the resistance of the resistor R12 is 4.7 kilohms. The resistance values and capacitance values in the above embodiments are merely illustrative, and the invention is not limited thereto.

於一實施例中,如圖2所示,於判斷電路120中,上拉電阻RP具有第一端與第二端,上拉電阻RP的第一端接收待機電壓VST,上拉電阻RP的第二端電性連接第一背板10與判斷電路120。於一個例子中,上拉電阻RP係設置於主板14,上拉電阻RP係與第一背板10的第一硬碟102、第二硬碟104與第三硬碟106電性連接,用以輸出適當的輸入信號Vin至判斷電路120,進而可以產生一組對應的判斷信號,以利後續進行硬碟類型的查找。於一實施例中,上拉電阻的電阻值實質為5.1千歐姆。然而,上述實施例中的電阻值僅是作為舉例說明,本發明並不以此為限。In an embodiment, as shown in FIG. 2, in the determining circuit 120, the pull-up resistor RP has a first end and a second end, and the first end of the pull-up resistor RP receives the standby voltage VST, and the pull-up resistor RP The two ends are electrically connected to the first backplane 10 and the judging circuit 120. In one example, the pull-up resistor RP is disposed on the main board 14, and the pull-up resistor RP is electrically connected to the first hard disk 102, the second hard disk 104, and the third hard disk 106 of the first backplane 10. An appropriate input signal Vin is output to the decision circuit 120, and a corresponding set of decision signals can be generated to facilitate subsequent search of the hard disk type. In one embodiment, the pull-up resistor has a resistance value of substantially 5.1 kilo ohms. However, the resistance values in the above embodiments are merely illustrative, and the invention is not limited thereto.

請參照圖3,圖3係依據本發明之一實施例所繪示的第一硬碟的電路架構圖。如圖3所示,第一硬碟102具有電阻R13~R15以及電晶體T1與電晶體T2。電阻R13的第一端接收工作電壓VD,其第二端電性連接電晶體T1的第一端。電阻R15的第一端接收工作電壓VD,其第二端電性連接電晶體T1的主控端。電晶體T2的主控端電性連接電阻R15的第二端,電晶體T2的第一端電性連接電阻R14的第一端以及電晶體T1的第二端。電阻R14的第二端接收接地電壓GND。於此實施例中,電阻R13的電阻值為2.61千歐姆。電阻R14的電阻值為2千歐姆。電阻R15的電阻值為100歐姆。請參照圖4,圖4係依據本發明之一實施例所繪示的第二硬碟的電路架構圖。如圖4所示,第二硬碟104具有電阻R16~R18以及電晶體T3與電晶體T4。圖4中第二硬碟104的電路架構與圖3中第一硬碟102的電路架構相似,在此便不予贅述。兩者不同之處係在於電阻值的大小。於此實施例中,電阻R16與電阻R17的電阻值均為1千歐姆,而電阻R18的電阻值為100歐姆。Please refer to FIG. 3. FIG. 3 is a circuit diagram of a first hard disk according to an embodiment of the invention. As shown in FIG. 3, the first hard disk 102 has resistors R13 to R15 and a transistor T1 and a transistor T2. The first end of the resistor R13 receives the working voltage VD, and the second end of the resistor R13 is electrically connected to the first end of the transistor T1. The first end of the resistor R15 receives the working voltage VD, and the second end of the resistor R15 is electrically connected to the main control end of the transistor T1. The main terminal of the transistor T2 is electrically connected to the second end of the resistor R15. The first end of the transistor T2 is electrically connected to the first end of the resistor R14 and the second end of the transistor T1. The second end of the resistor R14 receives the ground voltage GND. In this embodiment, the resistance of the resistor R13 is 2.61 kohms. The resistance of the resistor R14 is 2 kilohms. The resistance of the resistor R15 is 100 ohms. Please refer to FIG. 4. FIG. 4 is a circuit diagram of a second hard disk according to an embodiment of the invention. As shown in FIG. 4, the second hard disk 104 has resistors R16 to R18 and a transistor T3 and a transistor T4. The circuit architecture of the second hard disk 104 in FIG. 4 is similar to that of the first hard disk 102 in FIG. 3, and will not be described herein. The difference between the two is in the magnitude of the resistance value. In this embodiment, the resistance values of the resistor R16 and the resistor R17 are both 1 kilo ohm, and the resistance of the resistor R18 is 100 ohms.

請參照圖5,圖5係依據本發明 之一實施例所繪示的第三硬碟的電路架構圖。如圖5所示,第三硬碟106具有電阻R19~R20以及電晶體T5與電晶體T6。電阻R20的第一端接收工作電壓VD,其第二端電性連接電晶體T5的主控端與電晶體T6的主控端。電阻R19的第一端電性連接電晶體T5的第一端,其第二端接收接地電壓GND。電晶體T5的第二端電性連接電晶體T6的第一端。於此實施例中,電阻R19與電阻R20的電阻值分別為2千歐姆與100歐姆。上述實施例中的電阻值僅是作為舉例說明,本發明並不以此為限。Referring to FIG. 5, FIG. 5 is a circuit diagram of a third hard disk according to an embodiment of the invention. As shown in FIG. 5, the third hard disk 106 has resistors R19 to R20 and a transistor T5 and a transistor T6. The first end of the resistor R20 receives the working voltage VD, and the second end of the resistor R20 is electrically connected to the main control end of the transistor T5 and the main control end of the transistor T6. The first end of the resistor R19 is electrically connected to the first end of the transistor T5, and the second end thereof receives the ground voltage GND. The second end of the transistor T5 is electrically connected to the first end of the transistor T6. In this embodiment, the resistance values of the resistor R19 and the resistor R20 are 2 kilo ohms and 100 ohms, respectively. The resistance values in the above embodiments are merely illustrative, and the invention is not limited thereto.

綜合以上所述,本發明所提供的偵測電路,係藉由輸入信號與三個參考電壓,使判斷電路產生第一信號、第二信號與第三信號,並依據其電位高低,於預設資訊表中查找出對應的硬碟類型,進而當不同類型的硬碟混合搭配時,可以分辨出硬碟所具有的硬碟類型,從而可以正確地加載資料。In summary, the detection circuit provided by the present invention causes the determination circuit to generate the first signal, the second signal, and the third signal by using the input signal and the three reference voltages, and according to the potential level, preset The corresponding hard disk type is found in the information table, and when different types of hard disks are mixed and matched, the hard disk type of the hard disk can be distinguished, so that the data can be correctly loaded.

雖然本發明以前述之實施例揭露如上,然其並非用以限定本發明。在不脫離本發明之精神和範圍內,所為之更動與潤飾,均屬本發明之專利保護範圍。關於本發明所界定之保護範圍請參考所附之申請專利範圍。Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.

1‧‧‧偵測電路
10‧‧‧第一背板
12‧‧‧主板
14‧‧‧處理器
102‧‧‧第一硬碟
104‧‧‧第二硬碟
106‧‧‧第三硬碟
120‧‧‧判斷電路
1201‧‧‧第一比較電路
1203‧‧‧第二比較電路
1205‧‧‧第三比較電路
Vin‧‧‧輸入信號
Vdet‧‧‧判斷信號
Va‧‧‧第一信號
Vb‧‧‧第二信號
Vc‧‧‧第三信號
Vf1‧‧‧第一參考電壓
Vf2‧‧‧第二參考電壓
Vf3‧‧‧第三參考電壓
VST‧‧‧待機電壓
GND‧‧‧接地電壓
RP‧‧‧上拉電阻
R1~R9‧‧‧電阻
R10、R11、R12‧‧‧上拉電阻
C1~C6‧‧‧電容
1‧‧‧Detection circuit
10‧‧‧First backplane
12‧‧‧ motherboard
14‧‧‧ Processor
102‧‧‧First hard disk
104‧‧‧second hard disk
106‧‧‧ Third hard disk
120‧‧‧Judgement circuit
1201‧‧‧First comparison circuit
1203‧‧‧Second comparison circuit
1205‧‧‧ third comparison circuit
Vin‧‧‧ input signal
Vdet‧‧‧judgment signal
Va‧‧ first signal
Vb‧‧‧ second signal
Vc‧‧‧ third signal
Vf1‧‧‧ first reference voltage
Vf2‧‧‧second reference voltage
Vf3‧‧‧ third reference voltage
VST‧‧‧Standby voltage
GND‧‧‧ Grounding voltage
R P ‧‧‧ Pull-up resistor
R1~R9‧‧‧ resistor
R10, R11, R12‧‧‧ pull-up resistors
C1~C6‧‧‧ capacitor

圖1係依據本發明之一實施例所繪示的偵測電路的功能方塊圖。 圖2係依據本發明之一實施例所繪示的判斷電路的電路架構圖。 圖3係依據本發明之一實施例所繪示的第一硬碟的電路架構圖。 圖4係依據本發明之一實施例所繪示的第二硬碟的電路架構圖。 圖5係依據本發明 之一實施例所繪示的第三硬碟的電路架構圖。FIG. 1 is a functional block diagram of a detection circuit according to an embodiment of the invention. FIG. 2 is a circuit diagram of a determination circuit according to an embodiment of the invention. FIG. 3 is a circuit diagram of a first hard disk according to an embodiment of the invention. FIG. 4 is a circuit diagram of a second hard disk according to an embodiment of the invention. FIG. 5 is a circuit diagram of a third hard disk according to an embodiment of the invention.

1‧‧‧偵測電路 1‧‧‧Detection circuit

10‧‧‧第一背板 10‧‧‧First backplane

12‧‧‧主板 12‧‧‧ motherboard

14‧‧‧處理器 14‧‧‧ Processor

102‧‧‧第一硬碟 102‧‧‧First hard disk

104‧‧‧第二硬碟 104‧‧‧second hard disk

106‧‧‧第三硬碟 106‧‧‧ Third hard disk

120‧‧‧判斷電路 120‧‧‧Judgement circuit

1201‧‧‧第一比較電路 1201‧‧‧First comparison circuit

1203‧‧‧第二比較電路 1203‧‧‧Second comparison circuit

1205‧‧‧第三比較電路 1205‧‧‧ third comparison circuit

Vin‧‧‧輸入信號 Vin‧‧‧ input signal

Vdet‧‧‧判斷信號 Vdet‧‧‧judgment signal

Claims (9)

一種偵測電路,包含:一第一背板,用於讓多個硬碟可插拔地插設於該第一背板,其中每一該硬碟提供一輸入信號;一主板,電性連接該第一背板,該主板用以依據該輸入信號與多個參考電壓,產生一組判斷信號;以及一處理器,電性連接該主板,該處理器依據該組判斷信號,查找一預設資訊表,以判斷該些硬碟其中之一所對應的一硬碟類型。A detection circuit includes: a first backplane, wherein a plurality of hard disks are pluggably inserted into the first backplane, wherein each of the hard disks provides an input signal; and a motherboard is electrically connected The first backplane, the motherboard is configured to generate a set of determining signals according to the input signal and the plurality of reference voltages; and a processor electrically connected to the motherboard, the processor searching for a preset according to the group of determining signals A information table to determine a type of hard disk corresponding to one of the hard disks. 如請求項1所述的偵測電路,其中該些參考電壓包含一第一參考電壓、一第二參考電壓與一第三參考電壓,該組判斷信號包含一第一信號、一第二信號與一第三信號,該主板包含一判斷電路,電性連接該第一背板,該判斷電路包含:一第一比較電路,用以比較該輸入信號與該第一參考電壓,產生該第一信號;一第二比較電路,用以比較該輸入信號與該第二參考電壓,產生該第二信號;以及一第三比較電路,用以比較該輸入信號與該第三參考電壓,產生該第三信號;其中,該第三參考電壓的電位大於該第二參考電壓的電位,該第二參考電壓的電位大於該第一參考電壓的電位,該處理器依據該第一信號的電位、該第二信號的電位與該第三信號的電位,查找該預設資訊表並判斷該些硬碟其中之一所對應的該硬碟類型。The detecting circuit of claim 1, wherein the reference voltages comprise a first reference voltage, a second reference voltage, and a third reference voltage, the set of determining signals comprising a first signal and a second signal a third signal, the motherboard includes a determining circuit electrically connected to the first backplane, the determining circuit comprising: a first comparing circuit for comparing the input signal with the first reference voltage to generate the first signal a second comparison circuit for comparing the input signal with the second reference voltage to generate the second signal; and a third comparison circuit for comparing the input signal with the third reference voltage to generate the third a signal, wherein a potential of the third reference voltage is greater than a potential of the second reference voltage, a potential of the second reference voltage is greater than a potential of the first reference voltage, and the processor is configured according to a potential of the first signal, the second The potential of the signal and the potential of the third signal are searched for the preset information table and determine the type of the hard disk corresponding to one of the hard disks. 如請求項2所述的偵測電路,其中該預設資訊表包含多個硬碟類型,該處理器依據該第一信號的電位、該第二信號的電位與該第三信號的電位,自該預設資訊表辨識出該些硬碟類型其中之一,被辨識出的該硬碟類型係為該些硬碟其中之一所對應的該硬碟類型。The detecting circuit of claim 2, wherein the preset information table comprises a plurality of hard disk types, and the processor is configured according to the potential of the first signal, the potential of the second signal, and the potential of the third signal. The preset information table identifies one of the hard disk types, and the recognized hard disk type is the hard disk type corresponding to one of the hard disks. 如請求項3所述的偵測電路,其中該些硬碟類型包含一第一硬碟類型、一第二硬碟類型與一第三硬碟類型,當該輸入信號的電位大於該第一參考電壓的電位且小於等於該第二參考電壓的電位時,該處理器判斷該些硬碟其中之一所對應的該硬碟類型係為該第一硬碟類型,當該輸入信號的電位大於該第二參考電壓且小於等於該第三參考電壓的電位時,該處理器判斷該些硬碟其中之一所對應的該硬碟類型係為該第二硬碟類型,當該輸入信號的電位大於該第三參考電壓的電位時,該處理器判斷該些硬碟其中之一所對應的該硬碟類型係為該第三硬碟類型。The detecting circuit of claim 3, wherein the hard disk types comprise a first hard disk type, a second hard disk type and a third hard disk type, when the potential of the input signal is greater than the first reference When the potential of the voltage is less than or equal to the potential of the second reference voltage, the processor determines that the hard disk type corresponding to one of the hard disks is the first hard disk type, when the potential of the input signal is greater than the When the second reference voltage is less than or equal to the potential of the third reference voltage, the processor determines that the hard disk type corresponding to one of the hard disks is the second hard disk type, when the potential of the input signal is greater than When the potential of the third reference voltage is reached, the processor determines that the hard disk type corresponding to one of the hard disks is the third hard disk type. 如請求項2所述的偵測電路,其中該處理器判斷該第三信號的電位,若該處理器判斷該第三信號的電位為低電位時,該處理器更判斷該第二信號的電位,若該處理器判斷該第二信號的電位與該第三信號的電位均為低電位時,該處理器更判斷該第一信號的電位,用以判斷該些硬碟其中之一所對應的該硬碟類型。The detecting circuit of claim 2, wherein the processor determines the potential of the third signal, and if the processor determines that the potential of the third signal is low, the processor further determines the potential of the second signal If the processor determines that the potential of the second signal and the potential of the third signal are both low, the processor further determines the potential of the first signal to determine that one of the hard disks corresponds to The type of hard drive. 如請求項2所述的偵測電路,其中當該處理器判斷該第二信號的電位為高電位後,該處理器更判斷該第三信號的電位,當該處理器判斷該第二信號的電位為低電位後,該處理器更判斷該第一信號的電位,用以判斷該些硬碟其中之一所對應的該硬碟類型。The detecting circuit of claim 2, wherein when the processor determines that the potential of the second signal is high, the processor further determines a potential of the third signal, and when the processor determines the second signal After the potential is low, the processor further determines the potential of the first signal to determine the type of the hard disk corresponding to one of the hard disks. 如請求項2所述的偵測電路,其中該第一比較電路包含:一第一比較器,具有一第一輸入端、一第二輸入端與一第一輸出端,該第一輸入端接收該輸入信號;一第一電阻,具有第一端與第二端,該第一電阻的第一端電性連接該第二輸入端,該第一電阻的第二端接收一待機電壓;一第二電阻,具有第一端與第二端,該第二電阻的第一端電性連接該第二輸入端,該第二電阻的第二端接收一接地電壓;一第三電阻,具有第一端與第二端,該第三電阻的第一端電性連接該第一輸入端,該第三電阻的第二端電性連接該第一輸出端;一第一電容,具有第一端與第二端,該第一電容的第一端接收一第一工作電壓,該第一電容的第二端接收該接地電壓;以及一第二電容,具有第一端與第二端,該第二電容的第一端電性連接該第二輸入端,該第二電容的第二端接收該接地電壓。The detecting circuit of claim 2, wherein the first comparing circuit comprises: a first comparator having a first input end, a second input end and a first output end, the first input end receiving The first resistor has a first end and a second end, the first end of the first resistor is electrically connected to the second input end, and the second end of the first resistor receives a standby voltage; The second resistor has a first end and a second end, the first end of the second resistor is electrically connected to the second input end, the second end of the second resistor receives a ground voltage; and a third resistor has a first The first end of the third resistor is electrically connected to the first input end, and the second end of the third resistor is electrically connected to the first output end; a first capacitor has a first end a second end, the first end of the first capacitor receives a first operating voltage, the second end of the first capacitor receives the ground voltage, and a second capacitor has a first end and a second end, the second The first end of the capacitor is electrically connected to the second input end, and the second end of the second capacitor receives the connection Ground voltage. 如請求項2所述的偵測電路,其中該第二比較電路與該第三比較電路分別包含:一第二比較器,具有一第一輸入端、一第二輸入端與一第一輸出端,該第一輸入端接收該輸入信號;一第四電阻,具有第一端與第二端,該第四電阻的第一端電性連接該第二輸入端,該第四電阻的第二端接收一待機電壓;一第五電阻,具有第一端與第二端,該第五電阻的第一端電性連接該第二輸入端,該第五電阻的第二端接收一接地電壓;一第六電阻,具有第一端與第二端,該第六電阻的第一端電性連接該第一輸入端,該第六電阻的第二端電性連接該第一輸出端;一第三電容,具有第一端與第二端,該第三電容的第一端電性連接該第一輸出端,該第三電容的第二端接收該接地電壓;以及一第四電容,具有第一端與第二端,該第四電容的第一端電性連接該第二輸入端,該第四電容的第二端接收該接地電壓。The detecting circuit of claim 2, wherein the second comparing circuit and the third comparing circuit respectively comprise: a second comparator having a first input end, a second input end and a first output end The first input terminal receives the input signal; a fourth resistor has a first end and a second end, the first end of the fourth resistor is electrically connected to the second input end, and the second end of the fourth resistor Receiving a standby voltage; a fifth resistor having a first end and a second end, the first end of the fifth resistor being electrically connected to the second input end, the second end of the fifth resistor receiving a ground voltage; The sixth resistor has a first end and a second end, the first end of the sixth resistor is electrically connected to the first input end, and the second end of the sixth resistor is electrically connected to the first output end; The capacitor has a first end and a second end, the first end of the third capacitor is electrically connected to the first output end, the second end of the third capacitor receives the ground voltage, and a fourth capacitor has a first The first end of the fourth capacitor is electrically connected to the second input end, and the second end The second terminal of the four capacitor receives the ground voltage. 如請求項2所述的偵測電路,其中該主板包含一上拉電阻,具有第一端與第二端,該上拉電阻的第一端接收一待機電壓,該上拉電阻的第二端電性連接該第一背板與該判斷電路,該上拉電阻的電阻值實質為5.1千歐姆。The detecting circuit of claim 2, wherein the main board comprises a pull-up resistor having a first end and a second end, the first end of the pull-up resistor receiving a standby voltage, and the second end of the pull-up resistor The first backplane is electrically connected to the determining circuit, and the resistance of the pull-up resistor is substantially 5.1 kilo ohms.
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