TWI599180B - Spread spectrum clock generating circuit - Google Patents

Description

Spread spectrum clock generation circuit

The present invention relates to a spread-spectrum clock generator (SSCG), and more particularly to a spread-spectrum clock generating circuit for a programmable charge pump.

With the rapid development of the electronic circuit industry, the operating frequency of electronic components is accelerating, which causes the problem of electronic magnetic interference (EMI). In other words, the high frequency electromagnetic noise interference caused by the clock signal becomes a non-negligible issue. Electromagnetic noise interference not only affects the stability of the circuit, but also interferes with other electronic components around it. The main source of electromagnetic interference is usually the system clock, such as from the clock generator, crystal oscillator, voltage controlled oscillator, and phase-locked loop. In particular, for an electronic device that emphasizes the quality of wireless communication, electromagnetic noise caused by the clock signal will interfere with the received signal of the wireless communication system of the electronic device.

Conventional electromagnetic interference prevention measures include electromagnetic interference filters, ferrite beads, chokes, metal shielding, special coatings, and RF gaskets. One of the effective ways to reduce the electromagnetic noise interference of the overall system today is to use spread spectrum technology, which is a technique for modulating the clock frequency. Even though the spread spectrum method can reduce the electromagnetic interference effect and the cost is low, the jitter phenomenon (Jitter) of the clock signal due to the spread spectrum technology may be excessively severe, so the designer must reduce the electromagnetic interference effect and reduce the clock jitter. Make trade-offs and compromises between phenomena. Once the designer determines the spread spectrum range, the traditional spread spectrum generator can only operate at a fixed spread spectrum range without interruption, and the jitter of the clock signal will continue to occur.

In view of this, the present invention provides a spread spectrum clock generation circuit that continuously and flexibly adjusts the spread spectrum range according to the communication quality parameter of the wireless communication module.

The invention provides a spread spectrum clock generation circuit which is disposed in an electronic device together with a wireless communication module. The spread spectrum clock generation circuit includes a phase locked loop circuit and a spread spectrum control circuit. The phase locked loop circuit includes a voltage controlled oscillator. The voltage controlled oscillator outputs a spread spectrum clock signal according to the control voltage, and the output frequency of the spread spectrum clock signal depends on the control voltage. The spread spectrum control circuit is coupled to the phase locked loop circuit, generates a control current according to the communication quality parameter of the wireless communication module, and outputs the control current to the phase locked loop circuit to adjust the control voltage by using the control current. The control voltage is determined according to the control current, so that the spread frequency range of the spread spectrum clock signal is determined according to the communication quality parameter.

In an embodiment of the invention, the spread spectrum control circuit includes a programmable charge pump. The programmable charge pump is coupled to the phase-locked loop circuit, and determines the level of the control current according to the digital control code to adjust the output frequency of the spread spectrum clock signal according to the control current.

Based on the above, in an embodiment of the present invention, the spread spectrum control circuit can modulate the control current according to the communication quality parameter of the wireless communication module, so that the filter of the phase locked loop circuit can change the control in response to the change of the control current. Voltage. Therefore, when the spread spectrum range of the spread spectrum clock signal changes according to the control voltage, the spread spectrum range of the spread spectrum clock signal can be flexibly and continuously adjusted in response to the time varying communication quality parameter, so as to appropriately reduce Noise interferes with wireless communication modules and reduces clock jitter.

The above described features and advantages of the invention will be apparent from the following description.

In order to clarify the content of the present invention, the following examples are given as examples in which the present invention can be implemented. The present exemplary embodiments will now be described in detail, and examples of the exemplary embodiments are illustrated in the drawings. In addition, wherever possible, the same reference numerals in the drawings

FIG. 1 is a schematic diagram of an electronic device having a spread spectrum clock generation circuit according to an embodiment of the invention. Referring to FIG. 1 , the electronic device 10 is an electronic device with wireless communication functions, such as a mobile phone, a smart phone, a personal digital assistant, a tablet computer, a digital camera, an e-book, a game machine, or a notebook computer, etc., but The invention is not limited thereto. In the embodiment, the electronic device 10 includes a spread spectrum clock generation circuit 100, a wireless communication module 12, and an antenna 13.

The wireless communication module 12 can transmit and receive wireless communication signals through the antenna 13 and communicate according to a wireless communication protocol. The present invention is not limited to the types of wireless communication protocols, such as Worldwide Interoperability for Microwave Access (WiMAX), Third Generation Mobile Communications (3G), Fourth Generation Mobile Communications (4G), and Fifth. Acting communication (5G), Ultra Wide Band (UWB), Bluetooth (BT), wireless fidelity (WiFi), or ZigBee communication. In other words, the antenna 13 transmits and receives radio frequency signals on the corresponding frequency band based on the wireless communication protocol used by the wireless communication module 12.

In an embodiment, the wireless communication module 12 can estimate the current communication quality parameter according to the wireless signal received by the antenna 13. The communication quality parameter is, for example, one of or a combination of a Received Signal Strength Indicator (RSSI), a Signal to Noise Ratio (SNR), and a Carrier to Noise Ratio (CNR). . Alternatively, in an embodiment, other components of the electronic device 10 (eg, a power detector) can detect the signal characteristics of the wireless signal received by the antenna 13 to obtain the communication parameters of the wireless signal received by the antenna 13. In addition, as the communication environment changes, the communication quality parameters are time-varying.

The spread spectrum clock generation circuit 100 includes a phase locked loop circuit 110 and a spread spectrum control circuit 120. The phase locked loop circuit 100 includes a voltage controlled oscillator 111. The voltage controlled oscillator 11 outputs the spread spectrum clock signal CLKsp according to the control voltage Vc, and the output frequency of the spread spectrum clock signal CLKsp depends on the control voltage Vc. When the voltage level of the control voltage Vc changes, the output frequency of the spread spectrum clock signal CLKsp will also change.

The spread spectrum control circuit 120 is coupled to the phase locked loop circuit 110, generates a control current Ic according to the communication quality parameter Qs of the wireless communication module 12, and outputs a control current Ic to the phase locked loop circuit 110 to adjust the control voltage Vc by using the control current Ic. . In other words, the current level of the control current Ic is determined according to the communication quality parameter Qs, so that the current level of the control current Ic can be changed in response to the change of the communication quality parameter Qs.

In addition, the amplitude of the control voltage Vc is determined according to the control current Ic, so that the spread spectrum range of the spread spectrum clock signal CLKsp is determined according to the communication quality parameter Qs. That is to say, the control current Ic provided by the spread spectrum control circuit 120 can increase or decrease the amplitude of the clock signal which is originally a fixed frequency, so that the output frequency of the spread spectrum clock signal CLKsp changes within the spread frequency range. In this way, the energy of the spread spectrum clock signal CLKsp can be dispersed to reduce the interference of the spread spectrum clock signal CLKsp to the wireless communication module 12. It can be seen that the communication quality parameters will change with the communication environment. Assuming that the communication quality is good enough, the electromagnetic noise interference caused by the voltage controlled oscillator 111 is negligible. On the contrary, if the communication quality is not good, the electromagnetic noise interference caused by the voltage controlled oscillator 111 is not negligible. The spread spectrum control circuit 120 of the present embodiment generates a corresponding control current Ic according to the communication quality parameter Qs indicating the communication quality, so as to adaptively adjust the spread spectrum clock according to the communication quality of the wireless communication module 12. The output frequency of the signal CLKsp varies within the corresponding spread spectrum range.

In order to explain the present invention in detail, an embodiment will be described below. 2 is a circuit diagram of a spread spectrum clock generation circuit according to an embodiment of the invention. Referring to FIG. 2, the phase locked loop circuit 110 includes a clock source 112, a reference frequency divider 113, a phase frequency detector 114, a charge pump 115, a filter 116, a second frequency divider, and a voltage controlled oscillator 111. .

The clock source 112 generates the original clock signal CLK1. The clock source 112 is constructed, for example, by a quartz oscillator (not shown), and may be other electronic components that provide a clock signal. The reference frequency divider 113 is coupled to the clock source 112 to divide the original clock signal CLK1 to generate a reference clock signal CLK2. The phase frequency detector 114 is coupled to the reference frequency divider 113 to receive the reference clock signal CLK2. The phase frequency detector 114 generates a comparison result C1 according to the feedback clock signal CLK3 and the reference clock signal CLK2. The charge pump 115 is coupled to the phase frequency detector 114 and the filter 116 to generate a charging current I1 according to the comparison result C1.

The filter 116 is coupled to the voltage controlled oscillator 111 and the charge pump 115, and generates a control voltage Vc according to the charging current I1 and the control current Ic. In general, filter 116 is typically a low pass filter, but the invention is not limited thereto. The voltage controlled oscillator 111 generates the spread spectrum clock signal CLKsp according to the control voltage Vc. The second frequency divider 117 is coupled between the voltage controlled oscillator 111 and the phase frequency detector 114 to divide the spread spectrum clock signal CLKsp to generate a feedback clock signal CLK3.

The spread spectrum control circuit 120 includes a voltage generation circuit 122, an amplifier 123, an analog digital converter 124, a first frequency divider 125, and a programmable charge pump 121. In this embodiment, the voltage generating circuit 122 is coupled to the wireless communication module 12 to generate the first voltage signal Vdet according to the communication quality parameter Qs. Further, the voltage generating circuit 122 can output the first voltage signal Vdet according to the communication quality parameter Qs according to a conversion function, and the voltage level of the first voltage signal Vdet depends on the communication quality parameter Qs. In an embodiment, the conversion function is a linear conversion function, but the invention is not limited thereto. Alternatively, the voltage generating circuit 122 can output the corresponding first voltage signal Vdet according to the communication quality parameter Qs by means of a table lookup.

For example, the power detector of the wireless communication module 12 can detect the power energy of the wireless receiving signal, and estimate the RSSI of the wireless receiving signal according to the detected power energy. Therefore, the peak-to-peak voltage value of the first voltage signal Vdet outputted by the voltage generating circuit 122 can be determined according to the RSSI of the wireless receiving signal. That is to say, the peak-to-peak voltage value of the first voltage signal Vdet of this embodiment is determined according to the communication quality parameter Qs.

Table 1 shows an example of the first voltage signal Vdet and the received signal strength indicator according to an embodiment of the present invention, but is not intended to limit the present invention.         <TABLE border="1" borderColor="#000000" width="_0003"><TBODY><tr><td> Power of wireless receiving signal</td><td> RSSI </td><td> first Peak-to-peak voltage value of voltage signal Vdet</td></tr><tr><td> 100pW </td><td> -70dBm </td><td> 200uV </td></tr>< Tr><td> 10pW </td><td> -80dBm </td><td> 63.2uV </td></tr><tr><td> 1pW </td><td> -90dBm </ Td><td> 20uV </td></tr></TBODY></TABLE> Table 1       

The amplifier 123 is coupled to the voltage generating circuit 123, and receives and amplifies the first voltage signal Vdet to generate a second voltage signal Vamp. For example, the amplifier 123 is a linear amplifier that linearly amplifies the first voltage signal Vdet to generate a second voltage signal Vamp. The analog-to-digital converter 124 is coupled to the amplifier 123 and the programmable charge pump 121 to sample the analog second voltage signal Vamp to generate the digital control code d1, and output the digital control code d1 to the programmable charge pump 121. Because the peak-to-peak voltage value of the second voltage signal Vamp is determined according to the communication quality parameter Qs and the digital control code d1 is the result of sampling the second voltage signal Vamp, the plurality of bits of the digital control code d1 also depend on the communication quality. Parameter Qs. The present invention does not limit the number of bits of the digital control code d1, which may depend on actual needs.

The first frequency divider 125 receives the reference clock signal CLK2 output by the phase locked loop circuit 110 and performs frequency division to generate a first clock signal CLK4. The programmable charge pump 121 generates a control current Ic according to the first clock signal CLK4 and the digital control code d1. In detail, the programmable charge pump 121 is coupled to the phase locked loop circuit 110, and determines the level of the control current Ic according to the digital control code d1 to adjust the output frequency of the spread spectrum clock signal CLKsp according to the control current Ic. For example, the programmable charge pump 121 can include a plurality of switches that are respectively switched based on corresponding bits in the digital control code d1, and the level of the control current Ic is also determined according to the switching states of the switches. .

The filter 116 receives the charging current I1 and the control current Ic to output a corresponding control voltage Vc according to the charging current I1 and the control current Ic. For example, the control voltage Vc can be loaded into the triangular wave signal having a specific frequency based on the control current Ic (but is not limited thereto), so that the output frequency of the spread spectrum clock signal generated by the voltage controlled oscillator 111 can be one. Changes within the spread spectrum.

In an embodiment, when the communication quality parameter Qs is greater than the preset threshold, the programmable charge pump 121 disables the control current Ic according to the digital control code d1 associated with the communication quality parameter Qs, thereby causing the spread spectrum clock signal CLKsp. The output frequency is substantially maintained at a fixed frequency. In an embodiment, the spread spectrum control circuit 120 may determine a spread spectrum range from a plurality of preset spread frequency ranges according to a comparison result between the communication quality parameter Qs and the plurality of threshold values to generate a control corresponding to the spread spectrum range. Current Ic.

Table 2 is an example of the digital control code d1, the spreading factor, the spread spectrum range, and the interference energy intensity of the spread spectrum clock signal according to an embodiment of the present invention, but is not intended to limit the present invention.         <TABLE border="1" borderColor="#000000" width="_0004"><TBODY><tr><td> Digital Control Code</td><td> Spreading Factor</td><td> Spreading Frequency Range </td><td> Interference energy intensity of spread spectrum clock signal</td></tr><tr><td> (0,0,0) </td><td> 0% </td ><td> 240MHz </td><td> -60dBm </td></tr><tr><td> (1,1,0) </td><td> 0.5% </td><td > 239.4MHz~240.6MHz </td><td> -83dBm </td></tr><tr><td> (1,1,1) </td><td> 2% </td>< Td> 237.6MHz~242.4MHz </td><td> -93dBm </td></tr></TBODY></TABLE> Table 2       

Please refer to Table 1 and Table 2 at the same time, assuming that the communication quality parameter is the received signal strength indicator. Assuming that the received signal strength indicator is -70 dBm, indicating that the strength of the wireless received signal is sufficient to resist interference, the spread spectrum control circuit 120 can be disabled to adjust the output frequency of the spread spectrum clock signal CLKsp. In particular, the analog to digital converter 124 will generate a digital control code d1 of (0, 0, 0) in response to an RSSI of -70 dBm. When the digital control code d1 is (0, 0, 0), the programmable charge pump 121 disables the control current Ic, so the control voltage Vc is substantially maintained at a fixed voltage, and the output frequency of the spread spectrum clock signal CLKsp It is essentially maintained at 240MHz.

In addition, it is assumed that when the received signal strength indicator is -80 dBm, indicating that the strength of the wireless reception signal is insufficient to resist interference, the spread spectrum control circuit 120 can adjust the output frequency of the spread spectrum clock signal CLKsp. In particular, the analog to digital converter 124 will generate a digital control code d1 of (1, 1, 0) in response to an RSSI of -80 dBm. When the digital control code d1 is (1, 1, 0), the programmable charge pump 121 generates a corresponding control current Ic. The control voltage Vc is determined according to the control current Ic, and the output frequency of the spread spectrum clock signal CLKsp is varied within the spread spectrum range of 239.4 MHz to 240.6 MHz. At this time, the interference energy intensity of the spread spectrum clock signal is -83 dBm. Therefore, the noise interference caused by the spread spectrum clock signal CLKsp after the spread spectrum can be reduced to less than RSSI (RSSI=-80dBm), thereby reducing the interference of the spread spectrum clock signal CLKsp on the wireless receiving signal.

Furthermore, it is assumed that when the received signal strength indicator is -90 dBm, it indicates that the strength of the wireless received signal is difficult to resist interference, and the spread spectrum control circuit 120 can be adjusted to adjust the output frequency of the spread spectrum clock signal CLKsp. In particular, the analog to digital converter 124 will generate a digital control code d1 of (1, 1, 1) in response to an RSSI of -90 dBm. When the digital control code d1 is (1, 1, 1), the programmable charge pump 121 generates a corresponding control current Ic. The control voltage Vc is determined according to the control current Ic, and the output frequency of the spread spectrum clock signal CLKsp is varied within the spread spectrum range of 237.6 MHz to 242.4 MHz. It should be particularly noted that the spread spectrum range corresponding to RSSI=-80dB is smaller than the spread spectrum range corresponding to RSSI=-90dB. However, Tables 1 and 2 are merely exemplary and are not intended to limit the invention. The correspondence between the digital control code and the spreading factor and the correspondence between the RSSI and the first voltage signal can be designed for practical applications. For example, in another embodiment, the digital control code can be (0, 0, 0, 0), (0, 0, 0, 1), (0, 0, 1, 1), (0, respectively. 1, 1, 1), (1, 1, 1, 1), and sequentially correspond to 0%, 0.5%, 1%, 2% of the spreading factor.

FIG. 3 is a schematic diagram showing an operation state of a spread spectrum clock generating circuit according to an embodiment of the invention. 4 is a schematic diagram of an electronic device remote from an access point according to an embodiment of the invention. Referring first to FIG. 4, it is assumed that the electronic device 50 having the spread spectrum clock generating circuit 100 of the present invention wirelessly communicates with the access point 40, and the electronic device 50 moves away from the access point 40 as time passes. In the strong case where there is no other factor interference, the RSSI detected by the electronic device 50 will also decrease with time.

Specifically, at time point T1, the electronic device 50 is closest to the access point 40 and detects that the RSSI is equal to R1. The electronic device 50 gradually moves away from the access point 40, so RSSI=R2 and RSSI=R3 are detected at time points T2 and T3, respectively. At time point T4, the electronic device 50 is farthest from the access point 40 and detects RSSI = R4. That is to say, the relationship between the RSSIs corresponding to the respective time points T1 to T4 can be expressed as R1>R2>R3>R4.

Referring to FIG. 3, according to the description and teachings of FIG. 1 and FIG. 2, the spread spectrum clock generating circuit 100 of the electronic device 50 can determine the disable or enable the spread spectrum control circuit 120 according to the RSSI at each time point. To adjust or not adjust the output frequency of the spread spectrum clock signal CLKsp. In the time interval T1~T2, the RSSI decreases from R1, but the RSSI detected in the time interval T1~T2 is greater than a preset threshold. Therefore, in the time interval T1 to T2, the spread spectrum control circuit 120 is disabled (the control current Ic is disabled), and the spreading factor is also 0% in response to the disablement of the spread spectrum control circuit 120. That is to say, the spread spectrum clock signal CLKsp has not undergone the spread spectrum processing in the time interval T1~T2, so the spread spectrum clock signal CLKsp has no jitter phenomenon due to the spread spectrum processing.

In the time interval T2~T3, the spread spectrum control circuit 120 is enabled to adjust the output frequency of the spread spectrum clock signal CLKsp according to the RSSI detected in the time interval T2~T3. Therefore, in the time interval T2 to T3, the spread spectrum control circuit 120 is enabled and generates a corresponding control current Ic, and the spreading factor is also 0.5 percent in response to the level of the control current Ic. That is to say, the spread spectrum clock signal CLKsp is subjected to the spread spectrum processing in the time interval T2~T3, so the spread spectrum clock signal CLKsp also has a jitter phenomenon due to the spread spectrum processing.

In the time interval T3~T4, the spread spectrum control circuit 120 is enabled to adjust the output frequency of the spread spectrum clock signal CLKsp according to the RSSI detected in the time interval T3~T4. Therefore, in the time interval T3~T4, the spread spectrum control circuit 120 is enabled and generates a corresponding control current Ic, and the spreading factor is also 1% in response to the level of the control current Ic. That is to say, the spread spectrum clock signal CLKsp is subjected to the spread spectrum processing in the time interval T3~T4, so the spread spectrum clock signal CLKsp also has a jitter phenomenon due to the spread spectrum processing.

The following is an example to illustrate the operation state of the spread spectrum control circuit. FIG. 5 is a flow chart showing the operation method of the spread spectrum clock generation circuit according to an embodiment of the invention. Here, it is assumed that the preset threshold TH1>the preset threshold TH2>the preset threshold TH3. Referring to FIG. 5, in step S501, it is determined whether the communication quality parameter is greater than a preset threshold TH1. When the determination in step S501 is YES, in step S502, the output frequency of the spread spectrum clock signal is substantially maintained at a fixed frequency. When the determination in step S501 is YES, proceeding to step S503, it is judged whether the communication quality parameter is smaller than the preset threshold TH2. If the determination in step S503 is negative, the process returns to step S502. If the determination in step S503 is YES, then step S504 is followed to determine whether the communication quality parameter is less than the preset threshold TH3. If the determination in step S503 is no, in step S505, the output frequency of the spread spectrum clock signal is adjusted according to the first spread frequency range. If the determination in step S503 is YES, in step S506, the output frequency of the spread spectrum clock signal is adjusted according to the second spreading range.

In summary, in an embodiment of the invention, the spread spectrum control circuit can be enabled or disabled according to the communication quality parameter of the wireless communication module to adjust the output frequency of the spread spectrum clock signal. In addition, the spread spectrum range can also be determined according to the communication quality parameters of the wireless communication module. Therefore, the spread spectrum range of the spread spectrum clock signal can be flexibly and continuously adjusted in response to time-varying communication quality parameters to properly reduce noise interference to the wireless communication module and reduce clock jitter. In this way, the time and extent of the clock jitter phenomenon can be adjusted according to actual needs, thereby improving the overall stability of the circuit.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧Electronic devices
100‧‧‧ Spread spectrum clock generation circuit
110‧‧‧ phase-locked loop circuit
111‧‧‧Variable Control Oscillator
120‧‧‧ Spread spectrum control circuit
12‧‧‧Wireless communication module
Vc‧‧‧ control voltage
CLKsp‧‧‧ Spreading Clock Signal
Qs‧‧‧ communication quality parameters
Ic‧‧‧Control current
CLK1‧‧‧ original clock signal
CLK2‧‧‧ reference clock signal

13‧‧‧Antenna

112‧‧‧ clock source

113‧‧‧Reference frequency divider

114‧‧‧ phase frequency detector

115‧‧‧Charging pump

116‧‧‧ Filter

117‧‧‧Second frequency divider

121‧‧‧Programmable charge pump

122‧‧‧Voltage generation circuit

123‧‧‧Amplifier

124‧‧‧ analog digital amplifier

125‧‧‧First frequency divider

CLK3‧‧‧ feedback clock signal

C1‧‧‧ comparison results

I1‧‧‧Charging current

Vdet‧‧‧First voltage signal

Vamp‧‧‧second voltage signal

D1‧‧‧ digital control code

CLK4‧‧‧ first clock signal

T1~T4‧‧‧ time point

50‧‧‧Electronic devices

40‧‧‧ access point

S501~S506‧‧‧Steps

The following drawings are a part of the specification of the invention, and illustrate the embodiments of the invention FIG. 1 is a schematic diagram of an electronic device having a spread spectrum clock generation circuit according to an embodiment of the invention. 2 is a circuit diagram of a spread spectrum clock generation circuit according to an embodiment of the invention. FIG. 3 is a schematic diagram showing an operation state of a spread spectrum clock generating circuit according to an embodiment of the invention. 4 is a schematic diagram of an electronic device remote from an access point according to an embodiment of the invention. FIG. 5 is a flow chart of a method for operating a spread spectrum clock generation circuit according to an embodiment of the invention.

110‧‧‧ phase-locked loop circuit

120‧‧‧ Spread spectrum control circuit

111‧‧‧Variable Control Oscillator

113‧‧‧Reference frequency divider

115‧‧‧Charging pump

117‧‧‧Second frequency divider

122‧‧‧Voltage generation circuit

124‧‧‧ analog digital amplifier

125‧‧‧First frequency divider

12‧‧‧Wireless communication module

112‧‧‧ clock source

114‧‧‧ phase frequency detector

116‧‧‧ Filter

121‧‧‧Programmable charge pump

123‧‧‧Amplifier

Claims (10)

A spread spectrum clock generating circuit is disposed in an electronic device together with a wireless communication module, comprising: a phase locked loop circuit comprising a voltage controlled oscillator, wherein the voltage controlled oscillator outputs a voltage according to a control voltage a spread spectrum clock signal, wherein an output frequency of the spread spectrum clock signal is dependent on the control voltage; and a spread spectrum control circuit coupled to the phase lock loop circuit to generate a communication quality parameter according to the wireless communication module Controlling the current and outputting the control current to the phase locked loop circuit to adjust the control voltage by using the control current, wherein the control voltage is determined according to the control current, so that the spread frequency range of the spread spectrum clock signal is according to the Depending on the communication quality parameters. The spread spectrum clock generating circuit of claim 1, wherein the spread spectrum control circuit comprises: a programmable charge pump coupled to the phase locked loop circuit, and the control current is determined according to a digital control code The level of the output frequency of the spread spectrum clock signal is adjusted according to the control current. The spread spectrum clock generating circuit of claim 2, wherein the spread spectrum control circuit further comprises: a voltage generating circuit coupled to the wireless communication module to generate a first voltage according to the communication quality parameter An amplifier coupled to the voltage generating circuit to receive and amplify the first voltage signal to generate a second voltage signal; An analog-to-digital converter is coupled to the amplifier and the programmable charge pump, samples the second voltage signal to generate the digital control code, and outputs the digital control code to the programmable charge pump. The spread spectrum clock generating circuit of claim 2, wherein the spread spectrum control circuit further comprises a first frequency divider, wherein the first frequency divider receives a reference output by the phase locked loop circuit The pulse signal is frequency-divided to generate a first clock signal, wherein the programmable charge pump generates the control current according to the first clock signal and the digital control code. The spread spectrum clock generation circuit according to claim 2, wherein the communication quality parameter is time-varying, and includes a Received Signal Strength Indicator (RSSI) and a signal to noise ratio (Signal to Noise Ratio, SNR) or Carrier to Noise Ratio (CNR). The spread spectrum clock generating circuit according to claim 2, wherein when the communication quality parameter is greater than a preset threshold, the programmable charge pump is prohibited according to the digital control code associated with the communication quality parameter. The current can be controlled such that the output frequency of the spread spectrum clock signal is substantially maintained at a fixed frequency. The spread spectrum clock generating circuit according to claim 1, wherein the spread spectrum control circuit determines the plurality of preset spread frequency ranges according to a comparison result between the communication quality parameter and the plurality of threshold values. Spreading the frequency range to generate the control current corresponding to the spread spectrum range. The spread spectrum clock generating circuit of claim 2, wherein the phase locked loop circuit comprises: A filter coupled to the voltage controlled oscillator and the programmable charge pump generates the control voltage according to a charging current and the control current. The spread spectrum clock generating circuit of claim 8, wherein the phase locked loop circuit further comprises: a phase frequency detector for generating a comparison result according to a feedback clock signal and a reference clock signal; a charge pump coupled to the phase frequency detector and the filter to generate the charging current according to the comparison result; and a second frequency divider coupled to the voltage controlled oscillator and the phase frequency detection The feedback clock signal is generated by dividing the spread spectrum clock signal to generate the feedback clock signal. The spread spectrum clock generating circuit of claim 9, wherein the phase locked loop circuit further comprises: a clock source for generating an original clock signal; and a reference frequency divider coupled to the clock source The original clock signal is divided to generate the reference clock signal.