TWI597551B - Display device - Google Patents

Description

monitor

The invention relates to the field of display, and in particular to a display.

With the development of the liquid crystal display technology in terms of viewing angle, it is accompanied by inconvenience caused by use. For example, on many occasions, users do not want content that they are watching to affect others or be peeped by others. In the existing solution, a privacy filter can be attached to the display of the portable 3C product to protect privacy.

The viewing angle control sheet can not see the information displayed on the display panel by restricting the traveling direction of the light so that the angle between the eyes of the person and the display panel exceeds a certain angle. This can be of great help to business people using computers on airplanes or railways, or for those who value personal privacy.

The viewing angle control sheet is set on the surface of the display panel to achieve privacy protection. However, if the usage is changed, for example, when sharing information in a small space with a 3C product, a wide viewing angle mode is required to allow more people to see the display panel. The information can only be manually removed from the viewing angle control sheet at this time, which is quite inconvenient in the operation of the viewing angle switching, and the viewing angle control sheet removal is often difficult to reuse due to the deformation.

In order to solve the problems faced by the prior art, a display is provided herein. The display has a plurality of display areas including a first substrate, a second substrate, a liquid crystal layer, a first electrode layer, and a second electrode layer. The first substrate has a plurality of sub-pixel column regions arranged along the first direction. The second substrate is disposed opposite to the first substrate. The liquid crystal layer is disposed between the first substrate and the second substrate. The first electrode layer is located between the first substrate and the liquid crystal layer, wherein the first electrode layer comprises a plurality of sub-pixel electrodes, and each of the sub-pixel regions corresponds to at least two of the sub-pixel electrodes, and each sub-pixel region The corresponding sub-pixel electrodes are arranged along the second direction, and the second direction is staggered with the first direction. The second electrode layer is located between the second substrate and the liquid crystal layer, wherein the second electrode layer comprises a plurality of electrode groups, and the electrode groups are respectively disposed in one of the plurality of display regions. Each electrode group includes a plurality of first strip electrodes and a plurality of second strip electrodes. The first strip electrode extends from the first side of the corresponding display area along the second direction to the second side of the corresponding display area. The second strip electrode extends from the first side of the corresponding display area along the second direction to the second side of the corresponding display area. The first strip electrode and the second strip electrode are alternately arranged along the first direction.

In summary, according to the display of any embodiment of the present invention, the display surface can be divided into a plurality of display areas, and the normal display mode or the anti-spy mode can be independently displayed to meet the anti-peeping requirements in various environments. In addition, the display according to any embodiment of the present invention further realizes the normal display mode or the anti-spy mode for a specific display area directly in the display process of the display by the configuration and control design of the sub-pixel electrodes and the electrode group. Switching control eliminates the need for additional components and reduces the manufacturing process, making the display with anti-spy mode more competitive in cost.

Referring to FIG. 1-5, FIG. 1 is a schematic diagram of component explosion of the display, FIG. 2 is a top view of the first embodiment of the display, FIG. 3 is a schematic diagram of the electrode group of the first embodiment of the display, and FIG. 4 is a sub-pixel of the display. A schematic diagram of a partial top view of a column, and FIG. 5 is a schematic view of a projection of a sub-pixel electrode and an electrode group. As shown in FIGS. 1-3, the display 1 has a plurality of display areas D. Here, the entire display surface of the display 1 can thus be divided into a plurality of regions.

As shown in FIG. 1, the display 1 includes a first substrate 10, a second substrate 20, a liquid crystal layer 30, a first electrode layer 40, and a second electrode layer 50. The second substrate 20 is disposed opposite to the first substrate 10. The liquid crystal layer 30 is disposed between the first substrate 10 and the second substrate 20. The first electrode layer 40 is located between the first substrate 10 and the liquid crystal layer 30. The second electrode layer 50 is located between the second substrate 20 and the liquid crystal layer 30.

As shown in FIGS. 1, 4, and 5, the first substrate 10 has a plurality of sub-pixel array regions 11 arranged along the first direction A1. The first electrode layer 40 includes a plurality of sub-pixel electrodes 41. Each of the sub-pixel regions 11 corresponds to at least two of the sub-pixel electrodes 41, and the sub-pixel electrodes 41 corresponding to the respective sub-pixel regions 11 are arranged along the second direction A2. Here, the second direction A2 is interlaced with the first direction A1.

As shown in FIGS. 2 and 3, the second electrode layer 50 includes a plurality of electrode groups 51. The electrode groups 51 are respectively disposed in the display areas D, that is, the electrode groups 51 are located in one of the display areas D. Here, each electrode group 51 includes a plurality of first strip electrodes 511 and a plurality of second strip electrodes 513. Each of the first strip electrodes 511 extends from the first side S1 of the display area D provided therein along the second direction A2 to the second side S2 of the set display area D. Each of the second strip electrodes 513 extends from the first side S1 of the display area D on which it is disposed along the second direction A2 to the second side S2 of the set display area D. Further, the first strip electrode 511 and the second strip electrode 513 are alternately arranged along the first direction A1.

As shown in FIG. 1 and FIG. 4, in some embodiments, the first substrate 10 includes a plurality of first signal lines L1 and a plurality of second signal lines L2, and the first signal line L1 and the second signal line L2 are interleaved to define The sub-pixel area 111 is a region defined by any two adjacent first signal lines L1 and any two adjacent second signal lines L2. In some embodiments, the first signal line L1 is parallel to the second direction A2, the first direction A1 is staggered with the second direction A2, and the extending direction of the second signal line L2 is substantially parallel to the first direction A1. The second substrate 20 includes a color resist layer, and the color resist layer includes a plurality of color photoresists and a black matrix. In the vertical projection direction toward the first substrate 10, the color photoresists overlap the sub-pixel regions 111, respectively, and the black matrix is positioned at the edges of the sub-pixel regions 111. Each of the sub-pixel electrodes 41 is located on the first substrate 10 and is stacked in each of the sub-pixel regions 111.

As shown in FIGS. 1 to 3, in this embodiment, the display area D on the display 1 and the corresponding electrode group 51 are arranged in a row along the first direction A1. That is, the display area D is a plurality of horizontal rectangular blocks arranged from top to bottom. As shown in FIG. 3, the first strip electrode 511 and the second strip electrode 513 in each electrode group 51 are transverse electrode traces, that is, the first strip electrode 511 and the second strip electrode 513 are along The second direction A2 extends. The electrode groups 51 are arranged in a horizontal rectangular circuit layout from top to bottom, and the electrode groups 51 are arranged from top to bottom corresponding to the respective corresponding display regions D. In this embodiment, the electrode group 51 is disposed substantially in parallel with each of the sub-pixel array regions 11, and the electrode groups 51 are electrically isolated from each other.

As shown in FIG. 3 , each electrode group 51 corresponding to the display area D further includes a first connection electrode 515 and a second connection electrode 517 . One end of all the first strip electrodes 511 of the first electrode 515 connected to the same electrode group 51 constitutes a first comb structure, and the second connection electrode 517 is connected to one end of all the second strip electrodes 513 of the same electrode group 51. Two comb structure. The first connection electrode 515 and the second connection electrode 517 extend along the first direction A1, and the first connection electrode 515 and the second connection electrode 517 are located on opposite sides. Here, the first comb structure and the second comb structure are opposed to each other and are staggered with each other. That is, the first strip electrode 511 in the first comb structure is disposed in the gap between the second strip electrodes 513 in the second comb structure, and the second strip electrode in the second comb structure 513 is disposed in the gap between the first strip electrodes 511 in the first comb structure.

Here, the display 1 is mainly a display of a planar switch. As shown in FIG. 1, in this embodiment, the first electrode layer 40 may be an In-Plane Switching (IPS) electrode. In-Plane Switching (IPS) electrode means that a common electrode region and a pixel electrode region are included in the same electrode layer, and the common electrode region and the pixel electrode region are electrically isolated from each other and arranged in an alternating manner. The same plane of a substrate 10. When the controller 60 switches any display area D into the anti-spy mode, the first strip electrode 511 and the second strip electrode 513 of the electrode group 51 corresponding to the display area D are originally received by the same voltage level, and are switched. To receive different voltage levels, for example, the first strip electrode 511 receives 5V and the second strip electrode 513 receives 0V. The voltage may form a voltage difference with the first electrode layer 40 of the first substrate 10, such that the liquid crystal layer 30 corresponding to the display region D and arranged in a plane will be perpendicular to the third direction perpendicular to the first direction A1 and the second direction A2. The third direction Z is deflected so that the liquid crystal is tilted to shield a portion of the light from passing through, only passing the light through a particular viewing angle. The bystander at a certain angle of view is affected by the deflection of the liquid crystal and feels a significant atomization phenomenon, and the content displayed on the display cannot be clearly seen, thereby achieving the anti-peep effect.

As shown in FIG. 5, each of the sub-pixel electrodes 41 overlaps one of the first strip electrodes 511 and the second strip electrode 513 in the vertical projection direction of the first substrate 10. That is, one sub-pixel electrode 41 overlaps with one first strip electrode 511 and one second strip electrode 513. In some embodiments, any adjacent first strip electrodes 511 and second strip electrodes 513 and a plurality of sub-pixel electrodes corresponding to the same sub-pixel region 11 are in a vertical projection direction toward the first substrate. 41 overlap. That is, each of the first strip electrodes 511 or each of the second strip electrodes 513 may overlap with the plurality of sub-pixel electrodes 41. In some embodiments, in the vertical projection direction toward the first substrate 10, each of the first strip electrodes 511 or each of the second strip electrodes 513 is adjacent to the sub-pixel region 11 adjacent to the first sub-pixel region 11 along the first direction A1. The pixel electrodes 41 partially overlap. That is, in the first direction A1, each of the first strip electrodes 511 or each of the second strip electrodes 513 overlaps with the two columns of sub-pixel electrodes 41 arranged adjacent to each other in the first direction A1.

When each of the first strip electrodes 511 or each of the second strip electrodes 513 overlaps with two sub-pixel electrodes 41 adjacent in the first direction A1, each of the sub-pixel electrodes 41 can be simultaneously received in the anti-spy mode. Part of the influence from the first voltage level of the electrode group 51 and the second voltage level. The arrangement of the electrodes can avoid the boundary between any two display areas D in the anti-spy mode, because the polarity of the signal lines and the polarity between the second electrode layers 50 are unbalanced, and the positive and negative polarities of the pixels are unbalanced to form a dark boundary. line.

Referring again to FIG. 5, for convenience of identification, FIG. 5 does not show the second signal line L2. In a vertical projection direction toward the first substrate 10, any first strip electrode 511 has a first width W1, and the second strip electrode 513 has a second width W2, the first width W1 being substantially equal to the second width W2, Here, substantially equal means that the difference between the first width W1 and the second width W2 does not exceed 5%. In some embodiments, each of the first strip electrodes 511 and the second strip electrodes 513 has a gap G, the first width W1 is greater than the gap G, and the second width W2 is greater than the gap G. Here, the width of the gap ranges from 4 to 6 micrometers (μm).

Referring again to FIGS. 1 through 4, display 1 may further include controller 60. The controller 60 is coupled to each of the electrode groups 51 and the sub-pixel electrodes 41, and is further coupled to each of the first signal lines L1 and the second signal lines L2. The controller 60 drives the first signal line L1 and the second signal line L2 and the sub-pixel electrode 41, and drives the electrode group 51, respectively. When the controller 60 drives any of the electrode groups 51, the controller 60 outputs a first voltage level and a second voltage level to the electrode group 51. Wherein all of the first strip electrodes 511 in the same electrode group 51 are electrically connected to each other to the first voltage level, and all of the second strip electrodes 53 in the same electrode group 51 are electrically connected to each other to the second voltage level. The first strip electrodes 511 of the different electrode groups 51 can be electrically connected to a first voltage level of the same value or different values. The second strip electrodes 513 of the different electrode groups 51 can be electrically connected to a second voltage level of the same value or different values. The controller 60 can control each display area D to be in a normal display mode or an anti-spy mode. When any of the display areas D is in the normal display mode, the first voltage level to which the electrode group 51 located in the display area D is coupled is substantially equal to the second voltage level. Here, substantially equal is a voltage difference indicating a first voltage level and a second voltage level, and is within 0.5V. In addition, when any display area D is in the anti-spy mode, the first voltage level and the second voltage level coupled to the electrode group 51 of the display area D are different polarities, for example, corresponding to a display area D. The first strip electrode 511 receives 5V, the second strip electrode 513 receives -5V, and the like. The controller 60 can drive the electrode group 51 separately, that is, the display area D can be controlled to be in the normal display mode or in the anti-spy mode. For example, in an environment where people are standing around, one or two of the upper display areas D can be controlled to be in the anti-spy mode and the other display areas D can maintain the normal display mode, so as to avoid others from peeking at the display content of the display 1.

Referring to Figure 6, Figure 6 is a block diagram of the components of the display control element. As shown in FIG. 6 , the controller 60 further includes a driving unit 61 , a memory 63 , and a timing control unit 65 . The driving unit 61 is electrically connected to at least one of the electrode groups 51 . In some embodiments, the controller 60 further includes more than two drive units 61, and the same electrode group 51 is not connected to different drive units 61. The memory 63 stores a complex array control code. The timing control unit 65 is electrically connected to the memory 63 and the driving unit 61 to access at least one control code corresponding to the control signal in the control code from the memory 63 according to the control signal from the processing unit 500, and according to The group control code controls the driving unit 61 to drive the corresponding at least one electrode group 51. For example, when the display 1 is applied to an electronic device, the user can operate the user interface to generate a trigger signal for requesting the specific display area D to switch to the anti-spy mode to the processing unit 500 of the electronic device. After receiving the trigger signal, the processing unit 500 generates a control signal corresponding to the specific display area D according to the trigger signal, and outputs the control signal to the timing control unit 65, thereby controlling the driving unit 61 to drive the corresponding electrode group 51.

As shown in FIG. 2, the controller 60 is disposed outside of the display area D. In some embodiments, the controller 60 can be adjacent to the third side S3 of the lowermost display area D as in FIG.

7-9, FIG. 7 is a schematic exploded view of the second embodiment of the display, FIG. 8 is a top view of the second embodiment of the display, and FIG. 9 is a schematic view of the electrode assembly of the second embodiment of the display. As shown in FIG. 7, in some embodiments, as shown in FIG. 7, the display 1 may further include a third electrode layer 70. The third electrode layer 70 is located on the first substrate 10. The third electrode layer 70 can be a common electrode, and the first electrode layer 40 can be a pixel electrode. At this time, the display 1 is a Fringe Field Switching (FFS) type display.

As shown in FIG. 7, in this embodiment, the third electrode layer 70 may be located between the first electrode layer 40 and the second electrode layer 50, for example, an electrode configuration in which the common electrode is on a common on top. Architecture. Also, the insulating layer 80 is electrically isolated from each other between the third electrode layer 70 and the first electrode layer 40.

The second embodiment is the same as the first embodiment. When any display area D is switched to the anti-spy mode, the first strip electrode 511 and the second strip electrode 513 of the electrode group 51 corresponding to the display area D are Originally receiving the same voltage level, switching to receive different voltage levels, so that the liquid crystal layer 30 corresponding to the display area D and arranged in a plane will be deflected in a third direction Z perpendicular to the first direction A1 and the second direction A2, only The light is passed through a specific viewing angle, and the oblique angle of the viewing angle is affected by the liquid crystal and the phenomenon of obvious atomization is felt, thereby achieving the anti-peep effect.

As shown in FIGS. 8 and 9, the display area D on the display 2 and the corresponding electrode group 51 are arranged in a row along the second direction A2. That is, the display area D is a plurality of vertical rectangular blocks arranged from left to right. Each electrode group 51 is routed by a lateral electrode, that is, the first strip electrode 511 and the second strip electrode 513 extend along the second direction A2, arranged in a vertical rectangular circuit layout from top to bottom, and the electrode groups 51 corresponds to the respective corresponding display areas D arranged from left to right.

As shown in FIG. 8, in other embodiments, controller 60 is adjacent to a third side S3 of a plurality of adjacent display areas D. The third side S3 is connected to the first side S1 and the second side S2, and the third side S3 is parallel to the second direction A2.

In addition, as shown in FIG. 9 , the first connection electrode 515 and the second connection electrode 517 are respectively located on two sides of the corresponding display area D and extend along the first direction A1 to respectively connect the plurality of first strip electrodes of the same electrode group 51 . 511 and a plurality of second strip electrodes 513, one end of the first connecting electrode 515 and one end of the second connecting electrode 517 extend to the bottom of the display 2 and are connected to the controller 60, so that the peripheral areas on the left and right sides of the display 2 can be reduced. , thereby increasing the space utilization of the display 2. In some embodiments, the arrangement area of each electrode group 51 is substantially the same as the area of the display area D that it is disposed on.

As shown in FIG. 8 , the user can switch the normal display mode or the anti-spy mode of the display area D according to the space. For example, under the condition that there are others on the left and right, the control unit 60 can receive the control signal from the processing unit 500 and drive the left and right. The display area D on both sides is switched from the normal display mode to the anti-spy mode, and the four display areas D in the center are normally displayed, and the left and right sides are blocked by the light caused by the liquid crystal deflection, and the display of the display area D on the left and right sides cannot be seen clearly. Content, and achieve the effect of anti-peep. Further, under the condition that more privacy is required, it is also possible to maintain only the central two display areas D as the normal display mode, and the other display areas are switched to the anti-spy mode, or all the display areas D are anti-peep. mode.

10-12, FIG. 10 is a schematic exploded view of a third embodiment of the display, FIG. 11 is a top view of the third embodiment of the display, and FIG. 12 is a schematic view of the electrode assembly of the third embodiment of the display. As shown in FIG. 10, in the third embodiment, the display 3 may further include a third electrode layer 70. In this embodiment, the first electrode layer 40 may be located between the second electrode layer 50 and the third electrode layer 70, for example, an electrode configuration structure in which the pixel electrodes are located on the common electrode. Also, the insulating layer 80 is electrically isolated from each other between the third electrode layer 70 and the first electrode layer 40. The third embodiment is also like the first embodiment. When any display area D is switched to the anti-spy mode, the first strip electrode 511 and the second strip electrode 513 of the electrode group 51 corresponding to the display area D are Receiving the same voltage level, switching to receiving different voltage levels, so that the liquid crystal layer 30 corresponding to the display area D and arranged in a plane is deflected in a third direction Z perpendicular to the first direction A1 and the second direction A2, Only the light passes through a specific viewing angle, and the angle of view is affected by the liquid crystal and the phenomenon of obvious atomization is felt, thereby achieving the anti-peep effect.

In some embodiments, as shown in FIGS. 11 and 12, the display area D on the display 3 has at least two display areas D along the first direction A1 and at least two display areas D along the second direction A2, ie The display area D is arranged in a plurality of rows (extending in the second direction A2) in the first direction A1, and at least two display areas D in each row. The electrode groups 51 located in different display areas D are electrically isolated from each other. In some embodiments, display area D and electrode set 51 can be arranged in a matrix. In some embodiments, when each row has more than three display areas D, the size of the display area D of each row can be gradually increased from the left and the right to the middle, that is, the middle display area D has a larger Area. Here, the first embodiment, the second embodiment, and the third embodiment are merely examples, and are not intended to be limiting, and may actually include various combinations of the display area D and the electrode group 51 described above.

Corresponding to the first strip electrode 511 and the second strip electrode 513 in each electrode group 51 of each display area D are routed by the lateral electrodes, that is, the first strip electrode 511 and the second strip electrode 513 along the first Two direction A2 extension

Referring again to FIGS. 2, 8, and 11, the size of each display area D may be the same or different. In some embodiments, as shown in FIGS. 2 and 8, the size of each display area D is the same. In still other embodiments, each display area D can have a different size, as shown in FIG. In some embodiments, such display areas D may have at least two sizes, and portions are the same size. In some embodiments, when there are more than three display areas D per row, the size of the display area D can be increased from two lateral to the middle. In some embodiments, the size of display area D can be reduced from top to bottom.

As shown in FIG. 11, the position of the controller 60 of the third embodiment is similar to that of the second embodiment, and the controller 60 is adjacent to the third side S3 of the plurality of adjacent display areas D. The third side S3 is connected to the first side S1 and the second side S2, and the third side S3 is parallel to the second direction A2. As shown in FIG. 12, one end of the first connection electrode 515 and one end of the second connection electrode 517 extend to the bottom of the display 3 and are connected to the controller 60. In some embodiments, the arrangement areas of the first strip electrodes 511 and the second strip electrodes 513 of each electrode group 51 are substantially the same as the display area D provided therein.

In summary, according to the display of any embodiment of the present invention, the display surface can be divided into a plurality of display areas D, and the display areas D can independently switch between the normal display mode or the anti-spy mode to meet various environments. Anti-peeping demand. In addition, the display according to any embodiment of the present invention further realizes the normal display mode or the anti-spy mode for the specific display area D directly during the display process of the display by the configuration and control design of the sub-pixel electrodes and the electrode group. Switching control eliminates the need for additional components and reduces the manufacturing process, making the display with anti-spy mode more competitive in cost.

While the preferred embodiment is disclosed as described above, it is not intended to limit the invention, and those skilled in the art can make some modifications and refinements without departing from the scope of the invention. It is subject to the definition of the scope of the patent application attached to this specification.

1‧‧‧ display

2‧‧‧Display

3‧‧‧ display

10‧‧‧First substrate

11‧‧‧Sub-picture area

111‧‧‧Subpixel area

20‧‧‧second substrate

30‧‧‧Liquid layer

40‧‧‧First electrode layer

41‧‧‧Subpixel electrodes

50‧‧‧Second electrode layer

51‧‧‧Electrode group

511‧‧‧First strip electrode

513‧‧‧Second strip electrode

515‧‧‧First connecting electrode

517‧‧‧Second connection electrode

60‧‧‧ Controller

61‧‧‧ drive unit

63‧‧‧ memory

65‧‧‧Sequence Control Unit

70‧‧‧ third electrode layer

80‧‧‧Insulation

500‧‧‧Processing unit

A1‧‧‧ first direction

A2‧‧‧ second direction

D‧‧‧ display area

G‧‧‧ gap

L1‧‧‧first signal line

L2‧‧‧second signal line

S1‧‧‧ first side

S2‧‧‧ second side

S3‧‧‧ third side

W1‧‧‧ first width

W2‧‧‧ second width

Z‧‧‧ third direction         

Fig. 1 is a schematic view showing the explosion of the element of the first embodiment of the display. Fig. 2 is a top plan view showing a first embodiment of the display. Fig. 3 is a schematic view showing an electrode group of the first embodiment of the display. [Fig. 4] is a partial top view projection of a sub-pixel array in a display. FIG. 5 is a schematic view showing projection of a sub-pixel electrode and an electrode group. Fig. 6 is a block diagram of components of a display control element. Fig. 7 is a schematic exploded view of the element of the second embodiment of the display. Fig. 8 is a top plan view showing a second embodiment of the display. Fig. 9 is a schematic view showing an electrode group of a second embodiment of the display. Fig. 10 is a schematic exploded view of the element of the third embodiment of the display. Fig. 11 is a top plan view showing a third embodiment of the display. Fig. 12 is a schematic view showing an electrode group of a third embodiment of the display.

50‧‧‧Second electrode layer

51‧‧‧Electrode group

511‧‧‧First strip electrode

513‧‧‧Second strip electrode

515‧‧‧First connecting electrode

517‧‧‧Second connection electrode

A1‧‧‧ first direction

A2‧‧‧ second direction

D‧‧‧ display area

S1‧‧‧ first side

S2‧‧‧ second side

S3‧‧‧ third side

Claims (15)

A display having a plurality of display areas, comprising: a first substrate having a plurality of sub-pixel regions arranged along a first direction; a second substrate disposed opposite the first substrate; a liquid crystal layer, Between the first substrate and the second substrate; a first electrode layer between the first substrate and the liquid crystal layer, wherein the first electrode layer comprises a plurality of sub-pixel electrodes, each of the sub-pixel columns The region corresponds to at least two of the sub-pixel electrodes, the sub-pixel electrodes corresponding to the sub-pixel regions are arranged along a second direction, and the second direction is interlaced with the first direction; a second electrode layer is disposed between the second substrate and the liquid crystal layer, wherein the second electrode layer comprises a plurality of electrode groups, and the electrode groups are respectively disposed in the plurality of display regions, and each of the electrode groups comprises: a plurality of first strip electrodes extending from a first side of the corresponding display area along the second direction to a second side of the corresponding display area; and a plurality of second strip electrodes, corresponding to The display area should be the first The side extends along the second direction to the second side of the corresponding display area, wherein the first strip electrodes and the second strip electrodes are alternately arranged along the first direction. The display of claim 1, wherein one of the sub-pixel electrodes and one of the first strip electrodes and one of the second strip electrodes are in a vertical projection direction toward the first substrate overlapping. The display of claim 1, wherein any one of the first strip electrodes and the second strip electrodes adjacent to the same sub-pixel region in a vertical projection direction toward the first substrate The pixel electrodes overlap. The display of claim 3, wherein each of the first strip electrodes or each of the second strip electrodes is adjacent to two sub-pixels adjacent to the first direction in a vertical projection direction of the first substrate The electrodes overlap. The display of claim 1, wherein each of the first strip electrodes has a first width and each of the second strip electrodes has a second width in a vertical projection direction toward the first substrate, the first A width is substantially equal to the second width. The display of claim 1, wherein each of the first strip electrodes has a first width and each of the second strip electrodes has a second width, any phase, in a vertical projection direction toward the first substrate A gap is formed between the adjacent first strip electrode and the second strip electrode, the first width is greater than the gap, and the second width is greater than the gap. The display of claim 1, wherein a gap between the adjacent first strip electrodes and the second strip electrodes is in a vertical projection direction toward the first substrate, and the gap has a width range It is 4 to 6 micrometers (μm). The display device of claim 1, wherein each of the electrode groups corresponding to each display area further comprises a first connection electrode and a second connection electrode, wherein the first connection electrode is connected to the first strip electrodes to form a a first comb-like structure, and the second connecting electrode is connected to the second strip electrodes to form a second comb-shaped structure, the first connecting electrode and the second connecting electrode extending along the first direction, and the first The connection electrode and the second connection electrode are located on opposite sides of the electrode group. The display of claim 1, wherein the first strip electrodes of each of the electrode sets are electrically connected to a first voltage level, and the second strip electrodes are electrically connected to each other to a second voltage level. The first voltage level and the second voltage level are different in polarity, or, in a normal display mode, the first voltage level is substantially equal to the second voltage level. . The display device of claim 1, wherein each of the display regions is disposed in parallel along the first direction, and each of the electrode groups disposed in each of the display regions is electrically isolated from each other. The display device of claim 1, wherein each of the display regions is disposed in parallel along the second direction, and each of the electrode groups disposed in each of the display regions is electrically isolated from each other. The display device of claim 1, wherein at least two of the display regions are disposed along the first direction, and at least two of the display regions are disposed along the second direction, and each of the electrode groups disposed in each of the display regions is in contact with each other Electrically isolated. The display device of claim 1, further comprising: a controller coupled to each of the electrode groups, a plurality of first signal lines and a plurality of second signal lines on the first substrate, and the sub-pixel electrodes The controller is configured to drive the first signal lines, the second signal lines, and the sub-pixel electrodes, and individually drive the electrode groups, wherein when the controller drives any of the electrode groups, the control The device outputs a first voltage level and a second voltage level to the electrode group. The display of claim 13, wherein the controller is disposed outside the display area and adjacent to a third side, and the third side is parallel to the second direction. The display device of claim 13, wherein the controller further comprises: a driving unit electrically connected to at least one of the groups of electrodes; a memory storing a complex array control code; and a timing control unit, Electrically connecting the memory and the driving unit to access at least one group of control codes corresponding to the control signal from the memory according to a control signal, and driving the driving according to the group of control codes The unit drives the corresponding at least one electrode group.