TWI596626B - Choke and emi filter with the same - Google Patents

Choke and emi filter with the same Download PDF

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TWI596626B
TWI596626B TW102148970A TW102148970A TWI596626B TW I596626 B TWI596626 B TW I596626B TW 102148970 A TW102148970 A TW 102148970A TW 102148970 A TW102148970 A TW 102148970A TW I596626 B TWI596626 B TW I596626B
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winding
path
filter
negative
positive
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TW102148970A
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TW201526037A (en
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阿迪沙克 沛普
秋納 杜安皮塔克
林振發
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泰達國際控股有限公司
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扼流器及其所適用之電磁干擾濾波器 Choke and its applicable electromagnetic interference filter

本案係關於一種扼流器,尤指一種可應用於接收雙輸入電源之濾波器中,以解決電磁干擾之扼流器及其所適用之電磁干擾濾波器。 This case relates to a choke, especially a choke that can be applied to a filter that receives a dual input power supply to solve electromagnetic interference and an electromagnetic interference filter to which it is applied.

隨著科技的進步與發展,各種類型之電器係非常普遍且使用亦頻繁,而運用電器不免會使用到電源,才能使電器正常運作。然而當電器需使用交流電源來進行運作時,可能會因為電源的供應、高頻變壓器或是其他元件之寄生電容或是雜散電容的運作等原因,使得由交流電源所供應的電流中,夾帶著雜訊電流,這即是電磁干擾(Electromagnetic Interference;EMI)現象。 With the advancement and development of science and technology, various types of electrical appliances are very common and frequently used, and the use of electrical appliances will inevitably use power supplies in order to make electrical appliances operate normally. However, when an electric appliance needs to use an AC power source for operation, it may be entrained in the current supplied by the AC power source due to the supply of the power source, the parasitic capacitance of the high-frequency transformer or other components, or the operation of the stray capacitance. With the noise current, this is the phenomenon of electromagnetic interference (EMI).

一般而言,使用交流電源會產生的雜訊包含差模雜訊(differential mode noise)以及共模雜訊(common mode noise),而電磁干擾濾波器可作為電源抗電磁輻射的第一道防線,電磁干擾濾波器主要由扼流器(choke)和電容器(capacitor)所組成,其中扼流器係為感性元件,用以抑制雜訊產生,且一般皆由至少一繞組、一磁芯組以及供繞組纏繞之一繞線架所構成。 In general, the noise generated by the AC power supply includes differential mode noise and common mode noise, and the electromagnetic interference filter can be used as the first line of defense against electromagnetic radiation. The electromagnetic interference filter is mainly composed of a choke and a capacitor, wherein the choke is an inductive component for suppressing noise generation, and generally comprises at least one winding, a magnetic core group and One of the windings of the winding is wound.

雖然電磁干擾濾波器確實可藉由扼流器抑制雜訊產生,然而當具有一階濾波功能之電磁干擾濾波器的電路架構為具有兩路的濾波 電路,以對應接收雙輸入(dual-input)電源,亦即雙組電源時,為了使接收雙組電源之電磁干擾濾波器可抑制雜訊產生,習知作法僅能設置兩個獨立的扼流器於電磁干擾濾波器中,使每一扼流器與其中一路的濾波電路連接,以藉由每一扼流器來抑制所對應的濾波電路所接收之電源的雜訊。 Although the EMI filter can suppress the noise generation by the choke, the circuit structure of the EMI filter with the first-order filtering function has two-way filtering. The circuit can only set two independent turbulences in order to prevent the noise generated by the EMI filter receiving the dual-group power supply when receiving the dual-input power supply, that is, the dual-group power supply. In the electromagnetic interference filter, each of the chokes is connected to one of the filter circuits to suppress the noise of the power received by the corresponding filter circuit by each of the chokes.

如此一來,將使得電磁干擾濾波器因需設置兩個獨立的扼流器而導致生產成本提高,且需較多空間來容納兩個獨立的扼流器。此外,當電磁干擾濾波器之兩輸入端所接收的雙組電源的電壓值不同時,將可能導致由每一路濾波電路之正端流入扼流器的電流不等於經扼流器而流出每一路濾波電路之負端的電流,使扼流器為不平衡狀態而產生飽和,導致扼流器上的阻抗變得極小,如此一來,流過扼流器的電流便會變得非常大,使得扼流器以及電磁干擾濾波器內部的其他元件會瞬間燒毀或是無法正常運作。 As a result, the EMI filter requires two independent chokes to increase production costs and requires more space to accommodate two independent chokes. In addition, when the voltage values of the two sets of power sources received by the two input terminals of the electromagnetic interference filter are different, the current flowing into the choke by the positive end of each filter circuit may not be equal to the flow out of each path through the choke. The current at the negative side of the filter circuit saturates the choke in an unbalanced state, causing the impedance on the choke to become extremely small, so that the current flowing through the choke becomes very large, so that 扼The currents and other components inside the EMI filter can be burned out in an instant or not function properly.

本案之主目的為提供一種扼流器及其所適用之電磁干擾濾波器,其中扼流器具有四個繞組,且直接纏繞於同一磁芯組上。此外,當扼流器應用於可接收雙組電源之電磁干擾濾波器中時,扼流器之四組繞組中的兩組繞組係分別連接於電磁干擾濾波器之第一路濾波電路之正路徑及負路徑上,而扼流器之四組繞組中的另兩組繞組則分別連接於電磁干擾濾波器之第二路濾波電路之正路徑及負路徑上,俾解決習知可接收雙組電源之電磁干擾濾波器因需設置兩個獨立的扼流器而導致生產成本提高,以及習知接收雙組電源之電磁干擾濾波器在雙組電源的電壓值不同時,電磁干擾濾波器內之扼流器係產生飽和情況,導致扼流器以及電磁干擾濾波器 內部的其他元件會瞬間燒毀或是無法正常運作等缺失。 The main purpose of the present invention is to provide a choke and an electromagnetic interference filter to which the choke is applied, wherein the choke has four windings and is directly wound on the same core group. In addition, when the choke is applied to an electromagnetic interference filter capable of receiving two sets of power supplies, two of the four sets of windings of the choke are respectively connected to the positive path of the first filter circuit of the electromagnetic interference filter. And the negative path, and the other two of the four sets of windings of the choke are respectively connected to the positive path and the negative path of the second filter circuit of the electromagnetic interference filter, and the conventionally receivable dual-group power supply is solved. The EMI filter requires two independent chokes to increase the production cost, and the EMI filter that receives the two sets of power supplies has different voltage values in the two sets of power supplies. The flow system produces saturation, resulting in chokes and EMI filters. Other components inside will be burned out or not functioning properly.

為達上述目的,本案之較佳實施態樣為提供一種扼流器,其應用於抑制電磁干擾之電磁干擾濾波器中。電磁干擾濾波器係具有接收第一輸入電源之第一路濾波電路以及接收第二輸入電源之第二路濾波電路。扼流器包含磁芯組及四組繞組,其中磁芯組包括第一磁芯及第二磁芯。第一繞組及第二繞組係各自直接纏繞於第一磁芯上。第三繞組及第四繞組係各自直接纏繞於第二磁芯上。第一繞組係串聯連接於第一路濾波電路之第一正路徑上,第二繞組係串聯連接於第二路濾波電路之第二正路徑上,第三繞組係串聯連接於第一路濾波電路之第一負路徑上,第四繞組係串聯連接於第二路濾波電路一第二負路徑上。 In order to achieve the above object, a preferred embodiment of the present invention provides a choke for use in an electromagnetic interference filter for suppressing electromagnetic interference. The electromagnetic interference filter has a first path filter circuit that receives the first input power source and a second path filter circuit that receives the second input power source. The choke includes a magnetic core group and four sets of windings, wherein the magnetic core group includes a first magnetic core and a second magnetic core. The first winding and the second winding are each wound directly on the first magnetic core. The third winding and the fourth winding are each wound directly on the second core. The first winding is connected in series to the first positive path of the first filter circuit, the second winding is connected in series to the second positive path of the second filter circuit, and the third winding is connected in series to the first filter circuit. In the first negative path, the fourth winding is connected in series to the second negative path of the second filter circuit.

為達上述目的,本案又提供一較佳實施態樣為一種電磁干擾濾波器,接收第一輸入電源以及第二輸入電源。電磁干擾濾波器係包含第一路濾波電路、第二路濾波電路及第一扼流器。第一路濾波電路用以抑制第一輸入電源之電磁干擾,且具有第一正路徑以及第一負路徑。第二路濾波電路用以抑制第二輸入電源之電磁干擾,且具有第二正路徑以及第二負路徑。第一扼流器包含:第一磁芯組,包括第一磁芯及第二磁芯;第一繞組及第二繞組,係各自直接纏繞於第一磁芯上;第三繞組及第四繞組,係各自直接纏繞於第二磁芯上。其中,第一繞組係串聯連接第一正路徑上,第二繞組係串聯連接第二正路徑上,第三繞組係串聯連接於第一負路徑上,第四繞組係串聯連接於第二負路徑上。 To achieve the above objective, the present invention further provides an electromagnetic interference filter that receives a first input power source and a second input power source. The electromagnetic interference filter includes a first filter circuit, a second filter circuit, and a first choke. The first filter circuit is configured to suppress electromagnetic interference of the first input power source and has a first positive path and a first negative path. The second filter circuit is configured to suppress electromagnetic interference of the second input power source and has a second positive path and a second negative path. The first choke includes: a first core group including a first core and a second core; the first winding and the second winding are each directly wound on the first core; the third winding and the fourth winding Each of them is directly wound on the second magnetic core. The first winding is connected in series to the first positive path, the second winding is connected in series to the second positive path, the third winding is connected in series to the first negative path, and the fourth winding is connected in series to the second negative path. on.

為達上述目的,本案再提供一較佳實施態樣為一種扼流器,其應用於抑制電磁干擾之電磁干擾濾波器中。電磁干擾濾波器係具有 接收第一輸入電源之第一路濾波電路以及接收第二輸入電源之第二路濾波電路。扼流器包含:第一磁芯組,包括第一磁芯及第二磁芯;第一繞組及第二繞組,係各自直接纏繞於第一磁芯上;第三繞組及第四繞組,係各自直接纏繞於第二磁芯上;第二磁芯組,包括第三磁芯以及第四磁芯;第五繞組及第六繞組,係各自直接纏繞於第三磁芯上;第七繞組及第八繞組,係各自直接纏繞於第四磁芯上。其中,第一繞組及第五繞組係串聯連接,且第一繞組及該第五繞組係與第一路濾波電路之第一正路徑連接,第二繞組及第六繞組係串聯連接,且第二繞組及第六繞組係與第二路濾波電路之第二正路徑連接,第三繞組及第七繞組係串聯連接,且第三繞組及第七繞組係與第一路濾波電路之第一負路徑連接,第四繞組及第八繞組係串聯連接,且第四繞組及第八繞組係與第二路濾波電路之第二負路徑連接。 In order to achieve the above object, a preferred embodiment of the present invention is a choke which is applied to an electromagnetic interference filter for suppressing electromagnetic interference. Electromagnetic interference filter And receiving a first path filter circuit of the first input power source and a second path filter circuit receiving the second input power source. The choke includes: a first core group including a first core and a second core; the first winding and the second winding are each directly wound on the first core; the third winding and the fourth winding are Each of which is directly wound on the second magnetic core; the second magnetic core group includes a third magnetic core and a fourth magnetic core; the fifth winding and the sixth winding are each directly wound on the third magnetic core; the seventh winding and The eighth windings are each wound directly on the fourth core. The first winding and the fifth winding are connected in series, and the first winding and the fifth winding are connected to the first positive path of the first filter circuit, the second winding and the sixth winding are connected in series, and the second The winding and the sixth winding are connected to the second positive path of the second filter circuit, the third winding and the seventh winding are connected in series, and the third winding and the seventh winding are connected to the first negative path of the first filter circuit The fourth winding and the eighth winding are connected in series, and the fourth winding and the eighth winding are connected to the second negative path of the second filtering circuit.

1‧‧‧電磁干擾濾波器 1‧‧‧Electromagnetic interference filter

2‧‧‧第一路濾波電路 2‧‧‧First path filter circuit

20、30‧‧‧瞬態電壓抑制電路 20, 30‧‧‧ Transient voltage suppression circuit

3‧‧‧第二路濾波電路 3‧‧‧Secondary filter circuit

4‧‧‧第一扼流器 4‧‧‧ first current collector

40、60‧‧‧第一磁芯組 40, 60‧‧‧First core group

400、600‧‧‧第一磁芯 400, 600‧‧‧ first core

401、601‧‧‧第二磁芯 401, 601‧‧‧second core

41、62‧‧‧第一繞組 41, 62‧‧‧ first winding

42、63‧‧‧第二繞組 42, 63‧‧‧ second winding

43、64‧‧‧第三繞組 43, 64‧‧‧ third winding

44、65‧‧‧第四繞組 44, 65‧‧‧ fourth winding

5‧‧‧第二扼流器 5‧‧‧Second current collector

50、61‧‧‧第二磁芯組 50, 61‧‧‧second core group

51、66‧‧‧第五繞組 51, 66‧‧‧ fifth winding

52、67‧‧‧第六繞組 52, 67‧‧‧ sixth winding

53、68‧‧‧第七繞組 53, 68‧‧‧ seventh winding

54、69‧‧‧第八繞組 54, 69‧‧‧ eighth winding

6‧‧‧扼流器 6‧‧‧Current

610‧‧‧第三磁芯 610‧‧‧third core

611‧‧‧第四磁芯 611‧‧‧four core

T1至T8、T1’至T8’‧‧‧獨立接腳 T 1 to T 8 , T 1 ' to T 8 '‧‧‧ independent pins

T9’至T12’‧‧‧共用接腳 T 9 ' to T 12 '‧‧‧ shared pin

T90’、T91’、T100’、T101’、T110’、T111’、T120’、T121’‧‧‧子接腳 T 90 ', T 91 ', T 100 ', T 101 ', T 110 ', T 111 ', T 120 ', T 121 '‧‧‧ sub-pins

P1‧‧‧第一正路徑 P 1 ‧‧‧First positive path

P2‧‧‧第一負路徑 P 2 ‧‧‧First negative path

P3‧‧‧第二正路徑 P 3 ‧‧‧Second positive path

P4‧‧‧第二負路徑 P 4 ‧‧‧second negative path

V1‧‧‧第一輸入電源 V 1 ‧‧‧first input power supply

V2‧‧‧第二輸入電源 V 2 ‧‧‧second input power supply

Tin1‧‧‧第一正輸入端 T in1 ‧‧‧ first positive input

Tin2‧‧‧第一負輸入端 T in2 ‧‧‧first negative input

Tin3‧‧‧第二正輸入端 T in3 ‧‧‧second positive input

Tin4‧‧‧第二負輸入端 T in4 ‧‧‧second negative input

Tout1‧‧‧第一正輸出端 T out1 ‧‧‧first positive output

Tout2‧‧‧第一負輸出端 T out2 ‧‧‧first negative output

Tout3‧‧‧第二正輸出端 T out3 ‧‧‧second positive output

Tout4‧‧‧第二負輸出端 T out4 ‧‧‧second negative output

C1至C12‧‧‧第一至第十二濾波電容 C 1 to C 12 ‧‧‧first to twelfth filter capacitors

C13至C14‧‧‧第一至第二跨接電容 C 13 to C 14 ‧‧‧First to second jumper capacitors

G‧‧‧共接端 G‧‧‧Common

D‧‧‧瞬態電壓抑制器 D‧‧‧Transient voltage suppressor

第1圖:其係為本案較佳實施例之電磁干擾濾波器的電路結構示意圖。 Fig. 1 is a circuit diagram showing the structure of an electromagnetic interference filter according to a preferred embodiment of the present invention.

第2A圖:其係為第1圖所示之扼流器之組合結構立體示意圖。 Fig. 2A is a perspective view showing the combined structure of the choke shown in Fig. 1.

第2B圖:其係為第2A圖所示之扼流器之分解結構立體示意圖。 Fig. 2B is a perspective view showing the exploded structure of the choke shown in Fig. 2A.

第2C圖:其係為第2A圖所示之扼流器於部分元件組合時之立體示意圖。 Fig. 2C is a perspective view showing the choke shown in Fig. 2A when a part of the components are combined.

第3圖:其係為本案第1圖所示之電磁干擾濾波器的另一變化例的電路結構示意圖。 Fig. 3 is a circuit diagram showing another variation of the electromagnetic interference filter shown in Fig. 1 of the present invention.

第4A圖:其係為本案另一較佳實施例之扼流器之組合結構立體示 意圖。 Figure 4A is a perspective view showing the combined structure of the choke of another preferred embodiment of the present invention. intention.

第4B圖係:其為第4A圖所示之扼流器之分解結構立體示意圖。 Fig. 4B is a perspective view showing the exploded structure of the choke shown in Fig. 4A.

第4C圖:其係為第4B圖所示之扼流器於部分元件組合時之立體示意圖。 Fig. 4C is a perspective view showing the choke shown in Fig. 4B when a part of the components are combined.

第5圖:其係為第4A圖所示之扼流器取代第1圖所示之第一扼流器以及第二扼流器而應用於第1圖所示之電磁干擾濾波器時之電磁干擾濾波器的部分電路結構示意圖。 Fig. 5 is an electromagnetic diagram when the choke shown in Fig. 4A is applied to the electromagnetic interference filter shown in Fig. 1 instead of the first choke and the second choke shown in Fig. 1. Schematic diagram of part of the circuit structure of the interference filter.

體現本案特徵與優點的一些典型實施例將在後段的說明中詳細敘述。應理解的是本案能夠在不同的態樣上具有各種的變化,其皆不脫離本案的範圍,且其中的說明及圖示在本質上係當作說明之用,而非架構於限制本案。 Some exemplary embodiments embodying the features and advantages of the present invention are described in detail in the following description. It is to be understood that the present invention is capable of various modifications in various aspects, and is not to be construed as a limitation.

請參閱第1圖及第2A至2C圖,其中,第1圖係為本案較佳實施例之電磁干擾濾波器的電路結構示意圖,第2A圖係為第1圖所示之扼流器之組合結構立體示意圖,第2B圖係為第2A圖所示之扼流器之分解結構立體示意圖,第2C圖係為第2A圖所示之扼流器於部分元件組合時之立體示意圖。本案較佳實施例之電磁干擾濾波器1係接收一第一輸入電源V1以及一第二輸入電源V2,並濾除第一輸入電源V1以及第二輸入電源V2中之電磁干擾,以將濾除電磁干擾後之第一輸入電源V1以及第二輸入電源V2提供給連接於電磁干擾濾波器1之輸出端之至少一電源轉換電路(未圖示),電磁干擾濾波器1包含一第一路濾波電路2、一第二路濾波電路3以及一第一扼流器4。其中第一路濾波電路2係接收第一輸入電源V1,且抑制第 一輸入電源V1之電磁干擾,並包含一第一正路徑(正端電能傳輸路徑)P1以及第一負路徑(負端電能傳輸路徑)P2,第一濾波電路2係藉由第一正路徑P1之一第一正輸入端Tin1以及第一負路徑P2之一第一負輸入端Tin2接收第一輸入電源V1,並藉由第一正路徑P1及第一負路徑P2傳送第一輸入電源V1。第二路濾波電路3係接收第二輸入電源V2,且抑制第二輸入電源V2之電磁干擾,並包含一第二正路徑P3以及一第二負路徑P4,第二濾波電路3係藉由第二正路徑P3之一第二正輸入端Tin3以及第二負路徑P4之一第二負輸入端Tin4接收第二輸入電源V2,並藉由第二正路徑P3及第二負路徑P4傳送第二輸入電源V2Please refer to FIG. 1 and FIG. 2A to FIG. 2C. FIG. 1 is a schematic diagram showing the circuit structure of the electromagnetic interference filter of the preferred embodiment of the present invention, and FIG. 2A is a combination of the chokes shown in FIG. FIG. 2B is a perspective view showing the exploded structure of the choke shown in FIG. 2A, and FIG. 2C is a perspective view showing the choke shown in FIG. 2A when a part of the components are combined. The electromagnetic interference filter 1 of the preferred embodiment of the present invention receives a first input power source V 1 and a second input power source V 2 and filters out electromagnetic interference in the first input power source V 1 and the second input power source V 2 . The first input power source V 1 and the second input power source V 2 after filtering the electromagnetic interference are supplied to at least one power conversion circuit (not shown) connected to the output end of the electromagnetic interference filter 1 , and the electromagnetic interference filter 1 A first path filter circuit 2, a second path filter circuit 3 and a first choke unit 4 are included. The first filter circuit 2 receives the first input power V 1 and suppresses electromagnetic interference of the first input power V 1 and includes a first positive path (positive power transmission path) P 1 and a first negative path ( the negative terminal of power transmission paths) P 2, the first line by a first filter circuit 2 path P n-1 one T in1 first positive and the first negative input terminal of one of the path P, a first negative input terminal 2 receives the first T in2 an input power source V 1, and transmits a path P 2 and the first negative first input a first positive power supply path P by V 1. The second filter circuit 3 receives the second input power V 2 and suppresses the electromagnetic interference of the second input power V 2 , and includes a second positive path P 3 and a second negative path P 4 , and the second filter circuit 3 based second positive path P by a second one of the three positive input terminal and a second negative T in3 one path P 4 T in4 second negative input terminal receiving a second input power source V 2, and by a second path P n 3 and the second negative path P 4 transmits the second input power source V 2 .

第一扼流器4包含一第一磁芯組40、一第一繞組41、一第二繞組42、一第三繞組43以及一第四繞組44。第一磁芯組40係可為UU型磁芯組,但不以此為限,該第一磁芯組40係包含第一磁芯400以及第二磁芯401。第一繞組41及第二繞組42係相互分離地直接纏繞於第一磁芯400上,第三繞組43以及第四繞組44係相互分離地直接纏繞於第二磁芯401上。此外,第一繞組41係串聯連接於第一路濾波電路2之第一正路徑P1上,第二繞組42係串聯連接於第二路濾波電路3之第二正路徑P3上,第三繞組43係串聯連接於第一路濾波電路2之第一負路徑P2上,第四繞組44係串聯連接於第二路濾波電路3之第二負路徑P4上,因此第一繞組41實際上係接收第一輸入電源V1之正電壓,第二繞組42實際上係接收第二輸入電源V2之正電壓,第三繞組43實際上係接收第一輸入電源V1之負電壓,第四繞組44實際上係接收第二輸入電源V2之負電壓。 The first choke 4 includes a first core group 40, a first winding 41, a second winding 42, a third winding 43, and a fourth winding 44. The first magnetic core group 40 may be a UU-type magnetic core group, but the first magnetic core group 40 includes a first magnetic core 400 and a second magnetic core 401. The first winding 41 and the second winding 42 are directly wound on the first magnetic core 400 separately from each other, and the third winding 43 and the fourth winding 44 are directly wound on the second magnetic core 401 separately from each other. In addition, the first winding 41 is connected in series to the first positive path P 1 of the first path filter circuit 2, and the second winding 42 is connected in series to the second positive path P 3 of the second path filter circuit 3, and the third winding lines 43 are connected in series to the first filter circuit path P 2 of the first negative on the path 2, the fourth winding 44 are connected in series based on the negative path of the second passage of the second filter circuit 3 P 4, the first winding 41 so the actual based on a first input receiving the positive voltage supply V 1, a second winding 42 is actually provided for receiving a second input voltage is a positive power source V 2, the third winding 43 is actually provided for receiving a first input of the negative voltage supply V 1, four windings 44 was in fact receives a negative voltage V 2 of the second power supply input.

於一些實施例中,第一扼流器4之第一繞組41、第二繞組42、第 三繞組43以及第四繞組44(可為但不限於)由銅片纏繞所構成,因此可提升第一繞組41至第四繞組44的耐壓度、耐流度及散熱效率,進而使第一扼流器4可運用於需輸出大電流或高功率之應用,其中銅片以具有絕緣層為較佳,可替換地,銅片亦可與貼附之絕緣片或絕緣膠帶一同纏繞。此外,由於本案實施例之第一扼流器4係將第一繞組41、第二繞組42、第三繞組43以及第四繞組44分別直接纏繞於第一磁芯組40之第一磁芯400以及第二磁芯401上,如此一來,無須如習知扼流器需具有繞線架以纏繞繞組,因此本案之第一扼流器4不但可因節省繞線架而降低生產之成本,同時,可當第一扼流器4運用於輸出大電流或高功率之應用時,可避免繞線架因不耐高電壓或耐高電流而導致燒毀的情況發生。 In some embodiments, the first winding 41, the second winding 42, the first of the first choke 4 The three windings 43 and the fourth windings 44 (which may be, but not limited to) are formed by winding copper sheets, thereby improving the withstand voltage, flow resistance and heat dissipation efficiency of the first windings 41 to the fourth windings 44, thereby making the first The choke 4 can be applied to applications requiring high current or high power output, wherein the copper sheet is preferably provided with an insulating layer. Alternatively, the copper sheet can be wound together with the attached insulating sheet or insulating tape. In addition, since the first choke 4 of the embodiment of the present invention directly wraps the first winding 41, the second winding 42, the third winding 43, and the fourth winding 44 to the first core 400 of the first core group 40, respectively And the second core 401, so that the conventional choke device does not need to have a bobbin to wind the winding, so the first choke 4 of the present invention can reduce the production cost by saving the bobbin. At the same time, when the first choke 4 is applied to an application for outputting a large current or a high power, it can be avoided that the bobbin is burnt due to high voltage resistance or high current resistance.

於本實施例中,第一扼流器4更具有複數個獨立接腳,例如第2A至2C圖所示之八個獨立接腳T1~T8,其中兩個獨立接腳T1、T2係分別與第一繞組41之兩出線端連接,兩個獨立接腳T3、T4係分別與第二繞組42之兩出線端連接,兩個獨立接腳T5、T6係分別與第三繞組43之兩出線端連接,兩個獨立接腳T7、T8係分別與第四繞組44之兩出線端連接。 In this embodiment, the first choke 4 further has a plurality of independent pins, for example, eight independent pins T 1 -T 8 shown in FIGS. 2A to 2C , wherein two independent pins T 1 , T The two series are respectively connected to the two outgoing ends of the first winding 41, and the two independent pins T 3 and T 4 are respectively connected to the two outgoing ends of the second winding 42 , and the two independent pins T 5 and T 6 are respectively connected. They are respectively connected to the two outgoing ends of the third winding 43, and the two independent pins T 7 and T 8 are respectively connected to the two outgoing ends of the fourth winding 44.

請再參閱第1圖,於本實施例中,電磁干擾濾波器1更具有至少一個第一濾波電容C1、至少一個第二濾波電容C2、至少一個第三濾波電容C3以及至少一個第四濾波電容C4,例如第1圖所示,電磁干擾濾波器1可具有四個第一濾波電容C1、四個第二濾波電容C2、四個第三濾波電容C3以及四個第四濾波電容C4。每一第一濾波電容C1之一端係連接於第一正路徑P1且位於第一繞組41以及第一正輸入端Tin1之間,每一第一濾波電容C1之另一端係連接於一共接端G ,例如接地點(ground)。每一第二濾波電容C2之一端係連接於第一負路徑P2且位於第三繞組43以及第一負輸入端Tin2之間,每一第二濾波電容C2之另一端係連接於共接端G。每一第三濾波電容C3之一端係連接於第二正路徑P3且位於第二繞組42以及第二正輸入端Tin3之間,每一第三濾波電容C3之另一端係連接於共接端G。每一第四濾波電容C4之一端係連接於第二負路徑P4且位於第四繞組44以及第二負輸入端Tin4之間,每一第四濾波電容C4之另一端係連接於共接端G。第一濾波電容C1至第四濾波電容C4係用以濾波。 Referring to FIG. 1 again, in the embodiment, the electromagnetic interference filter 1 further has at least one first filter capacitor C 1 , at least one second filter capacitor C 2 , at least one third filter capacitor C 3 , and at least one The fourth filter capacitor C 4 , for example, as shown in FIG. 1 , the electromagnetic interference filter 1 may have four first filter capacitors C 1 , four second filter capacitors C 2 , four third filter capacitors C 3 , and four Four filter capacitors C 4 . One end of each of the first filter capacitors C 1 is connected to the first positive path P 1 and is located between the first winding 41 and the first positive input terminal T in1 , and the other end of each of the first filter capacitors C 1 is connected to There is a total of G, such as a ground. One end of each second filter capacitor C 2 is connected to the first negative path P 2 and is located between the third winding 43 and the first negative input terminal T in2 , and the other end of each second filter capacitor C 2 is connected to Common terminal G. One end of each third filter capacitor C 3 is connected to the second positive path P 3 and is located between the second winding 42 and the second positive input terminal T in3 , and the other end of each third filter capacitor C 3 is connected to Common terminal G. One end of each fourth filter capacitor C 4 is connected to the second negative path P 4 and is located between the fourth winding 44 and the second negative input terminal T in4 , and the other end of each fourth filter capacitor C 4 is connected to Common terminal G. The first to fourth filter capacitors C 1 to C 4 are used for filtering.

此外,電磁干擾濾波器1更具有一第五濾波電容C5以及一第六濾波電容C6。第五濾波電容C5之一端係連接於第一正路徑P1且位於第一正輸入端Tin1以及第一繞組41之間,第五濾波電容C5之另一端係連接於第一負路徑P2上且位於第一負輸入端Tin2以及第三繞組43之間。第六濾波電容C6之一端係連接於第二正路徑P3且位於第二正輸入端Tin3以及第二繞組42之間,第六濾波電容C6之另一端係連接於第二負路徑P4且位於第二負輸入端Tin4以及第四繞組44之間。第五濾波電容C5以及第六濾波電容C6係用以濾波。 In addition, the electromagnetic interference filter 1 further has a fifth filter capacitor C 5 and a sixth filter capacitor C 6 . One end of the fifth filter capacitor C 5 is connected to the first positive path P 1 and is located between the first positive input terminal T in1 and the first winding 41 , and the other end of the fifth filter capacitor C 5 is connected to the first negative path P 2 is located between the first negative input terminal T in2 and the third winding 43. One end of the sixth filter capacitor C 6 is connected to the second positive path P 3 and is located between the second positive input terminal T in3 and the second winding 42 , and the other end of the sixth filter capacitor C 6 is connected to the second negative path P 4 is located between the second negative input terminal T in4 and the fourth winding 44. The fifth filter capacitor C 5 and the sixth filter capacitor C 6 are used for filtering.

再者,如第1圖所示,本案之電磁干擾濾波器1更具有結構完全相同於第一扼流器4之一第二扼流器5,換言之,第二扼流器5包含具有兩個磁芯之一第二磁芯組50、一第五繞組51、一第六繞組52、一第七繞組53以及一第八繞組54,其中第五繞組51及第六繞組52係同於第一繞組41以及第二繞組42而相互分離地纏繞於磁芯組50之其中之一磁芯上,第七繞組53以及第八繞組54係同於第三繞組43及第四繞組44而相互分離地纏繞於磁芯組50之另一磁芯上。第五繞組51係連接第一正路徑P1上而與第一繞組41串聯連接,且 連接於第一繞組41以及第一正路徑P1之一第一正輸出端Tout1之間。第六繞組52係連接第二正路徑P3上而與第二繞組42串聯連接,且連接於第二繞組42以及第二正路徑P3之一第二正輸出端Tout3之間。第七繞組53係連接於第一負路徑P2而與第三繞組43串聯連接,且連接於第三繞組43以及第一負路徑P2之一第一負輸出端Tout2之間。第八繞組54係連接於第二負路徑P4上而與第四繞組44串聯連接,且連接於第四繞組44以及第二負路徑P4之一第二負輸出端Tout4之間。第二扼流器5的結構係相同於第一扼流器4,故第二扼流器5之細部結構於此不再贅述。本案之電磁干擾濾波器1藉由第一扼流器4及第二扼流器5構成具兩階濾波功能的濾波器。 Furthermore, as shown in FIG. 1, the electromagnetic interference filter 1 of the present invention has a second choke 5 having the same structure as that of the first choke 4, in other words, the second choke 5 includes two a second core group 50, a fifth winding 51, a sixth winding 52, a seventh winding 53, and an eighth winding 54 of the magnetic core, wherein the fifth winding 51 and the sixth winding 52 are the same as the first The winding 41 and the second winding 42 are wound on the magnetic core of one of the core groups 50 separately from each other, and the seventh winding 53 and the eighth winding 54 are separated from the third winding 43 and the fourth winding 44 to be separated from each other. Wrapped around another core of the core set 50. Fifth winding 51 connected to a first positive line path P 1 is connected in series with a first winding 41, and is connected between the first winding 41 and a first one of the path P n-1 first positive output terminal T out1. The sixth winding 52 is connected to the second positive path P 3 and connected in series with the second winding 42 and is connected between the second winding 42 and one of the second positive output terminals T out3 of the second positive path P 3 . The seventh winding 53 is connected to the first negative path P 2 and connected in series with the third winding 43 and is connected between the third winding 43 and one of the first negative output terminals T out2 of the first negative path P 2 . The eighth winding 54 is connected to the second negative path P 4 and connected in series with the fourth winding 44 and is connected between the fourth winding 44 and one of the second negative output terminals T out4 of the second negative path P4. The structure of the second choke 5 is the same as that of the first choke 4, so the detailed structure of the second choke 5 will not be described herein. The electromagnetic interference filter 1 of the present invention constitutes a filter having a two-stage filtering function by the first choke 4 and the second choke 5.

於其它實施例中,電磁干擾濾波器1更具有一第七濾波電容C7以及一第八濾波電容C8。第七濾波電容C7之一端係連接於第一正路徑P1且位於第一繞組41以及第五繞組51之間,第七濾波電容C7之另一端係連接於第一負路徑P2且位於該第三繞組43以及第七繞組53之間。第八濾波電容C8之一端係連接於第二正路徑P3且位於第二繞組42以及第六繞組52之間,第八濾波電容C8之另一端係連接於第二負路徑P4且位於第四繞組44以及第八繞組54之間。第七濾波電容C7及第八濾波電容C8係用以濾波。 In other embodiments, the electromagnetic interference filter 1 further has a seventh filter capacitor C 7 and an eighth filter capacitor C 8 . One end of the seventh filter capacitor C 7 is connected to the first positive path P 1 and is located between the first winding 41 and the fifth winding 51 , and the other end of the seventh filter capacitor C 7 is connected to the first negative path P 2 and Located between the third winding 43 and the seventh winding 53. One end of the eighth filter capacitor C 8 is connected to the second positive path P 3 and is located between the second winding 42 and the sixth winding 52, and the other end of the eighth filter capacitor C 8 is connected to the second negative path P 4 and Located between the fourth winding 44 and the eighth winding 54. The seventh filter capacitor C 7 and the eighth filter capacitor C 8 are used for filtering.

另外,電磁干擾濾波器1亦可具有一第九濾波電容C9、一第十濾波電容C10、第十一濾波電容C11以及第十二濾波電容C12。第九濾波電容C9之一端係連接於第一正路徑P1且位於第一繞組41以及第五繞組51之間,第九濾波電容C9之另一端係連接於共接端G。第十濾波電容C10之一端係連接於第一負路徑P2且位於第三繞組43以及第七繞組53之間,第十濾波電容C10之另一端係連接於共接端G 。第十一濾波電容C11之一端係連接於第二正路徑P3且位於第二繞組42以及第六繞組52之間,第十一濾波電容C11之另一端係連接於共接端G。第十二濾波電容C12之一端係連接於第二負路徑P4且位於第四繞組44以及第八繞組54之間,第十二濾波電容C12之另一端係連接於共接端G。第九濾波電容C9至第十二濾波電容C12係用以濾波。 In addition, the electromagnetic interference filter 1 may also have a ninth filter capacitor C 9 , a tenth filter capacitor C 10 , an eleventh filter capacitor C 11 , and a twelfth filter capacitor C 12 . One end of the ninth filter capacitor C 9 is connected to the first positive path P 1 and is located between the first winding 41 and the fifth winding 51 , and the other end of the ninth filter capacitor C 9 is connected to the common terminal G. One end of the tenth filter capacitor C 10 is connected to the first negative path P 2 and is located between the third winding 43 and the seventh winding 53 , and the other end of the tenth filter capacitor C 10 is connected to the common terminal G . One end of the eleventh filter capacitor C 11 is connected to the second positive path P 3 and is located between the second winding 42 and the sixth winding 52 , and the other end of the eleventh filter capacitor C 11 is connected to the common terminal G. One end of the twelfth filter capacitor C 12 is connected to the second negative path P 4 and is located between the fourth winding 44 and the eighth winding 54 , and the other end of the twelfth filter capacitor C 12 is connected to the common terminal G. The ninth filter capacitor C 9 to the twelfth filter capacitor C 12 are used for filtering.

由上可知,由於本案之第一扼流器4係將第一繞組41至第四繞組44各自直接纏繞於單一第一磁芯組40之第一磁芯400以及第二磁芯401上,因此本案可接收第一輸入電源V1及第二輸入電源V2之電磁干擾濾波器1便可僅使用單一組的扼流器4,以藉由扼流器4中分別連接於第一路濾波電路2之第一正路徑P1及第一負路徑P2之第一繞組41與第三繞組43、分別連接於第二路濾波電路3之第二正路徑P3及第二負路徑P4之第二繞組42以及第四繞組44來濾除雜訊,因此相較於習知接收雙組電源且為一階濾波功能之電磁干擾濾波器需使用兩組獨立的扼流器來濾除雜訊,本案之電磁干擾濾波器1實因使用單一組的扼流器1而比使用兩組獨立的扼流器減少了一組磁芯組,故可降低電磁干擾濾波器1之生產成本。 As can be seen from the above, since the first choke 4 of the present case directly wraps the first winding 41 to the fourth winding 44 directly on the first core 400 and the second core 401 of the single first core group 40, In this case, the electromagnetic interference filter 1 capable of receiving the first input power source V 1 and the second input power source V 2 can use only a single group of the chokes 4 to be respectively connected to the first path filter circuit by the choke 4 The first positive path P 1 of the first positive path P 1 and the first negative path P 2 and the third negative winding 43 are respectively connected to the second positive path P 3 and the second negative path P 4 of the second path filter circuit 3 The second winding 42 and the fourth winding 44 filter out noise, so two sets of independent chokes are used to filter out the noise compared to the conventional electromagnetic interference filter that receives the two-group power supply and is a first-order filtering function. The electromagnetic interference filter 1 of the present invention can reduce the production cost of the electromagnetic interference filter 1 by using a single set of the chokes 1 and reducing the set of core groups by using two sets of independent chokes.

此外,由於本案之扼流器4係將第一繞組41至第四繞組44直接纏繞於第一磁芯組40上,以藉由第一繞組41至第四繞組4來接收第一輸入電源V1以及第二輸入電源V2,藉此在第一輸入電源V1以及第二輸入電源V2之間係不平衡而產生電壓值差異的情況下,可使由電磁干擾濾波器1之正端流入單一第一磁芯組40之電能實際上為第一輸入電源V1以及第二輸入電源V2的總和,而經由單一第一磁芯組40流出電磁干擾濾波器1之負端的電能亦為第一輸入電源 1以及第二輸入電源V2的總和,亦即流入單一第一磁芯組40之電能等於流出單一第一磁芯組40之電能,如此一來,可避免第一磁芯組40在第一輸入電源V1以及第二輸入電源V2不平衡而產生電壓值差異時發生飽和的情況,進而解決第一扼流器4以及電磁干擾濾波器1內部的其他元件會瞬間燒毀或是無法正常運作的問題。 In addition, since the choke 4 of the present case directly winds the first winding 41 to the fourth winding 44 on the first core group 40, the first input power source V is received by the first winding 41 to the fourth winding 4. 1 and the second input power source V 2 , whereby the positive end of the electromagnetic interference filter 1 can be made if the voltage value difference is generated between the first input power source V 1 and the second input power source V 2 power flows into a single set of core 40 of a first sum of the first input power is actually V 1 and V 2 of the second input power source, and a first magnetic core assembly 40 via a single effluent EMI filter end of the negative power is also The sum of the first input power source 1 and the second input power source V 2 , that is, the power flowing into the single first core group 40 is equal to the power flowing out of the single first core group 40, so that the first core group can be avoided. 40 is saturated when the first input power source V 1 and the second input power source V 2 are unbalanced to generate a voltage value difference, thereby solving the problem that the first choke 4 and other components inside the electromagnetic interference filter 1 are instantaneously burned or It is a problem that cannot work properly.

於一些實施例中,如第3圖所示,第一負路徑P2之第一負輸出端Tout2以及第二負路徑P4之第二負輸出端Tout4更可以連接而形成短路狀態,此時第一路濾波電路2以及第二路濾波電路3並非為相互獨立絕緣之電路,因此當例如第一路濾波電路2所接收之第一輸入電源V1的電壓不足時,第二路濾波電路3所接收之第二輸入電源V2的電壓可分享給第一路濾波電路2使用,反之,當例如第二路濾波電路3所接收之第二輸入電源V2的電壓不足時,第一路濾波電路2所接收之第一輸入電源V1的電壓可分享給第二路濾波電路3使用。 In some embodiments, as shown in FIG. 3, a first negative output path P 2 of the first negative terminal and a second negative T out2 path P 4 of the second negative output terminal T out4 more may be linked to form a short circuit condition, At this time, a first passage and a second channel 2 filter circuit filtering circuit 3 is not independent of the insulation circuit, so that when, for example, the first two path filter circuit receiving a first voltage less than the input power source V 1, a second filter path The voltage of the second input power source V 2 received by the circuit 3 can be shared by the first path filter circuit 2, and when, for example, the voltage of the second input power source V 2 received by the second path filter circuit 3 is insufficient, the first input voltage of the first power source V 2 received road filter circuit 1 can be shared with the second passage 3 using filtering circuit.

此外,當第一輸入電源V1的電壓值與第二輸入電源V2的電壓值不平衡而產生差異情況時,為了加強此狀態下的濾波效果,於其它實施例中,如第1圖及第3圖所示,電磁干擾濾波器1更可具有一第一跨接電容C13及第二跨接電容C14,其中第一跨接電容C13係跨接於第一路濾波電路2之第一正路徑P1以及第二路濾波電路3之第二正路徑P3之間,亦即第一跨接電容C13的兩端係分別與第一正路徑P1及第二正路徑P3連接,第二跨接電容C14係跨接於第一路濾波電路2之第一負路徑P2以及第二路濾波電路3之第二負路徑P4之間,亦即第二跨接電容C14的兩端係分別與第一負路徑P2及第二負路徑P4連接。 In addition, when the difference between the voltage value of the first input power source V 1 and the voltage value of the second input power source V 2 is unbalanced, in order to enhance the filtering effect in this state, in other embodiments, as shown in FIG. 1 and As shown in FIG. 3 , the EMI filter 1 further has a first jumper capacitor C 13 and a second jumper capacitor C 14 , wherein the first jumper capacitor C 13 is connected across the first filter circuit 2 . the first path P n. 1 and n of the second path of the second passage between the filter circuit 3 P 3, i.e. a first capacitor C connected across the two ends 13 with the first positive and the second path P n. 1 path P 3 , the second jumper capacitor C 14 is connected between the first negative path P 2 of the first filter circuit 2 and the second negative path P 4 of the second filter circuit 3, that is, the second jumper Both ends of the capacitor C 14 are connected to the first negative path P 2 and the second negative path P 4 , respectively.

於上述該些實施例中,第一濾波電容C1至第四濾波電容C4、第九濾波電容C9至第十二濾波電容C12係與第一扼流器4及/或第二扼流器5相互作用而濾除共模雜訊,例如濾除頻率為30MHZ~50MHZ之雜訊,至於第五電容C5至第八電容C8、第一跨接電容C13及第二跨接電容C14係用以濾除差模雜訊,例如150K~10MHZ之雜訊,因此第五電容C5至第八電容C8、第一跨接電容C13及第二跨接電容C14的電容值係相對大於第一濾波電容C1至第四濾波電容C4、第九濾波電容C9至第十二濾波電容C12的電容值。 In the above embodiments, the first filter capacitor C 1 to the fourth filter capacitor C 4 , the ninth filter capacitor C 9 to the twelfth filter capacitor C 12 are coupled to the first choke 4 and/or the second clamp The flow device 5 interacts to filter out common mode noise, for example, filtering noise of 30 MHz to 50 MHz, and the fifth capacitor C 5 to the eighth capacitor C 8 , the first jumper capacitor C 13 and the second jumper Capacitor C 14 is used to filter differential mode noise, such as 150K~10MHZ noise, so the fifth capacitor C 5 to the eighth capacitor C 8 , the first jumper capacitor C 13 and the second jumper capacitor C 14 a first filter capacitor capacitance values based fourth filter capacitor a C 1 to C 4, C 9 ninth to twelfth filter capacitor filter capacitor C 12 is relatively larger than the capacitance value.

於一些實施例中,如第1及3圖所示,第一路濾波電路2以及第二路濾波電路3更各自具有一瞬態電壓抑制電路20、30,瞬態電壓抑制電路20係連接於第一正路徑P1以及第一負路徑P2之間,且與第一正輸出端Tout1及第一負輸出端Tout2相鄰連接,瞬態電壓抑制電路30係連接於第二正路徑P3以及第二負路徑P4之間,且與第二正輸出端Tout3及第二負輸出端Tout4相鄰連接。此外,瞬態電壓抑制電路20、30係分別由兩個串聯連接之瞬態電壓抑制器(Transient Voltage Suppressor;TVS)D所構成,用以抑制突波,亦即當第一輸入電源V1及第二輸入電源V2係穩定地輸入電磁干擾濾波器1時,瞬態電壓抑制電路20、30對電磁干擾濾波器1呈現高阻抗狀態,然而當第一輸入電源V1及第二輸入電源V2之電壓瞬間升高而出現突波時,由於電壓急速增加,因此使得瞬態電壓抑制電路20、30之阻抗值迅速下降,並形成一短路狀態,進而提供一低阻抗路徑,藉此突波電壓之電流可被導離而不影響電磁干擾濾波器1,並達到保護電磁干擾濾波器1之功效。 In some embodiments, as shown in FIGS. 1 and 3, the first filter circuit 2 and the second filter circuit 3 each have a transient voltage suppression circuit 20, 30, and the transient voltage suppression circuit 20 is connected to the first A positive path P 1 and a first negative path P 2 are connected adjacent to the first positive output terminal T out1 and the first negative output terminal T out2 , and the transient voltage suppression circuit 30 is connected to the second positive path P 3 and the second negative path P 4 are connected adjacent to the second positive output terminal T out3 and the second negative output terminal T out4 . In addition, the transient voltage suppression circuits 20 and 30 are respectively composed of two Transient Voltage Suppressors (TVS) D connected in series to suppress the surge, that is, when the first input power source V 1 and V 2 of the second input power lines stably input EMI filter 1, a transient voltage suppression circuit 20, 30 presents a high impedance state electromagnetic interference filter, however, when the first input and the second input power supply V 1 V When the voltage of 2 is instantaneously increased and a surge occurs, the voltage value is rapidly increased, so that the impedance values of the transient voltage suppression circuits 20 and 30 are rapidly decreased, and a short circuit state is formed, thereby providing a low impedance path, thereby providing a surge. The voltage current can be conducted away without affecting the electromagnetic interference filter 1, and the effect of protecting the electromagnetic interference filter 1 is achieved.

請參閱第4A至4C圖,其中第4A圖係為本案另一較佳實施例之扼流 器之組合結構立體示意圖,第4B圖係為第4A圖所示之扼流器之分解結構立體示意圖,第4C圖係為第4B圖所示之扼流器於部分元件組合時之立體示意圖。本實施例之扼流器6係包含第一磁芯組60、第二磁芯組61、第一繞組62、第二繞組63、第三繞組64、第四繞組65、第五繞組66、第六繞組67、第七繞組68以及第八繞組69,其中第一磁芯組60及第二磁芯組61係分別可為UU型磁芯組,但不以此為限,且第一磁芯組60係包含第一磁芯600以及第二磁芯601,第二磁芯組61係包含第三磁芯610及第四磁芯611。第一繞組62及第二繞組63係相互分離地直接纏繞於第一磁芯600上,第三繞組64以及第四繞組65係相互分離地直接纏繞於第二磁芯601上,第五繞組66及第六繞組67係相互分離地直接纏繞於第三磁芯610上,第七繞組68及第八繞組69係相互分離地直接纏繞於第四磁芯611上。 Please refer to Figures 4A to 4C, wherein Figure 4A is a turbulence of another preferred embodiment of the present invention. FIG. 4B is a perspective view showing the exploded structure of the choke shown in FIG. 4A, and FIG. 4C is a perspective view showing the choke shown in FIG. 4B when a part of the components are combined. The choke 6 of the present embodiment includes a first core group 60, a second core group 61, a first winding 62, a second winding 63, a third winding 64, a fourth winding 65, a fifth winding 66, and a The sixth winding 67, the seventh winding 68 and the eighth winding 69, wherein the first core group 60 and the second core group 61 are respectively UU-type core groups, but not limited thereto, and the first core The group 60 includes a first core 600 and a second core 601, and the second core group 61 includes a third core 610 and a fourth core 611. The first winding 62 and the second winding 63 are directly wound on the first magnetic core 600 separately from each other, and the third winding 64 and the fourth winding 65 are directly wound on the second magnetic core 601 separately from each other, and the fifth winding 66 The sixth winding 67 is directly wound on the third core 610 separately from each other, and the seventh winding 68 and the eighth winding 69 are directly wound on the fourth core 611 separately from each other.

此外,本實施例之扼流器6更具有複數個獨立接腳,例如第4A至4C圖所示之八個獨立接腳T1’至T8’,以及複數個共用接腳,例如第4A、4C圖所示之四個共用接腳T9’至T12’,其中獨立接腳T1’係與第一繞組62之一出線端連接,獨立接腳T2’係與第二繞組63之一出線端連接,獨立接腳T3’係與第三繞組64之一出線端連接,獨立接腳T4’係與第四繞組65之一出線端連接,獨立接腳T5’係與第五繞組66之一出線端連接,獨立接腳T6’係與第六繞組67之一出線端連接,獨立接腳T7’係與第七繞組68之一出線端連接,獨立接腳T8’係與第八繞組69之一出線端連接,共用接腳T9’係與第一繞組62之另一出線端以及第五繞組66之另一出線端連接,共用接腳T10’係與第二繞組63之另一出線端以及第六繞組67 之另一出線端連接,共用接腳T11’係與第三繞組64之另一出線端以及第七繞組68之另一出線端連接,共用接腳T12’係與第四繞組65之另一出線端以及第八繞組69之另一出線端連接。 In addition, the choke 6 of the embodiment further has a plurality of independent pins, such as eight independent pins T 1 ' to T 8 ' shown in FIGS. 4A to 4C, and a plurality of shared pins, for example, the 4A. 4 shared pin T 9 ' to T 12 ', wherein the independent pin T 1 ' is connected to one of the outlet ends of the first winding 62, and the independent pin T 2 ' is connected to the second winding 63 one of the outlet ends is connected, the independent pin T 3 ' is connected to one of the outlet ends of the third winding 64, and the independent pin T 4 ' is connected to one of the outlet ends of the fourth winding 65, and the independent pin T 5 'end of one line 66 connected to the outlet fifth winding, independent pin T 6' connected to the outlet end of one line 67 sixth coils, an independent pin T 7 'lines and one of the seventh winding line 68 The end connection, the independent pin T 8 ' is connected to one of the output ends of the eighth winding 69, the common pin T 9 ' is connected to the other end of the first winding 62 and the other end of the fifth winding 66 The terminal connection, the shared pin T 10 ' is connected to the other outgoing end of the second winding 63 and the other outgoing end of the sixth winding 67, and the shared pin T 11 ' is connected to the other of the third winding 64 Line end and seventh winding 68 The other end is connected to the outlet, a common pin T 12 'and another line of the fourth winding 65 and the other end of the eighth line of the winding 69 connected to the outlet end.

於上述實施例中,共用接腳T9’係由可相互連接之兩子接腳T90’及T91’所構成,共用接腳T10’係由可相互連接之兩子接腳T100’及T101’所構成,共用接腳T11’係由可相互連接之兩子接腳T110’及T111’所構成,共用接腳T12’係由可相互連接之兩子接腳T120’及T121’所構成,其中子接腳T90’及T91’係分別與第一繞組62之另一出線端以及第五繞組66之另一出線端連接,子接腳T100’及T101’係分別與第二繞組63之另一出線端以及第六繞組67之另一出線端連接,子接腳T110’及T111’係分別與第三繞組64之另一出線端以及第七繞組68之另一出線端連接,子接腳T120’及T121’係分別與第四繞組65之另一出線端以及第八繞組69之另一出線端連接。 In the above embodiment, the shared pin T 9 ' is composed of two sub-pins T 90 ′ and T 91 ′ which are connectable to each other, and the shared pin T 10 ′ is composed of two sub-pins T 100 that can be connected to each other. 'and T 101 ', the shared pin T 11 ' is composed of two sub-pins T 110 ' and T 111 ' that can be connected to each other, and the common pin T 12 ' is composed of two sub-pins that can be connected to each other. T 120 ' and T 121 ' are formed, wherein the sub-pins T 90 ′ and T 91 ′ are respectively connected to the other outgoing end of the first winding 62 and the other outgoing end of the fifth winding 66, and the sub-pins T 100 'and T 101 ' are respectively connected to the other outgoing end of the second winding 63 and the other outgoing end of the sixth winding 67, and the sub-pins T 110 ' and T 111 ' are respectively connected to the third winding 64. The other outgoing end and the other outgoing end of the seventh winding 68 are connected, and the sub-pins T 120 ′ and T 121 ′ are respectively connected to the other outgoing end of the fourth winding 65 and the other of the eighth winding 69 The outlet is connected.

以下將以第5圖做進一步說明。當以第4A圖所示之扼流器取代第1圖所示之第一扼流器以及第二扼流器而應用於第1圖所示之電磁干擾濾波器時,由於第5圖所示之電磁干擾濾波器實際上係相似於第1圖所示之電磁干擾濾波器的電路結構,故僅以標示相同符號來代表元件之結構與功能相同,不再贅述第5圖之電磁干擾濾波器的電路元件。請參閱第5圖並配合第4A至4C圖,其中第5圖係為第4A圖所示之扼流器取代第1圖所示之第一扼流器以及第二扼流器而應用於第1圖所示之電磁干擾濾波器時之電磁干擾濾波器的部分電路結構示意圖。當本實施例之扼流器6應用於第1圖所示之電磁干擾濾波器1而取代第一扼流器4以及第二扼流器5,亦構 成如第5圖所示之電磁干擾濾波器1時,此時第一繞組62及第五繞組66係串聯連接,且第一繞組62與第五繞組66係與第一路濾波電路2之第一正路徑P1連接,第二繞組63及第六繞組67係串聯連接,且第二繞組63及第六繞組67係與第二路濾波電路2之第二正路徑P3連接,第三繞組64及第七繞組68係串聯連接,且第三繞組64及第七繞組68係與第一路濾波電路2之第一負路徑P2連接,第四繞組65及第八繞組69係串聯連接,且第四繞組65及第八繞組69係與第二路濾波電路3之第二負路徑P4連接。 The following will be further illustrated in Figure 5. When the choke shown in FIG. 4A is used instead of the first choke and the second choke shown in FIG. 1 and applied to the electromagnetic interference filter shown in FIG. 1, as shown in FIG. The electromagnetic interference filter is actually similar to the circuit structure of the electromagnetic interference filter shown in FIG. 1 , so the structure and function of the components are represented by the same symbols, and the electromagnetic interference filter of FIG. 5 will not be described again. Circuit components. Please refer to Figure 5 and cooperate with Figures 4A to 4C. Figure 5 is a diagram showing the choke shown in Figure 4A instead of the first choke and the second choke shown in Figure 1. 1 is a schematic diagram of a part of the circuit structure of the electromagnetic interference filter in the electromagnetic interference filter shown in FIG. When the choke 6 of the present embodiment is applied to the electromagnetic interference filter 1 shown in FIG. 1 instead of the first choke 4 and the second choke 5, it also constitutes the electromagnetic interference filter as shown in FIG. In the case of the device 1, the first winding 62 and the fifth winding 66 are connected in series, and the first winding 62 and the fifth winding 66 are connected to the first positive path P 1 of the first filter circuit 2, and the second winding 63 And the sixth winding 67 is connected in series, and the second winding 63 and the sixth winding 67 are connected to the second positive path P 3 of the second filter circuit 2, and the third winding 64 and the seventh winding 68 are connected in series, and the seventh winding and the third winding 64 and a first negative line 68 of the first path P 2 of path filter circuit 2 is connected to the fourth winding 65 and winding 69 an eighth lines are connected in series, the fourth winding 65 and winding 69 and eighth lines It is connected to the second negative path P 4 of the second path filter circuit 3.

由於本實施例之扼流器6係由兩組磁芯組60、61及八組繞組,亦即第一繞組62至第八繞組69直接組合構成,且將第一繞組62至第四繞組65纏繞於第一磁芯組60上,將第五繞組66至第八繞組69纏繞於第二磁芯組61上,因此當扼流器6應用於電磁干擾濾波器1內時,即可使電磁干擾濾波器1構成具有兩階濾波功能之濾波器,亦即與第1圖所示之第一扼流器4及第二扼流器5可使電磁干擾濾波器1構成具兩階濾波功能之濾波器的效果相同,而由於本實施例的扼流器6為單一的獨立元件,因此在安裝設置及整理上係相較於使用兩個獨立元件之第一扼流器4及第二扼流器5更為方便。此外,相較於第1圖所示之第一扼流器4以及第二扼流器5分別具有八個獨立接腳,亦即接腳總和為十六個,由於本案之扼流器6僅具有八個獨立接腳及四個共同接腳,亦即接腳總和為十二個,因此本實施例之扼流器6在安裝設置上同樣更為方便。 Since the choke 6 of the present embodiment is composed of two sets of core groups 60, 61 and eight sets of windings, that is, the first winding 62 to the eighth winding 69 are directly combined, and the first winding 62 to the fourth winding 65 are arranged. Wrapped around the first core group 60, the fifth winding 66 to the eighth winding 69 are wound around the second core group 61, so that when the choke 6 is applied to the electromagnetic interference filter 1, the electromagnetic The interference filter 1 constitutes a filter having a two-stage filtering function, that is, the first choke 4 and the second choke 5 shown in FIG. 1 can cause the electromagnetic interference filter 1 to have a two-order filtering function. The effect of the filter is the same, and since the choke 6 of the present embodiment is a single independent component, the installation and arrangement are compared to the first choke 4 and the second choke using two separate components. Device 5 is more convenient. In addition, the first choke 4 and the second choke 5 shown in FIG. 1 respectively have eight independent pins, that is, the total number of the pins is sixteen, since the choke 6 of the present case only There are eight independent pins and four common pins, that is, the total number of the pins is twelve, so the choke 6 of the embodiment is also more convenient in the installation setting.

綜上所述,本案提供一種扼流器及其所適用之電磁干擾濾波器,其中扼流器係將第一繞組至第四繞組直接纏繞於單一磁芯組上,且當應用於接收雙組電源之電磁干擾濾波器中時,扼流器之第一 繞組至第四繞組係分別連接於電磁干擾濾波器內不同的電能傳輸路徑上來接收第一輸入電源以及第二輸入電源,因此相較於習知接收雙組電源的電磁干擾濾波器需使用兩組獨立的扼流器來濾除雜訊,本案之電磁干擾濾波器不但可因僅使用具有一組磁芯組的單一組扼流器來降低生產成本,且當電磁干擾濾波器所接收之第一輸入電源以及第二輸入電源之間發生不平衡而具有電壓值差異時,扼流器之磁芯組亦可避免發生飽和的情況,進而使扼流器以及電磁干擾濾波器內部的其他元件不會因磁芯組飽和而產生燒毀或是無法正常運作的情況。 In summary, the present invention provides a choke and an electromagnetic interference filter to which the same is applied, wherein the chokes directly wind the first to fourth windings on a single core group, and when applied to the receiving dual group When the power is in the electromagnetic interference filter, the first of the choke The winding to the fourth winding system are respectively connected to different power transmission paths in the electromagnetic interference filter to receive the first input power and the second input power, so two sets of electromagnetic interference filters are required to receive the two sets of power sources. Independent choke to filter out noise, the electromagnetic interference filter of this case can not only reduce the production cost by using only a single group of chokes with a set of core groups, and the first one received by the electromagnetic interference filter When there is an imbalance between the input power source and the second input power source and the voltage value difference, the core group of the choke can also avoid saturation, and the choke and other components inside the electromagnetic interference filter will not be A situation in which the core group is saturated and burned or is not functioning properly.

本案得由熟習此技術之人士任施匠思而為諸般修飾,然皆不脫如附申請專利範圍所欲保護者。 This case has been modified by people who are familiar with the technology, but it is not intended to be protected by the scope of the patent application.

1‧‧‧電磁干擾濾波器 1‧‧‧Electromagnetic interference filter

2‧‧‧第一路濾波電路 2‧‧‧First path filter circuit

20、30‧‧‧瞬態電壓抑制電路 20, 30‧‧‧ Transient voltage suppression circuit

3‧‧‧第二路濾波電路 3‧‧‧Secondary filter circuit

4‧‧‧第一扼流器 4‧‧‧ first current collector

40‧‧‧第一磁芯組 40‧‧‧First core group

41‧‧‧第一繞組 41‧‧‧First winding

42‧‧‧第二繞組 42‧‧‧second winding

43‧‧‧第三繞組 43‧‧‧ Third winding

44‧‧‧第四繞組 44‧‧‧fourth winding

5‧‧‧第二扼流器 5‧‧‧Second current collector

50‧‧‧第二磁芯組 50‧‧‧Second core group

51‧‧‧第五繞組 51‧‧‧ fifth winding

52‧‧‧第六繞組 52‧‧‧ sixth winding

53‧‧‧第七繞組 53‧‧‧ seventh winding

54‧‧‧第八繞組 54‧‧‧ eighth winding

P1‧‧‧第一正路徑 P 1 ‧‧‧First positive path

P2‧‧‧第一負路徑 P 2 ‧‧‧First negative path

P3‧‧‧第二正路徑 P 3 ‧‧‧Second positive path

P4‧‧‧第二負路徑 P 4 ‧‧‧second negative path

V1‧‧‧第一輸入電源 V 1 ‧‧‧first input power supply

V2‧‧‧第二輸入電源 V 2 ‧‧‧second input power supply

Tin1‧‧‧第一正輸入端 T in1 ‧‧‧ first positive input

Tin2‧‧‧第一負輸入端 T in2 ‧‧‧first negative input

Tin3‧‧‧第二正輸入端 T in3 ‧‧‧second positive input

Tin4‧‧‧第二負輸入端 T in4 ‧‧‧second negative input

Tout1‧‧‧第一正輸出端 T out1 ‧‧‧first positive output

Tout2‧‧‧第一負輸出端 T out2 ‧‧‧first negative output

Tout3‧‧‧第二正輸出端 T out3 ‧‧‧second positive output

Tout4‧‧‧第二負輸出端 T out4 ‧‧‧second negative output

T1至T8‧‧‧獨立接腳 T 1 to T 8 ‧‧‧ independent pins

C1至C12‧‧‧第一至第十二濾波電容 C 1 to C 12 ‧‧‧first to twelfth filter capacitors

C13至C14‧‧‧第一至第二跨接電容 C 13 to C 14 ‧‧‧First to second jumper capacitors

G‧‧‧共接端 G‧‧‧Common

D‧‧‧瞬態電壓抑制器 D‧‧‧Transient voltage suppressor

Claims (20)

一種扼流器,應用於抑制電磁干擾之一電磁干擾濾波器中,其中該電磁干擾濾波器係具有接收一第一輸入電源之一第一路濾波電路以及接收一第二輸入電源之一第二路濾波電路,該扼流器包含:一磁芯組,包括一第一磁芯及一第二磁芯;一第一繞組及一第二繞組,係各自直接纏繞於該第一磁芯上;以及一第三繞組及一第四繞組,係各自直接纏繞於該第二磁芯上;其中,該第一繞組係串聯連接於該第一路濾波電路之一第一正路徑上,該第二繞組係串聯連接於該第二路濾波電路之一第二正路徑上,該第三繞組係串聯連接於該第一路濾波電路之一第一負路徑上,該第四繞組係串聯連接於該第二路濾波電路一第二負路徑上。 A choke device for use in an electromagnetic interference filter for suppressing electromagnetic interference, wherein the electromagnetic interference filter has a first path filter circuit for receiving a first input power source and a second input power source for receiving a second input power source a filter circuit, the choke includes: a core group including a first core and a second core; a first winding and a second winding, each of which is directly wound on the first core; And a third winding and a fourth winding are respectively wound directly on the second magnetic core; wherein the first winding is connected in series to one of the first positive paths of the first filtering circuit, the second The winding is connected in series to one of the second positive paths of the second filtering circuit, the third winding is connected in series to one of the first negative paths of the first filtering circuit, and the fourth winding is connected in series The second filter circuit is on a second negative path. 如申請專利範圍第1項所述之扼流器,其中該第一濾波電路之該第一正路徑以及該第一負路徑係接收及傳送該第一輸入電源,該第二濾波電路之該第二正路徑以及該第二負路徑係接收及傳送該第二輸入電源。 The choke of claim 1, wherein the first positive path of the first filter circuit and the first negative path receive and transmit the first input power, the second filter circuit The second positive path and the second negative path receive and transmit the second input power. 如申請專利範圍第1項所述之扼流器,其中該磁芯組係為UU型磁芯組。 The choke according to claim 1, wherein the magnetic core group is a UU type magnetic core group. 如申請專利範圍第1項所述之扼流器,其中該第一繞組、該第二 繞組、該第三繞組以及該第四繞組係分別由一銅片所構成,其中該銅片具有一絕緣層,或該銅片與一絕緣片或一絕緣膠帶一同纏繞。 The choke of claim 1, wherein the first winding, the second The winding, the third winding and the fourth winding are respectively formed of a copper sheet, wherein the copper sheet has an insulating layer, or the copper sheet is wound together with an insulating sheet or an insulating tape. 如申請專利範圍第1項所述之扼流器,其更包含八個獨立接腳,其中該第一繞組、該第二繞組、該第三繞組及該第四繞組各自的兩出線端係分別連接該八個獨立接腳中所對應的兩個該獨立接腳。 The choke of claim 1, further comprising eight independent pins, wherein the two outlet ends of the first winding, the second winding, the third winding and the fourth winding are respectively Two independent ones of the eight independent pins are respectively connected. 一種電磁干擾濾波器,接收一第一輸入電源以及一第二輸入電源,該電磁干擾濾波器包含:一第一路濾波電路,用以抑制該第一輸入電源之電磁干擾,且具有一第一正路徑以及一第一負路徑;一第二路濾波電路,用以抑制該第二輸入電源之電磁干擾,且具有一第二正路徑以及一第二負路徑;以及一第一扼流器,包含:一第一磁芯組,包括一第一磁芯及一第二磁芯;一第一繞組及一第二繞組,係各自直接纏繞於該第一磁芯上;以及一第三繞組及一第四繞組,係各自直接纏繞於該第二磁芯上;其中,該第一繞組係串聯連接該第一正路徑上,該第二繞組係串聯連接該第二正路徑上,該第三繞組係串聯連接於該第一負路徑上,該第四繞組係串聯連接於該第二負路徑上。 An electromagnetic interference filter receives a first input power and a second input power, the electromagnetic interference filter includes: a first path filter circuit for suppressing electromagnetic interference of the first input power source, and having a first a positive path and a first negative path; a second filter circuit for suppressing electromagnetic interference of the second input power source, and having a second positive path and a second negative path; and a first choke, The method includes: a first magnetic core group including a first magnetic core and a second magnetic core; a first winding and a second winding respectively wound directly on the first magnetic core; and a third winding and a fourth winding, each of which is directly wound on the second magnetic core; wherein the first winding is connected in series to the first positive path, and the second winding is connected in series to the second positive path, the third The winding system is connected in series to the first negative path, and the fourth winding is connected in series to the second negative path. 如申請專利範圍第6項所述之電磁干擾濾波器,其中該第一路濾波電路係藉由該第一正路徑之一第一正輸入端以及該第一負路徑之一第一負輸入端接收該第一輸入電源,該第二路濾波電路係藉 由該第二正路徑之一第二正輸入端以及該第二負路徑之一第二負輸入端接收該第二輸入電源。 The EMI filter of claim 6, wherein the first filter circuit is configured by a first positive input terminal of the first positive path and a first negative input terminal of the first negative path Receiving the first input power, the second filter circuit borrowing The second input power is received by one of the second positive input and the second negative input of the second negative path. 如申請專利範圍第7項所述之電磁干擾濾波器,其更包括:至少一第一濾波電容,該第一濾波電容之一端係連接於該第一正路徑且位於該第一繞組以及該第一正輸入端之間,該第一濾波電容之另一端係連接於一共接端;至少一第二濾波電容,該第二濾波電容之一端係連接於該第一負路徑且位於該第三繞組以及該第一負輸入端之間,該第二濾波電容之另一端係連接於該共接端;至少一第三濾波電容,該第三濾波電容之一端係連接於該第二正路徑且位於該第二繞組以及該第二正輸入端之間,該第三濾波電容之另一端係連接於該共接端;以及至少一第四濾波電容,該第四濾波電容之一端係連接於該第二負路徑且位於該第四繞組以及該第二負輸入端之間,該第四濾波電容之另一端係連接於該共接端。 The electromagnetic interference filter of claim 7, further comprising: at least one first filter capacitor, one end of the first filter capacitor being connected to the first positive path and located at the first winding and the first Between a positive input terminal, the other end of the first filter capacitor is connected to a common terminal; at least one second filter capacitor, one end of the second filter capacitor is connected to the first negative path and located at the third winding And the other end of the second filter capacitor is connected to the common terminal; at least a third filter capacitor, one end of the third filter capacitor is connected to the second positive path and located Between the second winding and the second positive input terminal, the other end of the third filter capacitor is connected to the common terminal; and at least one fourth filter capacitor, one end of the fourth filter capacitor is connected to the first The second negative path is located between the fourth winding and the second negative input terminal, and the other end of the fourth filter capacitor is connected to the common terminal. 如申請專利範圍第7項所述之電磁干擾濾波器,其更包括:一第五濾波電容,該第五濾波電容之一端係連接於該第一正路徑且位於該第一正輸入端以及該第一繞組之間,該第五濾波電容之另一端係連接於第一負路徑且位於該第一負輸入端以及該第三繞組之間;以及一第六濾波電容,該第六濾波電容之一端係連接於該第二正路徑且位於該第二正輸入端以及該第二繞組之間,該第六濾波電容之另一端係連接於該第二負路徑且位於該第二負輸入端以及該第四繞組之間。 The electromagnetic interference filter of claim 7, further comprising: a fifth filter capacitor, one end of the fifth filter capacitor being connected to the first positive path and located at the first positive input terminal and the Between the first windings, the other end of the fifth filter capacitor is connected to the first negative path and between the first negative input terminal and the third winding; and a sixth filter capacitor, the sixth filter capacitor One end is connected to the second positive path and is located between the second positive input end and the second winding, and the other end of the sixth filter capacitor is connected to the second negative path and located at the second negative input terminal and Between the fourth windings. 如申請專利範圍第6項所述之電磁干擾濾波器,其更包括一第二 扼流器,該第二扼流器包含:一第二磁芯組,包含兩磁芯;一第五繞組及一第六繞組,係各自直接纏繞於該第二磁芯組之其中之一該磁芯上;以及一第七繞組及一第八繞組,係各自直接纏繞於該第二磁芯組之另一該磁芯上;其中,該第五繞組係串聯連接於該第一正路徑上,該第六繞組係串聯連接於該第二正路徑上,該第七繞組係串聯連接於該第一負路徑上,該第八繞組係串聯連接於該第二負路徑上。 An electromagnetic interference filter according to claim 6, which further comprises a second a second choke comprising: a second core group comprising two magnetic cores; a fifth winding and a sixth winding each wound directly on one of the second core groups And a seventh winding and an eighth winding are respectively wound directly on the other magnetic core of the second magnetic core group; wherein the fifth winding is connected in series to the first positive path The sixth winding is connected in series to the second positive path, the seventh winding is connected in series to the first negative path, and the eighth winding is connected in series to the second negative path. 如申請專利範圍第10項所述之電磁干擾濾波器,其中該第五繞組係連接於該第一繞組以及該第一正路徑之一第一正輸出端之間,該第六繞組係連接於該第二繞組以及該第二正路徑之一第二正輸出端之間,該第七繞組係連接於該第三繞組以及該第一負路徑之一第一負輸出端之間,該第八繞組係連接於該第四繞組以及該第二負路徑之一第二負輸出端之間。 The EMI filter of claim 10, wherein the fifth winding is connected between the first winding and a first positive output of the first positive path, the sixth winding is connected to Between the second winding and a second positive output of the second positive path, the seventh winding is coupled between the third winding and a first negative output of the first negative path, the eighth A winding is coupled between the fourth winding and a second negative output of the second negative path. 如申請專利範圍第10項所述之電磁干擾濾波器,其更包括:一第七濾波電容,該第七濾波電容之一端係連接於該第一正路徑且位於該第一繞組以及該第五繞組之間,該第七濾波電容之另一端係連接於該第一負路徑且位於該第三繞組以及該第七繞組之間;以及一第八濾波電容,該第八濾波電容之一端係連接於該第二正路徑且位於該二繞組以及該第六繞組之間,該第八濾波電容之另一端係連接於該第二負路徑且位於該第四繞組以及該第八繞組之間。 The EMI filter of claim 10, further comprising: a seventh filter capacitor, one end of the seventh filter capacitor being connected to the first positive path and located at the first winding and the fifth Between the windings, the other end of the seventh filter capacitor is connected to the first negative path and between the third winding and the seventh winding; and an eighth filter capacitor, one of the eighth filter capacitors is connected The second positive path is located between the second winding and the sixth winding, and the other end of the eighth filter capacitor is connected to the second negative path and between the fourth winding and the eighth winding. 如申請專利範圍第10項所述之電磁干擾濾波器,其更包括: 一第九濾波電容,該第九濾波電容之一端係連接於該第一正路徑且位於該第一繞組以及該五繞組之間,該第九濾波電容之另一端係連接於一共接端;一第十濾波電容,該第十濾波電容之一端係連接於該第一負路徑且位於該第三繞組以及該七繞組之間,該第十濾波電容之另一端係連接於該共接端;一第十一濾波電容,該第十一濾波電容之一端係連接於該第二正路徑且位於該第二繞組以及該第六繞組之間,該第十一濾波電容之另一端係連接於該共接端;以及一第十二濾波電容,該第十二濾波電容之一端係連接於該第二負路徑且位於該第四繞組以及該第八繞組之間,該第十二濾波電容之另一端係連接於該共接端。 The electromagnetic interference filter according to claim 10, further comprising: a ninth filter capacitor, one end of the ninth filter capacitor is connected to the first positive path and located between the first winding and the five windings, and the other end of the ninth filter capacitor is connected to a common terminal; a tenth filter capacitor, one end of the tenth filter capacitor is connected to the first negative path and located between the third winding and the seven windings, and the other end of the tenth filter capacitor is connected to the common terminal; An eleventh filter capacitor, one end of the eleventh filter capacitor is connected to the second positive path and located between the second winding and the sixth winding, and the other end of the eleventh filter capacitor is connected to the And a twelfth filter capacitor, one end of the twelfth filter capacitor is connected to the second negative path and located between the fourth winding and the eighth winding, and the other end of the twelfth filter capacitor Connected to the common terminal. 如申請專利範圍第6項所述之電磁干擾濾波器,其中該第一負路徑係連接於該第二負路徑。 The electromagnetic interference filter of claim 6, wherein the first negative path is connected to the second negative path. 如申請專利範圍第6項所述之電磁干擾濾波器,其更包括:一第一跨接電容,跨接於該第一正路徑以及該第二正路徑之間;以及一第二跨接電容,跨接於該第一負路徑以及該第二負路徑之間。 The electromagnetic interference filter of claim 6, further comprising: a first jumper capacitor connected across the first positive path and the second positive path; and a second jumper capacitor Crossing between the first negative path and the second negative path. 如申請專利範圍第6項所述之電磁干擾濾波器,其中該第一路濾波電路以及該第二路濾波電路更各自具有一瞬態電壓抑制電路,其中該第一路濾波電路之該瞬態電壓抑制器係連接於該第一正路徑以及該第一負路徑之間,該第二路濾波電路之該瞬態電壓抑制器係連接於該第二正路徑以及該第二負路徑之間。 The EMI filter of claim 6, wherein the first filter circuit and the second filter circuit each have a transient voltage suppression circuit, wherein the transient voltage of the first filter circuit The suppressor is connected between the first positive path and the first negative path, and the transient voltage suppressor of the second filter circuit is connected between the second positive path and the second negative path. 如申請專利範圍第16項所述之電磁干擾濾波器,其中每一該瞬態 電壓抑制電路係由串聯連接之兩個瞬態電壓抑制器構成。 An electromagnetic interference filter according to claim 16, wherein each of the transients The voltage suppression circuit consists of two transient voltage suppressors connected in series. 一種扼流器,應用於抑制電磁干擾之一電磁干擾濾波器中,其中該電磁干擾濾波器係具有接收一第一輸入電源之一第一路濾波電路以及接收一第二輸入電源之一第二路濾波電路,該扼流器包含:一第一磁芯組,包括一第一磁芯及一第二磁芯;一第一繞組及一第二繞組,係各自直接纏繞於該第一磁芯上;一第三繞組及一第四繞組,係各自直接纏繞於該第二磁芯上;一第二磁芯組,包括一第三磁芯以及一第四磁芯;一第五繞組及一第六繞組,係各自直接纏繞於該第三磁芯上;以及一第七繞組及一第八繞組,係各自直接纏繞於該第四磁芯上;其中,該第一繞組及該第五繞組係串聯連接,且該第一繞組及該第五繞組係與該第一路濾波電路之一第一正路徑連接,該第二繞組及該第六繞組係串聯連接,且該第二繞組及該第六繞組係與該第二路濾波電路之一第二正路徑連接,該第三繞組及該第七繞組係串聯連接,且該第三繞組及該第七繞組係與該第一路濾波電路之一第一負路徑連接,該第四繞組及該第八繞組係串聯連接,且該第四繞組及該第八繞組係與該第二路濾波電路之一第二負路徑連接。 A choke device for use in an electromagnetic interference filter for suppressing electromagnetic interference, wherein the electromagnetic interference filter has a first path filter circuit for receiving a first input power source and a second input power source for receiving a second input power source The circuit filter circuit includes: a first magnetic core group including a first magnetic core and a second magnetic core; a first winding and a second winding, each of which is directly wound around the first magnetic core a third winding and a fourth winding are each directly wound on the second magnetic core; a second magnetic core group including a third magnetic core and a fourth magnetic core; a fifth winding and a a sixth winding, each of which is directly wound on the third magnetic core; and a seventh winding and an eighth winding, each of which is directly wound on the fourth magnetic core; wherein the first winding and the fifth winding Connected in series, and the first winding and the fifth winding are connected to a first positive path of the first filter circuit, the second winding and the sixth winding are connected in series, and the second winding and the a sixth winding system and one of the second filtering circuits a path connecting, the third winding and the seventh winding are connected in series, and the third winding and the seventh winding are connected to a first negative path of the first path filter circuit, the fourth winding and the eighth The windings are connected in series, and the fourth winding and the eighth winding are connected to a second negative path of the second filtering circuit. 如申請專利範圍第18項所述之扼流器,其更包括四個共同接腳,其中該第一繞組之一端以及該第五繞組之一端、該第二繞組之一 端以及該第六繞組之一端、該第三繞組之一端以及該第七繞組之一端、該第四繞組之一端以及該第八繞組之一端係連接於四個該共同接腳之其中之一對應該共同接腳。 The choke of claim 18, further comprising four common pins, wherein one end of the first winding and one end of the fifth winding, one of the second windings And one end of the sixth winding, one end of the third winding, and one end of the seventh winding, one end of the fourth winding, and one end of the eighth winding are connected to one of the four common pins Should be shared. 如申請專利範圍第19項所述之扼流器,其更包括八個獨立接腳,其中該第一繞組之另一端、該第二繞組之另一端、該第三繞組之另一端、該第四繞組之另一端、該第五繞組之另一端、該第六繞組之另一端、該第七繞組之另一端以及該第八繞組之另一端係分別連接該八個獨立接腳之其中之一對應該獨立接腳。 The choke of claim 19, further comprising eight independent pins, wherein the other end of the first winding, the other end of the second winding, the other end of the third winding, the first The other end of the four windings, the other end of the fifth winding, the other end of the sixth winding, the other end of the seventh winding, and the other end of the eighth winding are respectively connected to one of the eight independent pins It should be independent of the pin.
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CN103368377A (en) * 2013-07-17 2013-10-23 华南理工大学 Preceding-stage EMI filtering protective circuit of driving power source

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