TWI595288B - Display and control method thereof - Google Patents

Description

Display and control method thereof

The present invention relates to a display and a control method thereof, and more particularly to a display for transmitting data by optical communication and a control method thereof.

With the evolution of display technology and process technology, the current trend is to place the drive circuit directly on the glass substrate instead of the drive chip fabricated on the wafer substrate in addition to the display panel. By appropriately selecting the process, the component size can be reduced and the component tolerance can be further improved. On the other hand, by integrating the driving circuit on the glass substrate, the manufacturer can reduce the number of manufacturing processes and reduce the cost of the product.

For the market demand, the user expects nothing more than a display with high resolution and thin border. Although it is currently possible to further enlarge the area of the display area on the glass substrate by the process, and increase the aperture ratio of each pixel unit. However, the process also has its limits. Therefore, manufacturers are not eager to think about new display structures that can improve the resolution while still reducing the frame and reducing the cost.

The present invention provides a display and a control method thereof to reduce the frame and reduce the cost.

The invention provides a display having a control module, a backlight module and a plurality of pixel groups. The backlight module has a plurality of backlight units. Each pixel group has at least one optical channel unit, a light detecting unit and a processing unit. The backlight module is electrically connected to the control module. The processing unit is electrically connected between the at least one optical channel unit and the photo detecting unit. The control module is configured to generate a first modulation signal according to the picture data. Each backlight unit is configured to generate an optical signal according to the first modulation signal. The light detecting unit is configured to receive an optical signal generated by the corresponding backlight unit, and generate a second modulated signal according to the received optical signal. The processing unit is configured to selectively control the transmittance of the at least one optical channel unit according to the second modulation signal.

The present invention provides a control method for a display that is suitable for the display. The control method includes generating a first modulation signal according to the picture data. Controlling, by the first modulation signal, one of the backlight units in the backlight module to generate an optical signal. The corresponding light detecting unit in the pixel group receives the light signal generated by the backlight unit. And generating a second modulation signal according to the received optical signal. And selectively controlling the transmittance of the at least one optical channel unit according to the second modulation signal.

The above description of the disclosure and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.

The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.

Please refer to FIG. 8. FIG. 8 is a schematic structural diagram of a display according to an embodiment of the invention. As shown in FIG. 8, the display 1 includes a control module 11, a backlight module 13, and a display panel DP. The control module 11 is electrically connected to the backlight module 13 . The backlight module 13 has a plurality of backlight units 131. The display panel DP has a plurality of pixel groups 15, and a plurality of pixel groups 15 are arranged in an array. The pixel group 15 is composed, for example, of one or more pixel circuits in a display panel. One of the backlight units 131 corresponds to one of the pixel groups 15. In an embodiment, the number of backlight units 131 is the same as the number of pixel groups 15. In this embodiment, the pixel groups 15 are arranged in an array, and the backlight units 131 are also arranged in an array. An orthographic projection of one of the backlight units 131 on the array in which the pixel groups 15 are arranged is located on one pixel group 15.

1 is a functional block diagram of a display according to an embodiment of the invention. In the embodiment shown in FIG. 1, the louver pixel group 15 is taken as an example, and one of the backlight units 131 is taken as an example for description. The pixel group 15 has at least one optical channel unit 151, a light detecting unit 153, and a processing unit 155.

The control module 11 is configured to generate a first modulation signal M1 according to the input signal Sin. The backlight unit 131 is configured to generate an optical signal according to the first modulation signal M1. The input signal Sin is associated, for example, with a grayscale value of each pixel in at least one frame of the picture. For example, the grayscale value is provided to the control module 11 in the form of a data stream, and the control module 11 generates a first modulation signal according to the received grayscale value data stream. In practice, the first modulation signal may be obtained by arbitrarily modifying the grayscale value data stream, and is not limited herein.

The backlight module 13 drives the backlight unit 131 to generate the optical signal L according to the first modulation signal M1. The backlight unit is, for example, a light emitting diode (LED), and does not limit the type of the light emitting diode. The optical signal L is used as a backlight of the display panel DP, and the optical signal L is more loaded to control the data of the pixel group 15. For details, please refer to the details.

The light detecting unit 153 of each pixel group 15 is configured to receive the light signal L generated by the corresponding backlight unit 131 in the backlight module 13, as shown in FIG. More specifically, only the light detecting unit 153 shown in FIG. 1 receives the light signal L generated by the backlight unit 131 illustrated in FIG. 1, as shown in FIG. The light detecting unit 153 of 15 will respectively receive the optical signal L generated by the corresponding backlight unit 131. The light detecting unit 153 is, for example, a photo diode or another photosensitive circuit. From another point of view, the illumination range of the backlight unit 131 does not exceed the photosensitive surface or the photosensitive range of the light detecting unit 153. In another embodiment, the illumination range of the backlight unit 131 is greater than the photosensitive surface of the light detecting unit 153, but the illumination range of the backlight unit 131 does not cover the photosensitive surface of the other photo detecting unit. In a further embodiment, the light exit angle of the backlight unit 131 is a range that the light detecting unit can receive.

On the other hand, the light detecting unit 153 is configured to generate the second modulated signal M2 according to the received optical signal L. The processing unit 155 is configured to selectively control the light transmittance of the optical channel unit 151 according to the second modulation signal M2. The optical channel unit 151 covers, for example, a pixel circuit and a liquid crystal, but is not limited thereto. In an embodiment, the processing unit 155 is configured to instruct the pixel circuit to selectively control the deflection angle of the liquid crystal according to the second modulation signal M2 to selectively control the luminous flux. From another perspective, the processing unit 155 is configured to selectively control the transmittance of the pixel group 15 according to the second modulation signal M2. The second modulation signal M2 is, for example, an electrical signal generated by the light detecting unit 153 according to the optical signal L. In another embodiment, as previously described, the set of pixels 15 may encompass a plurality of pixels in a display or display panel, that is, the set of pixels 15 has a plurality of optical channel units. At this time, the processing unit 155 is configured to selectively control each optical channel unit according to the second modulation signal M2 to control the transmittance of the pixel group 15.

Referring to FIG. 2, the above components will be more specifically described. FIG. 2 is a functional block diagram of a display according to another embodiment of the present invention. In the embodiment shown in FIG. 2, the control module 11 includes a processor 111, a backlight control unit 113, a modulation unit 115, a synthesizing unit 117, and a memory unit 119. The processor 111 is electrically connected to the backlight control unit 113, the modulation unit 115 and the memory unit 119. The synthesis unit 117 is electrically connected to the backlight control unit 113 and the modulation unit 115.

The processor 111 is configured to generate a backlight control signal BLC and a picture control signal according to the input signal Sin. The backlight control unit 113 generates a pulse width modulation (PWM) signal according to the backlight control signal BLC. The modulation unit 115 is configured to generate a third modulation signal M3 according to the picture control signal IMC. In an embodiment, the modulation unit 115 is, for example, an encoder, and the third modulation signal M3 is an encoded picture control signal. The coding form of the modulation unit 115 is not limited here. In an embodiment, the third modulation signal M3 is loaded with related information of the screen control. In an embodiment, the memory unit 119 is configured to store temporary data during the operation of the processor 111. The memory unit 119 can be a volatile memory or a non-volatile memory.

The synthesizing unit 117 is configured to generate the first modulation signal M1 according to the pulse width modulation signal PWM and the third modulation signal M3. In more detail, the synthesizing unit 117 performs a logical operation on the pulse width modulation signal PWM and the third modulation signal M3 to generate the first modulation signal M1. In an embodiment, the synthesizing unit 117 performs an OR operation on the pulse width modulation signal and the third modulation signal M3 to generate the first modulation signal M1. In another embodiment, the synthesizing unit 117 performs an equivalent addition operation on the pulse width modulation signal and the third modulation signal M3 to generate the first modulation signal M1. From another point of view, the first modulation signal M1 is used to control the backlight module 13 to emit light, and the first modulation signal M1 is further loaded with the picture control information IMC carried by the third modulation signal M3.

Further, the processing unit 155 in the pixel group 15 includes a demodulator 1551, a first controller 1553, and a second controller 1555. The demodulator 1551 is electrically connected to the first controller 1553 and the second controller 1555. The demodulator 1551 is configured to obtain the first modulation signal M1 related information according to the second modulation signal M2, and generate the gate driving signal GD and the data driving signal DD according to the first modulation signal M1. In an embodiment, the demodulator 1551 demodulates the second modulated signal M2 to obtain an equivalent first modulated signal M1, or obtains information of the first modulated signal M1. The equivalent first modulation signal M1 is, for example, a gain or delay first modulation signal M1. The first controller 1553 is configured to selectively turn on the driving path in the pixel group 15 according to the gate driving signal GD. More specifically, as described above, the optical channel unit 151 has, for example, a pixel circuit and a liquid crystal, and the first controller 1553 is configured to selectively turn on the driving path in the pixel circuit according to the gate driving signal GD. The second controller 1555 is configured to selectively control the light transmittance of the pixel group 15 according to the data driving signal DD and via the foregoing driving path. Similarly, the second controller 1555 writes the material drive signal DD to the electrode to which the drive path is connected, for example, via the aforementioned drive path, to change the direction in which the liquid crystal is reversed, thereby changing the light transmittance of the pixel group 15.

Please refer to FIG. 3A and FIG. 3B for a more specific description of the pixel group 15. FIG. 3A is a functional block diagram of one pixel group 15 according to an embodiment of the present invention, and FIG. 3B is based on FIG. A schematic circuit diagram of an optical channel unit 151 according to an embodiment of the invention. In the embodiment shown in FIG. 3A, the first controller 1553 has a DC-to-DC converter 15531 and a gate driver 15532, and the gate driver 15532 receives the gate drive signal GD from the demodulator 1551. The DC-to-DC converter 15531 is electrically connected between the gate driver 15532 and the power source 157. The second controller 1555 has a register 15551, a digital analog converter 15552 and an amplifier 15553. The register 15551 is configured to receive the data driving signal DD from the demodulator 1551. The digital analog converter 15552 is electrically connected to the register. Between 15551 and amplifier 15553. Referring also to the embodiment shown in FIGS. 3A and 3B, the optical channel unit 151 has a thin film transistor T and an equivalent pixel capacitance C. The first end of the thin film transistor T is electrically connected to the equivalent pixel capacitor C. The second end of the thin film transistor T is electrically connected to the amplifier 15553 of the second controller 1555. The gate control terminal of the thin film transistor T is electrically connected to the gate driver 15532 of the first controller 1553.

The DC-DC converter 15531 is configured to adjust the power provided by the power source 157 to the electrical energy conforming to the subsequent circuit specifications, and provide the adjusted power to the gate driver 15532. The gate driver 15532 selectively supplies a driving signal to the gate control terminal of the thin film transistor T according to the gate driving signal GD generated by the demodulator 1551 to selectively turn on the thin film transistor T, thereby turning on the driving as described above. path.

The register 15551 has, for example, a plurality of latches or flip-flops to temporarily store the data drive signal DD provided by the demodulator 1551. The digital analog converter 15552 is configured to convert the data driving signal DD temporarily stored in the register 15551 from a digital format signal into an analog format signal. The amplifier 15553 is, for example, a high gain buffer, and the amplifier 15553 is for amplifying the data driving signal DD of the analog format signal to drive the subsequent circuit and providing buffer time to the optical channel unit 151.

In addition, in the embodiment shown in FIG. 3A, the display 1 further has a power source 157. The power source 157 is electrically connected to the light detecting unit 153 and the first controller 1553. The power source 157 is used to supply power to the light detecting unit 153 and the first A controller 1553.

Referring to FIG. 4, a specific implementation of the demodulator 1551 is illustrated. FIG. 4 is a schematic circuit diagram of a demodulator 1551 according to an embodiment of the invention. As shown in FIG. 4, the demodulator 1551 has a flip-flop 15511, a reverse gate 15512, a reverse gate 15513, a buffer gate 15514, a mutex or gate 15515 and an OR gate 15516. The output end of the flip-flop 15511 is electrically connected to the input end of the inverter 15512, and the output end of the reverse gate 15512 is electrically connected to the input terminal D of the flip-flop 15511 and the first input terminal of the OR gate 15516. The input end of the reverse gate 15513 and the input end of the buffer gate 15514 are configured to receive the aforementioned second modulation signal M2. The output of the reverse gate 15513 and the output of the buffer gate 15514 are respectively connected to the two inputs of the mutex or gate 15515. The output of the mutex or gate 15515 is electrically connected to the input trigger terminal of the flip-flop 15511 and the second input terminal of the OR gate 15516. 4 is labeled with a second modulation signal M2, a signal E1, a signal E2, and a signal E3. In an embodiment, the signal E3 can be used simultaneously as the gate drive signal GD and the data drive signal DD. The subsequent system first explains the generation of the signal E3. Please explain how the signal E3 acts as the gate drive signal GD and the data drive signal DD at the same time.

5 is used to illustrate the relative relationship of the signals in FIG. 4, and FIG. 5 is a timing control diagram of the demodulator 1551 according to FIG. 4 of the present invention. The first modulation signal M1 is further indicated in FIG. 5, and in this embodiment, the first modulation signal M1 is a periodic square wave for explanation. In practice, the first modulation signal M1 may also have other waveforms, and is not limited to the examples. It should be noted that, since there may be a time difference between transmission and reception, in order to avoid misunderstanding, in FIG. 5, the time point corresponding to the first modulation signal M1 is time point T1~T4, and the second modulation signal is indicated. The time points corresponding to M2, signal E1, signal E2 and signal E3 are time points T1'~T4'. Among them, the time points T1 to T4 correspond to the time points T1' to T4', respectively.

Wherein, at the time point T1, the first modulation signal M1 is pulled to a relatively high voltage level, and correspondingly, the second modulation signal M2 is temporarily pulled to the reverse voltage level at the time point T1'. Triggered by the second modulation signal M2, the signal E1 is a relatively high voltage level between the time point T1' and the time point T2', and the signal E2 is a relatively high voltage between the time point T1' and the time point T3'. Level. Wherein between the time point T2' and the time point T3', the signal E1 is a relatively low voltage level. Between time point T3' and time point T4', signal E1 is pulled to a high voltage level. At time point T4, the first modulation signal M1 is pulled to a low voltage level. Therefore, between time point T1' and time point T4', signal E3 is a relatively high voltage level. As shown in FIG. 5, the waveform of the signal E3 corresponds to the waveform of the first modulation signal M1, and the waveform of the first modulation signal M1 is correspondingly restored to complete the demodulation.

Referring to FIG. 6 , an embodiment of the first modulation signal M1 is illustrated. FIG. 6 is a schematic diagram of a first modulation signal M1 packet format according to an embodiment of the invention. In an embodiment, the first modulation signal M1 has at least one packet, wherein the packet is defined as a plurality of fields. As shown in FIG. 6, in the embodiment shown in FIG. 6, the packet F has an initial check field F1, an image start field F2, a drive field F3, and an end check field F4. Among them, the drive field F3 can be redefined as the control field F31 and the data field F32. The order of the control field F31 and the data field F32 is not limited here.

The initial check field F1 is used to indicate the starting point of the packet F. The image start field F2 is used to indicate the position of the section of the partial screen data in the screen data. The interval position is associated with a coordinate position corresponding to the pixel group of the received packet F in the display screen. More specifically, each pixel group 15 corresponds to a partial area on the display screen, or a position, depending on the arrangement of the pixel arrays. As described above, corresponding to the number of pixels covered by the pixel group 15, the local area may also cover one or more pixels. This local area or location can be represented by coordinates or other means. The packet F may be loaded with display data associated with the plurality of pixel groups 15, in other words, the packet F may be loaded with a plurality of partial picture data. Therefore, the image start field F2 is used to indicate the position of the partial picture data corresponding to each pixel group 15 in the packet F, and the demodulator 1551 of each pixel group 15 can be self-packaged according to the location. The corresponding partial picture data is demodulated. In other words, in the case that the packet F is demodulated from the second modulation signal M2 at the same time, each pixel group 15 in the display 1 can obtain a corresponding partial picture from the packet F by the image start field F2. The data is updated synchronously. In another embodiment, each pixel group 15 receives the time-lapse signal to ensure that the update can be performed synchronously if each pixel group 15 does not simultaneously demodulate the packet F.

The drive field F3 is used to carry the drive picture data. In the embodiment corresponding to FIG. 6, the drive field F3 is further defined as the control field F31 and the data field F32. The control field F31 is used to carry the relevant data associated with the gate drive signal GD, and the data field F32 is used to carry the relevant data associated with the data drive signal DD. The end check field F4 is used to indicate the end point of the packet F.

Therefore, as described above, the signal E3 corresponds to the first modulation signal M1. When the demodulator 1551 generates the signal E3, the demodulator 1551 is equivalent to acquiring the fields in the aforementioned packet F. Therefore, in an embodiment, the demodulator 1551 directly uses the signal E3 as the gate drive signal GD and the data drive signal DD. The first controller 1553 and the second controller 1555 respectively obtain the required data according to the fields in the packet F to drive the pixel group 15.

In accordance with the above, the present invention provides a display control method suitable for the display. Please refer to FIG. 7 for description. FIG. 7 is a flowchart of a method for controlling a display according to an embodiment of the invention. As shown in FIG. 7, step S701 of the control method first generates a first modulation signal M1 according to the input signal. Next, in step S703, one of the backlight units 131 in the backlight module 13 is controlled to generate an optical signal L according to the first modulation signal M1. In step S705, the corresponding light detecting unit 153 receives the light signal L generated by the backlight unit 131. In step S707, the second modulation signal M2 is generated according to the received optical signal L. Then, in step S709, the transmittance of the corresponding pixel group 15 is selectively controlled according to the second modulation signal M2.

In addition, in another embodiment, the control method further obtains an update time interval according to the initial check field F1 of the data packet F in the first modulation signal M1. The initial check field F1 is used to indicate the starting point of the packet. And obtain the picture data according to the drive field F3 of the package. The driving field F3 is used to carry the driving picture data, and the driving picture data is associated with the pixel group 15. Then, in the update time interval, the light transmittance of the corresponding pixel group 15 is controlled according to the driving screen data.

In another embodiment, the packet further includes an image start field F2, and the control method further obtains partial picture data in the picture data according to the image start field F2. And controlling the light transmittance of the corresponding pixel group 15 according to the local driving screen data. The image start field F2 is used to indicate the position of the section of the partial screen data in the screen data, and the section position is associated with the coordinate position of the pixel group 15 corresponding to the received packet in the display screen.

In yet another embodiment, the drive field F3 of each package is further defined as a control field F31 and a data field F32. The control method further comprises generating a gate drive signal GD according to the control field F31, and generating a source data drive signal DD according to the data field F32.

In summary, the display and the control method thereof provided by the present invention simultaneously provide a driving signal to the light provided by the backlight module 13 when the light source is provided by the backlight module 13 to make a pair of pixel units. The desired display material is obtained from the optical signal. Thereby, the display can further save the position of the panel which is conventionally used to set the driving wafer, thereby expanding the display area, reducing the peripheral width, and even achieving no border. On the other hand, the components required for optical communication transmission can also be placed on the glass substrate by the current process without adding additional process costs. By transmitting data through optical communication, the equivalent impedance caused by the physical line can be avoided, and the related signal is delayed or distorted.

Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.

1‧‧‧ display
11‧‧‧Control module
111‧‧‧ Processor
113‧‧‧Backlight control unit
115‧‧‧Modulation unit
117‧‧‧Synthesis unit
13‧‧‧Backlight module
131‧‧‧Backlight unit
15‧‧‧ pixel group
151‧‧‧Light channel unit
153‧‧‧Light detection unit
155‧‧‧Processing unit
1551‧‧‧ Demodulator
15511‧‧‧Factor
15512, 15513‧‧‧ reverse gate
15514‧‧‧Breakgate
15515‧‧‧mutual exclusion or gate
15516‧‧‧ or gate
1553‧‧‧First controller
15531‧‧‧DC DC Converter
15532‧‧‧Gate drive
1555‧‧‧second controller
15551‧‧‧Storage register
15552‧‧‧Digital Analog Converter
15553‧‧‧Amplifier
157‧‧‧Power supply
BLC‧‧‧ backlight control signal
IMC screen control signal
C‧‧‧ equivalent pixel capacitance
DD‧‧‧ data drive signal
E1, E2, E3‧‧‧ signals
F‧‧‧Package
F1‧‧‧ initial inspection field
F2‧‧‧Image start field
F3‧‧‧Drive field
F31‧‧‧Control field
F32‧‧‧Information field
F4‧‧‧End inspection field
GD‧‧‧ gate drive signal
L‧‧‧Light signal
M1‧‧‧ first modulation signal
M2‧‧‧second modulation signal
M3‧‧‧ third modulation signal
Sin‧‧‧ input signal
T‧‧‧film transistor
T1~T4, T1'~T4'‧‧‧ time points

FIG. 1 is a functional block diagram of a display according to an embodiment of the invention. 2 is a functional block diagram of a display according to another embodiment of the present invention. FIG. 3A is a functional block diagram of one of the pixel groups according to an embodiment of the invention. FIG. 3B is a schematic circuit diagram of an optical channel unit according to an embodiment of the invention. FIG. 4 is a schematic circuit diagram of a demodulator according to an embodiment of the invention. FIG. 5 is a timing diagram of the demodulator of FIG. 4 according to the present invention. FIG. 6 is a schematic diagram of an optical signal packet format according to an embodiment of the invention. FIG. 7 is a flow chart of a method for controlling a display according to an embodiment of the invention. FIG. 8 is a schematic structural diagram of a display according to an embodiment of the invention.

1‧‧‧ display

11‧‧‧Control module

13‧‧‧Backlight module

131‧‧‧Backlight unit

15‧‧‧ pixel group

151‧‧‧Light channel unit

153‧‧‧Light detection unit

155‧‧‧Processing unit

L‧‧‧Light signal

M1‧‧‧First Modulation Unit

M2‧‧‧Second Modulation Unit

Claims (10)

A display module includes: a control module for generating a first modulated signal according to a picture data; a backlight module electrically connected to the control module, the backlight module comprising a plurality of backlight units, each of the The backlight unit is configured to generate an optical signal according to the first modulation signal; and a plurality of pixel groups, each of the pixel groups includes: at least one optical channel unit; and a light detecting unit configured to receive a corresponding backlight The optical signal generated by the unit generates a second modulated signal according to the received optical signal; and a processing unit electrically connected between the at least one optical channel unit and the light detecting unit, the processing The unit is configured to selectively control the transmittance of the at least one optical channel unit according to the second modulation signal. The display of claim 1, wherein the number of the at least one optical channel unit of each of the pixel groups is one. The display device of claim 2, wherein the illumination range of the corresponding backlight unit falls within a light-sensing range of the corresponding light detecting unit. The display module of claim 1, wherein the control module further comprises: a processor for generating a backlight control signal and a picture control signal according to an input signal; a backlight control unit electrically connected to the processor, The backlight control unit generates a pulse width modulation signal according to the backlight control signal, wherein the pulse width modulation signal is used to control the backlight units in the backlight module to selectively emit light; Generating a third modulation signal according to the picture control signal; and a synthesizing unit electrically connecting the backlight control unit and the modulation unit, wherein the synthesizing unit is configured to adjust the signal according to the pulse width and the third modulation The signal produces the first modulated signal. The display of claim 4, wherein the synthesizing unit multiplies the pulse width modulation signal and the third modulation signal to generate the first modulation signal. The display device of claim 1, wherein the processing unit further comprises: a demodulator electrically connected to the light detecting unit, configured to obtain the first modulated signal according to the second modulated signal, and according to the The first modulation signal generates a gate driving signal and a data driving signal; a first controller is electrically connected to the demodulator for selectively turning on a driving path in the pixel group according to the gate driving signal And a second controller electrically connected to the demodulator for selectively controlling the light transmittance of the at least one optical channel unit according to the data driving signal and the driving path. A display control method is applicable to the display device according to any one of claims 1 to 6, the method comprising: generating a first modulation signal according to a picture data; controlling the backlight module according to the first modulation signal One of the backlight units generates an optical signal; the corresponding photo detecting unit in the pixel group receives the optical signal generated by the backlight unit; and generates a second modulated signal according to the received optical signal; Transmitting the transmittance of the at least one optical channel unit according to the second modulation signal. The control method of claim 7, further comprising: obtaining an update time interval according to an initial check field of a data packet in the first modulation signal, where the initial check field is used to indicate a starting point of the packet Obtaining the picture data according to a driving field of the packet, where the driving field is used to carry the picture data, the picture data is associated with the pixel groups; and in the updating time interval, controlling the picture according to the picture data Light transmittance of at least one pixel group. The control method of claim 8, wherein the packet further comprises an image start field, the control method comprising: obtaining a partial picture data in the picture data according to the image start field; and according to the partial picture The data is used to control the transmittance of the at least one pixel group; wherein the image start field is used to indicate a position of the partial picture data in the picture data, and the interval position is associated with the corresponding packet received. The pixel group is at a target position in the display screen. The control method of claim 8, wherein the driving field of each of the packets is further defined as a control field and a data field.