TWI590315B - The structure of the electrode, the constituent material and the manufacturing method thereof - Google Patents

The structure of the electrode, the constituent material and the manufacturing method thereof Download PDF

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TWI590315B
TWI590315B TW102126204A TW102126204A TWI590315B TW I590315 B TWI590315 B TW I590315B TW 102126204 A TW102126204 A TW 102126204A TW 102126204 A TW102126204 A TW 102126204A TW I590315 B TWI590315 B TW I590315B
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conductive
electrode
conductor
fine particles
particles
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TW201505083A (en
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Manabu Bonkohara
Hirofumi Nakamura
Qiwei He
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Zycube Co Ltd
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Description

電極的構造,構成材料及其製造方法 Electrode structure, constituent material and manufacturing method thereof

本發明係關於適用於半導體晶片之三維積層的貫穿或內嵌電極(以下,分別稱為「貫穿電極」或「內嵌電極」。有時統稱為「貫穿/內嵌電極」)。 The present invention relates to a through or embedded electrode (hereinafter referred to as "through electrode" or "embedded electrode", respectively referred to as a "through electrode" or "embedded electrode"), which is applied to a three-dimensional layer of a semiconductor wafer.

若進而言之,本發明係關於形成在基板之開孔內的貫穿/內嵌電極(以下,將包括基板及貫穿/內嵌電極在內之構造,統稱為「電極結構」)、形成該電極之材料及其製造方法。 In other words, the present invention relates to a through/embedded electrode (hereinafter, a structure including a substrate and a through/embedded electrode, collectively referred to as an "electrode structure") formed in an opening of a substrate, and the electrode is formed. Materials and methods of manufacture thereof.

作為將貫穿電極形成在半導體晶片三維積層技術所需之基板上的開孔內部的方法,習知主要有下列三種,然而均各有如下缺點,故而於實用中仍存在問題。 As a method of forming the through electrodes inside the openings on the substrate required for the three-dimensional layering technique of the semiconductor wafer, there are three main types, but each has the following disadvantages, and thus there are still problems in practical use.

第一個方法係液相沉積法的代表例,「保形鍍銅法」。該方法使用無電解電鍍液,可於電極孔內壁形成質地緻密之銅鍍層。此時,鍍層僅覆蓋於整個開孔內壁,而開孔內部並沒有被完全填滿。其雖為於量產利用之技術,但因貫穿電極一側之端面會產生凹陷,故於配線對準步驟中,需使用大於貫穿電極之直徑的接線圖案。因此,藉由此方法形成之貫穿電極,難以進行高密度之配線。 The first method is a representative example of the liquid deposition method, "conformal copper plating method". The method uses an electroless plating solution to form a dense copper plating layer on the inner wall of the electrode hole. At this time, the plating layer covers only the entire inner wall of the opening, and the inside of the opening is not completely filled. Although it is a technique for mass production, a recess is formed in the end surface penetrating the electrode side, so in the wiring alignment step, a wiring pattern larger than the diameter of the through electrode is used. Therefore, it is difficult to perform high-density wiring by the through electrode formed by this method.

第二個方法係銅金屬填充法。該方法作為氣相成長之典型例,不僅需用昂貴的離子化濺鍍裝置或金屬CVD等裝置,處理時間亦長,結果而言使得製造成本提高。再者,貫穿電極整體為質地緻密的銅,故而貫穿電極之 彈性模量大,而且,與半導體基板(如矽晶圓)比較,由於熱膨脹係數差大,故會因加工步驟之溫度循環等之熱衝擊而產生過高的內部應力。其結果,有可能使半導體基板發生龜裂。 The second method is the copper metal filling method. As a typical example of vapor phase growth, this method requires not only an expensive ion plating apparatus or a metal CVD apparatus but also a long processing time, and as a result, the manufacturing cost is increased. Furthermore, the entire through-electrode is a densely dense copper, so the through electrode The modulus of elasticity is large, and compared with a semiconductor substrate (for example, a germanium wafer), since the difference in thermal expansion coefficient is large, excessive internal stress is generated due to thermal shock such as temperature cycle of the processing step. As a result, there is a possibility that the semiconductor substrate is cracked.

第三個方法係導電性金屬膏填充法。該方法由於使用單體作為金屬膏之稀釋劑,故乾燥後之有機殘留物多,貫穿電極之電阻大。該影響不僅限制了電路設計,亦造成電氣特性之不穩定。 The third method is a conductive metal paste filling method. In this method, since a monomer is used as a diluent for the metal paste, the organic residue after drying is large, and the electric resistance of the through electrode is large. This effect not only limits the circuit design, but also causes instability in electrical characteristics.

上述三個方法已有大量的改良案。以上述填充法的改良案較多。 There have been a number of improvements in the above three methods. There are many improvements in the above filling method.

例如,在專利文獻1提出有藉由壓力和過濾器,將金屬顆粒之懸浮液堆積於開孔的方法。圖4係專利文獻1之圖1。在同圖中,具有貫通孔102之基板101被配置於濾網140之上部。130係金屬微粒的懸浮液。藉由活塞120推動,將金屬微粒之懸浮液130擠入貫通孔102之內部而堆積。若取出基板101並乾燥後,再次於貫通孔102之內部填充導電性膏並使其硬化,則會形成貫通電極。此法藉由二次堆積金屬成分,提高貫通電極之金屬比例,有助於改善貫通電極之導電性。 For example, Patent Document 1 proposes a method of depositing a suspension of metal particles in an opening by a pressure and a filter. 4 is a diagram 1 of Patent Document 1. In the same figure, the substrate 101 having the through holes 102 is disposed on the upper portion of the screen 140. A suspension of 130 series metal particles. The suspension of the metal fine particles 130 is pushed into the through hole 102 by the push of the piston 120 to be deposited. After the substrate 101 is taken out and dried, the conductive paste is filled again inside the through hole 102 and cured, and a through electrode is formed. This method improves the conductivity of the through electrode by increasing the metal ratio of the through electrode by secondary deposition of the metal component.

在專利文獻2中提出有下述方法:一邊使用刮片對金屬膏施以振動一邊塗佈,同時在晶圓基板之反側施以負壓,使金屬膏沉積於開孔,然後進行燒結。圖5係專利文獻2之圖1。該法藉由提高金屬膏之填充密度,來確保貫通電極之導電性。 Patent Document 2 proposes a method in which a metal paste is applied while vibrating using a doctor blade, and a negative pressure is applied to the opposite side of the wafer substrate to deposit a metal paste on the opening, followed by sintering. Fig. 5 is a diagram 1 of Patent Document 2. This method ensures the conductivity of the through electrode by increasing the packing density of the metal paste.

在專利文獻3中提出一種在塗佈少量之金屬膏後,在真空環境施加熱與高速振動,使熔融金屬貫流,使之沉積的方法。 Patent Document 3 proposes a method of applying heat and high-speed vibration in a vacuum environment after applying a small amount of metal paste to cause a molten metal to flow and deposit it.

文獻1至3之方法,都實現了各自之目標,但若總括地考慮到加工步驟對既有電路圖案造成之傷害、輔助材(支撐玻璃基板等)之裝卸、半導 體裝置之構裝的全體步驟,則於實用上會具有障礙。 The methods of Documents 1 to 3 achieve their respective goals, but if the processing steps are taken into account for the damage caused by the existing circuit pattern, the loading and unloading of the auxiliary material (supporting the glass substrate, etc.), semi-conducting The overall steps of the assembly of the body device can be practically cumbersome.

【先前技術文獻】[Previous Technical Literature] 〔專利文獻〕 [Patent Document]

專利文獻1:日本特開2011-054907號公報 Patent Document 1: Japanese Patent Publication No. 2011-054907

專利文獻2:日本特開2011-071153號公報 Patent Document 2: JP-A-2011-071153

專利文獻3:日本特開2009-277927號公報 Patent Document 3: Japanese Laid-Open Patent Publication No. 2009-277927

對貫穿電極而言,要達成製品性能之高度化及其品質保證時的最大課題如下:加工步驟之變溫循環中,起因於材料間之熱膨脹係數差產生的龜裂,而使可靠性下降;及起因於電極構成材料之導電率而使訊號傳遞特性下降。 For the through-electrode, the biggest problem in achieving product performance and quality assurance is as follows: in the temperature-changing cycle of the processing step, the crack due to the difference in thermal expansion coefficient between the materials causes the reliability to decrease; The signal transmission characteristics are degraded due to the conductivity of the electrode constituent material.

另外,隨著半導體製造技術之微細化,亦應考慮要求更高密度之配置。因此,即使縮小貫通電極之尺寸,亦需要與縮小前同等之訊號傳遞特性及可靠性。 In addition, with the miniaturization of semiconductor manufacturing technology, higher density configurations should also be considered. Therefore, even if the size of the through electrode is reduced, the same signal transmission characteristics and reliability as before reduction are required.

本發明係考慮了上述情形而完成者,其目的在於提供一種因應半導體製造技術之微細化,可更高密度地配置之低阻抗及高可靠性的貫穿/內嵌電極與其製造方法。 The present invention has been made in view of the above circumstances, and an object thereof is to provide a low-impedance and high-reliability through/insertion electrode which can be disposed at a higher density in accordance with the miniaturization of a semiconductor manufacturing technique, and a method of manufacturing the same.

在此未明確說明之本發明之其他目的,藉由下述說明和附圖將變得明確。 Other objects of the invention, which are not explicitly described herein, will be apparent from the following description and drawings.

為了實現上述目的,本發明著眼於多孔質體之彈性模量和強度與開孔率成反比,及多孔質體之(含浸)非完全取代型固溶體的力學特性大致與多孔質體相同,並且,考慮貫穿/內嵌電極之通過電流為高頻電流。 In order to achieve the above object, the present invention focuses on the fact that the elastic modulus and strength of the porous body are inversely proportional to the opening ratio, and the mechanical properties of the (impregnated) non-completely substituted solid solution of the porous body are substantially the same as those of the porous body. Also, it is considered that the passing current of the through/embedded electrodes is a high frequency current.

本發明之貫穿/內嵌電極,係具備有下述導電體而成:燒結第1導電材而形成之多孔質第1導電體(多孔質燒結體);及含有與該第1導電材相異之第2導電材,且被填充、固化於該第1導電體之空隙部的第2導電體。 The through/embedded electrode of the present invention includes a conductive first body (a porous sintered body) formed by sintering a first conductive material, and a different one from the first conductive material. The second conductive material is filled and solidified in the second conductor of the first conductive body.

本發明之貫穿/內嵌電極,由於具有上述結構,故可得到能因應半導體製造技術之微細化而可更高密度地配置之低阻抗且高可靠性的貫穿電極或內嵌電極。 Since the through/embedded electrode of the present invention has the above-described configuration, it is possible to obtain a low-impedance and high-reliability through-electrode or embedded electrode which can be disposed at a higher density in accordance with the miniaturization of the semiconductor manufacturing technique.

本發明之貫穿/內嵌電極之較佳例,係含有填充在上述空隙部之上述第2導體的上述第1導體為非完全取代型固溶體。 In a preferred embodiment of the through/insertion electrode of the present invention, the first conductor including the second conductor filled in the void portion is a non-completely substituted solid solution.

本發明之貫穿/內嵌電極之製造方法,係一種在基板上之開孔內形成貫穿/內嵌電極的方法,其特徵在於:具有下述步驟:藉由燒結膏狀之第1導電材,而形成多孔質第1導電體的步驟;及將與該第1導電材不同之第2導電材填充並固化於該第1導體的空隙,形成第2導電體的步驟,含有填充於該間隙之該第2導電體的該第1導電體,構成貫穿/內嵌電極。 The method for manufacturing a through/embedded electrode of the present invention is a method for forming a through/embedded electrode in an opening in a substrate, characterized in that the method comprises the steps of: sintering a first conductive material in a paste form, a step of forming a porous first conductor; and a step of filling and solidifying the second conductive material different from the first conductive material in the gap of the first conductor to form a second conductor, and filling the gap The first conductor of the second conductor constitutes a through/embedded electrode.

本發明之貫穿/內嵌電極之製造方法,由於包含上述步驟,故能以低成本形成因應半導體製造技術之微細化而可更高密度地配置之低阻抗且高可靠性的貫穿電極或內嵌電極。 Since the method for manufacturing the through/insertion electrode of the present invention includes the above steps, it is possible to form a low-impedance and high-reliability through-electrode or in-line which can be disposed at a higher density in accordance with the miniaturization of the semiconductor manufacturing technology at a low cost. electrode.

上述燒結第1導電材之步驟,較佳使用低熔點燒結處理。 The step of sintering the first conductive material is preferably a low melting point sintering treatment.

上述「基板」若為具有可配置貫穿/內嵌電極之開孔的板即可。例如 已經積集有大量元件之矽晶圓;或作為元件電連接中介之素板;或佈有配線圖案之板。「基板」之材質可為任意,例如可以是矽、或化合物半導體、樹脂、陶瓷、玻璃等。 The above-mentioned "substrate" may be a plate having an opening through which the through/embedded electrode can be disposed. E.g A wafer that has accumulated a large number of components; or a plain board that is electrically connected as a component; or a board that has a wiring pattern. The material of the "substrate" may be any, and may be, for example, a germanium, a compound semiconductor, a resin, a ceramic, a glass, or the like.

前述之「貫穿/內嵌電極」,有下述三種形態:如圖1B(k)所示,為了使形成於基板兩面的元件或電配線圖案相互電連接,而於其厚度方向貫穿基板,而以連接端子的形態從基板兩側露出(貫通電極);及如圖2B(k)所示,以接線端子的形態露出於基板其中一面,於基板之另一面則與內部配線連接(內嵌電極);及如圖3(B)、(c)、(d)所示,以連接端子的形態露出於基板其中一面,於基板之另一面則與多個內部配線連接(內嵌電極)。 The above-mentioned "through/embedded electrode" has the following three forms: as shown in FIG. 1B(k), in order to electrically connect the elements or the electric wiring patterns formed on both surfaces of the substrate to each other, the substrate penetrates the substrate in the thickness direction thereof. It is exposed from both sides of the substrate in the form of a connection terminal (through electrode); and as shown in FIG. 2B(k), it is exposed on one side of the substrate in the form of a terminal, and is connected to the internal wiring on the other side of the substrate (embedded electrode) And as shown in FIGS. 3(B), (c), and (d), one side of the substrate is exposed in the form of a connection terminal, and the other side of the substrate is connected to a plurality of internal wirings (embedded electrodes).

上述之「開孔」是從基板其中一主面(例如第1主面),朝基板之另一主面(例如第2主面)延伸,於內部埋設有貫穿電極之孔。有貫穿基板與沒有貫穿基板之兩種情形。開孔的剖面以圓形居多,但不受限於此。基於電連接之理由,「開孔」之內壁必須為絕緣性。當基板材質為導電性之情形時(例如矽),由於「開孔」之內壁亦為導電性,故需要於該內壁構築絕緣層。 The above-mentioned "opening" extends from one main surface (for example, the first main surface) of the substrate toward the other main surface (for example, the second main surface) of the substrate, and a hole penetrating the electrode is buried therein. There are two cases of penetrating the substrate and not penetrating the substrate. The cross section of the opening is mostly circular, but is not limited thereto. For the purpose of electrical connection, the inner wall of the "opening" must be insulating. When the material of the substrate is electrically conductive (for example, 矽), since the inner wall of the "opening" is also electrically conductive, it is necessary to construct an insulating layer on the inner wall.

上述「膏」,是指將作為固體成分之導電性微粒分散於分散液(溶劑)之中,藉此而生成之黏性懸浮液。較佳為使所使用之分散液(溶劑)揮發(氣化)後不會產生有機殘留物者。亦可含有甲酸、羧酸之COOH系之酸、或松脂蠟(松脂)等用以保持導電性微粒表面之活性的還原劑。 The above-mentioned "paste" refers to a viscous suspension which is obtained by dispersing conductive fine particles as a solid component in a dispersion (solvent). It is preferred that the organic solvent is not generated after volatilization (gasification) of the dispersion (solvent) used. It may also contain a reducing agent such as formic acid, a COOH acid of a carboxylic acid, or a rosin wax (rosin) to maintain the activity of the surface of the conductive fine particles.

作為分散液(溶劑),可較佳地使用:乙二醇、丁醇、醇酯等之多元醇;或萜品醇、松香油、丁卡必醇乙酸酯、丁卡必醇、卡必醇、四氯乙烯等。此等之分散液(溶劑)具有下述優點:對阻劑之攻擊性低,且由於會在較低溫度(未達50℃)揮發,故容易在塗佈後乾燥。在該等分散液(溶劑) 中,多元醇因可在室溫~100℃左右乾燥,故為特佳。 As the dispersion (solvent), a polyol such as ethylene glycol, butanol or an alcohol ester can be preferably used; or terpineol, rosin oil, tetracaine alcohol acetate, tetracaine alcohol, and carbene Alcohol, tetrachloroethylene, etc. These dispersions (solvents) have the following advantages: low aggression to the resist, and easy to dry after coating because they volatilize at a lower temperature (less than 50 ° C). In the dispersion (solvent) Among them, the polyol is particularly preferred because it can be dried at room temperature to about 100 ° C.

上述「第1導電材」係將導電性被膜(skin)被覆在由金屬、合金、金屬化合物或半導體微粒、或者有機系或無機系材料構成之核(core)而形成的微粒,或者由其等兩者構成。其粒徑約為0.3~10μm。例如,即使實際粒徑在0.1μm以下,由於亦會因靜電等而發生凝聚,故多約為0.3~10μm。 The "first conductive material" is a fine particle formed by coating a conductive film on a core composed of a metal, an alloy, a metal compound, or a semiconductor fine particle or an organic or inorganic material, or the like. Both constitute. Its particle size is about 0.3 to 10 μm. For example, even if the actual particle diameter is 0.1 μm or less, it is agglomerated by static electricity or the like, and is usually about 0.3 to 10 μm.

可適合用作第一導電材之材料,例如具有下述者,但本發明並不限定於此。 It can be suitably used as a material of the first conductive material, for example, the following, but the present invention is not limited thereto.

作為金屬,有鎢、鉬、鉻、銦、錫、金、銀等。 As the metal, there are tungsten, molybdenum, chromium, indium, tin, gold, silver, and the like.

作為金屬化合物,有以上述金屬(鎢等)為構成成分之化合物。由於構成成分之比例有許多種,並非「化合物」,故也可稱之為「混合物」。 As the metal compound, there is a compound containing the above metal (tungsten or the like) as a constituent component. Since there are many kinds of constituents and they are not "compounds", they can also be called "mixtures".

作為半導體,有矽、鍺、化合物半導體、碳化矽、碳等。 As the semiconductor, there are ruthenium, osmium, compound semiconductor, ruthenium carbide, carbon, and the like.

作為將導電性被膜(skin)被覆於由有機材料構成之核(core)而形成的微粒,有於由樹脂材料等構成之核的表面鍍敷銦、金、銀、鉑、錫等之金屬被膜(skin)的導電性微粒。 As a fine particle formed by coating a conductive film on a core made of an organic material, a metal film such as indium, gold, silver, platinum, or tin is plated on the surface of a core made of a resin material or the like. (Skin) conductive particles.

作為將導電性被膜(skin)被覆於由無機材料構成之核(core)而形成之微粒,有藉由鍍敷等將任意導電性被膜(skin)被覆在由金屬;矽、鍺等之半導體;碳化矽;碳系材料;類金剛石之物質;氮化矽;氮化鋁;硼矽玻璃;氮化硼陶瓷等構成之核(core)的導電性微粒。 As a fine particle formed by coating a conductive film on a core made of an inorganic material, any conductive film is coated on a metal such as a metal or a germanium or a germanium by plating or the like; Carbonized material; carbon-based material; diamond-like substance; tantalum nitride; aluminum nitride; borosilicate glass; boron nitride ceramics and other core conductive particles.

作為導電性被膜(skin),可適合使用:銦、銦合金、鎳-金、金、銀、銅、鉑、錫、鋅、鉍、鎵、鎘、鈦、鉭等。 As the conductive film, indium, indium alloy, nickel-gold, gold, silver, copper, platinum, tin, zinc, antimony, gallium, cadmium, titanium, antimony or the like can be suitably used.

當第1導電材含有將導電性被膜(skin)被覆於由無機材料構成之核(core)而形成的導電性微粒時,該導電性微粒,例如較佳使核(core)為 鎢,導電性被膜(skin)為銦、錫、銅、貴金屬類(金、銀、鉑等)中之至少一種。 When the first conductive material contains conductive fine particles formed by coating a conductive film on a core made of an inorganic material, the conductive fine particles preferably have a core. The tungsten or the conductive film is at least one of indium, tin, copper, and a noble metal (gold, silver, platinum, or the like).

在將導電性被膜(skin)被覆於核(core)而形成之導電性微粒的情形時,為了增加核(core)與導電性被膜(skin)之間的剝離強度,可於核(core)之表面設置由銅、鎳、鈦、鉭等金屬(該等為具有障壁性之金屬)之任一者、或組合該等中之至少兩者構成的中間被覆層,亦可於其上被覆導電性被膜(skin)。另外,藉由該中間被覆層,亦可降低核(core)之電阻等,改善電特性。 In the case where the conductive film is coated on the conductive particles formed by the core, in order to increase the peeling strength between the core and the conductive film, it is possible to be in the core. The surface may be provided with any one of a metal such as copper, nickel, titanium or tantalum (the metal having barrier properties) or an intermediate coating layer composed of at least two of the above, and may be coated with conductivity thereon. Skin. Further, by the intermediate coating layer, the resistance of the core or the like can be lowered to improve electrical characteristics.

作為選定第1導電材時之基準,必須考慮以下3點: As a benchmark for selecting the first conductive material, the following three points must be considered:

(1)為了確保良好之可靠性,第1導電材與基板之熱膨脹係數差要小,多孔燒結體與基板之熱膨脹係數最好不超過3倍。此限定係為了確保含有第1導電材之半導體元件基板曝露於高溫環境時,不會因與該基板之熱膨脹係數差產生的內應力而損壞該基板。 (1) In order to ensure good reliability, the difference in thermal expansion coefficient between the first conductive material and the substrate is small, and the thermal expansion coefficient of the porous sintered body and the substrate is preferably not more than three times. In order to ensure that the semiconductor element substrate including the first conductive material is exposed to a high temperature environment, the substrate is not damaged by internal stress caused by a difference in thermal expansion coefficient of the substrate.

(2)為了確保良好之訊號傳遞特性,第1導電材較佳為電阻小者。 (2) In order to ensure good signal transmission characteristics, the first conductive material is preferably a small resistor.

(3)將燒結(擴散結合)溫度設為300℃以下。若考慮到形成有貫穿/內嵌電極之基板的大部分係積集有大量元件的矽晶圓,則為了不使周邊之元件電路受損,燒結(擴散結合)溫度必須低於積集電路製造處理中之最高溫度。 (3) The sintering (diffusion bonding) temperature is set to 300 ° C or lower. Considering that most of the substrate on which the through/insertion electrode is formed is a germanium wafer in which a large number of components are accumulated, the sintering (diffusion bonding) temperature must be lower than that of the integrated circuit manufacturing in order not to damage the peripheral component circuit. The highest temperature in the process.

上述「第2導電材」係由低熔點之金屬、合金、半導體之中的至少一種微粒構成。第2導電材之材質必須異於第1導電材。第2導電材之粒徑較佳小於第1導電材之粒徑。較佳將第2導電材之熔點設為不超過第1導電材之燒結溫度、或其燒結合金部(燒結體)的熔融溫度。 The "second conductive material" is composed of at least one of a low melting point metal, an alloy, and a semiconductor. The material of the second conductive material must be different from the first conductive material. The particle diameter of the second conductive material is preferably smaller than the particle diameter of the first conductive material. The melting point of the second conductive material is preferably not more than the sintering temperature of the first conductive material or the melting temperature of the sintered alloy portion (sintered body).

作為第2導電材之較佳例,有銦系合金、錫系合金(錫銀、金錫等)、鉍系合金(錫、鉍等)、鎵系合金、鋅系合金、焊料類等之低熔點金屬系之合金、或為合金率0%之低熔點金屬之銦、錫、鎵、鉍等。表1顯示其典型之摻合例,但本發明不受此等摻合例之限定。 Preferred examples of the second conductive material include low indium alloys, tin alloys (tin silver, gold tin, etc.), bismuth alloys (such as tin and antimony), gallium alloys, zinc alloys, and solders. An alloy of a melting point metal or an indium, tin, gallium, antimony or the like of a low melting point metal having an alloy ratio of 0%. Table 1 shows typical blending examples, but the invention is not limited by such blending examples.

作為塗佈上述膏之方法,由於可使用公知之方法,故省略其說明。然而,需注意提高膏之填充速度或預防孔隙產生等。 As a method of applying the above-mentioned paste, a known method can be used, and the description thereof will be omitted. However, care should be taken to increase the filling speed of the paste or to prevent the generation of pores.

上述「低溫燒結處理」,通常,若為不超過300℃之低溫熱處理即可。利用加熱將膏之液體成分氣化,藉由氫氮混合氣體(forming gas)等還原性氣體環境、或膏所含之甲酸、羧酸等「COOH系之酸」、松脂蠟(松脂)等之還原劑,使在被活化之膏的固體成分亦即微粒彼此局部接觸之部分(接觸部)的周邊發生擴散接合,故而形成(燒結)多孔質之第1導電體。 The above-mentioned "low-temperature sintering treatment" is usually a low-temperature heat treatment which does not exceed 300 °C. The liquid component of the paste is vaporized by heating, and is a reducing gas atmosphere such as a hydrogen-nitrogen mixed gas or a formic acid or a carboxylic acid such as a "COOH-based acid" or a rosin wax (rosin). The reducing agent is diffusion-bonded to the periphery of the portion (contact portion) where the solid components of the activated paste, that is, the particles are partially in contact with each other, so that the porous first conductor is formed (sintered).

此時,擴散結合之溫度,遠低於膏之固體成分亦即微粒(或微粒之導電性被膜(skin))的熔點溫度。 At this time, the temperature of diffusion bonding is much lower than the melting point temperature of the solid component of the paste, that is, the fine particles (or the conductive skin of the fine particles).

若適當組合不同之金屬來構成膏之固體成分亦即微粒(或微粒之導電性被膜(skin)),則可使經擴散結合生成之合金的熔點溫度遠高於燒結溫度。此於後續步驟之處理中,是非常有利的現象。 If a different metal is appropriately combined to form a solid component of the paste, that is, a fine particle (or a conductive skin of the fine particle), the melting temperature of the alloy formed by diffusion bonding can be made much higher than the sintering temperature. This is a very advantageous phenomenon in the processing of subsequent steps.

多孔質燒結體中之空隙的大小與空隙之占有率,取決於作為固體成分之微粒的大小或外形等。藉由在該空隙含浸第2導電材並固化,可得到貫穿電極或內嵌電極。 The size of the voids in the porous sintered body and the occupation ratio of the voids depend on the size or shape of the fine particles as a solid component. The through electrode or the embedded electrode can be obtained by impregnating the second conductive material in the void and curing.

作為上述「含浸」之方法,例如有將含有第2導電材之膏於基板上塗佈、滲透在多孔質的第1導電體上,然後經熱處理溶化第2導電材的方法。以此方式,由於第2導電材會沉積、再固化於第1導電體之空隙,故可得到上述之「第2導電體」。 As a method of the above-mentioned "impregnation", for example, a method in which a paste containing a second conductive material is applied onto a substrate, permeated on a porous first conductor, and then a second conductive material is melted by heat treatment. In this way, since the second conductive material is deposited and resolidified in the gap of the first conductor, the above-mentioned "second conductor" can be obtained.

於第2導電材之熔點低的情形,亦可用塗佈機械將第2導電材溶化,在真空環境或還原性環境或非活性氣體環境,將其塗佈、滲透於經預熱之基板上的多孔質之第1導電體上後,藉由冷卻而得到第2導電體。 When the melting point of the second conductive material is low, the second conductive material may be melted by a coating machine, and coated and infiltrated on the preheated substrate in a vacuum environment, a reducing environment, or an inert gas atmosphere. After the porous first conductor is cooled, the second conductor is obtained by cooling.

本發明之貫穿/內嵌電極,較佳為第1導電體之成分體積比大於第2導電體之成分體積比。此係為了將第1導電體之力學特性作為貫穿/內嵌電極之力學特性加以保持。 In the through/embedded electrode of the present invention, it is preferable that the component volume ratio of the first conductor is larger than the component volume ratio of the second conductor. This is to maintain the mechanical properties of the first conductor as the mechanical properties of the through/embedded electrodes.

本發明之貫穿/內嵌電極之形成步驟中,與形成在基板上之元件或配線圖案的電連接,會因基板之材質與元件或配線圖案配置之複雜度而變化,但由於此等為公知,故在此就省略說明。 In the step of forming the through/embedded electrode of the present invention, the electrical connection with the element or the wiring pattern formed on the substrate varies depending on the material of the substrate and the complexity of the arrangement of the element or the wiring pattern, but it is known Therefore, the description is omitted here.

省略複雜的外部因素,基本之貫穿/內嵌電極的形成步驟,大致為如下(1)~(7)之步驟: The complicated external factors are omitted, and the steps of forming the basic through/embedded electrodes are roughly as follows (1) to (7):

(1)自基板其中一面(第1主面)的開孔步驟。 (1) A step of opening from one side (first main surface) of the substrate.

(2)於開孔之內壁形成絕緣層的步驟。 (2) A step of forming an insulating layer on the inner wall of the opening.

(3)將固體成分為第1導電材之膏塗佈於開孔,並堆積、填充的步驟。 (3) A step of applying a paste having a solid content of the first conductive material to the opening, and depositing and filling.

(4)低溫燒結處理步驟。 (4) Low temperature sintering treatment step.

(5)將固體成分為第2導電材之膏(或第2導電材之熔融液)塗佈、堆積於多孔質之第1導電體上的步驟。 (5) A step of applying a solid component as a paste of the second conductive material (or a melt of the second conductive material) to the porous first conductor.

(6)熔融、含浸第2導電材的步驟。 (6) A step of melting and impregnating the second conductive material.

(7)對基板之第1主面或第2主面、或者第1主面與第2主面兩者進行平滑化的步驟。 (7) A step of smoothing the first main surface or the second main surface of the substrate or both the first main surface and the second main surface.

在此等7個步驟中,當基板是樹脂或陶瓷之情形時,則可省略上述步驟(2)。 In the seven steps, when the substrate is a resin or a ceramic, the above step (2) may be omitted.

為了得到必要之固體成分的堆積量,有時亦必須反覆實施數次上述步驟(3)。又,為了促進固體成分的堆積,有時亦會一邊對基板施以預熱一邊實施。 In order to obtain the required amount of solid content, it is necessary to repeat the above step (3) several times. Further, in order to promote the deposition of the solid component, the substrate may be preheated.

上述步驟(4),處理溫度可配合第1導電材之成分構成來設定。有時亦會視需要,而於氫氮混合氣體等還原性環境、或氮氣或氬氣等非活性氣體環境中實施。 In the above step (4), the treatment temperature can be set in accordance with the composition of the first conductive material. In some cases, it may be carried out in a reducing environment such as a hydrogen-nitrogen mixed gas or an inert gas atmosphere such as nitrogen or argon.

與上述步驟(3)同樣地,有時亦會反覆實施數次上述步驟(5)。當塗佈物為金屬熔融液之情形時,預料需要真空環境或具有弱還原性之混合環境。 Similarly to the above step (3), the above step (5) may be repeated several times. When the coating is a molten metal, it is expected that a vacuum environment or a mixed environment having a weak reducing property is required.

上述步驟(6),通常需要真空環境,但當塗佈物為金屬熔融液時,亦有不需要之情形。 In the above step (6), a vacuum environment is usually required, but when the coating is a metal melt, there is a case where it is not necessary.

上述步驟(7)係下述之步驟:因貫穿/內嵌電極之露出端而會產生凹 凸,故為了後續步驟,而對變得不平坦之基板表面進行平坦化的步驟。 The above step (7) is a step of forming a concave due to the exposed end of the through/insertion electrode. Since it is convex, the step of flattening the surface of the substrate which is not flat is performed for the subsequent steps.

最後,說明本發明之貫穿/內嵌電極及其形成方法的基本概念。 Finally, the basic concept of the through/insertion electrode of the present invention and its formation method will be explained.

若研究變溫循環中貫穿/內嵌電極造成之熱衝擊,則可認為該熱衝擊係因貫穿/內嵌電極之體積變化而對基板之開孔內壁施加的壓力變動所造成。理論上,若貫穿/內嵌電極以與基板相同之熱膨脹係數的材料形成的話,就不會發生應力。 If the thermal shock caused by the penetration/embedded electrodes in the temperature change cycle is investigated, it is considered that the thermal shock is caused by the pressure variation applied to the inner wall of the opening of the substrate due to the volume change of the penetrating/embedded electrodes. Theoretically, if the through/embedded electrode is formed of a material having the same thermal expansion coefficient as the substrate, stress does not occur.

於貫穿/內嵌電極之使用環境中,由於通過貫穿/內嵌電極之電流主要是高頻電流,故在減低貫穿/內嵌電極之導通阻抗時,趨膚效應為不容忽視的因素。 In the environment in which the through/embedded electrodes are used, since the current passing through/inserted electrodes is mainly a high-frequency current, the skin effect is a factor that cannot be ignored when the on-impedance of the through/embedded electrodes is reduced.

又,例如將具有與基板之熱膨脹係數相近的微粒作為核(core),並在其該表面被覆低電阻之導電性被膜(skin),而生成導電性粒子(第1導電材),若將該導電性粒子堆積並燒結,則可得到具有連續之空隙部的多孔質導電體(多孔質燒結體)(第1導電體)。此時,由於導電性微粒之導電性被膜(skin)彼此的接觸部相互連結,故而形成立體網狀之傳導路徑。於該多孔質導電體(多孔質燒結體),在任意剖面,上述接觸部表面彼此之連線皆較同口徑之柱的外圍線長,故可獲得更廣之傳導表面積。 Further, for example, a fine particle having a thermal expansion coefficient close to the substrate is used as a core, and a low-resistance conductive film is coated on the surface to form conductive particles (first conductive material). When the conductive particles are deposited and sintered, a porous conductor (porous sintered body) (first conductor) having a continuous void portion can be obtained. At this time, since the contact portions of the conductive films of the conductive fine particles are connected to each other, a three-dimensional mesh-shaped conduction path is formed. In the porous conductor (porous sintered body), the line connecting the surfaces of the contact portions is longer than the peripheral line of the column of the same diameter in any cross section, so that a wider conductive surface area can be obtained.

又,為了連接上述連線之斷線部分,而將第2導電材之熔融液含浸於多孔質導電體(多孔質燒結體)之空隙部使其再固化,故可確保更佳之傳導路徑。 Moreover, in order to connect the broken portion of the above-mentioned wiring, the molten material of the second conductive material is impregnated into the void portion of the porous conductor (porous sintered body) to be re-solidified, so that a better conduction path can be secured.

其結果,得到具有與基板相近之熱膨脹係數,且高頻中之導電性接近相同口徑之金屬體之導電性的貫穿/內嵌電極。 As a result, a through/embedded electrode having a thermal expansion coefficient close to the substrate and having conductivity at a high frequency close to the conductivity of the metal body having the same diameter is obtained.

當上述核(core)為金屬或合金之情形時,由於貫穿/內嵌電極可視作 構成成分分布不均之金屬體,故即使通過貫穿/內嵌電極之電流為低頻或直流,也可確保高導電性。 When the core is a metal or an alloy, the through/embedded electrode can be regarded as Since the constituent components are distributed unevenly in the metal body, high electric conductivity can be ensured even if the current passing through/embedded electrodes is low frequency or direct current.

本發明之貫穿/內嵌電極之形成方法,由於無需昂貴的設備,故具有可有效抑制製造成本之優點。 The method of forming the through/insertion electrode of the present invention has the advantage of being able to effectively suppress the manufacturing cost since no expensive equipment is required.

本發明之貫穿/內嵌電極,具有下述效果:可得到因應半導體製造技術之微細化而可更高密度地配置之低阻抗且高可靠性的貫穿電極或內嵌電極。 The through/embedded electrode of the present invention has an effect of providing a low-impedance and high-reliability through-electrode or embedded electrode which can be disposed at a higher density in accordance with the miniaturization of the semiconductor manufacturing technique.

本發明之貫穿/內嵌電極之形成方法,則具有下述效果:能以低成本形成可因應半導體製造技術之微細化而可更高密度地配置之低阻抗且高可靠性的貫穿電極或內嵌電極。 The method for forming a through/insertion electrode according to the present invention has the effect of forming a low-impedance and high-reliability through-electrode or inner portion which can be disposed at a higher density in accordance with the miniaturization of the semiconductor manufacturing technology at a low cost. Embedded electrode.

50、250‧‧‧基板 50, 250‧‧‧ substrate

51‧‧‧貫通孔或內嵌電極開孔 51‧‧‧through holes or embedded electrode openings

52、252‧‧‧第1主面 52, 252‧‧‧1 main face

53、253‧‧‧第2主面 53, 253‧‧‧2nd main face

54、74、254‧‧‧絕緣層 54, 74, 254‧‧ ‧ insulation

55‧‧‧支撐板 55‧‧‧Support board

56、59、256、259‧‧‧膏 56, 59, 256, 259‧ ‧ ‧ cream

57、257‧‧‧第1導電體(多孔質燒結體) 57, 257‧‧‧1st conductor (porous sintered body)

60、260‧‧‧第2導電體(非完全取代型固溶體) 60, 260‧‧‧2nd conductor (non-completely substituted solid solution)

61、261‧‧‧熔融液(金屬或合金) 61, 261‧‧‧ melt (metal or alloy)

58、258、358、458、558、658‧‧‧導電性微粒 58, 258, 358, 458, 558, 658‧‧‧ conductive particles

65、66、73、73a、73b、73c、265‧‧‧配線層 65, 66, 73, 73a, 73b, 73c, 265‧‧‧ wiring layers

70‧‧‧電晶體 70‧‧‧Optoelectronics

71‧‧‧擴散層 71‧‧‧Diffusion layer

72‧‧‧閘極 72‧‧‧ gate

251、251b、251c、251bc‧‧‧開孔 251, 251b, 251c, 251bc‧‧‧ openings

270‧‧‧層間配線 270‧‧‧Interlayer wiring

861‧‧‧網狀、部分Au-Sn合金接合部 861‧‧‧ mesh, part of the Au-Sn alloy joint

878‧‧‧以含浸Cu之W粒子作為核,於其表面覆蓋Sn被膜之金屬微粒 878‧‧‧When the W particles impregnated with Cu are used as nuclei, the surface of the Sn is covered with metal particles of the Sn film.

978‧‧‧以含浸Ag或Cu之W、Mo粒子作為核,於其表面覆蓋Au被膜之金屬微粒 978‧‧‧When the W and Mo particles impregnated with Ag or Cu are used as nuclei, the surface of the Au film is covered with metal particles of Au film.

圖1A:係顯示本發明第1實施形態之貫穿電極形成步驟之圖。 Fig. 1A is a view showing a step of forming a through electrode according to a first embodiment of the present invention.

圖1B:係接續圖1A,顯示本發明第1實施形態之貫穿電極形成步驟之圖。 Fig. 1B is a view showing a step of forming a through electrode according to a first embodiment of the present invention.

圖2A:係本發明第2實施形態之內嵌電極形成步驟之圖。 Fig. 2A is a view showing a step of forming an embedded electrode in a second embodiment of the present invention.

圖2B:係接續圖2A,顯示本發明第2實施形態之內嵌電極形成步驟之圖。 Fig. 2B is a view showing a step of forming an in-embedded electrode according to a second embodiment of the present invention.

圖3:係顯示本發明第3實施形態之內嵌電極形成步驟之圖。 Fig. 3 is a view showing a step of forming an embedded electrode in a third embodiment of the present invention.

圖4:係顯示習知之貫穿電極形成方法一例之圖。 Fig. 4 is a view showing an example of a conventional method of forming a through electrode.

圖5:係顯示習知之貫穿電極形成方法另一例之圖。 Fig. 5 is a view showing another example of a conventional method of forming a through electrode.

圖6:係顯示本發明第4實施形態之貫穿/內嵌電極形成方法中使用之導電性微粒、與導電性微粒彼此之各種接合構造(結合態樣)的說明圖。 Fig. 6 is an explanatory view showing various bonding structures (joining aspects) of conductive fine particles and conductive fine particles used in the method of forming a through/insertion electrode according to the fourth embodiment of the present invention.

以下,參照圖示就本發明之較佳的實施形態進行說明。然而,本發明可以多種不同之形態實施,在不脫離本發明之原理及其範疇,可變更其形態及詳細構造與材料選擇,同業者應可容易理解。 Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. However, the present invention can be embodied in a variety of different forms, and its form, detailed construction, and material selection can be changed without departing from the principles and scope of the invention, and should be readily understood by the same.

因此,本發明並不受到本實施形態之記載內容限制來進行解釋。另外,於以下說明中,於同一部分或具有相同機能之部分以相同符號表記,並省略其說明。 Therefore, the present invention is not limited by the description of the embodiments. In the following description, the same portions or portions having the same functions are denoted by the same reference numerals, and the description thereof will be omitted.

(第1實施形態) (First embodiment)

圖1A和圖1B係表示本發明之第1實施形態的貫穿電極之製造方法。本實施形態係電極之兩端自基板兩側露出而作為接線端子之情形,該電極成為貫穿電極。內藏貫穿電極的該基板作為插入器(interposer)而發揮功能。 1A and 1B show a method of manufacturing a through electrode according to a first embodiment of the present invention. In the present embodiment, when both ends of the electrode are exposed from both sides of the substrate to serve as a terminal, the electrode serves as a through electrode. The substrate in which the through electrode is built functions as an interposer.

首先,如圖1A(a)所示,準備基板50。 First, as shown in FIG. 1A(a), the substrate 50 is prepared.

接著,如圖1A(b)所示,於基板50形成開孔51。開孔51從基板50之第1主面52(圖中為上側之面)貫通至第2主面53(圖中為下側之面)。開孔51之內徑為自數μm至數百μm。 Next, as shown in FIG. 1A(b), an opening 51 is formed in the substrate 50. The opening 51 penetrates from the first main surface 52 (the upper surface in the drawing) of the substrate 50 to the second main surface 53 (the lower surface in the drawing). The inner diameter of the opening 51 is from several μm to several hundreds μm.

接著,如圖1A(c)所示,於開孔51之內壁形成絕緣層54。如同圖所示,藉由形成方法,絕緣層54不僅形成於開孔51之內壁,亦形成於第1主面52與第2主面53上。然而,若基板50之材質係絕緣性之情形,則不需形成絕緣層54。 Next, as shown in FIG. 1A(c), an insulating layer 54 is formed on the inner wall of the opening 51. As shown in the figure, the insulating layer 54 is formed not only on the inner wall of the opening 51 but also on the first main surface 52 and the second main surface 53 by the forming method. However, if the material of the substrate 50 is insulating, it is not necessary to form the insulating layer 54.

基板50的材料可有多種選擇,可較佳地使用矽或鍺等半導體基板、化合物半導體基板等;具有與構裝半導體裝置之半導體基板同等級之熱膨脹係數的玻璃或陶瓷基板。 The material of the substrate 50 can be variously selected, and a semiconductor substrate such as tantalum or niobium, a compound semiconductor substrate or the like can be preferably used; and a glass or ceramic substrate having a thermal expansion coefficient of the same level as that of the semiconductor substrate in which the semiconductor device is mounted.

接著,如圖1A(d)所示,於基板50之第2主面53裝配玻璃等材質的支撐板55。於第2主面53上存在絕緣層54之情形時,支撐板55隔著絕緣層54裝配於第2主面53。支撐板55有堵住開孔51之底部(第2主面53側之開口部)的功能。 Next, as shown in FIG. 1A(d), a support plate 55 made of glass or the like is attached to the second main surface 53 of the substrate 50. When the insulating layer 54 is present on the second main surface 53, the support plate 55 is attached to the second main surface 53 via the insulating layer 54. The support plate 55 has a function of blocking the bottom of the opening 51 (the opening on the second main surface 53 side).

接著,如圖1A(e)所示,自第1主面52側之開口部,將含有第1導電材之膏填充、堆積於開孔51。此時,膏56之一部分自開孔51溢出。 Next, as shown in FIG. 1A(e), the paste containing the first conductive material is filled and deposited in the opening 51 from the opening on the first main surface 52 side. At this time, one portion of the paste 56 overflows from the opening 51.

作為含有第1導電材之膏56之例,例如可列舉以1比1之比例將下述兩種鎢之微粒(導電材微粒)加入於分散液與揮發性溶劑中並進行摻合而成的85w%的黏性混濁液,上述鎢之微粒係以核(core)之大小的200分之1至10分之1左右的厚度之錫被膜(skin)(本實施形態之情形係0.0015μm至0.05μm之厚度)被覆之粒徑或外觀之大約尺寸為0.3μm至0.5μm之大小的鎢之微粒(導電材微粒),及同樣例如以核(core)之大小的200分之1至10分之1左右的厚度之銀被膜(skin)(本實施形態是0.0015μm至0.05μm之厚度)被覆之粒徑或外觀之大約尺寸為0.3μm至0.5μm之大小的鎢之微粒(導電材微粒)。該黏性混濁液含有由經錫被膜(skin)被覆之鎢核(core)構成的導電性微粒、與由經銀被膜(skin)被覆之鎢核(core)構成之導電性微粒,因此核(core)係由同樣之金屬構成,被膜(skin)係由不同種之金屬構成,而成為含有兩種導電性粒子。當然,構成膏56之物質及該等含量、溶劑等,不受在此揭示之內容限定。 As an example of the paste 56 containing the first conductive material, for example, the following two types of tungsten fine particles (conductive material fine particles) are added to a dispersion liquid and a volatile solvent at a ratio of 1 to 1 and blended. 85w% of the viscous turbid liquid, the tungsten particles are a tin film having a thickness of about 1/1/1 of a core size (in the case of the present embodiment, 0.0015 μm to 0.05) Thickness of μm) The particle size or appearance of the coated tungsten particles (conductive material particles) having a size of about 0.3 μm to 0.5 μm, and also, for example, 1/10 to 10 of the size of the core. A silver particle (conductive material fine particle) having a particle size or an outer shape of a silver film having a thickness of about 1 (this embodiment is a thickness of 0.0015 μm to 0.05 μm) and having a size of about 0.3 μm to 0.5 μm. The viscous turbid liquid contains conductive fine particles composed of a tungsten core coated with a tin coating and conductive fine particles composed of a tungsten core coated with a silver coating, and thus the core ( The core) is composed of the same metal, and the skin is composed of a different metal and contains two kinds of conductive particles. Of course, the materials constituting the paste 56 and the contents, solvents, and the like are not limited by the contents disclosed herein.

該等被膜(在此,為利用鍍敷或取代等被覆之錫和銀被膜)之厚度必須設為下述厚度以下:與核(core)(在此為鎢微粒)之體積比不同之被膜接合點的熔融部分不會填充由核所產生之空隙部。該空隙部在下一個加工階 段中需要以其他熔融金屬填充,因此必須為即使一部份被固定,全體而言仍然連續。又,若該空隙部沒有被熔融金屬充分填充,而造成內部空洞,則阻抗成分增加,會使貫穿電極之導電性降低。 The thickness of the film (here, the tin and silver film coated by plating or substitution) must be equal to or less than the following thickness: film bonding different from the volume ratio of the core (here, tungsten particles) The molten portion of the dot does not fill the void portion created by the core. The gap is in the next processing step The section needs to be filled with other molten metal, so it must be continuous even if a part is fixed. Further, when the void portion is not sufficiently filled with the molten metal to cause internal voids, the impedance component increases, and the conductivity of the through electrode is lowered.

再者,上述空隙部之不完全填充所造成之貫穿電極之導電性降低的程度小時,將不影響貫穿電極之使用目的。此時,可不需要上述之對於被膜(skin)之厚度的條件。又,於即使不填充上述空隙部亦能將貫穿電極之導電率調整至期望之等級以上的情形時,可省略如下所述之使用膏59填充上述空隙部之處理本身。 Further, when the degree of decrease in conductivity of the through electrode due to incomplete filling of the void portion is small, the purpose of use of the through electrode is not affected. At this time, the above conditions for the thickness of the skin may not be required. In addition, when the conductivity of the penetrating electrode can be adjusted to a desired level or higher without filling the gap portion, the process itself of filling the cavity portion with the paste 59 as described below can be omitted.

膏56之填充,可利用微量吸管(micropipette)或網版印刷等公知的方法。可考慮塗佈機械之性能、塗佈速度、堆積密度等,藉由調整膏56中之導電性微粒之粒徑與固體含量比(稀釋劑比例),可容易地對應。使用機械,較佳為相對低價之噴射調合器(jet despenser)。根據選定機種之性能,反覆塗佈次數不同。一般而言,大約需要重覆2次。 The filling of the paste 56 can be carried out by a known method such as micropipette or screen printing. The properties of the coating machine, the coating speed, the bulk density, and the like can be considered, and the particle diameter and the solid content ratio (diluent ratio) of the conductive fine particles in the paste 56 can be easily adjusted. A mechanical, preferably relatively low-cost jet despenser is used. The number of times of repeated coating varies depending on the performance of the selected model. In general, it takes about 2 repetitions.

接著,如圖1A(f)所示,藉由在還原性環境中之低溫燒結處理,於開孔51中形成多孔質之第1導體57。藉由還原性環境中之低溫燒結處理,揮發膏56所含之揮發性溶劑,膏56所含之固體成分的導電性微粒彼此收縮沉積而相互部分接觸。然後,於經活性化之導電性微粒之表面所具有的金屬被膜(此例中是錫及銀被膜)間相互擴散接合,進行燒結而形成多孔質之第1導體57。此時之沉積收縮的程度,根據膏56中之固體成分的含量改變。 Next, as shown in FIG. 1A(f), a porous first conductor 57 is formed in the opening 51 by low-temperature sintering treatment in a reducing atmosphere. The volatile particles contained in the volatile paste 56 by the low-temperature sintering treatment in the reducing atmosphere, and the conductive fine particles of the solid components contained in the paste 56 are contracted and deposited in contact with each other. Then, a metal film (in this example, a tin and a silver film) which is formed on the surface of the activated conductive fine particles is mutually diffusion-bonded and sintered to form a porous first conductor 57. The degree of deposition shrinkage at this time varies depending on the content of the solid content in the paste 56.

上述膏56之例,膏56所含之二種導電性粒子之核(core)均為鎢,該等導電性粒子之被模(skin)是銀與錫,因此作為燒結體之第1導體57之主要構成要素係為鎢微粒,並且配置於各個鎢微粒之周圍的被膜狀錫與銀 相互結合而形成導電路徑。 In the example of the paste 56, the core of the two types of conductive particles contained in the paste 56 is tungsten, and the skin of the conductive particles is silver and tin, so that the first conductor 57 as a sintered body is used. The main constituent elements are tungsten particles, and the film-like tin and silver disposed around each tungsten particle. They are combined to form a conductive path.

本實施形態中低溫燒結之條件為,例如於含有2%之H2作為還原劑的N2環境中,且溫度設為230℃。當然,不侷限於該等條件。 The conditions for low-temperature sintering in the present embodiment are, for example, in an N 2 atmosphere containing 2% of H 2 as a reducing agent, and the temperature is 230 °C. Of course, it is not limited to these conditions.

圖1B(g)係表示構成多孔質之第1導電體57之固體成分的導電性微粒58之部分接觸狀態的說明圖。藉由固體成分之導電性微粒58之部分接觸,產生於導電性微粒58間連續的空隙部。 (B) of FIG. 1B is an explanatory view showing a partial contact state of the conductive fine particles 58 constituting the solid component of the porous first conductor 57. The partial contact of the conductive fine particles 58 of the solid component is generated in the continuous void portion between the conductive fine particles 58.

接著,如圖1B(h)所示,將含有第2導電材之膏59,以覆蓋於多孔質之第1導體57之上的方式塗佈、堆積。之後,藉由低溫熱處理,將膏59暫時熔融,其後使其沉積、再固化。如此,構成貫穿電極之非完全取代型固熔體60,形成於開孔51之內部。此時,作為第2導體之膏59之一部分熔融液(第2導電材)61,浸透至多孔質之第1導體57的空隙部(參照圖1B(g)),將空隙部全部填充(參照圖1B(i))。如此形成之非完全取代固熔體60構成本實施形態之貫穿電極。 Next, as shown in FIG. 1B(h), the paste 59 containing the second conductive material is applied and deposited so as to cover the porous first conductor 57. Thereafter, the paste 59 is temporarily melted by a low-temperature heat treatment, and then deposited and resolidified. Thus, the incompletely substituted solid solution 60 constituting the through electrode is formed inside the opening 51. At this time, the partial melt (second conductive material) 61 which is one of the pastes 59 of the second conductor penetrates into the void portion of the porous first conductor 57 (see FIG. 1B (g)), and the void portion is completely filled (see Figure 1B(i)). The non-completely substituted solid solution 60 thus formed constitutes the through electrode of the present embodiment.

列舉膏59之一例,較佳為銦系合金(例如銦52%、錫48%,熔點約120℃)之膏,且將所含有之銦系合金之導電性微粒設為粒徑0.03μm至0.05μm,將固體成分(導電性微粒)設為80~99w%。若為此摻合比例,可防止銦系合金之導電性微粒之凝聚,且可充分供給填充材。 As an example of the paste 59, a paste of an indium-based alloy (for example, indium 52%, tin 48%, and a melting point of about 120 ° C) is preferable, and the conductive fine particles of the indium-based alloy contained therein are set to have a particle diameter of 0.03 μm to 0.05. In μm, the solid content (conductive fine particles) is set to 80 to 99 w%. If this ratio is blended, aggregation of the conductive fine particles of the indium alloy can be prevented, and the filler can be sufficiently supplied.

將含浸於多孔質之第一導體57之空隙部的膏59之熔融液(第2導電材、銦系合金)61一邊於與第一導體57之導電性微粒58的接觸面相互擴散接合(所謂一邊發生金屬彼此之潤濕)一邊固化而形成非完全取代型固熔體60之過程,概念性地示於圖1B(i)。 The melt (second conductive material, indium alloy) 61 of the paste 59 impregnated in the void portion of the porous first conductor 57 is diffusion-bonded to the contact surface with the conductive fine particles 58 of the first conductor 57 (so-called The process of forming the incompletely substituted solid solution 60 while solidifying while the metals are wetted with each other is conceptually shown in Fig. 1B(i).

接下來,如圖1B(j)所示,除去構成貫穿電極之非完全取代型固熔體 60的形成過程中產生之凸起部,使基板50之第1主面52側平坦化。該平坦化步驟,可用機械研磨或CMP(併用化學反應與機械研磨之平坦化步驟)等公知的方法來實施。 Next, as shown in FIG. 1B(j), the non-completely substituted solid solution constituting the through electrode is removed. The convex portion generated during the formation of 60 planarizes the first main surface 52 side of the substrate 50. This planarization step can be carried out by a known method such as mechanical polishing or CMP (and a planarization step of chemical reaction and mechanical polishing).

最後,如圖1B(k)所示,自基板50之第2主面53除去支撐板55後,以與構成貫穿電極之非完全取代型固熔體60之一端部接觸的方式,於第2主面53側形成電氣配線層66;以與非完全取代型固熔體60之另一端部接觸的方式,於第1主面52側形成電氣配線層65。 Finally, as shown in FIG. 1B(k), after the support plate 55 is removed from the second main surface 53 of the substrate 50, it is in contact with one end portion of the incompletely substituted solid solution 60 constituting the through electrode. The electric wiring layer 66 is formed on the main surface 53 side, and the electric wiring layer 65 is formed on the first main surface 52 side so as to be in contact with the other end portion of the non-completely substituted solid solution 60.

藉由上述步驟,形成於基板50之開孔51形成有由非完全取代型固熔體60構成之貫穿電極的構造(貫穿電極構造)、及與該貫穿電極電連接之電氣配線層65及66。 By the above steps, the opening 51 formed in the substrate 50 is formed with a through electrode formed of the incompletely substituted solid solution 60 (through electrode structure), and the electric wiring layers 65 and 66 electrically connected to the through electrode. .

如上所述,本實施形態中貫穿/內嵌電極之形成方法,與以往各種貫穿電極製造法相比無需高價設備、時間相對較短、基板整體之可靠不會降低,可形成無訊號傳遞特性之劣化的導電性良好之貫穿電極。 As described above, in the present embodiment, the method of forming the through/insertion electrode does not require expensive equipment as compared with the conventional through-electrode manufacturing method, and the time is relatively short, and the reliability of the entire substrate is not lowered, and the deterioration of the signal-free transmission characteristic can be formed. A good conductivity through-electrode.

又,由於於貫穿/內嵌電極之形成時可避免超過230℃的高溫處理步驟,故而可有效地作為於已形成電路而無法高溫處理之半導體裝置或有機系裝置用之半導體或玻璃或陶瓷等基板晶圓上形成貫穿電極之方法。 Moreover, since the high-temperature processing step exceeding 230 ° C can be avoided in the formation of the through/embedded electrode, it can be effectively used as a semiconductor device or an organic device, a semiconductor or a glass or ceramic, which cannot be processed at a high temperature. A method of forming a through electrode on a substrate wafer.

如此,由於不含300℃以上之高溫熱處理,故不會伴隨例如已構成為矽晶圓之裝置的特性改變或劣化。並且,由於貫穿電極之導電性大,可縮小難以通過大電流或高速訊號的貫穿電極之尺寸,且可達成低製造成本之高集成化或三維積層化。 As described above, since the high-temperature heat treatment of 300 ° C or higher is not included, the characteristics of the device that has been configured as the silicon wafer are not changed or deteriorated. Further, since the conductivity of the through electrode is large, the size of the through electrode which is difficult to pass a large current or a high-speed signal can be reduced, and high integration or three-dimensional stratification with low manufacturing cost can be achieved.

再者,為了將貫穿電極之導電率調整至期望之等級以上,於省略使用膏59進行上述空隙部之填充步驟的情形,貫穿電極僅由多孔質之第一導體 57(多孔質燒結體)構成。在此,於下述第2~第4實施形態,亦同樣適用。 Further, in order to adjust the conductivity of the through electrode to a desired level or higher, the use of the paste 59 to perform the filling step of the void portion is omitted, and the through electrode is only made of the porous first conductor. 57 (porous sintered body). Here, the same applies to the second to fourth embodiments described below.

(第2實施形態) (Second embodiment)

圖2A及圖2B表示本發明之第2實施形態的內嵌電極之形成方法。本實施形態係電極於基板之一側露出作為接線端子,並於另一面自基板之內部連接於已構築之半導體裝置之配線的情形,該電極成為內嵌電極。 2A and 2B show a method of forming an in-line electrode according to a second embodiment of the present invention. In the present embodiment, when the electrode is exposed as a terminal on one side of the substrate and the other side is connected to the wiring of the constructed semiconductor device from the inside of the substrate, the electrode serves as an embedded electrode.

首先,如圖2A(a)所示,可藉由公知方法,於半導體晶圓等基板250之第2主面253(於圖中,為下方的面)形成電晶體70。電晶體70具有閘極72,與配置於閘極72之兩側之一對的擴散層71。於一對之擴散層71分別連接有配線層73。閘極72與配線層73配置於絕緣層74(多為氧化膜)內。 First, as shown in FIG. 2A(a), the transistor 70 can be formed on the second main surface 253 (the lower surface in the drawing) of the substrate 250 such as a semiconductor wafer by a known method. The transistor 70 has a gate 72 and a diffusion layer 71 disposed on one of the two sides of the gate 72. A wiring layer 73 is connected to each of the pair of diffusion layers 71. The gate 72 and the wiring layer 73 are disposed in the insulating layer 74 (mostly an oxide film).

接著,如圖2A(b)所示,藉由公知之圖案形成步驟及進一步對其蝕刻之步驟形成開孔251。具體而言,藉由反應性離子蝕刻等,將基板250自第1主面252(於圖中,為上方的面)側至第2主面253側之絕緣層74選擇性地除去。開孔251貫穿基板250。 Next, as shown in FIG. 2A(b), the opening 251 is formed by a well-known pattern forming step and a step of further etching the same. Specifically, the substrate 250 is selectively removed from the first main surface 252 (the upper surface in the drawing) side to the insulating layer 74 on the second main surface 253 side by reactive ion etching or the like. The opening 251 penetrates through the substrate 250.

接著,如圖2A(c)所示,藉由於氟酸(HF)氣體環境中之反應性離子蝕刻等,經由開孔251,對絕緣層74的第1主面252側進行選擇性蝕刻,使開孔251正下方的配線層73露出。 Next, as shown in FIG. 2A(c), the first main surface 252 side of the insulating layer 74 is selectively etched through the opening 251 by reactive ion etching or the like in a fluorine acid (HF) gas atmosphere. The wiring layer 73 directly under the opening 251 is exposed.

接著,如圖2A(d)所示,於開孔251之內壁與第1主面252形成絕緣層254。此時,由於在露出之配線層73之表面(底面)亦形成絕緣層254,故可用公知之方法除去。藉由形成方法,如同圖所示,絕緣層254不僅形成於開孔251之內壁,亦形成於第1主面252上。 Next, as shown in FIG. 2A(d), an insulating layer 254 is formed on the inner wall of the opening 251 and the first main surface 252. At this time, since the insulating layer 254 is also formed on the surface (bottom surface) of the exposed wiring layer 73, it can be removed by a known method. By the formation method, as shown in the figure, the insulating layer 254 is formed not only on the inner wall of the opening 251 but also on the first main surface 252.

藉由以上步驟,形成「於底面配置有導体之開孔」。此後之步驟,由於 與上述第1實施形態相同,在此作簡要說明。 By the above steps, an "opening in which a conductor is disposed on the bottom surface" is formed. The subsequent steps, due to The same as the above-described first embodiment, a brief description will be given here.

即,如圖2A(e)所示,接續絕緣層254之形成步驟,與上述第1實施形態相同,自第1主面252側之開口部,將含有第1導電材之膏256填充、堆積於開孔251。此時,膏256之一部分自開孔251溢出。 In other words, as shown in FIG. 2A(e), in the same manner as in the first embodiment, the paste 256 containing the first conductive material is filled and stacked from the opening on the first main surface 252 side. In the opening 251. At this time, one portion of the paste 256 overflows from the opening 251.

接著,如圖2A(f)所示,與上述第1實施形態相同,於開孔251中形成多孔質之第1導體257。藉由在還原性環境中之低溫燒結處理,揮發膏256所含之揮發性溶劑,膏256所含之固體成分的導電性微粒彼此收縮沉積而相互部分接觸。然後,於經活性化之導電性微粒之表面的金屬被膜間相互擴散接合,進行燒結而形成多孔質之第1導體257。此時之沉積收縮的程度,根據膏256中之固體成分的含量改變。 Next, as shown in FIG. 2A(f), as in the first embodiment, a porous first conductor 257 is formed in the opening 251. The volatile particles contained in the volatile paste 256 are subjected to a low-temperature sintering treatment in a reducing atmosphere, and the conductive fine particles of the solid components contained in the paste 256 are contracted and deposited in contact with each other. Then, the metal film on the surface of the activated conductive fine particles is mutually diffusion-bonded and sintered to form a porous first conductor 257. The degree of deposition shrinkage at this time varies depending on the content of the solid content in the paste 256.

圖2B(g)係表示構成多孔質之第1導體257之固體成分的導電性微粒258之部分接觸狀態的說明圖。藉由固體成分之導電性微粒258之部分接觸,產生於導電性微粒258間連續的空隙部。 (B) of FIG. 2B is an explanatory view showing a partial contact state of the conductive fine particles 258 constituting the solid component of the porous first conductor 257. The partial contact of the conductive fine particles 258 of the solid component is generated in the continuous void portion between the conductive fine particles 258.

接著,如圖2B(h)所示,與上述第1實施形態相同,將含有第2導電材之膏259,以覆蓋於多孔質第1導體257之上的方式塗佈、堆積。之後,藉由低溫熱處理,將膏259暫時熔融,其後使其沉積、再固化。如此,構成內嵌電極之非完全取代型固熔體260,形成於開孔251之內部。此時,作為第2導體之膏259之一部分熔融液261,浸透至多孔質之第1導體257的空隙部(參照圖2B(g)),將空隙部全部填充(參照圖2B(i))。如此形成之非完全取代固熔體260構成本實施形態之內嵌電極。 Then, as shown in FIG. 2B (h), the paste 259 containing the second conductive material is applied and deposited so as to cover the porous first conductor 257, as in the first embodiment. Thereafter, the paste 259 is temporarily melted by a low-temperature heat treatment, and then deposited and resolidified. Thus, the incompletely substituted solid solution 260 constituting the embedded electrode is formed inside the opening 251. At this time, a part of the melt 261 as the second conductor paste 259 penetrates into the void portion of the porous first conductor 257 (see FIG. 2B(g)), and fills the void portion (see FIG. 2B(i)). . The incompletely substituted solid solution 260 thus formed constitutes the embedded electrode of the present embodiment.

將含浸於多孔質之第一導體257之空隙部的膏259之熔融液261,一邊於與第一導體257之導電性微粒258的接觸面相互擴散接合(所謂一邊發生 金屬彼此之潤濕)一邊固化而形成非完全取代型固熔體260之過程,概念性地示於圖2B(i)。 The melt 261 of the paste 259 impregnated in the void portion of the porous first conductor 257 is diffusion-bonded to the contact surface with the conductive particles 258 of the first conductor 257 (so-called side occurs) The process by which the metals wet each other to form a non-completely substituted solid solution 260, is conceptually shown in Figure 2B(i).

接下來,如圖2B(j)所示,與上述第1實施形態相同,除去構成內嵌電極之非完全取代型固熔體260的形成過程中產生之凸起部,使基板250之第1主面252側平坦化。 Next, as shown in FIG. 2B(j), as in the first embodiment, the convex portion generated during the formation of the incompletely substituted solid solution 260 constituting the embedded electrode is removed, and the first portion of the substrate 250 is removed. The main surface 252 side is flattened.

最後,如圖2B(k)所示,以與構成內嵌電極之非完全取代型固熔體260之一端部接觸的方式,於第1主面252側形成電氣配線層265。 Finally, as shown in FIG. 2B(k), the electric wiring layer 265 is formed on the first main surface 252 side so as to be in contact with one end portion of the incompletely substituted solid solution 260 constituting the embedded electrode.

藉由上述步驟,形成於基板250之開孔251形成有內嵌電極(非完全取代型固熔體260)之構造(內嵌電極構造)、及與該內嵌電極電連接之電氣配線層265及273。 By the above steps, the structure in which the embedded electrode (the non-completely substituted solid solution 260) is formed in the opening 251 of the substrate 250 (the embedded electrode structure) and the electrical wiring layer 265 electrically connected to the embedded electrode are formed. And 273.

(第3實施形態) (Third embodiment)

圖3係表示本發明之第3實施形態的內嵌電極之製造方法。本實施形態係於上述第2實施形態中使用多層配線之情形。因此,於圖3中,與表示上述第2實施形態之圖2A及圖2B相同的號碼,表示相同構成要素。 Fig. 3 is a view showing a method of manufacturing an in-line electrode according to a third embodiment of the present invention. This embodiment is a case where the multilayer wiring is used in the second embodiment. Therefore, in FIG. 3, the same components as those of FIG. 2A and FIG. 2B showing the second embodiment described above indicate the same components.

首先,如圖3(a)所示,藉由公知之方法,於半導體晶圓等基板250之第2主面253(於圖中,為下方的面)形成電晶體70。電晶體70具有閘極72,與配置於閘極72之兩側之一對的擴散層71。於一邊之擴散層71連接有複數之配線層73a、73b、73c。閘極72與配線層73a、73b、73c配置於絕緣層74(多為氧化膜)內。於該等之配線層(圖中是指73a、73b)間配置有層間配線270,將鄰接之配線層(圖中是第1層73a與第2層73b)之間以電性連接。此種複層之配線層及層間配線,多用於矽集成電路。 First, as shown in FIG. 3(a), a transistor 70 is formed on the second main surface 253 (the lower surface in the drawing) of the substrate 250 such as a semiconductor wafer by a known method. The transistor 70 has a gate 72 and a diffusion layer 71 disposed on one of the two sides of the gate 72. A plurality of wiring layers 73a, 73b, and 73c are connected to the diffusion layer 71 on one side. The gate 72 and the wiring layers 73a, 73b, and 73c are disposed in the insulating layer 74 (mostly an oxide film). Interlayer wiring 270 is disposed between the wiring layers (in the figure, 73a and 73b), and the adjacent wiring layers (the first layer 73a and the second layer 73b in the drawing) are electrically connected to each other. Such a multilayer wiring layer and interlayer wiring are mostly used for germanium integrated circuits.

接著,如圖3(b)所示,與上述第2實施形態相同,形成為了形成到 達第2層之配線層73b之內嵌電極的開孔251b。其後,與上述第2實施形態相同,於開孔251b形成內嵌電極。 Next, as shown in FIG. 3(b), in the same manner as in the second embodiment described above, The opening 251b of the electrode is embedded in the wiring layer 73b of the second layer. Thereafter, as in the second embodiment, an in-line electrode is formed in the opening 251b.

於圖3中表示形成第二層之配線層73b之內嵌電極的情形,但本發明不受限於此,也可為形成其他層之配線層之內嵌電極。於圖3(c)中表示形成第三層之配線層73c之內嵌電極的情形時之開孔251c。如此一來,在多層配線結構中,可對指定之任意配線層形成內嵌電極。 Although the case where the electrode is embedded in the wiring layer 73b of the second layer is shown in Fig. 3, the present invention is not limited thereto, and an electrode in which the wiring layer of the other layer is formed may be used. The opening 251c in the case where the electrode is embedded in the wiring layer 73c of the third layer is shown in Fig. 3(c). In this way, in the multilayer wiring structure, the embedded electrode can be formed for any of the designated wiring layers.

圖3(d)表示了對第二層之配線層73b與第三層之配線層73c兩者形成共用之內嵌電極的情形時之開孔251bc。若對此種構成形成內嵌電極,則於形成配線層73b與73c之層間配線的同時,可將該等兩者露出於第1主面252側。即,1個內嵌電極可具有複數之功能。 Fig. 3(d) shows an opening 251bc in a case where a common embedded electrode is formed for both the wiring layer 73b of the second layer and the wiring layer 73c of the third layer. When the embedded electrodes are formed in such a configuration, the interlayer wirings of the wiring layers 73b and 73c are formed, and both of them can be exposed on the first main surface 252 side. That is, one of the embedded electrodes can have a plurality of functions.

(第4實施形態) (Fourth embodiment)

圖6表示本發明之第4實施形態之貫穿/內嵌電極之形成方法中所使用的導電性微粒,以及導電性微粒彼此之各種接合構造(結合態樣)。此外,以下參照圖6而說明之各種導電性微粒,亦可適用於上述第2與第3實施形態之多孔質燒結體257或非完全取代型固熔體260。 Fig. 6 is a view showing the conductive fine particles used in the method of forming the through/insertion electrode according to the fourth embodiment of the present invention, and various bonding structures (bonding patterns) of the conductive fine particles. Further, the various types of conductive fine particles described below with reference to Fig. 6 can be applied to the porous sintered body 257 or the incompletely substituted solid solution 260 of the second and third embodiments.

圖6(a)表示可替代上述第1實施形態之多孔質燒結體57或非完全取代型固熔體60中所使用之導電性微粒58來使用的多面體導體粒子(多面體之導電性微粒)之例。 Fig. 6 (a) shows a polyhedral conductor particle (polyhedral conductive fine particle) which can be used in place of the conductive fine particles 58 used in the porous sintered body 57 or the incompletely substituted solid solution 60 of the first embodiment. example.

在此例示之多面體導體粒子(多面體之導電性微粒)358為:(i)長方體狀、(ii)圓筒狀、(iii)於表面具有突起之略橢圓狀、(iv)於表面具有突起之略球體狀、(v)圓筒狀、(vii)於表面具有微細突起之球體狀、(viii)於表面具有突起之略橢圓狀、(ix)球體狀、(x)長方體狀、(x)星型狀, 但可為此等以外之形狀。如上所述,作為導電性微粒58之形狀,可採用各種形狀。 The polyhedral conductor particles (polyhedral conductive particles) 358 exemplified herein are: (i) a rectangular parallelepiped shape, (ii) a cylindrical shape, (iii) a slightly elliptical shape having protrusions on the surface, and (iv) a protrusion on the surface. Slightly spherical, (v) cylindrical, (vii) spherical with fine protrusions on the surface, (viii) slightly elliptical with protrusions on the surface, (ix) spherical, (x) cuboid, (x) Star shape, But it can be shaped other than this. As described above, various shapes can be employed as the shape of the conductive fine particles 58.

多面體導體微粒(多面體之導電性微粒)358可藉由單質金屬或合金、或者金屬/合金以外之導體而形成(在此情形,僅存在核(core),不存在被膜(skin));亦可藉由以導電性被膜(skin)(例如金屬被膜)被覆由有機材料或無機材料構成之核(core)的表面來形成。 The polyhedral conductor particles (polyhedral conductive particles) 358 can be formed by a simple metal or alloy, or a conductor other than a metal/alloy (in this case, only a core exists, no skin exists); It is formed by coating a surface of a core made of an organic material or an inorganic material with a conductive film (for example, a metal film).

圖6(b)表示金屬微粒(金屬製之導電性微粒)458之例。 Fig. 6(b) shows an example of metal fine particles (conductive fine particles made of metal) 458.

在此例示之金屬微粒458,係藉由下述方式來形成:將由W、Mo、或Si單質構成之微粒作為核(core),且藉由鍍敷法等於該核(core)之表面被覆Ni、Cu、Sn、Au、Ag等導電性被膜(skin)。 The metal fine particles 458 exemplified herein are formed by using a particle composed of a simple substance of W, Mo, or Si as a core, and coating a surface of the core by a plating method. A conductive film such as Cu, Sn, Au, or Ag.

在此,作為金屬微粒458之形狀,例示有(i)~(iv)4種類。 Here, as the shape of the metal fine particles 458, four types of (i) to (iv) are exemplified.

圖6(c)表示附鍍敷之金屬微粒(金屬製之導電性微粒)558之例。 Fig. 6(c) shows an example of plated metal particles (conductive particles made of metal) 558.

符號658係由W、Mo、Si等構成之微粒而成為附鍍敷之金屬微粒558之核(core)者。符號589,係表示配置於成為核(core)之微粒658之最外面之Au、Ag、或Pt(相對高熔點之金屬)的被膜(skin)(導電性被膜)。符號689,係表示配置於Au、Ag、或Pt之被膜589之內側(即核微粒658與被膜589之間)之Ni、Cu、Ti、Cr、或Ta(相對高熔點之金屬)的被膜(skin)(導電性被膜)。符號789,係表示被覆核微粒658之表面的Sn單質、Sn-Ag合金、或Sn-Ag-Cu合金(相對低熔點之金屬)的被膜(skin)。 The symbol 658 is a core composed of W, Mo, Si, or the like, and is a core of the plated metal particles 558. Reference numeral 589 denotes a skin (conductive film) disposed on the outermost layer of Au, Ag, or Pt (metal having a relatively high melting point) which is the outermost particle 658 of the core. Reference numeral 689 denotes a film of Ni, Cu, Ti, Cr, or Ta (a metal having a relatively high melting point) disposed inside the film 589 of Au, Ag, or Pt (that is, between the core particles 658 and the film 589). Skin) (conductive film). Reference numeral 789 denotes a film of a Sn elemental material, a Sn-Ag alloy, or a Sn-Ag-Cu alloy (a metal having a relatively low melting point) on the surface of the core particle 658.

因此,附鍍敷之金屬微粒558之一種,係由如下構成者:由W、Mo、Si等構成之核(core)658;與被覆核(core)658之表面之Ni、Cu、Ti、Cr、或Ta的被膜(skin)689;與Au、Ag、或Pt之被膜(skin)589。換言之, 該附鍍敷之金屬微粒558,係於核658之周圍具備有兩種不同之相對高熔點之金屬被膜589與689者。 Therefore, one of the plated metal particles 558 is composed of a core 658 composed of W, Mo, Si, or the like; and Ni, Cu, Ti, Cr on the surface of the core 658. Or a skin of 689; a skin 589 with Au, Ag, or Pt. In other words, The plated metal particles 558 are provided with two different metal films 589 and 689 having a relatively high melting point around the core 658.

又,附鍍敷之金屬微粒558之另一種,係由如下構成者:由W、Mo、Si等構成之核(core)658;與被覆核(core)658之表面之Sn單質、Sn-Ag合金、或Sn-Ag-Cu合金(熔點相對低之金屬)的被膜(skin)789。換言之,該附鍍敷之金屬微粒558,係於核658之周圍具備有一種相對低熔點之金屬被膜789者。 Further, another type of plated metal particles 558 is composed of a core 658 composed of W, Mo, Si, or the like; and a Sn element on the surface of the core 658, Sn-Ag. A skin 789 of an alloy or a Sn-Ag-Cu alloy (a metal having a relatively low melting point). In other words, the plated metal particles 558 are provided with a relatively low melting metal film 789 around the core 658.

較佳為併用(同時使用)圖6(c)所示之兩種導電性微粒558。例如,選擇W作為核微粒658,進而,將由「表面被覆有兩種相對高熔點之金屬被膜589與689之核微粒(W)」構成的附鍍敷之金屬微粒558作為「第1導電性微粒」,將由「表面被覆有相對低熔點之金屬被膜789之核微粒(W)」構成的附鍍敷之金屬微粒558作為「第2導電性微粒」,藉由將該等兩種導電性微粒混合,可得到能作為含有第1導電材之膏56使用的膏。藉由併用如此兩種導電性粒子,可在300℃以下的低溫形成多孔質燒結體(貫穿/內嵌電極),該多孔質燒結體具有與「將燒結溫度為1100℃以上之W單質之微粒燒結所得之燒結體」的特性相同等級之相似特性。這點意義重大。 Preferably, the two kinds of conductive particles 558 shown in Fig. 6(c) are used in combination (simultaneously). For example, W is selected as the core particles 658, and further, the plated metal particles 558 composed of "the core particles (W) coated with the metal film 589 and 689 having two relatively high melting points on the surface" are referred to as "first conductive particles". The plated metal particles 558 composed of "core particles (W) coated with a metal film 789 having a relatively low melting point on the surface" are referred to as "second conductive particles", and the two kinds of conductive particles are mixed. A paste which can be used as the paste 56 containing the first conductive material can be obtained. By using such two kinds of conductive particles in combination, it is possible to form a porous sintered body (through/embedded electrode) at a low temperature of 300 ° C or lower, and the porous sintered body has "fine particles of W having a sintering temperature of 1100 ° C or more. The sintered body obtained by sintering has similar characteristics of the same grade. This is significant.

圖6(d),係表示將圖6(c)所示之附鍍敷之金屬微粒(金屬製之導電性微粒)558的尺寸縮小,於氫、氮等之還原性環境內以200℃至250℃左右之相對低溫度,藉由相互擴散等形成由部分Au-Sn共晶合金構成之接合部589、789之例。 Fig. 6(d) shows the size reduction of the plated metal particles (conductive particles made of metal) 558 shown in Fig. 6(c), and 200 ° C in a reducing environment such as hydrogen or nitrogen. An example of the joint portions 589 and 789 composed of a part of the Au-Sn eutectic alloy is formed by mutual diffusion or the like at a relatively low temperature of about 250 °C.

此例中,於下述二種金屬微粒558之結合部分,形成網狀之部分Au-Sn共晶合金接合部861,該二種金屬微粒558分別為:由「以W、Mo、Si 等構成之核(core)658;以及被覆核(core)658之表面之Ni、Cu、Ti、Cr或Ta的被膜(skin)689;以及Au、Ag、或Pt之被膜(skin)589」構成之金屬微粒558;以及由「由W、Mo、Si等構成之核(core)658;以及被覆核(core)658之表面之Sn單質、Sn-Ag合金、或Sn-Ag-Cu合金之被膜(skin)789」構成的金屬微粒558。該部分Au-Sn共晶合金接合部861的熔點為275℃以上,故而具有可將處理溫度抑制在半導體裝置之構裝時的負荷溫度265℃以下並維持充分強度之優點。 In this example, a mesh-shaped portion of the Au-Sn eutectic alloy joint portion 861 is formed at a joint portion of the following two kinds of metal fine particles 558, and the two kinds of metal fine particles 558 are respectively: "W, Mo, Si a core 658; and a skin 689 of Ni, Cu, Ti, Cr or Ta on the surface of the core 658; and a skin 589 of Au, Ag, or Pt Metal particles 558; and a film composed of "core 658 composed of W, Mo, Si, etc.; and a Sn element of a surface of a core 658, a Sn-Ag alloy, or a Sn-Ag-Cu alloy. Metal particles 558 composed of (skin) 789". Since the melting point of the Au-Sn eutectic alloy joint portion 861 is 275 ° C or higher, the processing temperature can be suppressed to a load temperature of 265 ° C or lower at the time of mounting the semiconductor device, and the strength is maintained.

圖6(e)係進一步表示附表面鍍敷之金屬微粒(金屬製之導電性微粒)558之其他例。 Fig. 6(e) further shows another example of the surface-plated metal fine particles (conductive fine particles made of metal) 558.

符號878表示以含浸有Cu之多面體之W粒子作為核(core),以Sn之被膜(skin)覆蓋該核(core)之表面的金屬微粒。符號978表示以含浸有Ag或Cu之多面體之W或Mo粒子作為核(core),以Au被膜(skin)覆蓋該核(core)之表面的金屬微粒。若是使用有該含浸有Cu之多面體之W粒子的金屬微粒558,則相較於使用多面體之W粒子單質的情形,電傳導性及熱傳導性更佳,故而使用該等兩種金屬微粒878及978而生成之多孔質燒結體(貫穿/內嵌電極),若其內部之Cu含量比在60重量%以下,則具有與W近似之熱膨脹率。 Reference numeral 878 denotes a metal fine particle in which a W particle impregnated with a polyhedron of Cu is used as a core, and a surface of the core is covered with a Sn coating. Reference numeral 978 denotes a metal fine particle in which a W or Mo particle impregnated with a polyhedron of Ag or Cu is used as a core, and a surface of the core is covered with an Au film. When the metal particles 558 having the W particles doped with the polyhedron of Cu are used, the electrical conductivity and the thermal conductivity are better than those of the W particles using the polyhedron. Therefore, the two kinds of metal particles 878 and 978 are used. The resulting porous sintered body (through/embedded electrode) has a coefficient of thermal expansion similar to W when the content of Cu in the interior is 60% by weight or less.

圖6(f)以及圖6(g)表示貫穿/內嵌電極之內部中各種微粒的狀態。 Fig. 6 (f) and Fig. 6 (g) show the state of various fine particles in the inside of the penetrating/embedded electrode.

構成貫穿/內嵌電極之多孔質燒結体57、257填充於開孔51、251之內部,實現基板50或250之厚度方向(圖6(f)以及圖6(g)中為上下方向)的電性連接。藉由此種構成,可將構成貫穿/內嵌電極之多孔質燒結体57或257與矽等基板50或250的熱膨脹係數差保持得較小,從而防止開孔51 或251之應力破壞的發生。進而亦可降低貫穿/內嵌電極之電阻,通過貫穿/內嵌電極之散熱特性亦變得良好。 The porous sintered bodies 57 and 257 constituting the penetrating/insertion electrodes are filled in the inside of the openings 51 and 251, and the thickness direction of the substrate 50 or 250 (the vertical direction in FIGS. 6(f) and 6(g)) is achieved. Electrical connection. With such a configuration, the difference in thermal expansion coefficient between the porous sintered body 57 or 257 constituting the penetrating/embedded electrode and the substrate 50 or 250 such as ruthenium can be kept small, thereby preventing the opening 51 from being formed. Or 251 stress damage occurs. Further, the resistance of the through/embedded electrode can be lowered, and the heat dissipation characteristics of the through/embedded electrode can also be improved.

圖6(h)係模式性地表示圖6(d)所示之貫穿/內嵌電極之內部構造。同圖之貫穿/內嵌電極包含:由「以W、Mo、Si等構成之核(core)658;以及被覆其表面之Ni、Cu、Ti、Cr或Ta的被膜(skin)689及Au、Ag、或Pt之被膜(skin)589」構成之金屬微粒558;以及由「由W、Mo、Si等構成之核(core)658;以及被覆其表面之Sn單質、Sn-Ag合金、或Sn-Ag-Cu合金之被膜(skin)789」構成的金屬微粒558。如同圖所示,藉由於兩種導電性微粒之結合部形成網狀或部分Au-Sn共晶合金接合部861,構成多孔質燒結體(貫穿/內嵌電極)之母材,於該母材之周圍存在之空隙部以銦或銦合金(熔融液)61、261填充。 Fig. 6(h) schematically shows the internal structure of the through/inserted electrode shown in Fig. 6(d). The through/embedded electrode of the same figure includes: a core 658 composed of W, Mo, Si, or the like; and a skin 689 and Au covering Ni, Cu, Ti, Cr, or Ta on the surface thereof, Metal particles 558 composed of Ag or Pt skin 589"; and "core" 658 composed of W, Mo, Si, etc.; and Sn elemental material, Sn-Ag alloy, or Sn covering the surface thereof - Metal particles 558 composed of a skin of the Ag-Cu alloy 789". As shown in the figure, a base material or a partial Au-Sn eutectic alloy joint portion 861 is formed by a joint portion of two kinds of conductive fine particles, and a base material of a porous sintered body (through/embedded electrode) is formed on the base material. The void portion existing around it is filled with indium or indium alloy (melt) 61, 261.

如上所述,本發明之第4實施形態中貫穿/內嵌電極之形成方法,是準備由被兩種相對低熔點之金屬被膜589及689表面被覆之核微粒(例如W之微粒)構成的第1導電性微粒;與由被相對高熔點之金屬789表面被覆之與上述第1導電性微粒同種之核微粒(例如W之微粒)構成的第2導電性微粒,將兩者混合,藉此可提供一種電極構造,該電極構造使用圖6之多面體導電粒子358、458、558並具有部分合金接合部589、789、網狀Au-Sn共晶合金接合部861而兼具良好導電性、以及因良好放熱、良好熱傳導性而來之低熱阻特性及低熱膨脹特性。 As described above, in the fourth embodiment of the present invention, the method of forming the through/insertion electrode is to prepare a core particle (for example, a fine particle of W) which is coated with the surface of the metal film 589 and 689 which are relatively low-melting. 1 conductive fine particles; and second conductive fine particles composed of core fine particles (for example, fine particles of W) which are coated with the surface of the metal 789 having a relatively high melting point and which are the same as the first conductive fine particles, may be mixed Provided is an electrode structure using the polyhedral conductive particles 358, 458, and 558 of FIG. 6 and having a partial alloy joint portion 589, 789, a reticulated Au-Sn eutectic alloy joint portion 861 to have good electrical conductivity, and Good exothermic, good thermal conductivity and low thermal resistance and low thermal expansion.

進而,可於300℃以下得到偽燒結体,於275℃導電性微粒彼此可強力接合,因此,可維持與由W單質構成之燒結體甚為相似的特性。故而可實現對於電子零件安裝耐性優異之電極或電極構造。 Further, since the pseudo sintered body can be obtained at 300 ° C or lower, and the conductive fine particles can be strongly bonded to each other at 275 ° C, the characteristics similar to those of the sintered body composed of the W element can be maintained. Therefore, an electrode or an electrode structure excellent in mounting resistance to electronic parts can be realized.

藉由本發明,可以顯著改善貫穿/內嵌電極之可靠性及訊號傳輸特性。藉由該改善,可實現伴隨半導體製造技術之微細化發展的高密度貫穿/內嵌電極的配置。 With the present invention, the reliability and signal transmission characteristics of the through/embedded electrodes can be remarkably improved. With this improvement, it is possible to realize a configuration of a high-density through/insertion electrode that is accompanied by the development of microfabrication of semiconductor manufacturing technology.

在此,對圖6(c)~圖6(e)中所示之導電性微粒,即,可較佳使用於本發明之貫穿/內嵌電極的材料(電極材料),作如下之補充說明。 Here, the conductive fine particles shown in FIGS. 6(c) to 6(e), that is, the material (electrode material) which can be preferably used in the through/embedded electrode of the present invention, are supplemented as follows. .

(1)關於圖6(b)所示之於核(core)之表面被覆單一之被膜(skin)的微粒458。 (1) The fine particles 458 which are coated with a single film on the surface of the core shown in Fig. 6(b).

作為核(core)可使用之微粒,除上述之由W、Mo、或Si單質構成之微粒以外,亦可使用Si以外之半導體之微粒、鉻鎳鐵耐熱耐蝕合金等之合金的微粒;SiC、AlN等之陶瓷的微粒;硼矽玻璃、耐熱玻璃(TEMPAX glass)、Eagle glass等之無機材料的微粒;聚醯亞胺改質材料等之有機材料的微粒;有機材料與無機材料之混合體的微粒。 As the fine particles which can be used as a core, in addition to the above-mentioned fine particles composed of W, Mo, or Si elemental materials, fine particles of semiconductors other than Si, fine particles of alloys such as chrome-nickel-iron heat-resistant corrosion-resistant alloy, and SiC, may be used. Ceramic particles of AlN, etc.; particles of inorganic materials such as borosilicate glass, TEMPAX glass, Eagle glass; particles of organic materials such as polyimine modified materials; mixtures of organic materials and inorganic materials particle.

可作為被膜(skin)使用之導電材,除了上述之Ni、Cu、Sn、Au、Ag外,可用Pd、Co、Cr、Cu-Sn、Ni-Au、Zn、Al。 A conductive material which can be used as a skin, in addition to the above-mentioned Ni, Cu, Sn, Au, Ag, Pd, Co, Cr, Cu-Sn, Ni-Au, Zn, Al can be used.

(2)關於圖6(c)所示之具備兩種不同之相對高熔點之金屬被膜589與689的微粒558。 (2) Particles 558 having metal films 589 and 689 having two different relatively high melting points as shown in Fig. 6(c).

作為核(core)658可使用之微粒,與圖6(b)所示之微粒458相同。 The particles which can be used as the core 658 are the same as the particles 458 shown in Fig. 6(b).

作為配置於最外側之相對高熔點之金屬被膜589可使用的材料,可用上述之Au、Ag、或Pt,還有Pd、Cu或該等之合金。 As the material which can be used as the metal film 589 which is disposed on the outermost side of the relatively high melting point, the above-mentioned Au, Ag, or Pt, and also Pd, Cu or the like can be used.

作為配置於核(core)658與最外面之金屬被膜589之間的相對高熔點之金屬被膜689可使用的材料,除上述Ni、Cu、Ti、Cr、或Ta以外,可使用Pd、Co。 A material which can be used as the metal film 689 having a relatively high melting point disposed between the core 658 and the outermost metal film 589 can be Pd or Co in addition to the above-described Ni, Cu, Ti, Cr, or Ta.

(3)關於圖6(d)所示之具備一種相對低熔點之金屬被膜789的微粒558。 (3) A fine particle 558 having a metal film 789 having a relatively low melting point as shown in Fig. 6(d).

作為核(core)658可使用之微粒,與圖6(b)所示之微粒458相同。 The particles which can be used as the core 658 are the same as the particles 458 shown in Fig. 6(b).

作為相對低熔點之金屬被膜789可使用之材料,除上述Sn單質、Sn-Ag合金、或Sn-Ag-Cu合金以外,可使用Zn、Bi、Ga、Pb、Cu-Sn或該等之合金。 As a material which can be used as the metal film 789 of a relatively low melting point, in addition to the Sn elemental material, the Sn-Ag alloy, or the Sn-Ag-Cu alloy, Zn, Bi, Ga, Pb, Cu-Sn or the like may be used. .

(4)關於圖6(e)所示之含浸Cu之W粒子之表面以Sn被膜(skin)覆蓋的金屬微粒878。 (4) Metal particles 878 in which the surface of the W-impregnated W particles shown in Fig. 6(e) is covered with a Sn film.

作為核(core)可使用之微粒,與圖6(b)所示之微粒458相同。 The particles which can be used as a core are the same as the particles 458 shown in Fig. 6(b).

作為可含浸之材料,除上述Cu以外,可使用Ag、Zn、Al、Ni、Cd。 As the material which can be impregnated, in addition to the above Cu, Ag, Zn, Al, Ni, and Cd can be used.

作為被膜(skin)可使用之材料,除上述Sn單質以外,可使用Zn、Cu、Cd、Cu-Sn、Cu-Sn-Ag或該等之合金。 As the material which can be used as a skin, in addition to the above-mentioned Sn element, Zn, Cu, Cd, Cu-Sn, Cu-Sn-Ag or the like can be used.

(5)關於圖6(e)所示之含浸Ag或Cu之W或Mo粒子之表面被Au被膜(skin)覆蓋的金屬微粒978。 (5) The metal fine particles 978 in which the surface of the W or Mo particles impregnated with Ag or Cu shown in Fig. 6(e) is covered with an Au film.

作為核(core)可使用之微粒,與圖6(b)所示之微粒458相同。 The particles which can be used as a core are the same as the particles 458 shown in Fig. 6(b).

作為可含浸之材料,除上述Ag、Cu以外,可使用Ag、Zn、Al、Ni、Cd。 As the material which can be impregnated, Ag, Zn, Al, Ni, and Cd can be used in addition to the above Ag and Cu.

作為被膜(skin)可使用之材料,除上述Au以外,可使用Ag、Pt、Pd、Zn、Cu、Cu-Sn、Cu-Sn-Ag等。 As a material which can be used as a skin, in addition to the above Au, Ag, Pt, Pd, Zn, Cu, Cu-Sn, Cu-Sn-Ag or the like can be used.

以上,參照圖式就本發明較佳之實施形態進行說明。本發明可以多種不同之態樣實施,若為同領域業者,可容易地理解在不脫離本發明之主旨與其範疇之情形可進行各種其形態及細節的變更。因此,本發明不局限於闡述內容。 The preferred embodiments of the present invention have been described above with reference to the drawings. The invention may be embodied in a variety of different forms, and it can be readily understood that various changes in form and details may be made without departing from the spirit and scope of the invention. Therefore, the invention is not limited to the description.

(產業上之利用可能性) (industrial use possibility)

本發明之貫穿/內嵌電極及其製造方法,在半導體領域,尤其是三維化結構為基本要素之技術,故而本發明並不單限定於貫穿電極或內嵌電極,可廣泛地適用於應用有該等之三維積體電路(存儲電路,演算處理電路,和驅動器等)或感測系統(sensor system)。 The through/embedded electrode of the present invention and the method of manufacturing the same are in the semiconductor field, and in particular, the three-dimensional structure is a basic element. Therefore, the present invention is not limited to the through electrode or the embedded electrode, and can be widely applied to the application. A three-dimensional integrated circuit (storage circuit, arithmetic processing circuit, and driver, etc.) or a sensor system.

Claims (9)

一種貫穿/內嵌電極,其具備:多孔質之第1導電體;被填充於上述第1導電體之內部之空隙部的第2導電體;上述第1導電體係將導電性被膜被覆在成為核之微粒之表面而形成的導電性微粒之燒結體;上述第2導電體,其材質與上述第1導電體不同,且由下述金屬或合金構成,上述金屬或合金具有比形成上述第1導電體的上述導電性微粒之燒結溫度更低的熔點;上述第1導電體之內部中,上述導電性微粒之上述導電性被膜彼此部分接觸之部份形成有合金接合部,而該合金接合部與剩下之上述導電性被膜形成立體網狀之傳導路徑,於位在該傳導路徑之間的上述空隙部填充有上述第2導電體而賦予導電性。 A penetrating/embedded electrode comprising: a porous first conductor; a second conductor filled in a void portion inside the first conductor; and the first conductive system covering the conductive film as a core a sintered body of conductive fine particles formed on the surface of the fine particles; the second conductive material is made of a metal or an alloy different from the first conductive material, and the metal or alloy has a ratio of forming the first conductive material a melting point at which the sintering temperature of the conductive fine particles is lower; and in the inside of the first conductive body, an alloy joint portion is formed in a portion where the conductive particles of the conductive fine particles partially contact each other, and the alloy joint portion and the alloy joint portion The remaining conductive film forms a three-dimensional network-shaped conduction path, and the second conductive body is filled in the gap portion between the conductive paths to impart conductivity. 如申請專利範圍第1項之貫穿/內嵌電極,其中,上述合金接合部係藉由利用燒結所生成共晶合金來形成。 The through/embedded electrode of claim 1, wherein the alloy joint portion is formed by a eutectic alloy formed by sintering. 如申請專利範圍第1項之貫穿/內嵌電極,其中,上述第1導電體之上述導電性微粒具有不超過配置該貫穿/內嵌電極之基板之熱膨脹係數3倍的熱膨脹係數。 The through/embedded electrode of the first aspect of the invention, wherein the conductive fine particles of the first conductor have a thermal expansion coefficient not exceeding 3 times a thermal expansion coefficient of a substrate on which the through/insertion electrode is disposed. 如申請專利範圍第2項之貫穿/內嵌電極,其中,上述第1導電體之上述導電性微粒具有不超過配置該貫穿/內嵌電極之基板之熱膨脹係數3倍的熱膨脹係數。 The through/embedded electrode of claim 2, wherein the conductive fine particles of the first conductor have a thermal expansion coefficient not exceeding 3 times a thermal expansion coefficient of a substrate on which the through/embedded electrode is disposed. 如申請專利範圍第1至4項中任一項之貫穿/內嵌電極,其中,上述第 1導電體之上述導電性被膜係由熔點不同之2種以上之導電性被膜所形成。 The through/embedded electrode of any one of claims 1 to 4, wherein the above The conductive film of the first conductor is formed of two or more kinds of conductive films having different melting points. 一種電極材料,含有成為核之微粒之表面被導電性被膜覆蓋且粒徑在0.5μm~10μm之範圍的至少1種導電性微粒;上述導電性微粒,係上述導電性被膜之熔點不同之2種以上之導電性粒子的混合體,或者,具有包含種類不同之至少2種金屬或合金的多層構造之導電性被膜;上述導電性被膜之厚度在上述導電性微粒之外形尺寸的10分之1至200分之1的範圍,於燒結時,上述導電性微粒之上述導電性被膜彼此部分接觸之部份形成有合金接合部,而該合金接合部與剩下之上述導電性被膜形成立體網狀之傳導路徑。 An electrode material comprising at least one type of conductive fine particles having a surface of the fine particles of the core covered with a conductive film and having a particle diameter of 0.5 μm to 10 μm; and the conductive fine particles having two different melting points of the conductive film a mixture of the above conductive particles or a conductive film having a multilayer structure including at least two kinds of metals or alloys of different types; the thickness of the conductive film being one-tenth of the size of the conductive particles to 1 to In the range of 1/200, at the time of sintering, the portion of the conductive fine particles in which the conductive films are partially in contact with each other forms an alloy joint portion, and the alloy joint portion and the remaining conductive film form a three-dimensional network. Conduction path. 如申請專利範圍第6項之電極材料,其中,成為上述核之上述微粒之表面被熔點不同之2種以上之導電性被膜覆蓋。 The electrode material of the sixth aspect of the invention, wherein the surface of the fine particles which are the cores is covered with two or more kinds of conductive films having different melting points. 如申請專利範圍第6或7項之電極材料,其中,上述導電性微粒係由(a)包含鎢或鉬之金屬、合金、或金屬化合物、(b)半導體、(c)玻璃、(d)陶瓷或(e)有機材料、或者該等之混合物所形成者,且上述導電性微粒之熱膨脹係數,不超過配置該電極材料之基板之熱膨脹係數之3倍(即,低於或等於3倍)。 The electrode material according to claim 6 or 7, wherein the conductive particles are (a) a metal, an alloy, or a metal compound containing tungsten or molybdenum, (b) a semiconductor, (c) glass, (d) a ceramic or (e) an organic material, or a mixture of the same, wherein the conductive particles have a coefficient of thermal expansion that is not more than three times the coefficient of thermal expansion of the substrate on which the electrode material is disposed (ie, less than or equal to three times) . 一種貫穿/內嵌電極之製造方法,用以製造配置於形成在基板之開孔內的貫穿/內嵌電極,其特徵在於具備下述步驟: 於上述開孔內填充含有申請專利範圍第6至8項中任一項之電極材料第1導電體用膏並使其乾燥;固相燒結填充於上述開孔內之該第1導電體用膏,而形成多孔質第1導電體;以覆蓋上述第1導電體之方式塗佈第2導電體用膏;對上述第2導電體用膏進行熱處理而使其熔解,使其含浸、固化於上述第1導電體。 A method of manufacturing a through/embedded electrode for fabricating a through/embedded electrode disposed in an opening formed in a substrate, characterized by the steps of: Filling the opening with a paste for the first conductive material of the electrode material according to any one of claims 6 to 8 and drying it; and solid-phase sintering the first conductive paste filled in the opening a porous first conductor; a second conductor paste applied to cover the first conductor; and the second conductor paste is heat-treated, melted, impregnated, and cured The first conductor.
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