TWI587639B - A feed forward sigma-delta adc modulator - Google Patents

Description

Feedforward triangular integral analog to digital converter

The invention relates to a feedforward triangular integral analog to digital converter. In particular, it relates to a delta-sigma analog-to-digital converter that integrates a feedback circuit, an addition circuit, and a quantization circuit.

Sigma-delta modulation (SDM) is widely used in various electronic components such as analog-to-digital converters, switched capacitor filters, frequency synthesizers, and wireless communication systems. When applied to analog-to-digital converters, since the triangular integral modulation has the characteristics of noise shaping, the higher the order of the triangular integral modulation, the better the effect of noise shaping, and the improved signal noise ratio ( The advantage of signal-to-noise ratio (SNR). Since the n-order delta-sigma modulator requires n integrators to implement, the architecture of the higher-order delta-sigma modulator with second-order or higher is used, which increases power consumption and circuit area. In addition, the higher the delta integral modulation order, the more susceptible the circuit is to instability.

Taiwan Patent No. I350067 discloses a framework of a triangular integral analog digital modulator, in which a feedforward feedback connection method is adopted between a plurality of integrators to improve the stability of the system, but it is also matched later. Adders, gain stage amplifiers, and quantizers produce output signals, and complex circuit architectures increase Circuit area and power consumption.

Taiwan Patent No. I437826 discloses a shared integrator that uses only n/2 (when n is an even number) or (n+) when using an n-order delta-sigma modulator. 1)/2 (when n is an odd number) integrators, and with the operation method disclosed in this patent, each integrator performs two integral operations to realize the function of the n-order triangular integral modulator and reduce the electronic system. Area and power consumption. The disadvantage is that when applying the triangular integral modulator of the third order or more, the n/2 or (n+1)/2 integrators are connected in series, and the direct integrator can easily cause instability of the circuit system, and the integral operation The number of integrators will also increase with the number of integrators. A total of n or (n+1) integration operations are required to reduce the operating speed of the system. Taking a 3rd-order triangular integral modulator as an example, the architecture requires 2 integrators, and a total of 4 integral operations are required. Compared to the 2nd-order triangular integral modulator, only 2 integral operations are needed, which is applied to the analog digits. In the converter, the conversion speed of the 3rd-order delta-sigma modulator is only half of the conversion speed of the 2nd-order delta-sigma modulator.

In view of the above problems of the prior art, the present invention provides a feedforward triangular integral analog-to-digital converter in which a feedback circuit, an addition circuit, and a quantization circuit are integrated. The integrated circuit architecture has the advantage of high stability, does not require active circuits, and uses a continuous approximation control circuit, so that multi-bit quantization can be achieved with only one comparator.

This paragraph of text extracts and compiles some of the features of the present invention; other features will be described in subsequent paragraphs. Its purpose is to cover the spirit of the scope of the patents that follow Different refinements and similar arrangements with the scope.

In order to solve the above problems, the present invention provides a feedforward triangular integral analog-to-digital converter, comprising: an input capacitor switching circuit, which receives an input timing control signal, an input voltage, and a capacitance switching signal, and generates An integral input signal; a feedforward integrator receiving the integrated input signal, a continuous progressive control signal, and an input timing control signal, and generating an integrated output signal; a multi-bit quantizer receiving the integral Outputting a signal and a quantized reference control signal, and generating a modulated output signal; a continuous progressive control circuit receiving the modulated output signal, generating the quantized reference control signal, the continuous progressive control signal, and a data weighted average And a data weighted averaging circuit that receives the weighted average signal of the data and generates the capacitance switching signal.

According to the concept of the present invention, the feedforward integrator includes a plurality of integration circuits for processing integration operations, and the connection manner of the plurality of integration circuits includes: the plurality of integration circuits are connected in series to a plurality of stages, and a first stage integration circuit Receiving the integral input signal, and performing an integral operation to generate a series of output signals connected to the input end of the second stage integration circuit, and then the output signal of the integration circuit of the previous stage is connected to the input end of the next stage integration circuit; and the integration circuits of the stages Another output signal is generated separately, and the output signals are connected to each other to become the integrated output signal.

According to the invention, the first stage integration circuit and the intermediate stage integration circuit comprise: a first group of switch circuits, wherein the input end of the first group of switch circuits is coupled to an integral input signal, and the output end is coupled to an amplifier An input, wherein an input of one of the amplifiers is coupled to an output of the first set of switching circuits The other input end is grounded, and the output end is coupled to a second group of switch circuits and an input end of a third group of switch circuits; the second group of switch circuits, wherein the input ends of the second group of switch circuits are coupled Connected to the output of the amplifier, the output is coupled to a second capacitor; the third group of switching circuits, wherein the input of the third group of switching circuits is coupled to the output of the amplifier, and the output is coupled to the a third capacitor is coupled between the output of the first group of switching circuits and the input of the amplifier; the second capacitor is coupled to the output of the second group of switching circuits and Between the integrated output signals; and the third capacitor is coupled between the output of the third group of switching circuits and the serial output signal.

According to the present invention, the last stage of the integration circuit includes: a first group of switching circuits, wherein the input end of the first group of switching circuits is coupled to an integrated input signal, and the output end is coupled to an input of an amplifier; the amplifier The input end of the amplifier is connected to the output end of the first group of switch circuits, the other input end is grounded, and the output end is coupled to the input end of a second group of switch circuits; An input end of the second group of switching circuits is coupled to the output end of the amplifier, and an output end is coupled to a second capacitor; a first capacitor is coupled to the output end of the first group of switching circuits and the amplifier The second capacitor is coupled between the output of the second group of switching circuits and the integrated output signal.

According to the present invention, the first stage integration circuit and the intermediate stage integration circuit include: a first group of switch circuits, wherein the input ends of the first group of switch circuits are coupled to an integrated input signal; a differential amplifier, wherein a positive input terminal of the differential amplifier is coupled to an output end of the first group of switching circuits; a second group of switching circuits, An input end of the second group of switching circuits is coupled to a negative output end of the differential amplifier; a third group of switching circuits, wherein an input end of the third group of switching circuits is coupled to a negative output end of the differential amplifier a first capacitor coupled between the positive input terminal and the negative output terminal of the differential amplifier; a second capacitor coupled between the output terminal of the second group of switch circuits and the integrated output signal; a three capacitor coupled between the output end of the third group of switching circuits and the serial output signal; a negative end of the first group of switching circuits, wherein the input end of the negative end of the first group of switching circuits is coupled to a negative input a negative second switch circuit, wherein the input end of the second switch circuit of the negative terminal is coupled to the positive output of the differential amplifier; and the third switch circuit of the negative terminal, wherein the negative terminal is third. An input end of the group switching circuit is coupled to the positive output end of the differential amplifier; a negative end first capacitor is coupled between the negative input end and the positive output end of the differential amplifier; and a negative end second capacitor, Coupling to the second group of switching circuits of the negative terminal Between a terminal and a negative integrator output signal; and a negative terminal of a third capacitor, coupled between the output terminal of the third set of switching circuits connected in series and a negative output signal of the negative terminal.

According to the present invention, the final stage integration circuit and the intermediate stage integration circuit include: a first group of switch circuits, wherein the input ends of the first group of switch circuits are coupled to an integrated input signal; a differential amplifier, wherein the difference The positive input terminal of the dynamic amplifier is coupled to the output end of the first group of switching circuits; a second group of switching circuits, wherein the input end of the second group of switching circuits is coupled to the negative output terminal of the differential amplifier; a capacitor coupled between the positive input terminal and the negative output terminal of the differential amplifier; a second capacitor coupled between the output terminal of the second group of switch circuits and the integrated output signal; Group switch circuit, wherein the negative end of the first group of switches The input end of the circuit is coupled to a negative input signal; the second end of the negative switch circuit, wherein the input end of the negative end of the second set of switch circuits is coupled to the positive output end of the differential amplifier; a capacitor coupled between the negative input terminal and the positive output terminal of the differential amplifier; and a negative terminal second capacitor coupled between the output terminal of the second group of switching circuits of the negative terminal and a negative integrated output signal .

According to the inventive concept, the first group of switching circuits includes: a first switch coupled between the input end and the output end, and the switch state is controlled by the first switch control signal; and a second switch coupled to the input Between the terminal and the ground, and the switch state is controlled by the second switch control signal; the second set of switch circuits includes: a first switch coupled between the input end and the output end, and controlled by the first switch control signal a switch state; and a second switch coupled between the output terminal and the ground terminal, and the switch state is controlled by the second switch control signal.

According to the inventive concept, the control method of the switch circuits includes: a first operation timing, generating a first timing signal, wherein the left and right ends of each of the first group of switch circuits are not turned on, and the left side is connected Point grounding, the right contact is in a floating state, and the left and right terminals of each second group of switching circuits are turned on, and the left and right terminals of each third group of switching circuits are not turned on, so that the timing is integrated with each stage. The second capacitor performs charging sampling; a continuous progressive control timing generates a continuous progressive control signal, sequentially turns on the third group of switching circuits of each stage of the integrating circuit, and controls the charging capacity of the third capacitor of each level of the integrating circuit. At this time, each of the second group of switching circuits and the left and right ends of the third group of switching circuits are not turned on; and a second timing, the left and right ends of each of the first group of switching circuits are connected When conducting, at the same time, the left and right ends of each of the second group of switching circuits are not turned on, and the left contact is in a floating state, the right contact is grounded, and the left and right ends of each of the third group of switching circuits are not turned on.

According to the invention, the capacitance of the second capacitor or the second capacitor of the integrator circuits can be adjusted, and the magnitude of the integrated output signal is adjusted accordingly.

According to the inventive concept, the input capacitor switching circuit includes a plurality of capacitor switching units connected in parallel, the capacitor switching unit receiving a positive reference voltage, a negative reference voltage, an input voltage, a timing signal, and a switching signal, and generating an output signal; The capacitor switching unit includes: a first switch, wherein one end is connected to a positive reference voltage; a second switch is connected between a negative reference voltage and the first switch; and a third switch, one end Connected to the first switch and the second switch, the other end is grounded; a fourth switch, one end of which is connected to an input voltage; and a fifth switch, one end of which is connected to the fourth switch, and the other end Grounding; a first switching capacitor, wherein one end is connected to the first switching switch, the second switching switch and the third switching switch, and the other end is connected to the output end; and a second switching capacitor, wherein the one end and the second The switch and the third switch are connected, and the other end is connected to the output.

According to the inventive concept, the control method of the switch includes: a first operation timing, generating a first timing signal, directly turning on the fourth switch, and simultaneously turning on each of the capacitor switching units according to a thermometer code The first switch and the second switch, at this time, the third switch and the fifth switch do not And a second operation timing, generating a second timing signal, directly turning on the third switching switch and the fifth switching switch, and the first switching switch, the second switching switch, and the fourth switching switch are not turned on.

According to the inventive concept, the multi-bit quantizer includes a comparator, and uses a continuous progressive control circuit to generate a quantized reference control signal, thereby adjusting the comparison level of the comparator, so that the comparator generates multi-bits. One of the modulation output signals.

1‧‧‧Feed-forward triangular integral analog-to-digital converter

10‧‧‧Input Capacitor Switching Circuit

20‧‧‧Feed-forward integrator

21‧‧‧First-stage integration circuit

22‧‧‧Second stage integration circuit

23‧‧‧ Third-level integration circuit

30‧‧‧Multi-bit quantizer

S31‧‧‧Quantitative reference control signal

S32‧‧‧ modulated output signal

40‧‧‧Continuous progressive control circuit

50‧‧‧ data weighted average circuit

S51‧‧‧ data weighted average signal

S124‧‧‧ Thermometer code signal

S125‧‧‧ input timing control signal

241‧‧‧The first set of switching circuits

242‧‧‧Second group of switching circuits

243‧‧‧The third group of switching circuits

244‧‧‧first capacitor

245‧‧‧second capacitor

246‧‧‧ third capacitor

247‧‧Amplifier

248‧‧‧First switch

249‧‧‧second switch

S52‧‧‧Capacitor switching signal

101‧‧‧Input Capacitor Switching Unit

111‧‧‧First switch

112‧‧‧Second switch

113‧‧‧The third switch

114‧‧‧fourth switch

115‧‧‧ fifth switch

116‧‧‧First switching capacitor

117‧‧‧Second switching capacitor

121‧‧‧ positive reference voltage

122‧‧‧negative reference voltage

123‧‧‧Input voltage

251‧‧‧Negative first group switching circuit

252‧‧‧Negative second group switching circuit

253‧‧‧Negative third group switch circuit

254‧‧‧Negative first capacitor

255‧‧‧negative second capacitor

256‧‧‧negative third capacitor

257‧‧‧Differential Amplifier

S261‧‧‧ integral input signal

S262‧‧‧Integral timing control signal

S263‧‧‧Continuous progressive control signal

S264‧‧‧Integral output signal

S265‧‧‧ serial output signal

FIG. 1 is a diagram showing a feedforward triangular integral analog-to-digital converter configuration according to the present invention.

2 is a block diagram of a feedforward integrator in accordance with the present invention.

FIG. 3 is a diagram showing a single-stage integration circuit architecture of a feedforward integrator according to the present invention.

Figure 4 is a circuit diagram of a feedforward integrator in accordance with the present invention.

FIG. 5 is a diagram showing a single-stage integrated differential circuit architecture of a feedforward integrator according to the present invention.

Figure 6 is a diagram showing the architecture of an input capacitor switching circuit in accordance with the present invention.

Figure 7 is a diagram showing the architecture of an input capacitor switching unit in accordance with the present invention.

FIG. 8 is a circuit diagram showing a differential circuit of a feedforward integrator and a multi-bit quantizer according to the present invention.

Figure 9 is a diagram showing the structure of a first group of switching circuits and a second group of switching circuits in each stage of the integrator circuit of a feedforward integrator according to the present invention.

The invention will be more clearly described with reference to the following examples. It is to be noted that the following description of the embodiments of the present invention is intended to be illustrative only.

First, please refer to FIG. 1 and refer to FIG. 8, which shows the architecture of a third-order feedforward triangular integral analog-to-digital converter. The feedforward triangular integral analog-to-digital converter 1 includes an input capacitor switching circuit 10, a feedforward integrator 20, a multi-bit quantizer 30, a continuous progressive control circuit 40, and a data weighted average. Circuit 50. The input capacitor switching circuit 10 receives an input timing control signal 125, an input voltage s123, and a capacitor switching signal s52, and generates an integrated input signal s261. The feedforward integrator 20 receives the integrated input signal s261, a continuous progressive control signal s263, and an input timing control signal s125, and generates an integrated output signal s264. The multi-bit quantizer 30 receives the integrated output signal s264 and a quantized reference control signal s31 and produces a modulated output signal s32. The continuous progressive control circuit 40 receives the modulated output signal s32, and generates the quantized reference control signal s31, the continuous progressive control signal s263, and a data weighted average signal s51. The data weighted average circuit 50 receives the data weighted average signal s51 and generates the capacitance switching signal s52.

Next, please refer to FIG. 2, which shows the architecture of a feedforward integrator 20. The feedforward integrator 20 is formed by serially integrating a plurality of integrating circuits for processing integral operations, and controls the output of each stage of the integrating circuit by a control signal. In this embodiment, the feedforward integrator 20 includes a first stage integration circuit 21 and a second stage integration. The circuit 22 and a third stage integrating circuit 23. The first stage integrating circuit 21 receives the integrated input signal s261 and an integral timing control signal s262, and generates one or two output signals through an integral operation, which are respectively connected to the next stage integrating circuit and the last output point. The intermediate stage integral circuit receives the output signal of the previous stage and the control signal, and generates two output signals through the integral operation, which are respectively connected to the next stage integral circuit and the last output point. The last stage of the integration circuit receives the output signal of the previous stage and the control signal, and generates an output signal through the integral operation, which is directly connected to the last output point.

Referring again to FIG. 3, a single stage integration circuit architecture of the feedforward integrator 20 is shown. Taking the first stage integration circuit 21 of the feedforward integrator 20 as an example, the first stage integration circuit 21 includes an amplifier 247 and three capacitors (a first capacitor 244, a second capacitor 245, and a third capacitor 246). And three sets of switching circuits (the first group of switching circuits 241, the second group of switching circuits 242, and the third group of switching circuits 243). The input end of the first group of switch circuits 241 is coupled to the integrated input signal s261, and the output end thereof is coupled to an input end of the amplifier 247. The other input of the amplifier 247 is grounded, and the output is coupled to the input of the second group of switching circuits 242 and the third group of switching circuits 243. The first capacitor 244 is coupled between the output of the first group of switch circuits 241 and the input of the amplifier 247. The second capacitor 245 is coupled between the output of the second group of switching circuits 242 and the integrated output signal s264. The third capacitor 246 is coupled between the output of the third group of switch circuits 243 and the serial output signal s265. The architecture of the intermediate stage integration circuit is the same as that of the first stage integration circuit 21, except that the input end of the first stage integration circuit 21 receives the integral input signal s261, and the input end of the intermediate stage integration circuit receives the previous stage of the series connection. The signal s265 is output.

Next, please refer to FIG. 3 and FIG. 4 simultaneously, which shows a circuit diagram of the feed-integrator 20 of the present invention. The last-stage integration circuit 23 of the feedforward integrator 20 includes an amplifier 247, two capacitors, and two. Group switching circuit. The input end of the first group of switch circuits 241 is coupled to the integrated input signal s261 and the integrated timing control signal s262, and the output end thereof is coupled to the input end of the amplifier 247. The other input of the amplifier 247 is grounded, and the output is coupled to the input of the second group of switch circuits 242. The first capacitor 244 is coupled between the output of the first group of switch circuits 241 and the input of the amplifier 247. The second capacitor 245 is coupled between the output of the second group of switching circuits 242 and the integrated output signal s264.

Referring to Figure 5, there is shown a single stage integrated differential circuit architecture of the feed integrator 20 of the present invention. According to the concept of the present invention, the first stage integration circuit 21 of the feedforward integrator 20 can also be implemented by using a differential architecture, which has the effect of improving the signal noise ratio (SNR), and the architecture includes a differential amplifier 257, six. Capacitors (first capacitor 244, second capacitor 245, third capacitor 246, negative terminal first capacitor 254, negative terminal second capacitor 255, negative terminal third capacitor 256) and six sets of switching circuits (first group of switching circuits) 241, a second group of switching circuits 242, a third group of switching circuits 243, a negative terminal first group switching circuit 251, a negative terminal second group switching circuit 252, and a negative terminal third group switching circuit 253). The input end of the first group of switch circuits 241 is coupled to the integrated input signal s261 and the integrated timing control signal s262, and the output end thereof is coupled to the positive input terminal of the differential amplifier 257. The negative output of the differential amplifier 257 is coupled to the input of the second group of switching circuits 242 and the third group of switching circuits 243. The first capacitor 244 is coupled between the output of the first group of switch circuits 241 and the positive input of the differential amplifier 257. The The second capacitor 245 is coupled between the output of the second group of switch circuits 242 and the integrated output signal s264. The third capacitor 246 is coupled between the output of the third group of switch circuits 243 and the serial output signal s265. The input end of the first group of switch circuits 251 of the negative terminal is coupled to the input signal of the negative terminal, and the output end of the circuit is coupled to the negative input terminal of the differential amplifier 257. The positive output terminal of the differential amplifier 257 is simultaneously coupled to the input terminal of the negative terminal second group switch circuit 252 and the negative terminal third group switch circuit 253. The negative terminal first capacitor 254 is coupled between the output terminal of the negative terminal first group of switching circuits 251 and the negative input terminal of the differential amplifier 257. The negative terminal second capacitor 255 is coupled between the output terminal of the negative second group switch circuit 252 and the negative terminal integrated output signal s264. The negative terminal third capacitor 256 is coupled between the output terminal of the negative terminal third group switching circuit 253 and the negative terminal series output signal s265. The architecture of the intermediate stage integration circuit is the same as that of the first stage integration circuit 21, except that the input end of the first stage integration circuit 21 receives the input signal and the negative input signal, and the input of the intermediate stage integration circuit receives the previous stage. The positive terminal is connected in series with the output signal s265 and the negative terminal is connected in series with the output signal s265.

The last stage integration circuit 23 of the feed integrator 20 of the present invention can also be implemented by a differential architecture, the architecture of which includes a differential amplifier 257 and four capacitors (a first capacitor 244, a second capacitor 245, and a negative terminal first capacitor). 254, a negative second capacitor 255) and four sets of switching circuits (a first group of switching circuits 241, a second group of switching circuits 242, a negative first group of switching circuits 251, a negative second group of switching circuits 252). The input end of the first group of switch circuits 241 is coupled to the input signal, and the output end thereof is coupled to the positive input end of the differential amplifier 257. The negative output of the differential amplifier 257 is coupled to the input of the second set of switching circuits 242. The first capacitor 244 is coupled to the output of the first group of switch circuits 241 The terminal and the positive input of the differential amplifier 257 are between. The second capacitor 245 is coupled between the output of the second group of switching circuits 242 and the integrated output signal s264. The input end of the first group of switch circuits 251 of the negative terminal is coupled to the input signal of the negative terminal, and the output end of the circuit is coupled to the negative input terminal of the differential amplifier 257. The positive output of the differential amplifier 257 is coupled to the input of the second set of switching circuits 252 at the negative terminal. The negative terminal first capacitor 254 is coupled between the output terminal of the negative terminal first group of switching circuits 251 and the negative input terminal of the differential amplifier 257. The negative terminal second capacitor 255 is coupled between the output terminal of the negative second group switch circuit 252 and the negative terminal integrated output signal s264.

Next, please refer to FIG. 9, which shows the structure of the first group of switching circuits 241 and the second group of switching circuits 242 in the integrating circuits of the various stages of the present invention. As shown, the first group of switch circuits 241 includes two switches (a first switch 248 and a second switch 249). The first switch 248 is coupled between the input end and the output end, and is controlled by the first switch 248. The signal controls the state of the switch. The second switch 249 is coupled between the input terminal and the ground terminal, and the second switch 249 controls the signal to control the switch state. The second set of switch circuits 242 also includes two switches (a first switch 248, a second switch 249), the first switch 248 is coupled between the input end and the output end, and the first switch 248 controls the signal to control the switch state. The second switch 249 is coupled between the output terminal and the ground terminal, and the second switch 249 controls the signal to control the switch state.

The second capacitor 245 or the negative terminal second capacitor 255 of the stage integrating circuit of the feed integrator 20 of the present invention can adjust the capacitance value and adjust the size of the integrated output signal 264 accordingly.

The control method of the switch circuits of the feed integrator 20 of the present invention is divided into For three operational timings. A first timing signal is generated at the first operation timing. At this time, the left and right ends of each of the first group of switch circuits 241 are not turned on, and the left contact is grounded, and the right contact is in a floating state, and each of the first The left and right ends of the two sets of switch circuits 242 are turned on, and the left and right ends of each of the third set of switch circuits 243 are not turned on. This timing performs charging sampling of the second capacitor 245 of each stage of the integrating circuit. Then, the continuous progressive control timing is entered. At this time, a continuous progressive control signal 263 is generated, and the third group of switching circuits 243 of each stage of the integrating circuit are sequentially turned on to control the charging power of the third capacitor 246 of each level of the integrating circuit. The junctions of the left and right ends of a second group of switching circuits 242 and the third group of switching circuits 243 are not turned on. Finally, the second timing is entered. At this time, the left and right terminals of each of the first group of switch circuits 241 are turned on, and the left and right ends of each of the second group of switch circuits 242 are not turned on, and the left contact is suspended. The right contact is grounded, and the left and right ends of each of the third group of switch circuits 243 are not turned on. Since the integration circuit has the characteristic that the feedforward feedback path is directly connected by the capacitor, the above-mentioned timing operation can be used to control the charge and discharge of the capacitor to complete the triangular integral operation, and the circuit of the adder is saved at the output end.

Please refer to FIG. 6, which shows the architecture of the input capacitor switching circuit 10 of the present invention. The input capacitance switching circuit 10 of the feedforward type triangular integral analog-to-digital converter 1 includes a plurality of input capacitance switching units 101 connected in parallel, and the input capacitance switching unit 101 receives the positive reference voltage s121 and the negative reference voltage s122. The input voltage s123, the timing signal, and the switching signal are generated, and an output signal is generated.

Please refer to FIG. 7, which shows the architecture of the input capacitance switching unit 101. The input capacitance switching unit 101 of the present invention comprises five switching switches (first switching switch) 111. The second switching switch 112, the third switching switch 113, the fourth switching switch 114, and the fifth switching switch 115) and the two capacitors (the first switching capacitor 116 and the second switching capacitor 117). One end of the first switch 111 is connected to a positive reference voltage s121, and the other end is connected to the second switch 112, the third switch 113 and the first switching capacitor 116. The other end of the second switching switch 112 is connected to the negative reference voltage s122, the other end of the third switching switch 113 is grounded, and the other end of the first switching capacitor 116 is connected to the second switching capacitor 117. The second switching capacitor is connected. The other end of the 117 is connected to the fourth changeover switch 114 and the fifth changeover switch 115. The other end of the fourth switch 114 is connected to the input voltage s123, and the other end of the fifth switch 115 is grounded.

The control method of the switch is divided into two operation timings, a first timing signal is generated at the first operation timing, the fourth switch 114 is directly turned on, and each input is sequentially turned on according to a thermometer code signal s124. The first changeover switch 111 and the second changeover switch 112 of the capacitance switching unit 101, at this time, the third changeover switch 113 and the fifth changeover switch 115 are not turned on. A second timing signal is generated in the second operation sequence to directly turn on the third switching switch 113 and the fifth switching switch 115. At this time, the first switching switch 111, the second switching switch 112, and the fourth switching switch 114 are not turned on. The function is to sequentially switch the capacitance in the capacitance switching unit according to the output signal of the data weighted average circuit 50, and generate an input signal of the feedforward integrator 20 to reduce the noise caused by the mismatch of the capacitance values.

Finally, please refer to FIG. 8, which shows a circuit diagram of the differential circuit of the feedforward integrator 20 and the multi-bit quantizer 30 of the present invention. Multi-bit quantization of the present invention The controller 30 can be implemented by a comparator, and uses a continuous progressive control circuit 40 to generate a quantized reference control signal s31, thereby adjusting the comparison level of the comparator, so that the comparator generates one of the multi-bit modulation outputs. Signal s32.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

1‧‧‧Feed-forward triangular integral analog-to-digital converter

10‧‧‧Input Capacitor Switching Circuit

20‧‧‧Feed-forward integrator

30‧‧‧Multi-bit quantizer

S31‧‧‧Quantitative reference control signal

S32‧‧‧ modulated output signal

40‧‧‧Continuous progressive control circuit

50‧‧‧ data weighted average circuit

S51‧‧‧ data weighted average signal

S52‧‧‧Capacitor switching signal

S123‧‧‧ input voltage

S125‧‧‧ input timing control signal

S261‧‧‧ integral input signal

S263‧‧‧Continuous progressive control signal

S264‧‧‧Integral output signal

Claims (11)

A feedforward triangular integral analog-to-digital converter comprises: an input capacitor switching circuit for receiving an input timing control signal, an input voltage and a capacitance switching signal, and generating an integral input signal; a feedforward The integrator receives the integrated input signal, a continuous progressive control signal, and the input timing control signal, and generates an integrated output signal, wherein the feedforward integrator includes a plurality of integrating circuits for processing the integral operation, the plurality of The integrating circuit is connected in series to a plurality of stages, and a first stage integrating circuit receives the integrated input signal, and generates a series of output signals connected to the input end of the second stage integrating circuit through the integral operation, and then the output of the integrating circuit of the previous stage The signal is connected to the input end of the integration circuit of the next stage, and the integration circuits of the respective stages respectively generate another output signal, the output signals are connected to each other to form the integrated output signal; a multi-bit quantizer receives the integrated output signal and a Quantifying the reference control signal and generating a modulated output signal; a continuous progressive control The circuit receives the modulated output signal, generates the quantized reference control signal, the continuous progressive control signal, and a data weighted average signal; and a data weighted average circuit receives the data weighted average signal and generates the capacitive switching signal. The feed-forward triangular integral analog-to-digital converter according to claim 1, wherein the first-stage integration circuit and the intermediate-level integration circuit comprise: a first group of switch circuits, wherein the first group of switch circuits The input end is coupled to one An output signal is coupled to an input of an amplifier; wherein the input of one of the amplifiers is connected to an output of the first group of switch circuits, the other input is grounded, and the output is coupled to a second group of switching circuits and an input of a third group of switching circuits; the second group of switching circuits, wherein the input end of the second group of switching circuits is coupled to the output end of the amplifier, and the output end is coupled to a first The second group of switching circuits, wherein the input end of the third group of switching circuits is coupled to the output end of the amplifier, the output end is coupled to a third capacitor; a first capacitor is coupled to the first capacitor Between the output of a set of switching circuits and the input of the amplifier; the second capacitor is coupled between the output of the second set of switching circuits and the integrated output signal; and the third capacitor is coupled Between the output of the third group of switching circuits and the serial output signal. The feed-forward triangular integral analog-to-digital converter according to the first aspect of the patent application, wherein the last-stage integration circuit comprises: a first group of switch circuits, wherein the input ends of the first group of switch circuits are coupled to an integral input a signal, the output end is coupled to an input end of an amplifier; wherein the input end of the amplifier is connected to the output end of the first group of switch circuits, the other input end is grounded, and the output end is coupled to the first An input end of the two sets of switch circuits; the second set of switch circuits, wherein the input ends of the second set of switch circuits are coupled to An output of the amplifier is coupled to a second capacitor; a first capacitor coupled between the output of the first set of switching circuits and an input of the amplifier; and the second capacitor The signal is coupled between the output of the second group of switching circuits and the integrated output signal. The feed-forward triangular integral analog-to-digital converter according to claim 1, wherein the first-stage integration circuit and the intermediate-level integration circuit comprise: a first group of switch circuits, wherein the first group of switch circuits The input end is coupled to an integral input signal; a differential amplifier, wherein the positive input terminal of the differential amplifier is coupled to the output end of the first group of switch circuits; and a second set of switch circuits, wherein the second group of switches The input end of the circuit is coupled to the negative output of the differential amplifier; a third group of switching circuits, wherein the input end of the third group of switching circuits is coupled to the negative output of the differential amplifier; a first capacitor, The second capacitor is coupled between the output end of the second group of switching circuits and the integrated output signal; a third capacitor is coupled to the second input capacitor The output end of the third group of switching circuits and the serial output signal; a negative end of the first group of switching circuits, wherein the input of the first group of switching circuits of the negative terminal The terminal is coupled to a negative input signal; a negative terminal is a second group of switching circuits, wherein the input end of the negative terminal second group of switching circuits is coupled to the positive output terminal of the differential amplifier; and the negative terminal third group of switching circuits The input end of the negative terminal third group of switching circuits is coupled to the positive output terminal of the differential amplifier; a negative terminal first capacitor is coupled between the negative input terminal and the positive output terminal of the differential amplifier; a negative terminal second capacitor coupled between the output terminal of the negative terminal second group of switching circuits and a negative integrated output signal; and a negative terminal third capacitor coupled to the negative terminal third group of switching circuits Between the output and the negative serial output signal. The feed-forward triangular integral analog-to-digital converter according to the first aspect of the patent application, wherein the last-stage integration circuit comprises: a first group of switch circuits, wherein the input ends of the first group of switch circuits are coupled to an integral input a differential amplifier, wherein a positive input terminal of the differential amplifier is coupled to an output end of the first group of switching circuits; a second group of switching circuits, wherein an input end of the second group of switching circuits is coupled to the a negative output of the differential amplifier; a first capacitor coupled between the positive input terminal and the negative output terminal; a second capacitor coupled to the output terminal of the second group of switch circuits and integrating lose The first group of switching circuits, wherein the negative end of the first group of switching circuits is coupled to a negative input signal; the negative terminal of the second group of switching circuits, wherein the negative terminal is of the second group An input end of the switch circuit is coupled to the positive output end of the differential amplifier; a negative end first capacitor is coupled between the negative input end and the positive output end of the differential amplifier; and a negative end second capacitor, The signal is coupled between the output of the second group of switching circuits of the negative terminal and a negative integrated output signal. The feed-forward triangular integral analog-to-digital converter according to the second, third, fourth or fifth aspect of the patent application, wherein the first group of switch circuits comprises: a first switch coupled to Between the input end and the output end, and the switch state is controlled by the first switch control signal; and a second switch coupled between the input end and the ground end, and the switch state is controlled by the second switch control signal; the second The group switch circuit includes: a first switch coupled between the input end and the output end, and the switch state is controlled by the first switch control signal; and a second switch coupled between the output end and the ground end, and The switch state is controlled by a second switch control signal. The feed-forward triangular integral analog-to-digital converter according to the second, third, fourth or fifth aspect of the patent application scope, wherein the control methods of the switch circuits The method includes: a first operation timing, generating a first timing signal, wherein the left and right ends of each of the first group of switching circuits are not turned on, and the left contact is grounded, and the right contact is in a floating state, and each time The left and right terminals of a second group of switching circuits are turned on, and the left and right terminals of each of the third group of switching circuits are not turned on, so that the timing is charged and sampled for the second capacitor of each stage of the integrating circuit; The progressive control timing generates a continuous progressive control signal, sequentially turns on the third group of switching circuits of each stage of the integral circuit, and controls the charging power of the third capacitor of each level of the integrating circuit. At this time, each of the second group of switching circuits and the second The left and right ends of the three sets of switching circuits are not turned on; and a second timing, the left and right ends of each of the first set of switching circuits are turned on, and the left and right ends of each of the second set of switching circuits are not connected It is turned on, and the left contact is in a floating state, the right contact is grounded, and the left and right ends of each of the third group of switching circuits are not turned on. The feed-forward triangular integral analog-to-digital converter according to the second, third, fourth or fifth aspect of the patent application, wherein the second capacitor or the negative terminal of the level integration circuits The second capacitor, its capacitance value can be adjusted, and the size of the integrated output signal is adjusted accordingly. The feed-forward triangular integral analog-to-digital converter according to claim 1, wherein the input capacitor switching circuit comprises a plurality of mutually parallel capacitor switching units, and the capacitor switching units receive a positive reference voltage and a negative reference. Voltage, input voltage, timing signal, and switching signal, and generating an output signal; wherein the capacitor The switching unit includes: a first switching switch, wherein one end is connected to a positive reference voltage; a second switching switch is connected between a negative reference voltage and the first switching switch; and a third switching switch, wherein one end is connected to The first switching switch and the second switching switch are grounded at the other end; a fourth switching switch, wherein one end is connected to an input voltage; and a fifth switching switch, wherein one end is connected to the fourth switching switch, and the other end is grounded; a first switching capacitor, wherein one end is connected to the first switching switch, the second switching switch and the third switching switch, and the other end is connected to the output end; and a second switching capacitor, wherein the one end and the second switching switch And the third switch is connected, and the other end is connected to the output. The feed-forward triangular integral analog-to-digital converter according to claim 9 of the patent application scope, wherein the control method of the switch includes: a first operation timing, generating a first timing signal, and directly turning on the fourth switching Switching, and simultaneously turning on the first switch and the second switch of each of the capacitor switching units according to a thermometer code, at which time the third switch and the fifth switch are not turned on; and a second operation sequence is generated A second timing signal directly turns on the third switching switch and the fifth switching switch, and at this time, the first switching switch, the second switching switch, and the fourth switching switch are not turned on. The feed-forward triangular integral analog-to-digital converter according to claim 1, claim 2, item 3, item 4 or item 5, wherein the multi-bit quantizer includes a comparator, and A continuous progressive control circuit is used to generate a quantized reference control signal, and the comparator's comparison level is adjusted accordingly, so that the comparator produces one of the multi-bit modulated output signals.