TWI582843B - The manufacturing method of the attached wafer - Google Patents

The manufacturing method of the attached wafer Download PDF

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TWI582843B
TWI582843B TW101137429A TW101137429A TWI582843B TW I582843 B TWI582843 B TW I582843B TW 101137429 A TW101137429 A TW 101137429A TW 101137429 A TW101137429 A TW 101137429A TW I582843 B TWI582843 B TW I582843B
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wafer
component
dividing
component wafer
cutting
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TW201322322A (en
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Yoshiaki Yodo
Shunichiro Hirosawa
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Disco Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/38Removing material by boring or cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components

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  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
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  • Mechanical Treatment Of Semiconductor (AREA)

Description

附蓋晶片之製造方法 Manufacturing method of covered wafer 發明領域 Field of invention

本發明係有關於一種製造於元件晶片之表面配設有蓋板之晶片之晶片之製造方法。 The present invention relates to a method of fabricating a wafer fabricated on a surface of a component wafer having a cover.

發明背景 Background of the invention

形成於半導體晶圓之表面之MEMS(Micro Electro Mechanical Systems)元件或COMS(Complementary Metal Oxide Semiconductor)影像感測元件等之元件係金屬配線積層於何層皆傳達信號,各金屬配線間主要是藉由SiO2形成之層間絕緣膜而絕緣。 A component such as a MEMS (Micro Electro Mechanical Systems) device or a COMS (Complementary Metal Oxide Semiconductor) image sensing device formed on a surface of a semiconductor wafer transmits signals in any layer, and each metal wiring is mainly used by The interlayer insulating film formed of SiO 2 is insulated.

近年來,隨著構造之微細化,配線間距離變近,接近之配線間的電容變大。因此而產生信號的延遲,且消耗電力增加等之問題也顯著地增加。 In recent years, as the structure is made finer, the distance between wirings becomes closer, and the capacitance between the wirings becomes larger. Therefore, the delay of the signal is generated, and the problem of the increase in power consumption and the like is also remarkably increased.

為了降低各層間之寄生電容,形成元件(電路)時使各層間絕緣之層間絕緣膜以往主要是採用SiO2絕緣膜,但最近也漸漸採用介電率比SiO2絕緣膜還低之低介電率絕緣膜(Low-k膜)。 In order to reduce the parasitic capacitance between the layers, an interlayer insulating film which insulates between layers is formed by using a SiO 2 insulating film in the case of forming a device (circuit), but recently, a dielectric material having a dielectric constant lower than that of the SiO 2 insulating film has been gradually used. Rate insulation film (Low-k film).

層間絕緣膜採用Low-k膜在形成有MEMS元件之晶圓或形成有CMOS影像感測元件之晶圓也成為一般。 It is also common for the interlayer insulating film to use a Low-k film in a wafer in which a MEMS element is formed or a wafer in which a CMOS image sensing element is formed.

有時候MEMS元件晶圓或CMOS元件晶圓藉由切削裝置或雷射加工裝置分割成各個元件晶片,並且於元件晶片之表面配設有用以保護元件之蓋體而利用。以往係在分割成元件晶片後,於晶片上配設蓋體而作為附蓋晶片。 Sometimes a MEMS element wafer or a CMOS element wafer is divided into individual element wafers by a cutting device or a laser processing apparatus, and a cover for protecting the elements is disposed on the surface of the element wafer. Conventionally, after being divided into component wafers, a lid is placed on the wafer to serve as a cap wafer.

先行技術文獻 Advanced technical literature 專利文獻 Patent literature

【專利文獻1】日本特開2003-320466號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 2003-320466

發明概要 Summary of invention

如以往分割成各個元件晶片後,於晶片之表面上配設蓋體而製造附蓋晶片者,具有較費工且生產性極差的問題。因此,考慮在元件晶片上貼合晶圓蓋後實施分割,以提高生產效率。 After dividing into individual element wafers in the past, it is difficult to produce a cover wafer by disposing a cover on the surface of the wafer, which is labor intensive and extremely inferior in productivity. Therefore, it is considered to perform division after bonding the wafer cover on the component wafer to improve production efficiency.

然而,當Low-k膜或TEG(Test Element Group)圖案、SiN或聚醯胺等之鈍化膜(passivation)等的積層物位於元件晶片之分割預定線上作為層間絕緣膜時,具有在將晶圓蓋貼合於元件晶圓後,難以連同積層物分割貼合晶圓的問題。 However, when a laminate of a Low-k film or a TEG (Test Element Group) pattern, a passivation of SiN or a polyimide, or the like is located on a division line of the element wafer as an interlayer insulating film, there is a wafer in the wafer. After the cover is attached to the component wafer, it is difficult to divide the wafer with the laminate.

具體而言,Low-k膜較脆會如雲母般剝離,因此例如以切削刀片切削時,元件區域之Low-k膜也會剝離,而恐有損害元件之虞。又,金屬之TEG圖案或鈍化膜以切削刀片切削時,會於切削刀片引起阻塞,產生切削不良。 Specifically, the Low-k film is peeled off like a mica, so that, for example, when cutting with a cutting insert, the Low-k film of the element region is also peeled off, and the component may be damaged. Further, when the metal TEG pattern or the passivation film is cut by the cutting insert, clogging occurs in the cutting insert, resulting in poor cutting.

另一方面,對貼合基板照射具有透過性之波長之 雷射光束而於貼合晶圓內部形成改質層後,即使對貼合晶圓賦與外力而欲分割,會有金屬之TEG圖案或鈍化膜非常難分割,而且Low-k膜無法沿著改質層分割的問題。 On the other hand, the laminated substrate is irradiated with a wavelength having transparency. After the laser beam is formed on the inside of the bonded wafer to form a modified layer, even if an external force is applied to the bonded wafer to be divided, there is a metal TEG pattern or a passivation film which is very difficult to be divided, and the Low-k film cannot be along The problem of splitting the layer.

本發明係有鑑於此而作成者,其目的在於提供一種晶片之製造方法,其係製造不會因為分割預定線上之積層物而阻礙貼合晶圓之分割之附蓋晶片。 The present invention has been made in view of the above, and an object of the invention is to provide a method for manufacturing a wafer which is capable of preventing a wafer to be bonded which does not interfere with the bonding of a wafer by a laminate on a predetermined line.

根據第1項之發明,係提供一種晶片之製造方法,係由表面具備元件之元件晶片、與配設於該元件晶面之表面之蓋板所構成者,其特徵在於具有下述步驟:元件晶圓準備步驟,準備於以形成於表面且交錯之複數分割預定線所區劃之各區域分別形成元件之元件晶圓;積層物除去步驟,沿著該元件晶圓之該分割預定線照射雷射光束而除去積層於該分割預定線上之積層物;貼合晶圓形成步驟,在實施該積層物除去步驟後,使接著構件介於至少圍繞該元件晶圓之該各元件之區域,且於該元件晶圓之表面貼著晶圓蓋,形成貼合晶圓;及分割步驟,沿著該分割預定線分割該貼合晶圓而形成於元件晶片之表面配設有蓋板之晶片。 According to the invention of claim 1, there is provided a method of manufacturing a wafer comprising a component wafer having a component on a surface thereof and a cover plate disposed on a surface of the crystal face of the component, characterized in that the component has the following steps: a wafer preparation step of preparing a component wafer of each of the regions defined by the plurality of predetermined dividing lines formed on the surface and interleaved; and a layer removing step of irradiating the laser along the dividing line of the component wafer Removing a layered product laminated on the dividing line by a light beam; bonding a wafer forming step, after performing the layer removing step, causing the bonding member to be interposed between at least the regions surrounding the component wafer, and A wafer cover is attached to the surface of the component wafer to form a bonded wafer, and a dividing step is performed to divide the bonded wafer along the dividing line to form a wafer on the surface of the component wafer.

根據第2項之發明,係提供一種於第1項之發明中,在實施前述積層物除去步驟後,且在實施前述貼合晶圓形成步驟之前,更具有切削溝形成步驟,切削溝形成步驟係沿著前述元件晶圓之前述分割預定線而以切削刀片切削該元件晶圓,並且形成深度至前述元件晶片之加工厚度 之切削溝,且前述分割步驟包含:元件晶圓分割步驟,在實施該貼合晶圓形成步驟後,研削構成前述貼合晶圓之該元件晶圓之背面側而將其薄化為該元件晶片之加工厚度,並且使該切削溝露出於該元件晶圓之背面而將該元件晶圓分割為各個元件晶片;及晶圓蓋分割步驟,沿著該分割預定線而分割前述晶圓蓋。 According to the invention of claim 2, in the invention of the first aspect, after the step of removing the laminate, the step of forming the groove is further performed before the step of forming the bonded wafer, and the step of forming the groove Cutting the component wafer with a cutting blade along the aforementioned predetermined dividing line of the component wafer, and forming a depth to the processing thickness of the component wafer The cutting groove includes the element wafer dividing step, and after performing the bonding wafer forming step, grinding the back side of the element wafer constituting the bonding wafer to thin the element The wafer is processed to have a thickness, and the cutting groove is exposed on the back surface of the element wafer to divide the element wafer into individual element wafers; and the wafer cover dividing step divides the wafer cover along the dividing line.

根據第1項之發明,由於在形成貼合晶圓之前,除去位於元件晶圓之分割預定線上之積層物,因此不會因分割預定線上之積層物而阻礙貼合晶圓之分割,可有效率地製造附蓋晶片。 According to the invention of claim 1, since the laminate located on the division line of the component wafer is removed before the bonding wafer is formed, the laminate of the bonded wafer is not hindered by dividing the laminate on the predetermined line. The covered wafer is efficiently manufactured.

根據請求項第2項之發明,即使係較薄的元件晶圓,由於貼著有晶圓蓋,因此處理不會受到阻礙而可容易地分割為附蓋之元件晶片。 According to the invention of claim 2, even if the wafer wafer is thin, since the wafer cover is attached, the processing can be easily divided into the attached component wafer without being hindered.

10‧‧‧雷射加工裝置 10‧‧‧ Laser processing equipment

11‧‧‧元件晶圓 11‧‧‧Component Wafer

11a‧‧‧表面 11a‧‧‧ surface

11b‧‧‧背面 11b‧‧‧Back

12‧‧‧工作夾台 12‧‧‧Working table

13‧‧‧分割預定線 13‧‧‧Division line

13a‧‧‧Low-k膜 13a‧‧‧Low-k film

14‧‧‧集光器 14‧‧‧ concentrator

15‧‧‧CMOS影像感測元件 15‧‧‧ CMOS image sensing components

15A‧‧‧元件晶片 15A‧‧‧Component chip

16‧‧‧雷射加工溝 16‧‧‧Laser processing ditch

17‧‧‧元件區域 17‧‧‧Component area

18‧‧‧接著構件 18‧‧‧Subsequent components

19‧‧‧外周剩餘區域 19‧‧‧ remaining areas of the periphery

20‧‧‧晶圓蓋 20‧‧‧ wafer cover

21‧‧‧刻痕 21‧‧‧ Scotch

22,22A‧‧‧切削刀片 22,22A‧‧‧Cutting inserts

23‧‧‧蓋板 23‧‧‧ Cover

24‧‧‧切削溝 24‧‧‧Cutting trench

25‧‧‧貼合晶圓 25‧‧‧Fixed wafer

30‧‧‧工作夾台 30‧‧‧Working table

32‧‧‧研削單元 32‧‧‧ grinding unit

34‧‧‧中心軸 34‧‧‧ center axis

36‧‧‧輪座 36‧‧·wheel seat

38‧‧‧研削輪 38‧‧‧ grinding wheel

40‧‧‧輪基台 40‧‧‧ wheel base

42‧‧‧磨輪 42‧‧‧ grinding wheel

T‧‧‧黏著膠帶 T‧‧‧Adhesive tape

t1‧‧‧加工厚度 T1‧‧‧Processing thickness

圖1係半導體晶圓之表面側立體圖。 1 is a perspective view of a surface side of a semiconductor wafer.

圖2係顯示積層物除去步驟之立體圖。 Fig. 2 is a perspective view showing a step of removing a laminate.

圖3係顯示貼合晶圓形成步驟之分解立體圖。 Fig. 3 is an exploded perspective view showing the step of forming a bonded wafer.

圖4係顯示裡面研削步驟之側面圖。 Figure 4 is a side view showing the grinding step inside.

圖5係顯示分割步驟之縱截面圖。 Fig. 5 is a longitudinal sectional view showing a dividing step.

圖6(A)係顯示第2實施型態之積層物除去步驟之截面圖,圖6(B)係顯示第3實施型態之積層物除去步驟之截面圖。 Fig. 6(A) is a cross-sectional view showing a step of removing a layered product in a second embodiment, and Fig. 6(B) is a cross-sectional view showing a step of removing a layered product in a third embodiment.

圖7(A)係顯示實施第2實施型態之積層物除去步驟後 之切削溝形成步驟之截面圖,圖7(B)係顯示實施第3實施型態之積層物除去步驟後之切削溝形成步驟之截面圖。 Fig. 7(A) shows the step of removing the laminate in the second embodiment. FIG. 7(B) is a cross-sectional view showing a step of forming a cutting groove after the step of removing the layered product of the third embodiment.

圖8係顯示元件晶圓分割步驟之側面圖。 Fig. 8 is a side view showing the step of dividing the component wafer.

圖9係顯示晶圓蓋分割步驟之截面圖。 Figure 9 is a cross-sectional view showing the wafer cover dividing step.

較佳實施例之詳細說明 Detailed description of the preferred embodiment

以下,參照圖式詳細說明本發明之實施型態。參照圖1,係顯示元件晶圓11之表面側立體圖。元件晶圓11係由例如厚度為700μm之矽晶圓所構成,表面11a形成有格子狀之複數分割預定線(切割道)13,並且於被該複數之分割預定線13所區劃之各領域形成有CMOS影像感測裝置15。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to Fig. 1, a surface side perspective view of the element wafer 11 is shown. The element wafer 11 is composed of, for example, a silicon wafer having a thickness of 700 μm, and the surface 11a is formed with a lattice-shaped plural divided line (cutting track) 13 and formed in each of the fields divided by the plurality of divided planned lines 13. There is a CMOS image sensing device 15.

元件晶圓11中,係採用低介電率絕緣膜(Low-k膜)作為使金屬配線間絕緣所必要之層間絕緣膜。因此,分割預定線13上積層有Low-k膜。 In the element wafer 11, a low dielectric constant insulating film (Low-k film) is used as an interlayer insulating film necessary for insulating the metal wiring. Therefore, a Low-k film is laminated on the division planned line 13.

低介電率絕緣膜可舉介電率比SiO2膜(介電率K=4.1)低(例如K=2.5~3.6左右)之材料、例如SiOC、SiLK等之無機物系之膜、聚醯亞胺系、聚對二甲苯基、聚四氟乙烯等之共聚膜之有機物系之膜、及含有甲基之聚矽氧烷等之多孔質二氧化矽膜。 The low dielectric constant insulating film may be a material having a lower dielectric constant than a SiO 2 film (dielectric K=4.1) (for example, K=2.5 to 3.6), a film of an inorganic system such as SiOC or SiLK, or a polysiloxane. A film of an organic film of a copolymer film such as an amine system, a polyparaphenylene group or a polytetrafluoroethylene, or a porous cerium oxide film such as a polysiloxane containing a methyl group.

如此構成之元件晶圓11於其表面之平坦部具有形成有CMOS影像感測元件15之元件區域17、及圍繞元件區域17之外周剩餘區域19。元件晶圓11之外周形成有作為顯示矽晶圓之結晶方位之記號的刻痕21。 The element wafer 11 thus constructed has an element region 17 on which a CMOS image sensing element 15 is formed and a peripheral remaining region 19 around the element region 17 at a flat portion on the surface thereof. A notch 21 as a mark indicating the crystal orientation of the germanium wafer is formed on the outer periphery of the element wafer 11.

本發明之晶片的製造方法中,首先實施積層物除 去步驟,沿著元件晶圓11之分割預定線13照射雷射光束而除去積層於分割預定線上之Low-k膜(積層物)。該積層物除去步驟中,係如圖2所示,將元件晶圓11之其表面11a朝上而吸引保持在雷射加工裝置之工作夾台12。 In the method for manufacturing a wafer of the present invention, first, a laminate is removed. In the step, the laser beam is irradiated along the dividing line 13 of the element wafer 11 to remove the Low-k film (layered product) laminated on the dividing line. In the laminate removal step, as shown in FIG. 2, the surface 11a of the element wafer 11 is attracted upward and held by the work chuck 12 of the laser processing apparatus.

接著,以雷射加工裝置10之未圖示之攝像單元拍攝元件晶圓11,並實施檢出朝第1方向延伸之分割預定線13之校準線以雷射加工。接著,將工作夾台12旋轉90度後,對朝與第1方向直交之第2方向延伸之分割預定線13也實施同樣的校準。 Next, the element wafer 11 is imaged by an imaging unit (not shown) of the laser processing apparatus 10, and a calibration line for detecting the planned dividing line 13 extending in the first direction is subjected to laser processing. Next, after the work chuck 12 is rotated by 90 degrees, the same alignment is performed on the division planned line 13 extending in the second direction orthogonal to the first direction.

實施校準後,以集光器14使對所積層之Low-k膜具有吸收性之波長(例如355nm)之雷射光束集光而照射於分割預定線13,並使工作夾台12以預定之加工速度朝第2之箭頭X1方向移動,藉此沿著分割預定線13形成雷射加工溝16,並除去分割預定線13上之積層的Low-k膜。 After the calibration is performed, the laser beam 14 is used to collect the laser beam having an absorptive wavelength (for example, 355 nm) by the concentrator 14 to illuminate the division target line 13 and to make the work chuck 12 predetermined. The machining speed is moved in the direction of the arrow X1 of the second, whereby the laser machining groove 16 is formed along the division planned line 13, and the laminated Low-k film on the division planned line 13 is removed.

本實施型態中,宜加大在集光器14集光於分割預定線13之雷射光束之光束點徑,而在後製程之分割步驟所使用之切削刀之刀厚程度之寬度的區域中,除去為積層物之Low-k膜。 In this embodiment, it is preferable to increase the beam spot diameter of the laser beam collected by the concentrator 14 on the dividing line 13 and the width of the blade of the cutting blade used in the dividing step of the post-process. In the middle, the Low-k film which is a laminate is removed.

使工作夾台12朝Y軸方向一一割出切割道間距並傳送,除去全部在第1方向延伸之分割預定線13上積層的Low-k膜。接著,使工作夾台12旋轉90度,沿著朝與在第1方向延伸之分割預定線13直交之方向延伸之分割預定線13,形成同樣的雷射加工溝16,而除去在分割預定線13上所積層之Low-k膜。 The working chuck 12 is cut one by one in the Y-axis direction and conveyed to each other, and the Low-k film laminated on the dividing line 13 extending in the first direction is removed. Next, the working chuck 12 is rotated by 90 degrees, and the same laser processing groove 16 is formed along the dividing line 13 extending in a direction orthogonal to the dividing line 13 extending in the first direction, and the dividing line is removed. The Low-k film laminated on the 13th.

該積層物除去步驟之雷射加工條件係如下設定。 The laser processing conditions of the laminate removal step are set as follows.

光源:YAG脈衝雷射或YVO4脈衝雷射 Light source: YAG pulse laser or YVO 4 pulse laser

波長:355nm Wavelength: 355nm

平均輸出:7~10W Average output: 7~10W

重複頻率:100~130kHz Repeat frequency: 100~130kHz

加工傳送速度:70~100mm/s Processing transfer speed: 70~100mm/s

實施積層物除去步驟後,如圖3所示,實施貼合晶圓形成步驟,使接著構件18介於元件晶圓11之包圍各元件15之區域,且於元件晶圓11之表面11a貼著晶圓蓋20而形成貼合晶圓25。 After the laminate removal step is performed, as shown in FIG. 3, a bonding wafer forming step is performed such that the bonding member 18 is interposed between the component wafers 11 surrounding the respective elements 15 and is attached to the surface 11a of the component wafer 11. The wafer cover 20 forms a bonded wafer 25.

本實施形態之元件晶圓11於其表面11a具有複數之CMOS影像感測元件15,因此晶圓蓋20係使用透明的玻璃。 Since the element wafer 11 of the present embodiment has a plurality of CMOS image sensing elements 15 on its surface 11a, the wafer cover 20 is made of transparent glass.

可是,本發明之晶片之製造方法所使用之晶圓蓋20並不限定於玻璃,例如元件15為MEMS元件等情況時,亦可由矽晶圓等形成晶圓蓋20。 However, the wafer cover 20 used in the method of manufacturing a wafer of the present invention is not limited to glass. For example, when the element 15 is a MEMS element or the like, the wafer cover 20 may be formed of a germanium wafer or the like.

實施貼合晶圓形成步驟後,實施背面研削步驟,研削元件晶圓11之背面11b,使元件晶圓11薄化成預定厚度。該背面研削步驟中,係如圖4所示,以研削裝置之工作夾台30吸引保持貼合晶圓25之晶圓蓋20側,而使元件晶圓11之背面11b露出。 After the bonding wafer forming step is performed, the back grinding step is performed, and the back surface 11b of the element wafer 11 is ground to thin the element wafer 11 to a predetermined thickness. In the back grinding step, as shown in FIG. 4, the wafer cover 20 side of the bonded wafer 25 is sucked by the work chuck 30 of the grinding device, and the back surface 11b of the element wafer 11 is exposed.

圖4中,固定於研削單元32之心軸34之前端之輪座36係如未圖示之複數螺絲,裝設有可裝卸之研削輪38。研削輪38係將複數之磨輪42成環狀配設於輪基台40之自由 端部(下端部)而構成。 In Fig. 4, the wheel base 36 fixed to the front end of the spindle 34 of the grinding unit 32 is a plurality of screws (not shown), and a detachable grinding wheel 38 is mounted. The grinding wheel 38 is a type in which the plurality of grinding wheels 42 are annularly disposed on the wheel base 40 The end portion (lower end portion) is formed.

在背面研削步驟中,使工作夾台30以例如300rpm朝箭頭a所示之方向旋轉,並且驅動研削單元傳送機構,使研削輪38之磨輪42接觸於元件晶圓11的背面11b。 In the back grinding step, the work chuck 30 is rotated in the direction indicated by the arrow a at, for example, 300 rpm, and the grinding unit transport mechanism is driven to bring the grinding wheel 42 of the grinding wheel 38 into contact with the back surface 11b of the element wafer 11.

接著,以預定之研削傳送速度將研削輪38朝下方傳送並研削預定量。 Next, the grinding wheel 38 is conveyed downward and ground by a predetermined amount at a predetermined grinding conveyance speed.

實施背面研削步驟後,實施分割步驟,沿著分割預定線分割貼合基板25,於元件晶片15A之表面形成配設有蓋板23之晶片。在實施該分割步驟之前,實施膠帶貼著步驟,將黏著膠帶T貼著於貼合晶圓25之晶圓蓋20。 After the back grinding step is performed, the dividing step is performed, the bonded substrate 25 is divided along the dividing line, and the wafer on which the cover 23 is placed is formed on the surface of the element wafer 15A. Before performing the dividing step, a tape attaching step is performed to attach the adhesive tape T to the wafer cover 20 of the bonded wafer 25.

接著,以切削裝置之攝像單元之紅外線攝像部件由晶圓11之其背面11b側攝像,檢出分割預定線13。該校準係分別對在第1方向延伸之分割預定線13及在與第1方向直交之第2方向延伸之分割預定線13實施。 Next, the infrared imaging device of the imaging unit of the cutting device is imaged by the back surface 11b side of the wafer 11, and the planned dividing line 13 is detected. The calibration is performed on the planned dividing line 13 extending in the first direction and the dividing line 13 extending in the second direction orthogonal to the first direction.

實施校準後,如圖5所示,實施分割步驟,以切削裝置之切削刀片22沿著分割預定線13切削貼合晶圓25,而分割成於元件晶片15A之表面配設有蓋板23之晶片。 After the calibration is performed, as shown in FIG. 5, the dividing step is performed, and the cutting blade 22 of the cutting device cuts the bonded wafer 25 along the dividing line 13 and is divided into the surface of the component wafer 15A. Wafer.

圖5所示之實施形態中,於貼合晶圓25之晶圓蓋20貼著有黏著膠帶T,但亦可將黏著膠帶T貼著於晶圓蓋11之背面11b後實施分割步驟。 In the embodiment shown in FIG. 5, the adhesive tape T is adhered to the wafer cover 20 of the bonded wafer 25, but the adhesive tape T may be attached to the back surface 11b of the wafer cover 11, and the dividing step may be performed.

此種情況時,由於晶圓蓋20係由透明玻璃形成,因此可實施效準,以CCD等一般的攝像元件由晶圓蓋20側拍攝貼合晶圓25而檢出分割預定線13。 In this case, since the wafer cover 20 is formed of transparent glass, it is possible to perform the effect and detect the planned dividing line 13 by photographing the bonded wafer 25 from the wafer cover 20 side by a general imaging element such as a CCD.

在上述之實施形態中,係以切削刀片22實施了將 貼合晶圓25分割成晶片之分割步驟,但亦可於藉由雷射加工裝置將雷射加工溝或改質層形成於元件晶圓11及/或晶圓蓋20後,藉由制動裝置(分割裝置)以雷射加工溝或改質層為分割起點而將貼合晶圓25分割為各個晶片。 In the above embodiment, the cutting blade 22 is implemented. The step of dividing the bonded wafer 25 into wafers may be performed by forming a laser processing trench or a modified layer on the device wafer 11 and/or the wafer cover 20 by a laser processing device, by means of a braking device (Dividing device) The bonding wafer 25 is divided into individual wafers by using a laser processing groove or a modified layer as a starting point.

其次,參照圖6至圖9,說明本發明之第2實施形態之晶片之製造方法。本實施形態係利用了先切割(Dicing Before Grinding)之晶片製造方法。 Next, a method of manufacturing a wafer according to a second embodiment of the present invention will be described with reference to Figs. 6 to 9 . In this embodiment, a wafer manufacturing method using Dicing Before Grinding is used.

圖6(A)所示之積層物除去步驟中,係沿著分割預定線13形成複數之雷射加工溝16,且在下一製程之切削溝形成步驟所使用之切削刀片之刀厚以上之寬度的區域中除去為積層物之Low-k膜13a。 In the layer removing step shown in FIG. 6(A), a plurality of laser processing grooves 16 are formed along the dividing line 13 and the width of the cutting blade is larger than the thickness of the cutting insert used in the cutting groove forming step of the next process. The Low-k film 13a which is a laminate is removed in the region.

可是,亦可加大照射之雷射光束之光束點徑,藉由一次之雷射光束照射而在切削刀片之刀厚以上之寬度的領域中除去Low-k膜13a。 However, it is also possible to increase the beam spot diameter of the irradiated laser beam, and remove the Low-k film 13a in the field of the width of the cutting blade or more by the irradiation of the laser beam once.

或者,替代實施形態係如圖6(B)所示,於下一製程之切削溝形成步驟使用之切削刀片之表裏側面所定位之區域,沿著分割預定線13而形成一對雷射加工溝16,除去積層物之Low-k膜13a。 Alternatively, in the alternative embodiment, as shown in FIG. 6(B), a pair of laser processing grooves are formed along the dividing line 13 in a region where the front side of the cutting insert used in the cutting groove forming step of the next process is positioned. 16. The Low-k film 13a of the laminate is removed.

如此實施積層物除去步驟後,如圖7(A)所示,實施切削溝形成步驟,沿著元件晶圓11之分割預定線13,以切削刀片22A切削元件晶圓11,於元件晶圓11形成深度到元件晶圓15A之加工厚度t1之切削溝24。該切削溝形成步驟係就全部的分割預定線13實施。 After the laminate removal step is carried out in this manner, as shown in FIG. 7(A), a cutting groove forming step is performed, along which the component wafer 11 is cut by the cutting insert 22A along the dividing line 13 of the component wafer 11, and the component wafer 11 is cut. A cutting groove 24 having a depth t1 to the processing thickness t1 of the element wafer 15A is formed. This cutting groove forming step is carried out for all the dividing line 13 to be divided.

如圖6(B)所示,沿著分割預定線13而形成一對雷 射加工溝16之實施形態中,係如圖7(B)所示,實施切削溝形成步驟,將切削刀片22A之表裏兩面配合雷射加工溝16切削,藉此切削後如雲母般剝離之Low-k膜13a會在雷射加工溝16割斷,而不會對元件15造成不好影響。 As shown in FIG. 6(B), a pair of mines are formed along the dividing line 13 In the embodiment of the shot processing groove 16, as shown in Fig. 7(B), the cutting groove forming step is performed, and both the front and back surfaces of the cutting insert 22A are cut by the laser processing groove 16, whereby the mica is peeled off after cutting. The -k film 13a is cut at the laser processing groove 16 without adversely affecting the element 15.

實施切削溝形成步驟後,實施元件晶片分割步驟,研削貼合晶圓25之元件晶圓11之背面側而使元件晶圓11薄化為元件晶圓之加工厚度,並且使切削溝24露出於元件晶圓11之背面而將元件晶圓11分割為各個元件晶片15A。 After the cutting groove forming step is performed, the element wafer dividing step is performed, the back side of the element wafer 11 bonded to the wafer 25 is ground, the element wafer 11 is thinned to the processing thickness of the element wafer, and the cutting groove 24 is exposed. The element wafer 11 is divided into the respective element wafers 15A on the back surface of the element wafer 11.

該元件晶片分割步驟中,係如圖8所示,以研削裝置之工作夾台30吸引保持貼合晶圓25之晶圓蓋20側,而使元件晶圓11之背面11b露出。 In the element wafer dividing step, as shown in FIG. 8, the wafer cover 20 side of the bonding wafer 25 is sucked by the working chuck 30 of the grinding device, and the back surface 11b of the element wafer 11 is exposed.

接著,使工作夾台30以例如300rpm旋轉朝箭頭a所示之方向旋轉,並且使研削輪38以例如6000rpm朝箭頭b所示之方向旋轉,並且驅動研削單元傳送機構使研削輪38之磨輪42接觸於元件晶圓11之背面11b。接著,以預定之研削傳送速度將研削輪38朝下方傳送研削預定量。 Next, the work chuck 30 is rotated in a direction indicated by an arrow a at, for example, 300 rpm, and the grinding wheel 38 is rotated in a direction indicated by an arrow b at, for example, 6000 rpm, and the grinding unit transfer mechanism is driven to cause the grinding wheel 42 of the grinding wheel 38. It is in contact with the back surface 11b of the element wafer 11. Next, the grinding wheel 38 is conveyed downward by a predetermined amount by the predetermined grinding conveyance speed.

將元件晶圓11研削到所期望之厚度t1時,切削溝24露出於元件晶圓11之背面11b,並且元件晶圓11分割成各個元件晶片15A。 When the element wafer 11 is ground to a desired thickness t1, the cutting groove 24 is exposed on the back surface 11b of the element wafer 11, and the element wafer 11 is divided into individual element wafers 15A.

研削元件晶圓11之背面11b,且將元件晶圓11以各個元件晶片15A分割後,實施沿著分割預定線13分割晶圓蓋20之晶圓蓋分割步驟。在實施該晶圓蓋分割步驟之前,係如圖9所示將貼合晶圓25貼著於黏著膠帶T。 After the back surface 11b of the element wafer 11 is ground, and the element wafer 11 is divided by the respective element wafers 15A, the wafer cover dividing step of dividing the wafer cover 20 along the dividing line 13 is performed. Before the wafer cover dividing step is performed, the bonding wafer 25 is attached to the adhesive tape T as shown in FIG.

接著,以切削刀片22通過元件晶圓11之切削溝24 而切削晶圓蓋20,並於元件晶片15A之表面形成貼著有蓋板23之晶片。 Next, the cutting blade 22 passes through the cutting groove 24 of the component wafer 11 The wafer cover 20 is cut, and a wafer to which the cap plate 23 is attached is formed on the surface of the element wafer 15A.

10‧‧‧雷射加工裝置 10‧‧‧ Laser processing equipment

11‧‧‧元件晶圓 11‧‧‧Component Wafer

11a‧‧‧表面 11a‧‧‧ surface

12‧‧‧工作夾台 12‧‧‧Working table

13‧‧‧分割預定線 13‧‧‧Division line

14‧‧‧集光器 14‧‧‧ concentrator

15‧‧‧CMOS影像感測元件 15‧‧‧ CMOS image sensing components

16‧‧‧雷射加工溝 16‧‧‧Laser processing ditch

X1‧‧‧箭頭 X1‧‧‧ arrow

Claims (1)

一種附蓋晶片之製造方法,該附蓋晶片是由表面具備元件之元件晶片、與配設於該元件晶面之表面之蓋板所構成,其特徵在於具有下述步驟:元件晶圓準備步驟,準備於以形成於表面且交錯之複數條分割預定線所區劃之各區域分別形成元件之元件晶圓;積層物除去步驟,沿著該元件晶圓之該分割預定線照射雷射光束而除去積層於該分割預定線上之積層物;貼合晶圓形成步驟,在實施該積層物除去步驟後,使接著構件介於圍繞該元件晶圓之該各元件的區域且不介於該各元件上,並於該元件晶圓之表面貼著晶圓蓋而形成貼合晶圓;切削溝形成步驟,在實施該積層物除去步驟後,沿著前述元件晶圓之前述分割預定線而以切削刀片切削該元件晶圓,並且形成深度至前述元件晶片之加工厚度之切削溝;及分割步驟,在實施該切削溝形成步驟後,沿著該分割預定線分割該貼合晶圓而形成於元件晶片之表面配設有蓋板之複數個附蓋晶片,且前述分割步驟包含:元件晶圓分割步驟,在實施該貼合晶圓形成步驟後,研削構成前述貼合晶圓之該元件晶圓之背面側而將 其薄化為該元件晶片之加工厚度,並且使該切削溝露出於該元件晶圓之背面而將該元件晶圓分割為各個元件晶片;及晶圓蓋分割步驟,沿著該分割預定線而分割前述晶圓蓋。 A method for manufacturing a covered wafer, comprising: a component wafer having a component on a surface thereof; and a cover plate disposed on a surface of the crystal face of the component, characterized by the following steps: component wafer preparation step Forming a component wafer of each of the regions defined by the plurality of intersecting dividing lines formed on the surface and interleaving; the layer removing step, irradiating the laser beam along the dividing line of the component wafer a laminate laminated on the dividing line; a bonding wafer forming step, after performing the layer removing step, causing the bonding member to be interposed between the components surrounding the component wafer and not between the components And bonding a wafer to the surface of the component wafer to form a bonding wafer; and the cutting groove forming step, after performing the layer removing step, the cutting blade along the predetermined dividing line of the component wafer Cutting the component wafer and forming a cutting groove having a depth to a processing thickness of the component wafer; and dividing the step, after performing the cutting groove forming step, along the dividing pre- The wire is divided into a plurality of capped wafers formed on the surface of the component wafer and provided with a cover plate, and the dividing step includes: a component wafer dividing step, and performing the bonding wafer forming step, grinding Forming the back side of the component wafer of the bonded wafer Thinning is performed on the processing thickness of the component wafer, and the cutting trench is exposed on the back surface of the component wafer to divide the component wafer into individual component wafers; and the wafer cover dividing step is along the dividing line The aforementioned wafer cover is divided.
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