TWI575855B - Resonance control device - Google Patents

Resonance control device Download PDF

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TWI575855B
TWI575855B TW105109349A TW105109349A TWI575855B TW I575855 B TWI575855 B TW I575855B TW 105109349 A TW105109349 A TW 105109349A TW 105109349 A TW105109349 A TW 105109349A TW I575855 B TWI575855 B TW I575855B
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electronic switch
voltage
electrically connected
node
resonant
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TW105109349A
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TW201735512A (en
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zhi-xiang Qiu
Jin-Song Ye
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Description

諧振控制裝置Resonance control device

本發明係關於一種控制裝置,且特別關於一種諧振控制裝置。The present invention relates to a control device, and more particularly to a resonance control device.

在現今的電源產業中,切換式電源供應器大多使用一種半橋式架構的驅動器,用以驅動外部的負載電路;原因在於使用半橋式架構可以將感應磁場工作於第一與第三象限中,而如前向式或反馳式架構則只能工作在第一象限中,比較起來,半橋式架構的驅動器很明顯在工作效率上高很多。In today's power industry, switching power supplies mostly use a half-bridge architecture driver to drive an external load circuit; the reason is that the half-bridge architecture can operate the induced magnetic field in the first and third quadrants. For example, the forward or reverse architecture can only work in the first quadrant. In comparison, the driver of the half bridge architecture is obviously much more efficient.

習知的半橋式驅動裝置,大體皆設成如第1圖所示,包含一訊號控制器10、一第一電子開關12、一第二電子開關14與一諧振槽16,其中第一電子開關12與第二電子開關14皆為N通道金氧半場效電晶體。理論上,訊號控制器10控制第一電子開關12與第二電子開關14為交替式切換,即當第一電子開關12導通時,第二電子開關14關閉,使能量從高電壓端VH儲存於諧振槽16中,當第一電子開關12關閉時,第二電子開關14導通,使能量從諧振槽16中,釋放於低電壓端VL。然而,訊號控制器10其實並不穩定,在實際狀況中,當第二電子開關14從導通狀態欲變為關閉狀態,但卻仍是導通狀態時,第一電子開關12亦會導通,使能量通往諧振槽16,造成第一電子開關12與第二電子開關14之間產生電流突波,以傷害第一電子開關12與第二電子開關14。此外,習知的全橋式驅動裝置也有同樣狀況,全橋式驅動裝置如第2圖所示,包含一訊號控制器18、一第一電子開關20、一第二電子開關22、一第三電子開關24、一第四電子開關26與一諧振槽28。理論上,訊號控制器18控制第一電子開關20與第二電子開關22呈現相同開關狀態,並控制第三電子開關24與第四電子開關26呈現相同開關狀態,且當第一電子開關20與第二電子開關22導通時,第三電子開關24與第四電子開關26關閉,使能量從高電壓端VH透過第一電子開關20與第二電子開關22通往低電壓端VL。當第一電子開關20與第二電子開關22關閉時,第三電子開關24與第四電子開關26導通,使能量從高電壓端VH透過第三電子開關24與第四電子開關26通往低電壓端VL。然而,訊號控制器18亦不穩定,在實際狀況中,當第四電子開關26從導通狀態欲變為關閉狀態,但卻仍是導通狀態時,第一電子開關20亦會導通,使能量通往諧振槽16,造成第一電子開關20與第四電子開關26之間產生電流突波,以傷害第一電子開關20與第四電子開關26。同樣地,當第二電子開關22從導通狀態欲變為關閉狀態,但卻仍是導通狀態時,第三電子開關24亦會導通,使能量通往諧振槽16,造成第二電子開關22與第三電子開關24之間產生電流突波,以傷害第二電子開關22與第三電子開關24。The conventional half-bridge driving device is generally configured as shown in FIG. 1 and includes a signal controller 10, a first electronic switch 12, a second electronic switch 14, and a resonant tank 16, wherein the first electronic device Both the switch 12 and the second electronic switch 14 are N-channel MOSFETs. In theory, the signal controller 10 controls the first electronic switch 12 and the second electronic switch 14 to be alternately switched, that is, when the first electronic switch 12 is turned on, the second electronic switch 14 is turned off, so that energy is stored from the high voltage terminal VH. In the resonant tank 16, when the first electronic switch 12 is turned off, the second electronic switch 14 is turned on to release energy from the resonant tank 16 to the low voltage terminal VL. However, the signal controller 10 is actually unstable. In the actual situation, when the second electronic switch 14 is turned from the on state to the off state, but still in the on state, the first electronic switch 12 is also turned on to make energy. Leading to the resonant tank 16 causes a current surge between the first electronic switch 12 and the second electronic switch 14 to damage the first electronic switch 12 and the second electronic switch 14. In addition, the conventional full-bridge driving device has the same situation. The full-bridge driving device includes a signal controller 18, a first electronic switch 20, a second electronic switch 22, and a third as shown in FIG. The electronic switch 24, a fourth electronic switch 26 and a resonant tank 28. In theory, the signal controller 18 controls the first electronic switch 20 and the second electronic switch 22 to assume the same switching state, and controls the third electronic switch 24 and the fourth electronic switch 26 to assume the same switching state, and when the first electronic switch 20 and the first electronic switch 20 When the second electronic switch 22 is turned on, the third electronic switch 24 and the fourth electronic switch 26 are turned off, so that energy is transmitted from the high voltage terminal VH through the first electronic switch 20 and the second electronic switch 22 to the low voltage terminal VL. When the first electronic switch 20 and the second electronic switch 22 are turned off, the third electronic switch 24 and the fourth electronic switch 26 are turned on, so that energy is transmitted from the high voltage terminal VH through the third electronic switch 24 and the fourth electronic switch 26 to the low Voltage terminal VL. However, the signal controller 18 is also unstable. In the actual situation, when the fourth electronic switch 26 is turned from the on state to the off state, but still in the on state, the first electronic switch 20 is also turned on, so that the energy is passed. To the resonant tank 16, a current surge is generated between the first electronic switch 20 and the fourth electronic switch 26 to damage the first electronic switch 20 and the fourth electronic switch 26. Similarly, when the second electronic switch 22 is turned from the on state to the off state, but is still in the on state, the third electronic switch 24 is also turned on, so that energy is directed to the resonant tank 16, causing the second electronic switch 22 to A current surge is generated between the third electronic switches 24 to damage the second electronic switch 22 and the third electronic switch 24.

因此,本發明係在針對上述的困擾,提出一種諧振控制裝置,以解決習知所產生的問題。Accordingly, the present invention has been made in view of the above-mentioned problems, and a resonance control apparatus has been proposed to solve the problems caused by the prior art.

本發明的主要目的,在於提供一種諧振控制裝置,其係應用於半橋諧振電路或全橋諧振電路上,並於諧振電路中的二電子開關之間的節點連接一偵測控制器,以藉此偵測二電子開關之間的節點之電壓。當部分電子開關呈導通狀態時,其對應之寄生電容會被放電而呈現低電壓,使偵測控制器驅動其餘電子開關呈關閉狀態,以確保半橋諧振電路及全橋諧振電路中的電子開關皆能以上述交替切換之方式運作,進而避免貫通(shoot through)效應產生。The main object of the present invention is to provide a resonance control device which is applied to a half bridge resonant circuit or a full bridge resonant circuit, and connects a detecting controller to a node between two electronic switches in the resonant circuit to borrow This detects the voltage at the node between the two electronic switches. When some of the electronic switches are turned on, their corresponding parasitic capacitances are discharged and present a low voltage, so that the detection controller drives the remaining electronic switches to be turned off to ensure electronic switches in the half-bridge resonant circuit and the full-bridge resonant circuit. All of them can operate in the above-described alternate switching mode, thereby avoiding the shoot through effect.

為達上述目的,本發明提供一種諧振控制裝置,包含一第一電子開關、一第二電子開關、一諧振槽、一偵測控制器與一訊號控制器。第一電子開關電性連接一高電壓端與一節點,第二電子開關電性連接節點與一低電壓端,第二電子開關具有一寄生電容,寄生電容之一端電性連接低電壓端,另一端電性連接節點,低電壓端例如為接地端。諧振槽電性連接節點,並儲有諧振能量。偵測控制器電性連接低電壓端、節點與第一電子開關,並接收節點之電壓與一第一數位訊號。在第二電子開關呈導通狀態時,節點之電壓為低電壓端之低電壓,即接地電位,偵測控制器依據節點之電壓提供低電壓給第一電子開關,使第一電子開關呈關閉狀態,且諧振槽利用諧振能量產生一諧振電流流經第二電子開關。在第二電子開關呈關閉狀態時,諧振電流向寄生電容充電,以提升節點之電壓至大於低電壓的一預設電壓值,偵測控制器依據預設電壓值提供第一數位訊號給第一電子開關,使第一電子開關呈導通狀態。訊號控制器具有第一端與第二端,第一端電性連接偵測控制器,並透過一電隔離器電性連接第一電子開關,電隔離器阻擋高電壓端之高電壓通往訊號控制器,第二端電性連接第二電子開關。訊號控制器在一時間點於第一端產生第一數位訊號,並在時間點於第二端產生一第二數位訊號給第二電子開關,以依序控制第二電子開關呈導通狀態與關閉狀態。To achieve the above objective, the present invention provides a resonance control apparatus including a first electronic switch, a second electronic switch, a resonant tank, a detecting controller and a signal controller. The first electronic switch is electrically connected to a high voltage end and a node, the second electronic switch is electrically connected to the node and a low voltage end, the second electronic switch has a parasitic capacitance, and one end of the parasitic capacitor is electrically connected to the low voltage end, and the other One end is electrically connected to the node, and the low voltage end is, for example, a ground terminal. The resonant tank is electrically connected to the node and stores resonant energy. The detecting controller is electrically connected to the low voltage end, the node and the first electronic switch, and receives the voltage of the node and a first digital signal. When the second electronic switch is in an on state, the voltage of the node is a low voltage of the low voltage end, that is, a ground potential, and the detecting controller provides a low voltage to the first electronic switch according to the voltage of the node, so that the first electronic switch is turned off. And the resonant tank generates a resonant current through the second electronic switch by using the resonant energy. When the second electronic switch is in a closed state, the resonant current is charged to the parasitic capacitance to increase the voltage of the node to a predetermined voltage value greater than the low voltage, and the detecting controller provides the first digital signal to the first according to the preset voltage value. The electronic switch turns the first electronic switch into a conductive state. The signal controller has a first end and a second end. The first end is electrically connected to the detection controller, and is electrically connected to the first electronic switch through an electrical isolator. The electrical isolator blocks the high voltage end of the high voltage terminal to the signal. The controller is electrically connected to the second electronic switch. The signal controller generates a first digital signal at the first end at a time point, and generates a second digital signal to the second electronic switch at the second end to control the second electronic switch to be turned on and off in sequence. status.

在一實施例中,偵測控制器依據節點之電壓提供低電壓給第一電子開關之前,訊號控制器控制第一電子開關呈導通狀態,以利用高電壓端之高電壓儲存諧振能量於諧振槽中。In one embodiment, before the detecting controller supplies the low voltage to the first electronic switch according to the voltage of the node, the signal controller controls the first electronic switch to be in an on state to store the resonant energy in the resonant tank by using the high voltage of the high voltage terminal. in.

第一電子開關與第二電子開關皆為N通道金氧半場效電晶體,寄生電容為寄生汲源電容,第一數位訊號包含依序出現之高準位電壓訊號與低準位電壓訊號,第二數位訊號包含依序出現之高準位電壓訊號與低準位電壓訊號。The first electronic switch and the second electronic switch are both N-channel gold-oxygen half-field effect transistors, and the parasitic capacitance is a parasitic source capacitor. The first digital signal includes a high-level voltage signal and a low-level voltage signal, which are sequentially present. The two-digit signal includes a high-level voltage signal and a low-level voltage signal that appear in sequence.

諧振槽更包含一第一諧振電感、一第二諧振電感與一諧振電容,第二諧振電感例如為一變壓器之漏感。第一諧振電感電性連接節點,第二諧振電感串接第一諧振電感,並儲有諧振能量。諧振電容串接第二諧振電感,並電性連接低電壓端,第一諧振電感、第二諧振電感與諧振電容利用諧振能量產生諧振電流。The resonant tank further includes a first resonant inductor, a second resonant inductor and a resonant capacitor, and the second resonant inductor is, for example, a leakage inductance of a transformer. The first resonant inductor is electrically connected to the node, and the second resonant inductor is connected in series with the first resonant inductor and stores resonant energy. The resonant capacitor is connected in series with the second resonant inductor and electrically connected to the low voltage end, and the first resonant inductor, the second resonant inductor and the resonant capacitor generate resonant current by using the resonant energy.

在一實施例中,偵測控制器更包含一P通道金氧半場效電晶體與一二極體。此P通道金氧半場效電晶體之閘極電性連接節點,汲極電性連接低電壓端,源極電性連接第一電子開關,並接收第一數位訊號;在節點之電壓為低電壓時,此P通道金氧半場效電晶體提供低電壓給第一電子開關;在節點之電壓為預設電壓值時,此P通道金氧半場效電晶體提供第一數位訊號給第一電子開關。此外,二極體之正極與負極分別電性連接閘極與節點。In one embodiment, the detection controller further includes a P-channel MOS field-effect transistor and a diode. The gate of the P-channel MOSFET is electrically connected to the low-voltage terminal, the source is electrically connected to the first electronic switch, and receives the first digital signal; the voltage at the node is a low voltage The P-channel gold-oxygen half-field effect transistor provides a low voltage to the first electronic switch; when the voltage of the node is a preset voltage value, the P-channel MOS half-effect transistor provides the first digital signal to the first electronic switch . In addition, the positive electrode and the negative electrode of the diode are electrically connected to the gate and the node, respectively.

在一實施例中,偵測控制器更包含一PNP雙載子接面電晶體與一二極體。此PNP雙載子接面電晶體之基極透過一第一電阻電性連接節點,集極電性連接低電壓端,射極電性連接第一電子開關,並透過一第二電阻電性連接基極,射極接收該第一數位訊號;在節點之電壓為低電壓時,PNP雙載子接面電晶體提供低電壓給第一電子開關;在節點之電壓為預設電壓值時,PNP雙載子接面電晶體提供第一數位訊號給第一電子開關。二極體之正極與負極分別電性連接第一電阻與節點。In one embodiment, the detection controller further includes a PNP bipolar junction transistor and a diode. The base of the PNP bipolar contact transistor is electrically connected to the node through a first resistor, and the collector is electrically connected to the low voltage end, the emitter is electrically connected to the first electronic switch, and is electrically connected through a second resistor. The base and the emitter receive the first digital signal; when the voltage of the node is a low voltage, the PNP dual-carrier junction transistor provides a low voltage to the first electronic switch; when the voltage of the node is a preset voltage value, the PNP The dual carrier junction transistor provides a first digital signal to the first electronic switch. The positive electrode and the negative electrode of the diode are electrically connected to the first resistor and the node, respectively.

本發明亦提供一種諧振控制裝置,包含一第一電子開關、一第二電子開關、一第三電子開關、一第四電子開關、一諧振槽、一第一偵測控制器、一第二偵測控制器與一訊號控制器。第一電子開關電性連接一高電壓端與一第一節點,第二電子開關電性連接一低電壓端,例如為接地端,第三電子開關電性連接高電壓端與第二電子開關,第四電子開關電性連接低電壓端與第一節點,且第三電子開關與第四電子開關之開關狀態相同。第四電子開關具有一第一寄生電容,第一寄生電容之一端電性連接低電壓端,另一端電性連接第一節點。諧振槽電性連接第一節點、第一電子開關、第二電子開關、第三電子開關與第四電子開關。第一偵測控制器電性連接低電壓端、第一節點、第一電子開關與第二電子開關,並接收第一節點之第一電壓與一第一數位訊號。在第三電子開關與第四電子開關呈導通狀態時,第一電壓為低電壓端之低電壓,即接地電位,第一偵測控制器依據第一電壓提供低電壓給第一電子開關與第二電子開關,使第一電子開關與第二電子開關呈關閉狀態,且高電壓端產生一第一諧振電流,以依序流經第三電子開關、諧振槽、第四電子開關與低電壓端。在第三電子開關與第四電子開關呈關閉狀態時,第一諧振電流向第一寄生電容充電,以提升第一電壓至大於低電壓的一第一預設電壓值,第一偵測控制器依據第一預設電壓值提供第一數位訊號給第一電子開關與第二電子開關,使第一電子開關與第二電子開關呈導通狀態。The invention also provides a resonance control device, comprising a first electronic switch, a second electronic switch, a third electronic switch, a fourth electronic switch, a resonant tank, a first detecting controller and a second detecting Test controller and a signal controller. The first electronic switch is electrically connected to a high voltage end and a first node, and the second electronic switch is electrically connected to a low voltage end, such as a ground end, and the third electronic switch is electrically connected to the high voltage end and the second electronic switch. The fourth electronic switch is electrically connected to the low voltage end and the first node, and the switching states of the third electronic switch and the fourth electronic switch are the same. The fourth electronic switch has a first parasitic capacitance, one end of the first parasitic capacitance is electrically connected to the low voltage end, and the other end is electrically connected to the first node. The resonant tank is electrically connected to the first node, the first electronic switch, the second electronic switch, the third electronic switch and the fourth electronic switch. The first detecting controller is electrically connected to the low voltage end, the first node, the first electronic switch and the second electronic switch, and receives the first voltage of the first node and a first digital signal. When the third electronic switch and the fourth electronic switch are in a conducting state, the first voltage is a low voltage of the low voltage end, that is, a ground potential, and the first detecting controller provides a low voltage according to the first voltage to the first electronic switch and the first The second electronic switch causes the first electronic switch and the second electronic switch to be in a closed state, and the high voltage end generates a first resonant current to sequentially flow through the third electronic switch, the resonant tank, the fourth electronic switch and the low voltage end . When the third electronic switch and the fourth electronic switch are in a closed state, the first resonant current is charged to the first parasitic capacitance to increase the first voltage to a first predetermined voltage value greater than the low voltage, the first detecting controller And providing a first digital signal to the first electronic switch and the second electronic switch according to the first preset voltage value, so that the first electronic switch and the second electronic switch are in an on state.

在一實施例中,第一電子開關與第二電子開關接收第一數位訊號時,係皆依序呈導通狀態及關閉狀態。第二偵測控制器電性連接低電壓端、第二電子開關與第三電子開關之間的一第二節點、第三電子開關與第四電子開關。第二電子開關具有一第二寄生電容,第二寄生電容之一端電性連接低電壓端,另一端電性連接第二節點,諧振槽電性連接第二節點,第二偵測控制器接收第二節點之第二電壓與一第二數位訊號;在第一電子開關與第二電子開關呈導通狀態時,第二電壓為低電壓,且高電壓端產生一第二諧振電流,以依序流經第一電子開關、諧振槽、第二電子開關與低電壓端,且第二偵測控制器依據第二電壓提供低電壓給第三電子開關與第四電子開關,使第三電子開關與第四電子開關呈關閉狀態。在第一電子開關與第二電子開關呈關閉狀態時,第二諧振電流向第二寄生電容充電,以提升第二電壓至大於低電壓的一第二預設電壓值,且第二偵測控制器依據第二預設電壓值提供第二數位訊號給第三電子開關與第四電子開關,使第三電子開關與第四電子開關呈導通狀態。In an embodiment, when the first electronic switch and the second electronic switch receive the first digital signal, the first electronic switch and the second electronic switch are sequentially turned on and off. The second detecting controller is electrically connected to the second node, the third electronic switch and the fourth electronic switch between the low voltage end, the second electronic switch and the third electronic switch. The second electronic switch has a second parasitic capacitance, one end of the second parasitic capacitance is electrically connected to the low voltage end, the other end is electrically connected to the second node, the resonant tank is electrically connected to the second node, and the second detecting controller receives the second a second voltage of the two nodes and a second digital signal; when the first electronic switch and the second electronic switch are in an on state, the second voltage is a low voltage, and the high voltage terminal generates a second resonant current to sequentially flow The first electronic switch, the resonant tank, the second electronic switch and the low voltage end, and the second detecting controller provides a low voltage to the third electronic switch and the fourth electronic switch according to the second voltage, so that the third electronic switch and the third electronic switch The four electronic switches are off. When the first electronic switch and the second electronic switch are in a closed state, the second resonant current is charged to the second parasitic capacitance to increase the second voltage to a second predetermined voltage value greater than the low voltage, and the second detection control The device provides a second digital signal to the third electronic switch and the fourth electronic switch according to the second preset voltage value, so that the third electronic switch and the fourth electronic switch are in a conducting state.

訊號控制器具有第一端與第二端,第一端電性連接第一偵測控制器,並透過一電隔離器電性連接第一電子開關與第二電子開關,第二端電性連接第二偵測控制器,並透過電隔離器電性連接第三電子開關與第四電子開關,電隔離器阻擋高電壓端之電壓通往訊號控制器。訊號控制器在一時間點於第一端產生第一數位訊號,並在此時間點於第二端產生第二數位訊號給第三電子開關與第四電子開關,以控制第三電子開關與第四電子開關依序皆呈導通狀態、關閉狀態與導通狀態。The signal controller has a first end and a second end. The first end is electrically connected to the first detecting controller, and is electrically connected to the first electronic switch and the second electronic switch through an electrical isolator, and the second end is electrically connected. The second detecting controller electrically connects the third electronic switch and the fourth electronic switch through the electrical isolator, and the electrical isolator blocks the voltage of the high voltage end from reaching the signal controller. The signal controller generates a first digital signal at the first end at a time point, and generates a second digital signal to the third electronic switch and the fourth electronic switch at the second end to control the third electronic switch and the first The four electronic switches are in a conductive state, a closed state, and a conductive state in sequence.

第一電子開關、第二電子開關、第三電子開關與第四電子開關皆為N通道金氧半場效電晶體,第一寄生電容與第二寄生電容皆為寄生汲源電容,第一數位訊號包含依序出現之高準位電壓訊號與低準位電壓訊號,第二數位訊號包含依序出現之高準位電壓訊號、低準位電壓訊號與高準位電壓訊號。The first electronic switch, the second electronic switch, the third electronic switch and the fourth electronic switch are all N-channel MOS half-field effect transistors, and the first parasitic capacitance and the second parasitic capacitance are parasitic 电容 source capacitance, the first digital signal The high-level voltage signal and the low-level voltage signal appear in sequence, and the second-digit signal includes a high-level voltage signal, a low-level voltage signal, and a high-level voltage signal.

諧振槽更包含一第一諧振電感、一第二諧振電感與一諧振電容,其中第二諧振電感例如為一變壓器之漏感。第一諧振電感電性連接第二節點,第二諧振電感串接第一諧振電感,諧振電容串接第二諧振電感,並電性連接第一節點。第一諧振電流依序流經第一諧振電感、第二諧振電感與諧振電容,第二諧振電流依序流經諧振電容、第二諧振電感與第一諧振電感。The resonant tank further includes a first resonant inductor, a second resonant inductor and a resonant capacitor, wherein the second resonant inductor is, for example, a leakage inductance of a transformer. The first resonant inductor is electrically connected to the second node, the second resonant inductor is connected in series with the first resonant inductor, and the resonant capacitor is connected in series with the second resonant inductor and electrically connected to the first node. The first resonant current sequentially flows through the first resonant inductor, the second resonant inductor, and the resonant capacitor, and the second resonant current sequentially flows through the resonant capacitor, the second resonant inductor, and the first resonant inductor.

在一實施例中,第一偵測控制器更包含一P通道金氧半場效電晶體與一二極體。此P通道金氧半場效電晶體之閘極電性連接第一節點,汲極電性連接低電壓端,源極電性連接第一電子開關與第二電子開關,並接收第一數位訊號;在第一電壓為低電壓時,P通道金氧半場效電晶體提供低電壓給第一電子開關與第二電子開關;在第一電壓為第一預設電壓值時,P通道金氧半場效電晶體提供第一數位訊號給第一電子開關與第二電子開關。二極體之正極與負極分別電性連接閘極與第一節點。In one embodiment, the first detection controller further includes a P-channel MOS field-effect transistor and a diode. The gate of the P-channel gold-oxygen half-effect transistor is electrically connected to the first node, the drain is electrically connected to the low voltage end, and the source is electrically connected to the first electronic switch and the second electronic switch, and receives the first digital signal; When the first voltage is a low voltage, the P-channel MOS half-effect transistor provides a low voltage to the first electronic switch and the second electronic switch; when the first voltage is the first preset voltage value, the P-channel MOS half-field effect The transistor provides a first digital signal to the first electronic switch and the second electronic switch. The anode and the cathode of the diode are electrically connected to the gate and the first node, respectively.

在一實施例中,第一偵測控制器更包含一PNP雙載子接面電晶體與一二極體。PNP雙載子接面電晶體之基極透過一第一電阻電性連接第一節點,集極電性連接低電壓端,射極電性連接第一電子開關與第二電子開關,並透過一第二電阻電性連接基極,射極接收第一數位訊號;在第一電壓為低電壓時,PNP雙載子接面電晶體提供低電壓給第一電子開關與第二電子開關;在第一電壓為第一預設電壓值時,PNP雙載子接面電晶體提供第一數位訊號給第一電子開關與第二電子開關。二極體之正極與負極分別電性連接第一電阻與第一節點。In an embodiment, the first detection controller further includes a PNP bipolar junction transistor and a diode. The base of the PNP bipolar contact transistor is electrically connected to the first node through a first resistor, and the collector is electrically connected to the low voltage end, and the emitter is electrically connected to the first electronic switch and the second electronic switch, and is transmitted through a first The second resistor is electrically connected to the base, and the emitter receives the first digital signal; when the first voltage is low, the PNP bipolar junction transistor provides a low voltage to the first electronic switch and the second electronic switch; When a voltage is the first predetermined voltage value, the PNP dual carrier junction transistor provides a first digital signal to the first electronic switch and the second electronic switch. The positive electrode and the negative electrode of the diode are electrically connected to the first resistor and the first node, respectively.

在一實施例中,第二偵測控制器更包含一P通道金氧半場效電晶體與一二極體。P通道金氧半場效電晶體之閘極電性連接第二節點,汲極電性連接低電壓端,源極電性連接第三電子開關與第四電子開關,並接收第二數位訊號;在第二電壓為低電壓時,P通道金氧半場效電晶體提供低電壓給第三電子開關與第四電子開關;在第二電壓為第二預設電壓值時,P通道金氧半場效電晶體提供第二數位訊號給第三電子開關與第四電子開關。二極體之正極與負極分別電性連接閘極與第二節點。In one embodiment, the second detection controller further includes a P-channel MOS field-effect transistor and a diode. The gate of the P-channel MOS half-effect transistor is electrically connected to the second node, the drain is electrically connected to the low voltage end, and the source is electrically connected to the third electronic switch and the fourth electronic switch, and receives the second digital signal; When the second voltage is a low voltage, the P-channel MOS half-effect transistor provides a low voltage to the third electronic switch and the fourth electronic switch; when the second voltage is the second predetermined voltage value, the P-channel MOS half-field power The crystal provides a second digital signal to the third electronic switch and the fourth electronic switch. The positive pole and the negative pole of the diode are electrically connected to the gate and the second node, respectively.

在一實施例中,第二偵測控制器更包含一PNP雙載子接面電晶體與一二極體。PNP雙載子接面電晶體之基極透過一第一電阻電性連接第二節點,集極電性連接低電壓端,射極電性連接第三電子開關與第四電子開關,並透過一第二電阻電性連接基極,射極接收第二數位訊號;在第二電壓為低電壓時,PNP雙載子接面電晶體提供低電壓給第三電子開關與第四電子開關;在第二電壓為第二預設電壓值時,PNP雙載子接面電晶體提供第二數位訊號給第三電子開關與第四電子開關。二極體之正極與負極分別電性連接第一電阻與第二節點。In an embodiment, the second detection controller further includes a PNP bipolar junction transistor and a diode. The base of the PNP bipolar junction transistor is electrically connected to the second node through a first resistor, and the collector is electrically connected to the low voltage end, and the emitter is electrically connected to the third electronic switch and the fourth electronic switch, and is transmitted through a The second resistor is electrically connected to the base, and the emitter receives the second digit signal; when the second voltage is low, the PNP bipolar junction transistor provides a low voltage to the third electronic switch and the fourth electronic switch; When the two voltages are the second preset voltage values, the PNP bipolar junction transistor provides a second digital signal to the third electronic switch and the fourth electronic switch. The positive electrode and the negative electrode of the diode are electrically connected to the first resistor and the second node, respectively.

茲為使 貴審查委員對本發明的結構特徵及所達成的功效更有進一步的瞭解與認識,謹佐以較佳的實施例圖及配合詳細的說明,說明如後:In order to give your reviewers a better understanding and understanding of the structural features and efficacies of the present invention, the following is a description of the preferred embodiment and the detailed description.

本發明之實施例將藉由下文配合相關圖式進一步加以解說。盡可能的,於圖式與說明書中,相同標號係代表相同或相似構件。於圖式中,基於簡化與方便標示,形狀與厚度可能經過誇大表示。可以理解的是,未特別顯示於圖式中或描述於說明書中之元件,為所屬技術領域中具有通常技術者所知之形態。本領域之通常技術者可依據本發明之內容而進行多種之改變與修改。Embodiments of the invention will be further illustrated below in conjunction with the associated drawings. Wherever possible, the same reference numerals in the drawings In the drawings, shapes and thicknesses may be exaggerated based on simplification and convenient labeling. It is to be understood that the elements not specifically shown in the drawings or described in the specification are those of ordinary skill in the art. A variety of changes and modifications can be made by those skilled in the art in light of the present invention.

以下請參閱第3圖。本發明之諧振控制裝置之第一實施例應用在半橋諧振電路上,此諧振控制裝置包含一第一電子開關30、一第二電子開關32、一諧振槽34、一偵測控制器36與一訊號控制器38,舉例來說,第一電子開關30與第二電子開關32皆為N通道金氧半場效電晶體。第一電子開關30電性連接一高電壓VH端與一節點N,第二電子開關32電性連接節點N與一低電壓端VL,第二電子開關32具有一寄生電容40,例如為寄生汲源電容,寄生電容40之一端電性連接低電壓端VL,另一端電性連接節點N,低電壓端VL例如為接地端。諧振槽34電性連接節點N,並儲有諧振能量。偵測控制器36電性連接低電壓端VL、節點N與第一電子開關30,並接收節點N之電壓與一第一數位訊號D1,例如為高準位電壓訊號。在第二電子開關32呈導通狀態時,節點N之電壓為低電壓端VL之低電壓,即接地電位,偵測控制器36依據節點N之電壓提供低電壓VL給第一電子開關30,使第一電子開關30呈關閉狀態,且諧振槽34利用諧振能量產生一諧振電流流經第二電子開關32。在第二電子開關32呈關閉狀態時,諧振電流向寄生電容40充電,以提升節點N之電壓至大於低電壓的一預設電壓值,偵測控制器36依據預設電壓值提供第一數位訊號D1給第一電子開關30,使第一電子開關30呈導通狀態。訊號控制器38具有第一端與第二端,第一端電性連接偵測控制器36,並透過一電隔離器41電性連接第一電子開關30,第二端電性連接第二電子開關32;電隔離器41阻擋高電壓端VH之高電壓通往訊號控制器36,避免高壓端VH影響訊號控制器36。電隔離器41以變壓器為例,在本發明中,可為1比1的變壓器。訊號控制器38在一時間點於第一端產生第一數位訊號D1,並在時間點於第二端產生一第二數位訊號D2給第二電子開關32,以依序控制第二電子開關32呈導通狀態與關閉狀態。第二數位訊號D2例如包含依序出現之高準位電壓訊號與低準位電壓訊號。為了讓第一數位訊號D1以及第二數位訊號D2能夠順利傳送,可適當地增加由電晶體組成的推挽式線路。Please refer to Figure 3 below. The first embodiment of the resonant control device of the present invention is applied to a half bridge resonant circuit. The resonant control device includes a first electronic switch 30, a second electronic switch 32, a resonant tank 34, and a detection controller 36. A signal controller 38, for example, both the first electronic switch 30 and the second electronic switch 32 are N-channel MOSFETs. The first electronic switch 30 is electrically connected to a high voltage VH terminal and a node N. The second electronic switch 32 is electrically connected to the node N and a low voltage terminal VL. The second electronic switch 32 has a parasitic capacitance 40, for example, parasitic The source capacitor, one end of the parasitic capacitor 40 is electrically connected to the low voltage terminal VL, the other end is electrically connected to the node N, and the low voltage terminal VL is, for example, a ground terminal. The resonant tank 34 is electrically connected to the node N and stores resonance energy. The detection controller 36 is electrically connected to the low voltage terminal VL, the node N and the first electronic switch 30, and receives the voltage of the node N and a first digital signal D1, for example, a high level voltage signal. When the second electronic switch 32 is in the on state, the voltage of the node N is the low voltage of the low voltage terminal VL, that is, the ground potential, and the detection controller 36 provides the low voltage VL to the first electronic switch 30 according to the voltage of the node N, so that The first electronic switch 30 is in a closed state, and the resonant tank 34 generates a resonant current through the second electronic switch 32 using the resonant energy. When the second electronic switch 32 is in the off state, the resonant current charges the parasitic capacitor 40 to raise the voltage of the node N to a predetermined voltage value greater than the low voltage, and the detecting controller 36 provides the first digit according to the preset voltage value. The signal D1 is given to the first electronic switch 30, so that the first electronic switch 30 is in an on state. The signal controller 38 has a first end and a second end. The first end is electrically connected to the detecting controller 36, and is electrically connected to the first electronic switch 30 through an electrical isolator 41. The second end is electrically connected to the second electronic device. The switch 32; the electrical isolator 41 blocks the high voltage of the high voltage terminal VH from going to the signal controller 36 to prevent the high voltage terminal VH from affecting the signal controller 36. The electrical isolator 41 is exemplified by a transformer. In the present invention, it may be a 1 to 1 transformer. The signal controller 38 generates the first digital signal D1 at the first end at a time point, and generates a second digital signal D2 to the second electronic switch 32 at the second end to control the second electronic switch 32 in sequence. It is in the on state and off state. The second digit signal D2 includes, for example, a high-level voltage signal and a low-level voltage signal that appear sequentially. In order to enable the first digital signal D1 and the second digital signal D2 to be smoothly transmitted, a push-pull circuit composed of a transistor can be appropriately added.

諧振槽34更包含一第一諧振電感42、一第二諧振電感44與一諧振電容46,第二諧振電感44例如為一變壓器之漏感。第一諧振電感42電性連接節點N,第二諧振電感44串接第一諧振電感42,並儲有諧振能量。諧振電容46串接第二諧振電感42,並電性連接低電壓端VL,第一諧振電感42、第二諧振電感44與諧振電容46利用諧振能量產生諧振電流。The resonant tank 34 further includes a first resonant inductor 42, a second resonant inductor 44 and a resonant capacitor 46. The second resonant inductor 44 is, for example, a leakage inductance of a transformer. The first resonant inductor 42 is electrically connected to the node N, and the second resonant inductor 44 is connected in series with the first resonant inductor 42 and stores resonant energy. The resonant capacitor 46 is connected in series with the second resonant inductor 42 and electrically connected to the low voltage terminal VL. The first resonant inductor 42, the second resonant inductor 44 and the resonant capacitor 46 generate a resonant current using the resonant energy.

偵測控制器36更包含一P通道金氧半場效電晶體48與一二極體50。此P通道金氧半場效電晶體48之閘極電性連接節點N,汲極電性連接低電壓端VL,源極透過電隔離器41電性連接第一電子開關30,且此源極電性連接訊號控制器38之第一端,並接收第一數位訊號D1。在節點N之電壓為低電壓時,此P通道金氧半場效電晶體48透過電隔離器41提供低電壓給第一電子開關30。在節點N之電壓為預設電壓值時,此P通道金氧半場效電晶體48透過電隔離器41提供第一數位訊號D1給第一電子開關30。此外,二極體50之正極與負極分別電性連接P通道金氧半場效電晶體48之閘極與節點N。The detection controller 36 further includes a P-channel MOS field-effect transistor 48 and a diode 50. The gate of the P-channel MOS field-effect transistor 48 is electrically connected to the node N, the gate is electrically connected to the low-voltage terminal VL, and the source is electrically connected to the first electronic switch 30 through the electrical isolator 41, and the source is electrically The first end of the signal controller 38 is connected and receives the first digital signal D1. When the voltage at the node N is a low voltage, the P-channel MOS half-effect transistor 48 provides a low voltage to the first electronic switch 30 through the electrical isolator 41. When the voltage of the node N is a preset voltage value, the P-channel MOS field-effect transistor 48 provides the first digital signal D1 to the first electronic switch 30 through the electrical isolator 41. In addition, the positive electrode and the negative electrode of the diode 50 are electrically connected to the gate of the P-channel MOS field-effect transistor 48 and the node N, respectively.

以下介紹本發明之第一實施例之運作過程,請同時參閱第3圖與第4圖。首先,從時間點t0到時間點t1,訊號控制器38於第一端與第二端分別產生為高電壓準位之第一初始數位訊號DI1與為低電壓準位之第二初始數位訊號DI2,使第一電子開關30透過電隔離器41接收第一初始數位訊號DI1,且第二電子開關32接收第二初始數位訊號DI2,讓第一電子開關30與第二電子開關32分別呈導通狀態與關閉狀態。此時,高電壓端VH之高電壓透過第一電子開關30、第一諧振電感42與諧振電容46儲存諧振能量於第二諧振電感44中。The operation of the first embodiment of the present invention will be described below. Please refer to FIG. 3 and FIG. 4 at the same time. First, from time t0 to time t1, the signal controller 38 generates a first initial digital signal DI1 with a high voltage level and a second initial digital signal DI2 for a low voltage level at the first end and the second end, respectively. The first electronic switch 30 receives the first initial digital signal DI1 through the electrical isolator 41, and the second electronic switch 32 receives the second initial digital signal DI2, so that the first electronic switch 30 and the second electronic switch 32 are respectively turned on. With the off state. At this time, the high voltage of the high voltage terminal VH is transmitted through the first electronic switch 30, the first resonant inductor 42, and the resonant capacitor 46 to store the resonant energy in the second resonant inductor 44.

接著,從時間點t1到時間點t2,訊號控制器38於第一端與第二端分別產生為低電壓準位之第一初始數位訊號DI1與為高電壓準位之第二初始數位訊號DI2,使第一電子開關30透過電隔離器41接收第一初始數位訊號DI1,且第二電子開關32第二初始數位訊號DI2,讓第一電子開關30與第二電子開關32分別呈關閉狀態與導通狀態。此時,第一諧振電感42、第二諧振電感44與諧振電容46利用諧振能量產生諧振電流,以流經第二電子開關32,並使節點N之電壓為低電壓端VL之低電壓。Then, from time t1 to time t2, the signal controller 38 generates a first initial digital signal DI1 at a low voltage level and a second initial digital signal DI2 at a high voltage level at the first end and the second end, respectively. The first electronic switch 30 receives the first initial digital signal DI1 through the electrical isolator 41, and the second electronic switch 32 receives the second initial digital signal DI2, so that the first electronic switch 30 and the second electronic switch 32 are respectively turned off. On state. At this time, the first resonant inductor 42, the second resonant inductor 44, and the resonant capacitor 46 generate a resonant current by the resonant energy to flow through the second electronic switch 32, and the voltage of the node N is a low voltage of the low voltage terminal VL.

再來,從時間點t2到時間點t3,訊號控制器38於第一端與第二端分別產生為低準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2,以分別取代第一初始數位訊號DI1與第二初始數位訊號DI2。第二電子開關32接收第二數位訊號D2,故呈導通狀態。由於節點N之電壓為低電壓端VL之低電壓,P通道金氧半場效電晶體48導通,第一數位訊號無法為高準位電壓訊號,第一電子開關30因此呈關閉狀態,且第一諧振電感42、第二諧振電感44與諧振電容46依然利用諧振能量產生諧振電流流經第二電子開關32。在一種情況,第一數位訊號D1與第二數位訊號D2只會有一個是高準位電壓訊號,不過,訊號控制器38可能因為計時發生誤差,發生過早提供高準位電壓訊號之第一數位訊號D1,此時,本發明的偵測控制器36能夠避免第一電子開關30以及第二電子開關32同時開啟。Then, from time t2 to time t3, the signal controller 38 generates a first digital signal D1 of a low-level voltage signal and a second digital signal of a high-level voltage signal at the first end and the second end, respectively. D2, in place of the first initial digital signal DI1 and the second initial digital signal DI2, respectively. The second electronic switch 32 receives the second digital signal D2, and thus is in an on state. Since the voltage of the node N is the low voltage of the low voltage terminal VL, the P-channel MOS half-effect transistor 48 is turned on, the first digital signal cannot be the high-level voltage signal, and the first electronic switch 30 is thus turned off, and the first The resonant inductor 42, the second resonant inductor 44, and the resonant capacitor 46 still generate a resonant current through the second electronic switch 32 using the resonant energy. In one case, only one of the first digital signal D1 and the second digital signal D2 is a high level voltage signal. However, the signal controller 38 may first provide a high level voltage signal due to an error in timing. The digital signal D1, at this time, the detection controller 36 of the present invention can prevent the first electronic switch 30 and the second electronic switch 32 from being simultaneously turned on.

最後,從時間點t3到時間點t4,訊號控制器38於第一端與第二端分別產生為高準位電壓訊號之第一數位訊號D1與為低準位電壓訊號之第二數位訊號D2。在實際情況,第二數位訊號D2被切換到低準位電壓訊號與第一數位訊號D1被切換到高準位電壓訊號之間還有一段時間,由於此時間很短,在第4圖中便被省略。在此段時間內,第二電子開關32接收第二數位訊號D2,故呈關閉狀態,則諧振電流向寄生電容40充電,以提升節點N之電壓至大於低電壓的預設電壓值。此段時間後,第一數位訊號D1被切換成高準位電壓訊號,P通道金氧半場效電晶體48被切換狀態,第一數位訊號D1透過電隔離器41被提供給第一電子開關30,使第一電子開關30呈導通狀態。如此一來,利用偵測控制器36偵測節點N之電壓,便可使第一電子開關30與第二電子開關32呈現交替式開關切換而避免貫通(shoot through)效應產生。且在時間點t4後,第一數位訊號D1亦可呈低準位電壓訊號。Finally, from time t3 to time t4, the signal controller 38 generates a first digital signal D1 of a high-level voltage signal and a second digital signal D2 of a low-level voltage signal at the first end and the second end, respectively. . In the actual situation, there is still a period of time between when the second digit signal D2 is switched to the low level voltage signal and the first digit signal D1 is switched to the high level voltage signal. Since this time is very short, in FIG. 4 Was omitted. During this period of time, the second electronic switch 32 receives the second digital signal D2, so that it is in a closed state, and the resonant current charges the parasitic capacitor 40 to raise the voltage of the node N to a preset voltage value greater than the low voltage. After this period of time, the first digital signal D1 is switched to the high level voltage signal, the P channel MOS half field effect transistor 48 is switched, and the first digital signal D1 is supplied to the first electronic switch 30 through the electrical isolator 41. The first electronic switch 30 is turned on. In this way, by detecting the voltage of the node N by the detecting controller 36, the first electronic switch 30 and the second electronic switch 32 can be alternately switched to avoid the shoot through effect. After the time point t4, the first digital signal D1 can also be a low level voltage signal.

除了上述之外,在開機時,訊號控制器38若先導通第二電子開關32,可能會發生第二電子開關32還未關閉,第一電子開關30便被開啟的情況,而發生貫通(shoot through)效應,此時,本發明的偵測控制器36能夠偵測到寄生電容40尚未被充電到預定值,避免第一電子開關30跟第二電子開關同時被打開。另外,本發明採用第一初始數位訊號DI1以及第一數位訊號D1,第二初始數位訊號DI2以及第二數位訊號D2,係為了方便說明,並非限定訊號控制器38會去區別第一初始數位訊號DI1以及第一數位訊號D1,或是區別第二初始數位訊號DI2以及第二數位訊號D2。In addition to the above, when the signal controller 38 turns on the second electronic switch 32 at the time of power-on, it may happen that the second electronic switch 32 has not been turned off, and the first electronic switch 30 is turned on, and the shoot-through occurs. In this case, the detection controller 36 of the present invention can detect that the parasitic capacitance 40 has not been charged to a predetermined value, and prevent the first electronic switch 30 from being turned on simultaneously with the second electronic switch. In addition, the present invention uses the first initial digital signal DI1 and the first digital signal D1, the second initial digital signal DI2 and the second digital signal D2. For convenience of description, the limited signal controller 38 does not distinguish the first initial digital signal. DI1 and the first digital signal D1, or the second initial digital signal DI2 and the second digital signal D2.

以下請參閱第5圖。本發明之諧振控制裝置之第二實施例亦應用在半橋諧振電路上。第二實施例與第一實施例差別在於偵測控制器36。在第二實施例中,偵測控制器36更包含一PNP雙載子接面電晶體52與一二極體54。此PNP雙載子接面電晶體52之基極透過一第一電阻56電性連接節點N,集極電性連接低電壓端VL,射極透過電隔離器41電性連接第一電子開關30,且此射極電性連接訊號控制器38之第一端,並透過一第二電阻58電性連接基極,以接收第一數位訊號D1。在節點N之電壓為低電壓時,PNP雙載子接面電晶體52透過電隔離器41提供低電壓給第一電子開關30。在節點N之電壓為預設電壓值時,PNP雙載子接面電晶體52透過電隔離器41提供第一數位訊號D1給第一電子開關30。此外,二極體54之正極與負極分別電性連接第一電阻56與節點N。Please refer to Figure 5 below. The second embodiment of the resonance control device of the present invention is also applied to a half bridge resonant circuit. The second embodiment differs from the first embodiment in that the controller 36 is detected. In the second embodiment, the detection controller 36 further includes a PNP bipolar junction transistor 52 and a diode 54. The base of the PNP bipolar junction transistor 52 is electrically connected to the node N through a first resistor 56, and the collector is electrically connected to the low voltage terminal VL. The emitter is electrically connected to the first electronic switch 30 through the electrical isolator 41. The emitter is electrically connected to the first end of the signal controller 38, and is electrically connected to the base through a second resistor 58 to receive the first digital signal D1. When the voltage at the node N is a low voltage, the PNP bipolar junction transistor 52 supplies a low voltage to the first electronic switch 30 through the electrical isolator 41. When the voltage of the node N is a preset voltage value, the PNP dual-carrier junction transistor 52 provides the first digital signal D1 to the first electronic switch 30 through the electrical isolator 41. In addition, the positive electrode and the negative electrode of the diode 54 are electrically connected to the first resistor 56 and the node N, respectively.

以下介紹本發明之第二實施例之運作過程,請同時參閱第5圖與第4圖。從時間點t0到時間點t2的運作與第一實施例相同,於此不再贅述。從時間點t2到時間點t3,訊號控制器38於第一端與第二端分別產生為低準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2,以分別取代第一初始數位訊號DI1與第二初始數位訊號DI2。第二電子開關32接收第二數位訊號D2,故呈導通狀態。由於節點N之電壓為低電壓端VL之低電壓,PNP雙載子接面電晶體52導通,第一數位訊號D1無法為高準位電壓訊號,第一電子開關30因此呈關閉狀態,且第一諧振電感42、第二諧振電感44與諧振電容46依然利用諧振能量產生諧振電流流經第二電子開關32。在一種情況,第一數位訊號D1與第二數位訊號D2只會有一個是高準位電壓訊號,不過,訊號控制器38可能因為計時發生誤差,發生過早提供高準位電壓訊號之第一數位訊號D1,此時,本發明的偵測控制器36能夠避免第一電子開關30以及第二電子開關32同時開啟。The operation of the second embodiment of the present invention will be described below. Please refer to FIG. 5 and FIG. 4 at the same time. The operation from the time point t0 to the time point t2 is the same as that of the first embodiment, and details are not described herein again. From time t2 to time t3, the signal controller 38 generates a first digital signal D1 of a low-level voltage signal and a second digital signal D2 of a high-level voltage signal at the first end and the second end, respectively. The first initial digital signal DI1 and the second initial digital signal DI2 are replaced respectively. The second electronic switch 32 receives the second digital signal D2, and thus is in an on state. Since the voltage of the node N is the low voltage of the low voltage terminal VL, the PNP dual carrier junction transistor 52 is turned on, and the first digital signal D1 cannot be a high level voltage signal, and the first electronic switch 30 is thus turned off, and the first A resonant inductor 42, a second resonant inductor 44, and a resonant capacitor 46 still generate resonant current through the second electronic switch 32 using resonant energy. In one case, only one of the first digital signal D1 and the second digital signal D2 is a high level voltage signal. However, the signal controller 38 may first provide a high level voltage signal due to an error in timing. The digital signal D1, at this time, the detection controller 36 of the present invention can prevent the first electronic switch 30 and the second electronic switch 32 from being simultaneously turned on.

最後,從時間點t3到時間點t4,訊號控制器38於第一端與第二端分別產生為高準位電壓訊號之第一數位訊號D1與為低準位電壓訊號之第二數位訊號D2。在實際情況,第二數位訊號D2被切換到低準位電壓訊號與第一數位訊號D1被切換到高準位電壓訊號之間還有一段時間,由於此時間很短,在第4圖便省略。在此段時間內,第二電子開關32接收第二數位訊號D2,故呈關閉狀態,則諧振電流向寄生電容40充電,以提升節點N之電壓至大於低電壓的預設電壓值。此段時間後,第一數位訊號D1被切換成高準位電壓訊號,PNP雙載子接面電晶體52被切換狀態,第一數位訊號D1透過電隔離器41被提供給第一電子開關30,使第一電子開關30呈導通狀態。如此一來,利用偵測控制器36偵測節點N之電壓,便可使第一電子開關30與第二電子開關32呈現交替式開關切換而避免貫通效應產生。且在時間點t4後,第一數位訊號D1亦可呈低準位電壓訊號。Finally, from time t3 to time t4, the signal controller 38 generates a first digital signal D1 of a high-level voltage signal and a second digital signal D2 of a low-level voltage signal at the first end and the second end, respectively. . In the actual situation, there is still a period of time between when the second digital signal D2 is switched to the low level voltage signal and the first digital signal D1 is switched to the high level voltage signal. Since this time is very short, it is omitted in FIG. . During this period of time, the second electronic switch 32 receives the second digital signal D2, so that it is in a closed state, and the resonant current charges the parasitic capacitor 40 to raise the voltage of the node N to a preset voltage value greater than the low voltage. After the period of time, the first digital signal D1 is switched to the high level voltage signal, the PNP dual carrier interface transistor 52 is switched, and the first digital signal D1 is supplied to the first electronic switch 30 through the electrical isolator 41. The first electronic switch 30 is turned on. In this way, by detecting the voltage of the node N by the detecting controller 36, the first electronic switch 30 and the second electronic switch 32 can be alternately switched to avoid the penetration effect. After the time point t4, the first digital signal D1 can also be a low level voltage signal.

以下請參閱第6圖。本發明之諧振控制裝置之第三實施例應用在全橋諧振電路上,此諧振控制裝置包含一第一電子開關60、一第二電子開關62、一第三電子開關64、一第四電子開關66、一諧振槽68、一第一偵測控制器70、一第二偵測控制器72與一訊號控制器74,其中第一電子開關60、第二電子開關62、第三電子開關64與第四電子開關66例如皆為N通道金氧半場效電晶體。第一電子開關60電性連接一高電壓端VH與一第一節點N1,第二電子開關62電性連接一低電壓端VL,例如為接地端,第三電子開關64電性連接高電壓端VH與第二電子開關62,第四電子開關66電性連接低電壓端VL與第一節點N1,且第三電子開關64與第四電子開關66之開關狀態相同。第四電子開關66具有一第一寄生電容76,例如為寄生汲源電容。第一寄生電容76之一端電性連接低電壓端VL,另一端電性連接第一節點N1。諧振槽68電性連接第一節點N1、第一電子開關60、第二電子開關62、第三電子開關64與第四電子開關66。第一偵測控制器70電性連接低電壓端VL、第一節點N1、第一電子開關60與第二電子開關62,並接收第一節點N1之第一電壓與一第一數位訊號D1。在第三電子開關64與第四電子開關66呈導通狀態時,第一電壓為低電壓端VL之低電壓,即接地電位,第一偵測控制器70依據第一電壓提供低電壓給第一電子開關60與第二電子開關62,使第一電子開關60與第二電子開關62呈關閉狀態,且高電壓端VH產生一第一諧振電流,以依序流經第三電子開關64、諧振槽68、第四電子開關66與低電壓端VL。在第三電子開關64與第四電子開關66呈關閉狀態時,第一諧振電流向第一寄生電容76充電,以提升第一電壓至大於低電壓的一第一預設電壓值,第一偵測控制器70依據第一預設電壓值提供第一數位訊號D1給第一電子開關60與第二電子開關62,使第一電子開關60與第二電子開關62呈導通狀態。Please refer to Figure 6 below. The third embodiment of the resonance control device of the present invention is applied to a full bridge resonant circuit. The resonance control device includes a first electronic switch 60, a second electronic switch 62, a third electronic switch 64, and a fourth electronic switch. 66, a resonant tank 68, a first detecting controller 70, a second detecting controller 72 and a signal controller 74, wherein the first electronic switch 60, the second electronic switch 62, the third electronic switch 64 The fourth electronic switch 66 is, for example, an N-channel metal oxide half field effect transistor. The first electronic switch 60 is electrically connected to a high voltage terminal VH and a first node N1, and the second electronic switch 62 is electrically connected to a low voltage terminal VL, for example, a ground terminal, and the third electronic switch 64 is electrically connected to the high voltage terminal. The VH is electrically connected to the second electronic switch 62, and the fourth electronic switch 66 is electrically connected to the low voltage terminal VL and the first node N1, and the switching states of the third electronic switch 64 and the fourth electronic switch 66 are the same. The fourth electronic switch 66 has a first parasitic capacitance 76, such as a parasitic source capacitance. One end of the first parasitic capacitor 76 is electrically connected to the low voltage terminal VL, and the other end is electrically connected to the first node N1. The resonant tank 68 is electrically connected to the first node N1, the first electronic switch 60, the second electronic switch 62, the third electronic switch 64 and the fourth electronic switch 66. The first detecting controller 70 is electrically connected to the low voltage terminal VL, the first node N1, the first electronic switch 60 and the second electronic switch 62, and receives the first voltage of the first node N1 and a first digital signal D1. When the third electronic switch 64 and the fourth electronic switch 66 are in an on state, the first voltage is a low voltage of the low voltage terminal VL, that is, a ground potential, and the first detecting controller 70 provides a low voltage to the first according to the first voltage. The electronic switch 60 and the second electronic switch 62 cause the first electronic switch 60 and the second electronic switch 62 to be in a closed state, and the high voltage terminal VH generates a first resonant current to sequentially flow through the third electronic switch 64 and resonate. The slot 68, the fourth electronic switch 66 and the low voltage terminal VL. When the third electronic switch 64 and the fourth electronic switch 66 are in a closed state, the first resonant current is charged to the first parasitic capacitor 76 to increase the first voltage to a first preset voltage value greater than the low voltage, the first detective The controller 70 provides the first digital signal D1 to the first electronic switch 60 and the second electronic switch 62 according to the first preset voltage value, so that the first electronic switch 60 and the second electronic switch 62 are in an on state.

第一電子開關60與第二電子開關62接收第一數位訊號D1時,係皆依序呈導通狀態及關閉狀態,第一數位訊號D1例如包含依序出現之高準位電壓訊號與低準位電壓訊號。第二偵測控制器72電性連接低電壓端VL、第二電子開關62與第三電子開關64之間的一第二節點N2、第三電子開關64與第四電子開關66。第二電子開關62具有一第二寄生電容78,例如為寄生汲源電容。第二寄生電容78之一端電性連接低電壓端VL,另一端電性連接第二節點N2,諧振槽68電性連接第二節點N2,第二偵測控制器72接收第二節點N2之第二電壓與一第二數位訊號D2,第二數位訊號D2例如包含依序出現之高準位電壓訊號、低準位電壓訊號與高準位電壓訊號。在第一電子開關60與第二電子開關62呈導通狀態時,第二電壓為低電壓,且高電壓端VH產生一第二諧振電流,以依序流經第一電子開關60、諧振槽68、第二電子開關62與低電壓端VL,且第二偵測控制器72依據第二電壓提供低電壓給第三電子開關64與第四電子開關66,使第三電子開關64與第四電子開關66呈關閉狀態。在第一電子開關60與第二電子開關62呈關閉狀態時,第二諧振電流向第二寄生電容78充電,以提升第二電壓至大於低電壓的一第二預設電壓值,且第二偵測控制器72依據第二預設電壓值提供第二數位訊號D2給第三電子開關64與第四電子開關66,使第三電子開關64與第四電子開關66呈導通狀態。When the first electronic switch 60 and the second electronic switch 62 receive the first digital signal D1, the first digital signal D1 is sequentially turned on and off, and the first digital signal D1 includes, for example, a high-level voltage signal and a low level sequentially appearing. Voltage signal. The second detection controller 72 is electrically connected to the second node N2, the third electronic switch 64 and the fourth electronic switch 66 between the low voltage terminal VL, the second electronic switch 62 and the third electronic switch 64. The second electronic switch 62 has a second parasitic capacitance 78, such as a parasitic source capacitance. One end of the second parasitic capacitor 78 is electrically connected to the low voltage terminal VL, the other end is electrically connected to the second node N2, the resonant tank 68 is electrically connected to the second node N2, and the second detecting controller 72 receives the second node N2. The second voltage and the second digital signal D2, the second digital signal D2 include, for example, a high-level voltage signal, a low-level voltage signal, and a high-level voltage signal. When the first electronic switch 60 and the second electronic switch 62 are in an on state, the second voltage is a low voltage, and the high voltage terminal VH generates a second resonant current to sequentially flow through the first electronic switch 60 and the resonant tank 68. The second electronic switch 62 and the low voltage terminal VL, and the second detecting controller 72 provides a low voltage to the third electronic switch 64 and the fourth electronic switch 66 according to the second voltage, so that the third electronic switch 64 and the fourth electronic Switch 66 is in a closed state. When the first electronic switch 60 and the second electronic switch 62 are in a closed state, the second resonant current charges the second parasitic capacitor 78 to increase the second voltage to a second predetermined voltage value greater than the low voltage, and the second The detection controller 72 provides the second digital signal D2 to the third electronic switch 64 and the fourth electronic switch 66 according to the second preset voltage value, so that the third electronic switch 64 and the fourth electronic switch 66 are in an on state.

訊號控制器74具有第一端與第二端,第一端電性連接第一偵測控制器70,並透過一電隔離器79電性連接第一電子開關60與第二電子開關62,第二端電性連接第二偵測控制器72,並透過電隔離器79電性連接第三電子開關64與第四電子開關66,其中,第一電子開關60與第二電子開關62的接腳不同,第三電子開關64與第四電子開關66的接腳不同,以適當地隔離彼此。在此電隔離器79亦以變壓器為例。電隔離器79阻擋高電壓端VH之電壓通往訊號控制器74。訊號控制器74在一時間點於第一端產生第一數位訊號D1,並在此時間點於第二端產生第二數位訊號D2,將其透過電隔離器79給第三電子開關64與第四電子開關66,以控制第三電子開關64與第四電子開關66依序皆呈導通狀態、關閉狀態與導通狀態。為了讓第一數位訊號D1以及第二數位訊號D2能夠順利傳送,可適當地增加由電晶體組成的推挽式線路。The signal controller 74 has a first end and a second end. The first end is electrically connected to the first detecting controller 70, and is electrically connected to the first electronic switch 60 and the second electronic switch 62 through an electrical isolator 79. The two ends are electrically connected to the second detecting controller 72, and are electrically connected to the third electronic switch 64 and the fourth electronic switch 66 through the electrical isolator 79, wherein the first electronic switch 60 and the second electronic switch 62 are connected to each other. Differently, the pins of the third electronic switch 64 and the fourth electronic switch 66 are different to properly isolate each other. Here, the electrical isolator 79 also takes a transformer as an example. The electrical isolator 79 blocks the voltage of the high voltage terminal VH from going to the signal controller 74. The signal controller 74 generates the first digital signal D1 at the first end at a time point, and generates a second digital signal D2 at the second end at this time point, and transmits the second digital signal D2 to the third electronic switch 64 through the electrical isolator 79. The four electronic switches 66 control the third electronic switch 64 and the fourth electronic switch 66 to be in an on state, a closed state, and a conductive state in sequence. In order to enable the first digital signal D1 and the second digital signal D2 to be smoothly transmitted, a push-pull circuit composed of a transistor can be appropriately added.

諧振槽68更包含一第一諧振電感80、一第二諧振電感82與一諧振電容84,其中第二諧振電感82例如為一變壓器之漏感。第一諧振電感80電性連接第二節點N2,第二諧振電感82串接第一諧振電感80,諧振電容84串接第二諧振電感82,並電性連接第一節點N1。第一諧振電流依序流經第一諧振電感80、第二諧振電感82與諧振電容84,第二諧振電流依序流經諧振電容84、第二諧振電感82與第一諧振電感80。The resonant tank 68 further includes a first resonant inductor 80, a second resonant inductor 82 and a resonant capacitor 84, wherein the second resonant inductor 82 is, for example, a leakage inductance of a transformer. The first resonant inductor 80 is electrically connected to the second node N2, and the second resonant inductor 82 is connected in series with the first resonant inductor 80. The resonant capacitor 84 is connected in series with the second resonant inductor 82 and electrically connected to the first node N1. The first resonant current sequentially flows through the first resonant inductor 80, the second resonant inductor 82, and the resonant capacitor 84. The second resonant current sequentially flows through the resonant capacitor 84, the second resonant inductor 82, and the first resonant inductor 80.

第一偵測控制器70更包含一P通道金氧半場效電晶體86與一二極體88。此P通道金氧半場效電晶體86之閘極電性連接第一節點N1,汲極電性連接低電壓端VL,源極電性連接訊號控制器74之第一端,且此源極透過電隔離器79電性連接第一電子開關60與第二電子開關62,並接收第一數位訊號D1。在第一電壓為低電壓時,P通道金氧半場效電晶體86透過電隔離器79提供低電壓給第一電子開關60與第二電子開關62。在第一電壓為第一預設電壓值時,P通道金氧半場效電晶體86透過電隔離器79提供第一數位訊號D1給第一電子開關60與第二電子開關62。二極體88之正極與負極分別電性連接P通道金氧半場效電晶體86之閘極與第一節點N1。The first detection controller 70 further includes a P-channel MOS field-effect transistor 86 and a diode 88. The gate of the P-channel MOS field-effect transistor 86 is electrically connected to the first node N1, the gate is electrically connected to the low-voltage terminal VL, and the source is electrically connected to the first end of the signal controller 74, and the source is transparent. The electrical isolator 79 is electrically connected to the first electronic switch 60 and the second electronic switch 62 and receives the first digital signal D1. When the first voltage is a low voltage, the P-channel MOS half-effect transistor 86 provides a low voltage to the first electronic switch 60 and the second electronic switch 62 through the electrical isolator 79. When the first voltage is the first predetermined voltage value, the P-channel MOS field-effect transistor 86 provides the first digital signal D1 to the first electronic switch 60 and the second electronic switch 62 through the electrical isolator 79. The anode and the cathode of the diode 88 are electrically connected to the gate of the P-channel MOS field-effect transistor 86 and the first node N1, respectively.

第二偵測控制器72更包含一P通道金氧半場效電晶體90與一二極體92。P通道金氧半場效電晶體90之閘極電性連接第二節點N2,汲極電性連接低電壓端VL,源極電性連接訊號控制器74之第二端,且此源極透過電隔離器79電性連接第三電子開關64與第四電子開關66,並接收第二數位訊號D2。在第二電壓為低電壓時,P通道金氧半場效電晶體90透過電隔離器79提供低電壓給第三電子開關64與第四電子開關66。在第二電壓為第二預設電壓值時,P通道金氧半場效電晶體90透過電隔離器79提供第二數位訊號D2給第三電子開關64與第四電子開關66。二極體92之正極與負極分別電性連接P通道金氧半場效電晶體90之閘極與第二節點N2。The second detection controller 72 further includes a P-channel MOS field-effect transistor 90 and a diode 92. The gate of the P-channel MOSFET is electrically connected to the second node N2, the drain is electrically connected to the low voltage terminal VL, and the source is electrically connected to the second end of the signal controller 74, and the source is transparent. The isolator 79 is electrically connected to the third electronic switch 64 and the fourth electronic switch 66, and receives the second digital signal D2. When the second voltage is a low voltage, the P-channel MOS half-effect transistor 90 provides a low voltage to the third electronic switch 64 and the fourth electronic switch 66 through the electrical isolator 79. When the second voltage is the second predetermined voltage value, the P-channel MOS field-effect transistor 90 provides the second digital signal D2 to the third electronic switch 64 and the fourth electronic switch 66 through the electrical isolator 79. The anode and the cathode of the diode 92 are electrically connected to the gate of the P-channel MOS field-effect transistor 90 and the second node N2, respectively.

以下介紹本發明之第三實施例之運作過程,請同時參閱第6圖與第7圖。首先,從時間點t0到時間點t1,訊號控制器74於第一端與第二端分別產生為低準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2。第三電子開關64與第四電子開關66透過電隔離器79接收第二數位訊號D2,故呈導通狀態。此時,由於第一電壓為低電壓端VL之低電壓,P通道金氧半場效電晶體86導通,第一數位訊號D1無法為高準位電壓訊號,第一電子開關60與第二電子開關62呈關閉狀態,且高電壓端VH產生第一諧振電流,以依序流經第三電子開關64、第一諧振電感80、第二諧振電感82、諧振電容84、第四電子開關66與低電壓端VL。在一種情況,第一數位訊號D1與第二數位訊號D2只會有一個是高準位電壓訊號,不過,訊號控制器74可能因為計時發生誤差,發生過早提供高準位電壓訊號之第一數位訊號D1,此時,本發明的裝置能夠避免第一電子開關60與第二電子開關62開啟,進而避免貫通(shoot through)現象的發生。The operation of the third embodiment of the present invention will be described below. Please refer to FIG. 6 and FIG. 7 at the same time. First, from time t0 to time t1, the signal controller 74 generates a first digital signal D1 of a low-level voltage signal and a second digital signal D2 of a high-level voltage signal at the first end and the second end, respectively. . The third electronic switch 64 and the fourth electronic switch 66 receive the second digital signal D2 through the electrical isolator 79, and thus are in an on state. At this time, since the first voltage is a low voltage of the low voltage terminal VL, the P-channel MOS half-effect transistor 86 is turned on, and the first digital signal D1 cannot be a high-level voltage signal, and the first electronic switch 60 and the second electronic switch 62 is in a closed state, and the high voltage terminal VH generates a first resonant current to sequentially flow through the third electronic switch 64, the first resonant inductor 80, the second resonant inductor 82, the resonant capacitor 84, and the fourth electronic switch 66 and low. Voltage terminal VL. In one case, only one of the first digital signal D1 and the second digital signal D2 is a high-level voltage signal. However, the signal controller 74 may first provide a high-level voltage signal due to an error in timing. The digital signal D1, at this time, the apparatus of the present invention can prevent the first electronic switch 60 and the second electronic switch 62 from being turned on, thereby preventing the occurrence of a shoot through phenomenon.

接著,從時間點t1到時間點t2,訊號控制器74於第一端與第二端分別產生為高準位電壓訊號之第一數位訊號D1與為低準位電壓訊號之第二數位訊號D2。第三電子開關64與第四電子開關66透過電隔離器79接收第二數位訊號D2,故呈關閉狀態。此時,第一諧振電流向第一寄生電容76充電,以提升第一電壓至大於低電壓的第一預設電壓值,P通道金氧半場效電晶體86依據第一預設電壓值透過電隔離器79提供第一數位訊號D1給第一電子開關60與第二電子開關62,使第一電子開關60與第二電子開關62呈導通狀態。Then, from time t1 to time t2, the signal controller 74 generates a first digital signal D1 of a high-level voltage signal and a second digital signal D2 of a low-level voltage signal at the first end and the second end, respectively. . The third electronic switch 64 and the fourth electronic switch 66 receive the second digital signal D2 through the electrical isolator 79, and thus are in a closed state. At this time, the first resonant current charges the first parasitic capacitor 76 to increase the first voltage to a first predetermined voltage value greater than the low voltage, and the P-channel MOS half-effect transistor 86 transmits the light according to the first preset voltage value. The isolator 79 provides the first digital signal D1 to the first electronic switch 60 and the second electronic switch 62 to bring the first electronic switch 60 and the second electronic switch 62 into a conducting state.

再來,從時間點t2到時間點t3,訊號控制器74於第一端與第二端分別產生為高準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2。第一電子開關60與第二電子開關62透過電隔離器79接收第一數位訊號D1,故呈導通狀態。此時,由於第二電壓為低電壓,P通道金氧半場效電晶體90導通,使第三電子開關64與第四電子開關66呈關閉狀態。另外,高電壓端VH產生一第二諧振電流,以依序流經第一電子開關60、諧振電容84、第二諧振電感82、第一諧振電感80、第二電子開關62與低電壓端VL。在一種情況,第一數位訊號D1與第二數位訊號D2只會有一個是高準位電壓訊號,不過,訊號控制器38可能因為計時發生誤差,發生過早提供高準位電壓訊號之第一數位訊號D1,此時,本發明的偵測控制器36能夠避免第一電子開關30以及第二電子開關32同時開啟。Then, from time t2 to time t3, the signal controller 74 generates a first digital signal D1 of a high-level voltage signal and a second digital signal of a high-level voltage signal at the first end and the second end, respectively. D2. The first electronic switch 60 and the second electronic switch 62 receive the first digital signal D1 through the electrical isolator 79, and thus are in an on state. At this time, since the second voltage is a low voltage, the P-channel MOS half-effect transistor 90 is turned on, so that the third electronic switch 64 and the fourth electronic switch 66 are turned off. In addition, the high voltage terminal VH generates a second resonant current to sequentially flow through the first electronic switch 60, the resonant capacitor 84, the second resonant inductor 82, the first resonant inductor 80, the second electronic switch 62, and the low voltage terminal VL. . In one case, only one of the first digital signal D1 and the second digital signal D2 is a high level voltage signal. However, the signal controller 38 may first provide a high level voltage signal due to an error in timing. The digital signal D1, at this time, the detection controller 36 of the present invention can prevent the first electronic switch 30 and the second electronic switch 32 from being simultaneously turned on.

最後,從時間點t3到時間點t4,訊號控制器74於第一端與第二端分別產生為低準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2。第一電子開關60與第二電子開關62透過電隔離器79接收第一數位訊號D1,故呈關閉狀態。第一電子開關60與第二電子開關62關閉後還有一段時間,由於此時間很短,在第7圖中便被省略。此時間內,第二諧振電流向第二寄生電容78充電,以提升第二電壓至大於低電壓的第二預設電壓值。接著,第二數位訊號D2被切換成高準位電壓訊號,P通道金氧半場效電晶體90被切換狀態,第二數位訊號D2透過電隔離器41被提供給第三電子開關64與第四電子開關66,使第三電子開關64與第四電子開關66呈導通狀態。如此一來,利用第一偵測控制器70偵測第一節點N1之第一電壓,便可使第三電子開關64與第二電子開關62呈現交替式開關切換而避免貫通效應產生。同時,利用第二偵測控制器72偵測第二節點N2之第二電壓,亦使第一電子開關60與第四電子開關66呈現交替式開關切換而避免貫通效應產生。Finally, from time t3 to time t4, the signal controller 74 generates a first digital signal D1 of a low level voltage signal and a second digital signal D2 of a high level voltage signal at the first end and the second end, respectively. . The first electronic switch 60 and the second electronic switch 62 receive the first digital signal D1 through the electrical isolator 79, and thus are in a closed state. There is still a period of time after the first electronic switch 60 and the second electronic switch 62 are turned off, and since this time is short, it is omitted in FIG. During this time, the second resonant current charges the second parasitic capacitance 78 to boost the second voltage to a second predetermined voltage value greater than the low voltage. Then, the second digital signal D2 is switched to a high level voltage signal, the P channel MOS field 90 is switched, and the second digital signal D2 is supplied to the third electronic switch 64 and the fourth through the electrical isolator 41. The electronic switch 66 causes the third electronic switch 64 and the fourth electronic switch 66 to be in an on state. In this way, by detecting the first voltage of the first node N1 by using the first detecting controller 70, the third electronic switch 64 and the second electronic switch 62 can be alternately switched to avoid the penetration effect. At the same time, the second detection controller 72 is used to detect the second voltage of the second node N2, and the first electronic switch 60 and the fourth electronic switch 66 are also alternately switched to avoid the penetration effect.

以下請參閱第8圖。本發明之諧振控制裝置之第二實施例亦應用在全橋諧振電路上。第四實施例與第三實施例差別在於第一偵測控制器70與第二偵測控制器72。在第四實施例中,第一偵測控制器70更包含一PNP雙載子接面電晶體94與一二極體96。PNP雙載子接面電晶體94之基極透過一第一電阻98電性連接第一節點N1,集極電性連接低電壓端VL,射極電性連接訊號控制器74之第一端,且此射極透過電隔離器79電性連接第一電子開關60與第二電子開關62,並透過一第二電阻100電性連接基極,射極接收第一數位訊號D1。在第一電壓為低電壓時,PNP雙載子接面電晶體94透過電隔離器79提供低電壓給第一電子開關60與第二電子開關62。在第一電壓為第一預設電壓值時,PNP雙載子接面電晶體94透過電隔離器79提供第一數位訊號D1給第一電子開關60與第二電子開關62。二極體96之正極與負極分別電性連接第一電阻98與第一節點N1。Please refer to Figure 8 below. The second embodiment of the resonance control device of the present invention is also applied to a full bridge resonant circuit. The fourth embodiment differs from the third embodiment in the first detection controller 70 and the second detection controller 72. In the fourth embodiment, the first detection controller 70 further includes a PNP bipolar junction transistor 94 and a diode 96. The base of the PNP bipolar junction transistor 94 is electrically connected to the first node N1 through a first resistor 98, and the collector is electrically connected to the low voltage terminal VL, and the emitter is electrically connected to the first end of the signal controller 74. The emitter is electrically connected to the first electronic switch 60 and the second electronic switch 62 through the electrical isolator 79, and is electrically connected to the base through a second resistor 100. The emitter receives the first digital signal D1. When the first voltage is a low voltage, the PNP bipolar junction transistor 94 provides a low voltage to the first electronic switch 60 and the second electronic switch 62 through the electrical isolator 79. When the first voltage is the first predetermined voltage value, the PNP bipolar junction transistor 94 provides the first digital signal D1 to the first electronic switch 60 and the second electronic switch 62 through the electrical isolator 79. The positive electrode and the negative electrode of the diode 96 are electrically connected to the first resistor 98 and the first node N1, respectively.

第二偵測控制器72更包含一PNP雙載子接面電晶體102與一二極體104。PNP雙載子接面電晶體102之基極透過一第一電阻106電性連接第二節點N2,集極電性連接低電壓端VL,射極電性連接訊號控制器74之第二端,且此射極透過電隔離器79電性連接第三電子開關64與第四電子開關66,並透過一第二電阻108電性連接基極,射極接收第二數位訊號D2。在第二電壓為低電壓時,PNP雙載子接面電晶體102透過電隔離器79提供低電壓給第三電子開關64與第四電子開關66。在第二電壓為第二預設電壓值時,PNP雙載子接面電晶體102透過電隔離器79提供第二數位訊號D2給第三電子開關64與第四電子開關66。二極體104之正極與負極分別電性連接第一電阻106與第二節點N2。The second detection controller 72 further includes a PNP bipolar junction transistor 102 and a diode 104. The base of the PNP bipolar junction transistor 102 is electrically connected to the second node N2 through a first resistor 106, and the collector is electrically connected to the low voltage terminal VL, and the emitter is electrically connected to the second end of the signal controller 74. The emitter is electrically connected to the third electronic switch 64 and the fourth electronic switch 66 through the electrical isolator 79, and is electrically connected to the base through a second resistor 108, and the emitter receives the second digital signal D2. When the second voltage is a low voltage, the PNP bipolar junction transistor 102 provides a low voltage to the third electronic switch 64 and the fourth electronic switch 66 through the electrical isolator 79. When the second voltage is the second predetermined voltage value, the PNP dual carrier junction transistor 102 provides the second digital signal D2 to the third electronic switch 64 and the fourth electronic switch 66 through the electrical isolator 79. The anode and the cathode of the diode 104 are electrically connected to the first resistor 106 and the second node N2, respectively.

以下介紹本發明之第四實施例之運作過程,請同時參閱第8圖與第7圖。從時間點t0到時間點t1的運作與第三實施例相同,於此不再贅述。從時間點t1到時間點t2,訊號控制器74於第一端與第二端分別產生為高準位電壓訊號之第一數位訊號D1與為低準位電壓訊號之第二數位訊號D2。第三電子開關64與第四電子開關66透過電隔離器79接收第二數位訊號D2,故呈關閉狀態。此時,第一諧振電流向第一寄生電容76充電,以提升第一電壓至大於低電壓的第一預設電壓值,PNP雙載子接面電晶體94透過電隔離器79提供第一數位訊號D1給第一電子開關60與第二電子開關62,使第一電子開關60與第二電子開關62呈導通狀態。The operation of the fourth embodiment of the present invention will be described below. Please refer to FIG. 8 and FIG. 7 at the same time. The operation from the time point t0 to the time point t1 is the same as that of the third embodiment, and will not be described again. From the time point t1 to the time point t2, the signal controller 74 generates the first digital signal D1 of the high level voltage signal and the second digital signal D2 of the low level voltage signal at the first end and the second end, respectively. The third electronic switch 64 and the fourth electronic switch 66 receive the second digital signal D2 through the electrical isolator 79, and thus are in a closed state. At this time, the first resonant current charges the first parasitic capacitor 76 to increase the first voltage to a first predetermined voltage value greater than the low voltage, and the PNP bipolar junction transistor 94 provides the first digit through the electrical isolator 79. The signal D1 is given to the first electronic switch 60 and the second electronic switch 62 to bring the first electronic switch 60 and the second electronic switch 62 into an on state.

再來,從時間點t2到時間點t3,訊號控制器74於第一端與第二端分別產生為高準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2。第一電子開關60與第二電子開關62透過電隔離器79接收第一數位訊號D1,故呈導通狀態。此時,由於第二電壓為低電壓,PNP雙載子接面電晶體102導通,使第三電子開關64與第四電子開關66呈關閉狀態。另外,高電壓端VH產生一第二諧振電流,以依序流經第一電子開關60、諧振電容84、第二諧振電感82、第一諧振電感80、第二電子開關62與低電壓端VL。在一種情況,第一數位訊號D1與第二數位訊號D2只會有一個是高準位電壓訊號,不過,該訊號控制器38可能因為計時發生誤差,發生過早提供高準位電壓訊號之第一數位訊號D1,此時,本發明的偵測控制器36能夠避免第一電子開關30以及第二電子開關32同時開啟。Then, from time t2 to time t3, the signal controller 74 generates a first digital signal D1 of a high-level voltage signal and a second digital signal of a high-level voltage signal at the first end and the second end, respectively. D2. The first electronic switch 60 and the second electronic switch 62 receive the first digital signal D1 through the electrical isolator 79, and thus are in an on state. At this time, since the second voltage is a low voltage, the PNP bipolar junction transistor 102 is turned on, so that the third electronic switch 64 and the fourth electronic switch 66 are turned off. In addition, the high voltage terminal VH generates a second resonant current to sequentially flow through the first electronic switch 60, the resonant capacitor 84, the second resonant inductor 82, the first resonant inductor 80, the second electronic switch 62, and the low voltage terminal VL. . In one case, only one of the first digital signal D1 and the second digital signal D2 is a high-level voltage signal. However, the signal controller 38 may provide a high-level voltage signal prematurely due to timing errors. The digital signal D1, at this time, the detection controller 36 of the present invention can prevent the first electronic switch 30 and the second electronic switch 32 from being simultaneously turned on.

最後,從時間點t3到時間點t4,訊號控制器74於第一端與第二端分別產生為低準位電壓訊號之第一數位訊號D1與為高準位電壓訊號之第二數位訊號D2。第一電子開關60與第二電子開關62透過電隔離器79接收第一數位訊號D1,故呈關閉狀態。第一電子開關60與第二電子開關62關閉後還有一段時間,由於此時間很短,在第7圖中便被省略。此時間內,第二諧振電流向第二寄生電容78充電,以提升第二電壓至大於低電壓的第二預設電壓值。接著,第二數位訊號D2被切換成高準位電壓訊號,PNP雙載子接面電晶體102被切換狀態,第二數位訊號D2透過電隔離器41被提供給第三電子開關64與第四電子開關66,使第三電子開關64與第四電子開關66呈導通狀態。如此一來,利用第一偵測控制器70偵測第一節點N1之第一電壓,便可使第三電子開關64與第二電子開關62呈現交替式開關切換而避免貫通效應產生。同時,利用第二偵測控制器72偵測第二節點N2之第二電壓,亦使第一電子開關60與第四電子開關66呈現交替式開關切換而避免貫通效應產生。Finally, from time t3 to time t4, the signal controller 74 generates a first digital signal D1 of a low level voltage signal and a second digital signal D2 of a high level voltage signal at the first end and the second end, respectively. . The first electronic switch 60 and the second electronic switch 62 receive the first digital signal D1 through the electrical isolator 79, and thus are in a closed state. There is still a period of time after the first electronic switch 60 and the second electronic switch 62 are turned off, and since this time is short, it is omitted in FIG. During this time, the second resonant current charges the second parasitic capacitance 78 to boost the second voltage to a second predetermined voltage value greater than the low voltage. Then, the second digital signal D2 is switched to the high level voltage signal, the PNP dual carrier interface transistor 102 is switched, and the second digital signal D2 is supplied to the third electronic switch 64 and the fourth through the electrical isolator 41. The electronic switch 66 causes the third electronic switch 64 and the fourth electronic switch 66 to be in an on state. In this way, by detecting the first voltage of the first node N1 by using the first detecting controller 70, the third electronic switch 64 and the second electronic switch 62 can be alternately switched to avoid the penetration effect. At the same time, the second detection controller 72 is used to detect the second voltage of the second node N2, and the first electronic switch 60 and the fourth electronic switch 66 are also alternately switched to avoid the penetration effect.

在本發明的全橋架構實施例中,一個偵測控制器係對應兩個開關,但在實際操作時,可依照需求增加,一個偵測控制器對應一個開關。In the full-bridge architecture embodiment of the present invention, one detection controller corresponds to two switches, but in actual operation, it can be increased according to requirements, and one detection controller corresponds to one switch.

綜上所述,本發明偵測二串接之電子開關之間的節點電壓,並在一電子開關呈導通狀態時,使其對應之寄生電容進行放電而呈現低電壓,進而驅動另一電子開關呈關閉狀態,使二電子開關能以交替切換方式精準運作,以避免貫通效應產生而破壞電子開關。換句話說,無論訊號控制器是否有誤發訊號,或是開關故障,或是開關動作延遲,本發明之偵測控制器都能確保開關不會因為同時開啟而發生貫通現象。In summary, the present invention detects a node voltage between two serially connected electronic switches, and when an electronic switch is turned on, discharges its corresponding parasitic capacitance to exhibit a low voltage, thereby driving another electronic switch. It is in a closed state, so that the two electronic switches can operate accurately in an alternate switching manner to avoid the penetration effect and damage the electronic switch. In other words, regardless of whether the signal controller has a false signal, or a switch failure, or a switch operation delay, the detection controller of the present invention ensures that the switch does not pass through due to simultaneous opening.

以上所述者,僅為本發明一較佳實施例而已,並非用來限定本發明實施之範圍,故舉凡依本發明申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾,均應包括於本發明之申請專利範圍內。The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the shapes, structures, features, and spirits described in the claims of the present invention are equally varied and modified. All should be included in the scope of the patent application of the present invention.

10‧‧‧訊號控制器
12‧‧‧第一電子開關
14‧‧‧第二電子開關
16‧‧‧諧振槽
18‧‧‧訊號控制器
20‧‧‧第一電子開關
22‧‧‧第二電子開關
24‧‧‧第三電子開關
26‧‧‧第四電子開關
28‧‧‧諧振槽
30‧‧‧第一電子開關
32‧‧‧第二電子開關
34‧‧‧諧振槽
36‧‧‧偵測控制器
38‧‧‧訊號控制器
40‧‧‧寄生電容
41‧‧‧電隔離器
42‧‧‧第一諧振電感
44‧‧‧第二諧振電感
46‧‧‧諧振電容
48‧‧‧P通道金氧半場效電晶體
50‧‧‧二極體
52‧‧‧PNP雙載子接面電晶體
54‧‧‧二極體
56‧‧‧第一電阻
58‧‧‧第二電阻
60‧‧‧第一電子開關
62‧‧‧第二電子開關
64‧‧‧第三電子開關
66‧‧‧第四電子開關
68‧‧‧諧振槽
70‧‧‧第一偵測控制器
72‧‧‧第二偵測控制器
74‧‧‧訊號控制器
76‧‧‧第一寄生電容
78‧‧‧第二寄生電容
79‧‧‧電隔離器
80‧‧‧第一諧振電感
82‧‧‧第二諧振電感
84‧‧‧諧振電容
86‧‧‧P通道金氧半場效電晶體
88‧‧‧二極體
90‧‧‧P通道金氧半場效電晶體
92‧‧‧二極體
94‧‧‧PNP雙載子接面電晶體
96‧‧‧二極體
98‧‧‧第一電阻
100‧‧‧第二電阻
102‧‧‧PNP雙載子接面電晶體
104‧‧‧二極體
106‧‧‧第一電阻
108‧‧‧第二電阻
10‧‧‧Signal Controller
12‧‧‧First electronic switch
14‧‧‧Second electronic switch
16‧‧‧Resonance tank
18‧‧‧ Signal Controller
20‧‧‧First electronic switch
22‧‧‧Second electronic switch
24‧‧‧ Third electronic switch
26‧‧‧fourth electronic switch
28‧‧‧Resonance tank
30‧‧‧First electronic switch
32‧‧‧Second electronic switch
34‧‧‧Resonance slot
36‧‧‧Detection controller
38‧‧‧Signal Controller
40‧‧‧Parasitic capacitance
41‧‧‧Electrical isolators
42‧‧‧First resonant inductor
44‧‧‧Second resonant inductor
46‧‧‧Resonance capacitor
48‧‧‧P channel MOS half-field effect transistor
50‧‧‧ diode
52‧‧‧PNP double carrier junction transistor
54‧‧‧ diode
56‧‧‧First resistance
58‧‧‧second resistance
60‧‧‧First electronic switch
62‧‧‧Second electronic switch
64‧‧‧ Third electronic switch
66‧‧‧fourth electronic switch
68‧‧‧Resonance tank
70‧‧‧First detection controller
72‧‧‧Second detection controller
74‧‧‧Signal Controller
76‧‧‧First parasitic capacitance
78‧‧‧Second parasitic capacitance
79‧‧‧Electrical isolators
80‧‧‧First resonant inductor
82‧‧‧Second resonant inductor
84‧‧‧Resonance capacitor
86‧‧‧P channel MOS half-field effect transistor
88‧‧‧ diode
90‧‧‧P-channel MOS half-field effect transistor
92‧‧‧ diode
94‧‧‧PNP double carrier junction transistor
96‧‧‧ diode
98‧‧‧First resistance
100‧‧‧second resistance
102‧‧‧PNP double carrier junction transistor
104‧‧‧ diode
106‧‧‧First resistance
108‧‧‧second resistance

第1圖為先前技術之半橋式驅動裝置之電路示意圖。 第2圖為先前技術之全橋式驅動裝置之電路示意圖。 第3圖為本發明之諧振控制裝置之第一實施例的電路示意圖。 第4圖為本發明之第一初始數位訊號、第二初始數位訊號、第一數位訊號與第二數位訊號及第一電子開關與第二電子開關之開關狀態之波形圖。 第5圖為本發明之諧振控制裝置之第二實施例的電路示意圖。 第6圖為本發明之諧振控制裝置之第三實施例的電路示意圖。 第7圖為本發明之第一數位訊號與第二數位訊號及第一電子開關、第二電子開關、第三電子開關與第四電子開關之開關狀態之波形圖。 第8圖為本發明之諧振控制裝置之第四實施例的電路示意圖。Figure 1 is a circuit diagram of a prior art half bridge drive. Figure 2 is a circuit diagram of a prior art full bridge drive. Fig. 3 is a circuit diagram showing the first embodiment of the resonance control device of the present invention. 4 is a waveform diagram of the first initial digital signal, the second initial digital signal, the first digital signal and the second digital signal, and the switching states of the first electronic switch and the second electronic switch of the present invention. Fig. 5 is a circuit diagram showing a second embodiment of the resonance control device of the present invention. Figure 6 is a circuit diagram showing a third embodiment of the resonance control device of the present invention. Figure 7 is a waveform diagram showing the switching states of the first digital signal and the second digital signal, and the first electronic switch, the second electronic switch, the third electronic switch, and the fourth electronic switch of the present invention. Figure 8 is a circuit diagram showing a fourth embodiment of the resonance control device of the present invention.

30‧‧‧第一電子開關 30‧‧‧First electronic switch

32‧‧‧第二電子開關 32‧‧‧Second electronic switch

34‧‧‧諧振槽 34‧‧‧Resonance slot

36‧‧‧偵測控制器 36‧‧‧Detection controller

38‧‧‧訊號控制器 38‧‧‧Signal Controller

40‧‧‧寄生電容 40‧‧‧Parasitic capacitance

41‧‧‧電隔離器 41‧‧‧Electrical isolators

42‧‧‧第一諧振電感 42‧‧‧First resonant inductor

44‧‧‧第二諧振電感 44‧‧‧Second resonant inductor

46‧‧‧諧振電容 46‧‧‧Resonance capacitor

48‧‧‧P通道金氧半場效電晶體 48‧‧‧P channel MOS half-field effect transistor

50‧‧‧二極體 50‧‧‧ diode

Claims (25)

一種諧振控制裝置,其係包含:一第一電子開關,電性連接一高電壓端與一節點;一第二電子開關,電性連接該節點與一低電壓端,該第二電子開關具有一寄生電容,該寄生電容之一端電性連接該低電壓端,另一端電性連接該節點;一諧振槽,電性連接該節點,並儲有諧振能量;以及一偵測控制器,電性連接該低電壓端、該節點與該第一電子開關,並接收該節點之電壓,在該第二電子開關呈導通狀態時,該節點之該電壓為該低電壓端之低電壓,該偵測控制器依據該節點之該電壓提供該低電壓給該第一電子開關,使該第一電子開關呈關閉狀態,且該諧振槽利用該諧振能量產生一諧振電流流經該第二電子開關。 A resonance control device includes: a first electronic switch electrically connected to a high voltage terminal and a node; a second electronic switch electrically connected to the node and a low voltage terminal, the second electronic switch having a a parasitic capacitance, one end of the parasitic capacitor is electrically connected to the low voltage end, and the other end is electrically connected to the node; a resonant tank electrically connected to the node and storing resonant energy; and a detecting controller electrically connected The low voltage terminal, the node and the first electronic switch, and receiving the voltage of the node, when the second electronic switch is in an on state, the voltage of the node is a low voltage of the low voltage terminal, the detection control The low voltage is supplied to the first electronic switch according to the voltage of the node, the first electronic switch is turned off, and the resonant tank generates a resonant current through the second electronic switch by using the resonant energy. 如請求項1所述之諧振控制裝置,其中該第二電子開關呈關閉狀態時,該諧振電流向該寄生電容充電,以提升該節點之該電壓至大於該低電壓的一預設電壓值,該偵測控制器依據該預設電壓值提供一第一數位訊號給該第一電子開關,使該第一電子開關呈導通狀態。 The resonance control device of claim 1, wherein when the second electronic switch is in a closed state, the resonant current charges the parasitic capacitance to increase the voltage of the node to a predetermined voltage value greater than the low voltage. The detection controller provides a first digital signal to the first electronic switch according to the preset voltage value, so that the first electronic switch is in an on state. 如請求項2所述之諧振控制裝置,更包含一訊號控制器,其係具有第一端與第二端,該第一端電性連接該偵測控制器,並透過一電隔離器電性連接該第一電子開關,該電隔離器阻擋該高電壓端之高電壓通往該訊號控制器,該第二端電性連接該第二電子開關,該訊號控制器在一時間點於該第一端產生該第一數位訊號,並在該時間點於該第二端產生一第二數位訊號給該第二電子開關,以依序控制該第二電子開關呈該導通狀態與關閉狀態。 The resonant control device of claim 2, further comprising a signal controller having a first end and a second end, wherein the first end is electrically connected to the detecting controller and electrically connected through an electrical isolator Connecting the first electronic switch, the electrical isolator blocks the high voltage of the high voltage end to the signal controller, and the second end is electrically connected to the second electronic switch, the signal controller is at the time point The first digital signal is generated at one end, and a second digital signal is generated at the second end to the second electronic switch to sequentially control the second electronic switch to be in an on state and a closed state. 如請求項3所述之諧振控制裝置,其中該第一電子開關與該第 二電子開關皆為N通道金氧半場效電晶體,該寄生電容為寄生汲源電容,該第一數位訊號包含依序出現之高準位電壓訊號與低準位電壓訊號,該第二數位訊號包含依序出現之高準位電壓訊號與低準位電壓訊號。 The resonance control device of claim 3, wherein the first electronic switch and the first The two electronic switches are all N-channel MOSFETs, and the parasitic capacitance is a parasitic 电容 source capacitor. The first digital signal includes a high-level voltage signal and a low-level voltage signal, which are sequentially present, and the second digital signal It includes high-level voltage signals and low-level voltage signals that appear in sequence. 如請求項1所述之諧振控制裝置,其中該諧振槽更包含:一第一諧振電感,電性連接該節點;一第二諧振電感,串接該第一諧振電感,並儲有該諧振能量;以及一諧振電容,串接該第二諧振電感,並電性連接該低電壓端,該第一諧振電感、該第二諧振電感與該諧振電容利用該諧振能量產生該諧振電流。 The resonance control device of claim 1, wherein the resonant tank further comprises: a first resonant inductor electrically connected to the node; a second resonant inductor connected in series with the first resonant inductor and storing the resonant energy And a resonant capacitor connected in series with the second resonant inductor and electrically connected to the low voltage terminal, wherein the first resonant inductor, the second resonant inductor and the resonant capacitor generate the resonant current by using the resonant energy. 如請求項2所述之諧振控制裝置,其中該偵測控制器更包含一P通道金氧半場效電晶體,其閘極電性連接該節點,汲極電性連接該低電壓端,源極電性連接該第一電子開關,並接收該第一數位訊號;在該節點之該電壓為該低電壓時,該P通道金氧半場效電晶體提供該低電壓給該第一電子開關;在該節點之該電壓為該預設電壓值時,該P通道金氧半場效電晶體提供該第一數位訊號給該第一電子開關。 The resonance control device of claim 2, wherein the detection controller further comprises a P-channel gold-oxygen half-field effect transistor, wherein the gate is electrically connected to the node, and the gate is electrically connected to the low voltage terminal, the source Electrically connecting the first electronic switch and receiving the first digital signal; when the voltage of the node is the low voltage, the P-channel MOS half-effect transistor provides the low voltage to the first electronic switch; When the voltage of the node is the preset voltage value, the P-channel MOS half-effect transistor provides the first digital signal to the first electronic switch. 如請求項6所述之諧振控制裝置,其中該偵測控制器更包含一二極體,其正極與負極分別電性連接該閘極與該節點。 The resonance control device of claim 6, wherein the detection controller further comprises a diode, and the anode and the cathode are electrically connected to the gate and the node, respectively. 如請求項2所述之諧振控制裝置,該偵測控制器更包含一PNP雙載子接面電晶體,其基極透過一第一電阻電性連接該節點,集極電性連接該低電壓端,射極電性連接該第一電子開關,並透過一第二電阻電性連接該基極,該射極接收該第一數位訊號;在該節點之該電壓為該低電壓時,該PNP雙載子接面電晶體提供該低電壓給該第一電子開關;在該節點之該電壓為該預設電壓值時,該PNP雙載子接面電晶體提供該第一數位訊號給該第一電子開關。The resonance control device of claim 2, wherein the detection controller further comprises a PNP dual-carrier junction transistor, wherein the base is electrically connected to the node through a first resistor, and the collector is electrically connected to the low voltage. An emitter electrically connected to the first electronic switch and electrically connected to the base through a second resistor, the emitter receiving the first digital signal; and when the voltage of the node is the low voltage, the PNP The dual carrier junction transistor provides the low voltage to the first electronic switch; when the voltage of the node is the predetermined voltage value, the PNP dual carrier junction transistor provides the first digital signal to the first An electronic switch. 如請求項8所述之諧振控制裝置,該偵測控制器更包含一二極體,其正極與負極分別電性連接該第一電阻與該節點。The resonance control device of claim 8, wherein the detection controller further comprises a diode, and the anode and the cathode are electrically connected to the first resistor and the node, respectively. 一種諧振控制裝置,其係包含: 一第一電子開關,電性連接一高電壓端與一第一節點; 一第二電子開關,電性連接一低電壓端; 一第三電子開關,電性連接該高電壓端與該第二電子開關; 一第四電子開關,電性連接該低電壓端與該第一節點,該第三電子開關與該第四電子開關之開關狀態相同,該第四電子開關具有一第一寄生電容,該第一寄生電容之一端電性連接該低電壓端,另一端電性連接該第一節點; 一諧振槽,電性連接該第一節點、該第一電子開關、該第二電子開關、該第三電子開關與該第四電子開關;以及 一第一偵測控制器,電性連接該低電壓端、該第一節點、該第一電子開關與該第二電子開關,並接收該第一節點之第一電壓,在該第三電子開關與該第四電子開關呈導通狀態時,該第一電壓為該低電壓端之低電壓,該第一偵測控制器依據該第一電壓提供該低電壓給該第一電子開關與該第二電子開關,使該第一電子開關與該第二電子開關呈關閉狀態,且該高電壓端產生一第一諧振電流,以依序流經該第三電子開關、該諧振槽、該第四電子開關與該低電壓端。A resonance control device comprising: a first electronic switch electrically connected to a high voltage terminal and a first node; a second electronic switch electrically connected to a low voltage terminal; and a third electronic switch electrically Connecting the high voltage terminal and the second electronic switch; a fourth electronic switch electrically connecting the low voltage end to the first node, the third electronic switch and the fourth electronic switch having the same switching state, the fourth The electronic switch has a first parasitic capacitance, one end of the first parasitic capacitance is electrically connected to the low voltage end, and the other end is electrically connected to the first node; a resonant tank electrically connected to the first node, the first electron a switch, the second electronic switch, the third electronic switch, and the fourth electronic switch; and a first detection controller electrically connected to the low voltage terminal, the first node, the first electronic switch, and the first a second electronic switch, and receiving a first voltage of the first node, when the third electronic switch and the fourth electronic switch are in a conducting state, the first voltage is a low voltage of the low voltage end, the first detection Controller The first voltage provides the low voltage to the first electronic switch and the second electronic switch, the first electronic switch and the second electronic switch are in a closed state, and the high voltage terminal generates a first resonant current to The third electronic switch, the resonant tank, the fourth electronic switch and the low voltage terminal are sequentially flowed through. 如請求項10所述之諧振控制裝置,其中該第三電子開關與該第四電子開關呈關閉狀態時,該第一諧振電流向該第一寄生電容充電,以提升該第一電壓至大於該低電壓的一第一預設電壓值,該第一偵測控制器依據該第一預設電壓值提供一第一數位訊號給該第一電子開關與該第二電子開關,使該第一電子開關與該第二電子開關呈導通狀態。The resonance control device of claim 10, wherein when the third electronic switch and the fourth electronic switch are in a closed state, the first resonant current charges the first parasitic capacitance to increase the first voltage to be greater than the a first preset voltage value of the low voltage, the first detecting controller provides a first digital signal to the first electronic switch and the second electronic switch according to the first preset voltage value, so that the first electronic The switch is in a conducting state with the second electronic switch. 如請求項11所述之諧振控制裝置,其中該第一電子開關與該第二電子開關接收該第一數位訊號時,係皆依序呈導通狀態及關閉狀態。The resonance control device of claim 11, wherein when the first electronic switch and the second electronic switch receive the first digital signal, the first and second electronic switches are sequentially turned on and off. 如請求項12所述之諧振控制裝置,更包含一第二偵測控制器,其係電性連接該低電壓端、該第二電子開關與該第三電子開關之間的一第二節點、該第三電子開關與該第四電子開關,該第二電子開關具有一第二寄生電容,該第二寄生電容之一端電性連接該低電壓端,另一端電性連接該第二節點,該諧振槽電性連接該第二節點,該第二偵測控制器接收該第二節點之第二電壓;在該第一電子開關與該第二電子開關呈該導通狀態時,該第二電壓為該低電壓,且該高電壓端產生一第二諧振電流,以依序流經該第一電子開關、該諧振槽、該第二電子開關與該低電壓端,且該第二偵測控制器依據該第二電壓提供該低電壓給該第三電子開關與該第四電子開關,使該第三電子開關與該第四電子開關呈關閉狀態。The resonance control device of claim 12, further comprising a second detection controller electrically connected to the low voltage terminal, a second node between the second electronic switch and the third electronic switch, The third electronic switch and the fourth electronic switch have a second parasitic capacitance, one end of the second parasitic capacitor is electrically connected to the low voltage end, and the other end is electrically connected to the second node, The resonant tank is electrically connected to the second node, and the second detecting controller receives the second voltage of the second node; when the first electronic switch and the second electronic switch are in the conducting state, the second voltage is The low voltage, and the high voltage terminal generates a second resonant current to sequentially flow through the first electronic switch, the resonant tank, the second electronic switch and the low voltage end, and the second detecting controller And supplying the low voltage to the third electronic switch and the fourth electronic switch according to the second voltage, so that the third electronic switch and the fourth electronic switch are in a closed state. 如請求項13所述之諧振控制裝置,其中該第一電子開關與該第二電子開關呈該關閉狀態時,該第二諧振電流向該第二寄生電容充電,以提升該第二電壓至大於該低電壓的一第二預設電壓值,且該第二偵測控制器依據該第二預設電壓值提供一第二數位訊號給該第三電子開關與該第四電子開關,使該第三電子開關與該第四電子開關呈導通狀態。The resonance control device of claim 13, wherein when the first electronic switch and the second electronic switch are in the off state, the second resonant current charges the second parasitic capacitance to increase the second voltage to be greater than a second preset voltage value of the low voltage, and the second detecting controller provides a second digital signal to the third electronic switch and the fourth electronic switch according to the second preset voltage value, so that the first The three electronic switch is in a conducting state with the fourth electronic switch. 如請求項14所述之諧振控制裝置,更包含一訊號控制器,其係具有第一端與第二端,該第一端電性連接該第一偵測控制器,並透過一電隔離器電性連接該第一電子開關與該第二電子開關,該第二端電性連接該第二偵測控制器,並透過該電隔離器電性連接該第三電子開關與該第四電子開關,該電隔離器阻擋該高電壓端之電壓通往該訊號控制器,該訊號控制器在一時間點於該第一端產生該第一數位訊號,並在該時間點於該第二端產生該第二數位訊號給該第三電子開關與該第四電子開關,以控制該第三電子開關與該第四電子開關皆依序呈該導通狀態、該關閉狀態與該導通狀態。The resonant control device of claim 14, further comprising a signal controller having a first end and a second end, the first end electrically connected to the first detecting controller and passing through an electrical isolator Electrically connecting the first electronic switch and the second electronic switch, the second end is electrically connected to the second detecting controller, and electrically connected to the third electronic switch and the fourth electronic switch through the electrical isolator The electrical isolator blocks the voltage of the high voltage terminal to the signal controller, and the signal controller generates the first digital signal at the first end at a time point, and generates the second digital signal at the time end. The second digital signal is applied to the third electronic switch and the fourth electronic switch to control the third electronic switch and the fourth electronic switch to sequentially display the conductive state, the closed state and the conductive state. 如請求項15所述之諧振控制裝置,其中該第一電子開關、該第二電子開關、該第三電子開關與該第四電子開關皆為N通道金氧半場效電晶體,該第一寄生電容與該第二寄生電容皆為寄生汲源電容,該第一數位訊號包含依序出現之高準位電壓訊號與低準位電壓訊號,該第二數位訊號包含依序出現之高準位電壓訊號、低準位電壓訊號與高準位電壓訊號。The resonance control device of claim 15, wherein the first electronic switch, the second electronic switch, the third electronic switch, and the fourth electronic switch are both N-channel MOS half-effect transistors, the first parasitic The capacitor and the second parasitic capacitor are parasitic source capacitors, and the first digit signal comprises a high-level voltage signal and a low-level voltage signal sequentially appearing, and the second digit signal comprises a high-level voltage sequentially appearing Signal, low level voltage signal and high level voltage signal. 如請求項14所述之諧振控制裝置,其中該諧振槽更包含: 一第一諧振電感,電性連接該第二節點; 一第二諧振電感,串接該第一諧振電感;以及 一諧振電容,串接該第二諧振電感,並電性連接該第一節點,該第一諧振電流依序流經該第一諧振電感、該第二諧振電感與該諧振電容,該第二諧振電流依序流經該諧振電容、該第二諧振電感與該第一諧振電感。The resonant control device of claim 14, wherein the resonant tank further comprises: a first resonant inductor electrically connected to the second node; a second resonant inductor connected in series with the first resonant inductor; and a resonant capacitor Connecting the second resonant inductor in series and electrically connecting the first node, the first resonant current sequentially flowing through the first resonant inductor, the second resonant inductor and the resonant capacitor, and the second resonant current is sequentially Flowing through the resonant capacitor, the second resonant inductor, and the first resonant inductor. 如請求項11所述之諧振控制裝置,其中該第一偵測控制器更包含一P通道金氧半場效電晶體,其閘極電性連接該第一節點,汲極電性連接該低電壓端,源極電性連接該第一電子開關與該第二電子開關,並接收該第一數位訊號;在該第一電壓為該低電壓時,該P通道金氧半場效電晶體提供該低電壓給該第一電子開關與該第二電子開關;在該第一電壓為該第一預設電壓值時,該P通道金氧半場效電晶體提供該第一數位訊號給該第一電子開關與該第二電子開關。The resonance control device of claim 11, wherein the first detection controller further comprises a P-channel MOS field-effect transistor, wherein the gate is electrically connected to the first node, and the gate is electrically connected to the low voltage. And the source is electrically connected to the first electronic switch and the second electronic switch, and receives the first digital signal; when the first voltage is the low voltage, the P-channel MOS half-effect transistor provides the low The voltage is applied to the first electronic switch and the second electronic switch; when the first voltage is the first predetermined voltage value, the P-channel MOS half-effect transistor provides the first digital signal to the first electronic switch And the second electronic switch. 如請求項18所述之諧振控制裝置,其中該第一偵測控制器更包含一二極體,其正極與負極分別電性連接該閘極與該第一節點。The resonant control device of claim 18, wherein the first detecting controller further comprises a diode, wherein the positive pole and the negative pole are electrically connected to the gate and the first node, respectively. 如請求項11所述之諧振控制裝置,其中該第一偵測控制器更包含一PNP雙載子接面電晶體,其基極透過一第一電阻電性連接該第一節點,集極電性連接該低電壓端,射極電性連接該第一電子開關與該第二電子開關,並透過一第二電阻電性連接該基極,該射極接收該第一數位訊號;在該第一電壓為該低電壓時,該PNP雙載子接面電晶體提供該低電壓給該第一電子開關與該第二電子開關;在該第一電壓為該第一預設電壓值時,該PNP雙載子接面電晶體提供該第一數位訊號給該第一電子開關與該第二電子開關。The resonance control device of claim 11, wherein the first detection controller further comprises a PNP bipolar junction transistor, wherein the base is electrically connected to the first node through a first resistor, and the collector is electrically connected. Connected to the low voltage end, the emitter is electrically connected to the first electronic switch and the second electronic switch, and is electrically connected to the base through a second resistor, the emitter receiving the first digital signal; When the voltage is the low voltage, the PNP bipolar junction transistor provides the low voltage to the first electronic switch and the second electronic switch; when the first voltage is the first predetermined voltage value, the The PNP dual carrier junction transistor provides the first digital signal to the first electronic switch and the second electronic switch. 如請求項20所述之諧振控制裝置,其中該第一偵測控制器更包含一二極體,其正極與負極分別電性連接該第一電阻與該第一節點。The resonance control device of claim 20, wherein the first detection controller further comprises a diode, and the anode and the cathode are electrically connected to the first resistor and the first node, respectively. 如請求項14所述之諧振控制裝置,其中該第二偵測控制器更包含一P通道金氧半場效電晶體,其閘極電性連接該第二節點,汲極電性連接該低電壓端,源極電性連接該第三電子開關與該第四電子開關,並接收該第二數位訊號;在該第二電壓為該低電壓時,該P通道金氧半場效電晶體提供該低電壓給該第三電子開關與該第四電子開關;在該第二電壓為該第二預設電壓值時,該P通道金氧半場效電晶體提供該第二數位訊號給該第三電子開關與該第四電子開關。The resonance control device of claim 14, wherein the second detection controller further comprises a P-channel MOSFET, the gate is electrically connected to the second node, and the gate is electrically connected to the low voltage. The source is electrically connected to the third electronic switch and the fourth electronic switch, and receives the second digital signal; when the second voltage is the low voltage, the P-channel MOS half-effect transistor provides the low The voltage is given to the third electronic switch and the fourth electronic switch; when the second voltage is the second predetermined voltage value, the P-channel MOS half-effect transistor provides the second digital signal to the third electronic switch And the fourth electronic switch. 如請求項22所述之諧振控制裝置,其中該第二偵測控制器更包含一二極體,其正極與負極分別電性連接該閘極與該第二節點。The resonant control device of claim 22, wherein the second detecting controller further comprises a diode, wherein the positive pole and the negative pole are electrically connected to the gate and the second node, respectively. 如請求項14所述之諧振控制裝置,其中該第二偵測控制器更包含一PNP雙載子接面電晶體,其基極透過一第一電阻電性連接該第二節點,集極電性連接該低電壓端,射極電性連接該第三電子開關與該第四電子開關,並透過一第二電阻電性連接該基極,該射極接收該第二數位訊號;在該第二電壓為該低電壓時,該PNP雙載子接面電晶體提供該低電壓給該第三電子開關與該第四電子開關;在該第二電壓為該第二預設電壓值時,該PNP雙載子接面電晶體提供該第二數位訊號給該第三電子開關與該第四電子開關。The resonance control device of claim 14, wherein the second detection controller further comprises a PNP dual-carrier junction transistor, wherein the base is electrically connected to the second node through a first resistor, and the collector is electrically connected. Connected to the low voltage end, the emitter is electrically connected to the third electronic switch and the fourth electronic switch, and is electrically connected to the base through a second resistor, the emitter receiving the second digital signal; When the voltage is the low voltage, the PNP bipolar junction transistor provides the low voltage to the third electronic switch and the fourth electronic switch; when the second voltage is the second predetermined voltage value, the The PNP dual carrier junction transistor provides the second digital signal to the third electronic switch and the fourth electronic switch. 如請求項24所述之諧振控制裝置,其中該第二偵測控制器更包含一二極體,其正極與負極分別電性連接該第一電阻與該第二節點。The resonance control device of claim 24, wherein the second detection controller further comprises a diode, and the anode and the cathode are electrically connected to the first resistor and the second node, respectively.
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