TWI570559B - Flash memory and accessing method thereof - Google Patents

Description

Flash memory and its access method

The present invention relates to a flash memory and an access method thereof, and more particularly to a page address mapping method for a full area of a flash memory.

With the advent of the information age, it has become a trend to place a large amount of memory in electronic devices. In today's technology, flash memory with non-volatile memory is one of the most popular options.

As the volume of data becomes larger and the need for fast access, the mapping between the logical address and the physical address of the flash memory becomes a key technology. In the conventional technical field, there are proposed methods such as block mapping, page mapping, and hybrid mapping. Among them, the way of page mapping requires a large size of memory space to store the mapping database, and the block mapping is less effective in random access. Moreover, the hybrid mapping through a logical block address corresponds to a physical block address, the same performance is not good in random access, and when the accessed data is not all in the same physical memory When the block is in the middle, additional garbage collection is required, which causes an extra burden on the system.

The invention provides a flash memory and an access method thereof, which effectively improve the use efficiency of the flash memory.

The method for accessing the flash memory of the present invention comprises: establishing a full address mapping database, the full address mapping database includes a plurality of page mapping tables, and each page mapping table is divided into a plurality of logical address regions, and Each logical address area includes a plurality of storage fields corresponding to a plurality of logical page addresses, each storage field is used for storing a physical block address and a physical page address of the corresponding logical page address mapping; establishing a management area Blocking, and writing the page mapping table index data to the management block; indexing the data according to the page mapping table to load one of the page mapping tables, and obtaining the corresponding physical memory block according to the loaded page mapping table; Data access actions are performed for corresponding physical memory blocks.

The flash memory of the present invention includes a plurality of physical memory blocks and a memory controller. Each physical memory block includes a plurality of physical memory pages, and the memory controller is coupled to the physical memory blocks. Memory controller execution: establish a full address mapping database, the full address mapping database includes a plurality of page mapping tables, each page mapping table is divided into a plurality of logical address regions, and each logical address region includes a corresponding correspondence a plurality of storage fields of a plurality of logical page addresses, each storage field is used to store a physical block address and a physical page address of the corresponding logical page address mapping; a management block is created, and the management block is written The page mapping table index data; according to the page mapping table index data to load one of the page mapping table, and obtain the corresponding entity memory block according to the loaded page mapping table; and, for the corresponding entity memory block data Access action.

Based on the above, the present invention provides a full address mapping database, by breaking the memory block limit, using multiple logical address regions corresponding to a plurality of page mapping tables in the full address mapping database to make logical page bits The address can be quickly mapped to the physical memory page of the mapped physical memory block, and the data access action is completed. As a result, the use efficiency of the flash memory can be improved, and the performance when performing random access operations can be improved.

The above described features and advantages of the invention will be apparent from the following description.

Please refer to FIG. 1. FIG. 1 is a flow chart of a method for accessing a flash memory according to an embodiment of the present invention. Wherein, step S110 establishes a full address mapping database. The full address mapping database includes a plurality of page mapping tables, each page mapping table is divided into a plurality of logical address regions, and each logical address region includes a plurality of storage fields corresponding to a plurality of logical page addresses, respectively. Each storage field is used to store the physical block address and the physical page address of the corresponding logical page address mapping. Here, please refer to FIG. 2 in synchronization. FIG. 2 is a schematic diagram of a full address mapping database according to an embodiment of the present invention. The full address mapping database 200 includes a plurality of page mapping tables PMT0~PMTN, and each page mapping table PMT0~PMTN can be divided into a plurality of logical address regions LA0~LAM. Each of the logical address areas LA0~LAM of each page mapping table PMT0~PMTN includes a plurality of storage fields, and the storage fields correspond to a plurality of logical page addresses LPA0, LPA1~LPAP, respectively. Taking the logical address area LA0 of the page mapping table PMT0 as an example, the logical address area LA0 of the page mapping table PMT0 includes the storage fields F0~FP, and the storage fields F0~FP correspond to the logical page addresses LPA0 ~LPAP, respectively.

It is to be noted that, in each storage field of the embodiment of the present invention, a physical block address corresponding to a logical page address and a physical page address are recorded. Taking the storage fields F0 and F1 as an example, the storage field F0 stores the physical block address PBA1 and the physical page address PPA1, and the storage field F1 stores the physical block address PBA2 and the physical page address PPA2.

Referring back to FIG. 1, step S120 establishes a management block and writes a page mapping table index data to the management block. Here, please refer to FIG. 3 in synchronization, and FIG. 3 is a schematic diagram of a management block according to an embodiment of the present invention. Management block 300 includes page mapping table index material 310 and logical access address 320. The page mapping table index material 310 can be used to correspond to one of the page mapping table 0 PMT0 to the page mapping table 3 PMT3.

In this embodiment, the page mapping table index data 310 corresponds to the page mapping table 3 PMT3, and in step S130, one of the page mapping tables PMT0~PMT3 is loaded according to the page mapping table index data 310, and according to The loaded page mapping table PMT3, and the corresponding physical memory block is obtained according to the logical access address 320. Next, in step S140, a data access action can be performed for the corresponding physical memory block.

It is not difficult to know from the above description that, through the full address mapping database 200 of the embodiment of the present invention, each logical page address in each logical address area can be directly mapped to any of the arbitrary physical memory blocks according to the storage field. The physical memory page, and quickly complete the data access action, effectively improve the access efficiency of the flash memory.

Referring to FIG. 4, FIG. 4 is a schematic diagram of an implementation manner of a full address mapping database according to an embodiment of the present invention. The page mapping table 0 PMT0~page mapping table N PMTN included in the full address mapping database is divided into a plurality of page mapping table groups, and these page mapping table groups are respectively stored in the flash memory. The physical memory block is in PMTB0~PMBTN. In the present embodiment, the page mapping table 0 to the page mapping table 3 are the same page mapping table group, and are stored in the physical memory block PMTB0, and the page mapping table 4 to the page mapping table 7 are the same page mapping table. The group is stored in the physical memory block PMTB1. In addition, the page mapping table N-3~page mapping table N is the same page mapping table group and is stored in the physical memory block PMTBN.

It is worth mentioning that in order to ensure that the data of the storage page mapping table is stable and can be quickly accessed, the memory of the storage page mapping table can be implemented by using a single-level cell (SLC) memory cell.

Referring to FIG. 5, FIG. 5 is a schematic diagram of an operation of integrating a page mapping table according to an embodiment of the present invention. When the page mapping table needs to be updated, the updated page mapping table is written to the same physical memory block as the original page mapping table. As shown in FIG. 5, the page mapping table 0 is updated four times. Therefore, the updated page mapping tables A1 to A4 are sequentially written in the same physical memory block PMTB0 as the original page mapping table A0. After the update page mapping table A4 is filled in the physical memory block PMTB0, the storable space of the physical memory block PMTB0 is less than a preset value, and at this time, the page mapping table integration action can be performed. Specifically, when a page mapping table integration action is performed, a new replacement entity memory block NPMBT0 can be established. Moreover, the latest version of the page mapping table 0 A4 and the page mapping table 1 to page mapping table 3 in the physical memory block PMTB0 can be copied into the replacement entity memory block NPTTB0. After the above copying operation is completed, the physical memory block PMTB0 can be released.

Through the above-mentioned page mapping table integration action, the memory space of the flash memory is not wasted, and the update operation of the page mapping table can be continuously performed to improve the access efficiency of the flash memory.

Incidentally, the above preset value may be preset by an engineering staff, and the memory controller is informed by a software or hardware implementation to perform a relative mapping check and a page mapping table integration action.

Please refer to FIG. 6. FIG. 6 is a schematic diagram of another embodiment of a management block according to an embodiment of the present invention. The management block 600 includes at least one blank queue 631, 632 in addition to the page mapping table index data 610 and the logical access address 620 (FIG. 6 shows only two exemplary examples). The blank queues 631 and 632 can store two blank physical memory blocks or no valid data memory blocks. When a data write operation is performed on the flash memory, the memory controller can receive the write data and the corresponding write logical address, and write the write data to the blank physical memory in the blank queue 631. In the block. Moreover, the memory controller can synchronously update the corresponding page mapping table according to the write logical address and the blank physical memory block.

After the physical memory page corresponding to the blank physical memory block in the blank queue 631 has data to be written, the blank queue can be updated.

In another aspect, management block 600 further includes a valid count value field 640. The valid count value field 640 records the number of valid memory pages in the corresponding physical memory block. The effective count value can be used to know the number of valid physical memory pages in the physical memory block. When the physical memory block is not enough, the effective count value can provide which physical memory block the memory controller selects to perform the garbage sorting action. For example, when the effective count value indicates that the number of physical memory pages valid for a certain first physical memory block is only one, the memory controller only needs to organize one physical memory page to release the first physical memory block for use. .

In the above embodiment, the memory controller can determine whether the number of valid memory pages is less than a preset set value, and when the number of valid memory pages is less than a preset set value, the data of the valid memory page is transferred to Other entities memorize the block and release the corresponding physical memory block.

Please refer to FIG. 7. FIG. 7 is a schematic diagram of a flash memory according to an embodiment of the present invention. The flash memory 710 includes a plurality of physical memory blocks 711 to 71N, a memory controller 720, and a static memory 721. The physical memory blocks 711~71N include a plurality of physical memory pages. The physical memory blocks 711 to 71N are coupled to the memory controller 720.

The memory controller 720 is configured to perform a plurality of actions. In the embodiment, the memory controller 720 establishes a full address mapping database, wherein the full address mapping database includes a plurality of page mapping tables, and each page The mapping table is divided into a plurality of logical address regions, and each logical address region includes a plurality of storage fields corresponding to a plurality of logical page addresses, and each storage field is used to store an entity of the corresponding logical page address mapping. The block address and the physical page address; and the memory controller 720 establishes the management block and writes the page mapping table index data to the management block; the memory controller 720 further loads the data according to the page mapping table. One of the page mapping tables obtains the corresponding physical memory block according to the loaded page mapping table; and updates the corresponding page mapping table according to the written logical address and the blank page address.

Incidentally, the memory controller 720 can temporarily store the loaded page mapping table in the static memory 721. The static memory 721 can be built in the memory controller 720 or external to the memory controller 720.

The details of the various operations performed by the memory controller 720 are described in detail in the foregoing various embodiments and implementations, and will not be further described herein.

In summary, the present invention further completes the data access operation by establishing a full address mapping database and breaking the block restriction of the memory for address mapping. In this way, the access operation of the flash memory can be faster, and the dynamic access operation can be successfully completed, and the overall efficiency of the flash memory can be effectively improved.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

S110~S140‧‧‧ flash memory access steps
PMT0~PMTN‧‧‧ page mapping table
200‧‧‧ Full Address Mapping Database
LA0~LAM‧‧‧Logical Address Area
LPA0, LPA1~LPAP‧‧‧ logical page address
F0~FP‧‧‧Storage field
PPA1, PPA2‧‧‧ physical page address
PBA1, PBA2‧‧‧ physical block address
300, 600‧‧‧Management block
310‧‧Page mapping table index data
320‧‧‧Logical Access Address
PMTB1~PMTBN‧‧‧ physical memory block
A1~A4‧‧‧Update Page Mapping Table
NPMTB0‧‧‧Replacement physical memory block
610‧‧Page mapping table index data
620‧‧‧Outside the logical access address
631, 632‧‧‧ blank queue
640‧‧‧ effective count value field
710‧‧‧Flash memory
711~71N‧‧‧ physical memory block
720‧‧‧ memory controller
721‧‧‧ static memory

FIG. 1 is a flow chart of a method for accessing a flash memory according to an embodiment of the invention. 2 is a schematic diagram of a full address mapping database according to an embodiment of the present invention. FIG. 3 is a schematic diagram of a management block according to an embodiment of the present invention. 4 is a schematic diagram of an implementation of a full address mapping database according to an embodiment of the present invention. FIG. 5 is a schematic diagram of an operation of integrating a page mapping table according to an embodiment of the present invention. FIG. 6 is a schematic diagram of another embodiment of a management block according to an embodiment of the present invention. FIG. 7 is a schematic diagram of a flash memory according to an embodiment of the invention.

S110~S140‧‧‧ flash memory access steps

Claims (8)

A method for accessing a flash memory, comprising: establishing an all-address mapping database, wherein the full-address mapping database includes a plurality of page mapping tables, and each page mapping table is divided into a plurality of logical address regions, Each logical address area includes a plurality of storage fields corresponding to a plurality of logical page addresses, and each storage field is used to store a physical block address and a physical page address of the corresponding logical page address mapping; Establishing a management block, and writing a page mapping table index data to the management block; according to the page mapping table index data to load one of the page mapping tables, and according to the loaded page mapping table Obtaining a corresponding physical memory block; and performing data access operations on the corresponding physical memory block, wherein the page mapping tables are divided into a plurality of page mapping table groups, and the page mapping table groups are respectively stored in In a plurality of physical memory blocks, when at least one of the page mapping tables in each of the page mapping table groups is updated, an updated page mapping table is written into the corresponding physical memory block, and each page is Mapping table group pair When the storable space of the physical memory block is less than a preset value, the method further includes: creating a replacement physical memory block; and copying the latest page mapping table in the corresponding physical memory block to the replacement physical memory area In the block; and releasing the corresponding physical memory block. The method for accessing a flash memory according to claim 1, wherein a logical access address is recorded in the management block, and wherein the map is mapped according to the page The step index data is loaded into one of the page mapping tables, and the step of obtaining the corresponding physical memory block according to the loaded page mapping table comprises: loading the address according to the logical access address The page mapping table obtains an access entity address of the corresponding physical memory block. A method for accessing a flash memory, comprising: establishing an all-address mapping database, wherein the full-address mapping database includes a plurality of page mapping tables, and each page mapping table is divided into a plurality of logical address regions, Each logical address area includes a plurality of storage fields corresponding to a plurality of logical page addresses, and each storage field is used to store a physical block address and a physical page address of the corresponding logical page address mapping; Establishing a management block, and writing a page mapping table index data to the management block; according to the page mapping table index data to load one of the page mapping tables, and according to the loaded page mapping table Obtaining a corresponding physical memory block; performing a data access operation on the corresponding physical memory block; and setting at least one blank queue in the management block, wherein the at least one blank queue stores a blank physical memory block; receiving Writing a data and a corresponding write logical address, and writing the write data to the blank physical memory page of the blank physical memory block; and according to the write logical address and the blank physical memory Block updates the corresponding page mapping table. A method for accessing flash memory, comprising: Establishing a full address mapping database, the full address mapping database includes a plurality of page mapping tables, each page mapping table is divided into a plurality of logical address regions, and each logical address region includes multiple logics respectively a plurality of storage fields of the page address, each storage field is used to store a physical block address and a physical page address of the corresponding logical page address mapping; a management block is created, and the management block is Writing a page of mapping table index data; according to the page mapping table index data to load one of the page mapping tables, and obtaining a corresponding entity memory block according to the loaded page mapping table; for the corresponding entity The memory block performs a data access operation; setting a valid count value field in the management block, wherein the valid count value field records a valid memory page number of the corresponding physical memory block; and when the valid When the number of memory pages is less than a set value, the data of the valid memory page in the corresponding physical memory block is transferred to other physical memory blocks, and the corresponding physical memory block is released. A flash memory, comprising: a plurality of physical memory blocks, each of the physical memory blocks comprising a plurality of physical memory pages; and a memory controller coupled to the physical memory blocks, wherein the memory controller Execution: establishing a full address mapping database, the full address mapping database includes a plurality of page mapping tables, each page mapping table is divided into a plurality of logical address regions, and Each of the logical address regions includes a plurality of storage fields corresponding to a plurality of logical page addresses, each of the storage fields for storing a physical block address and a physical page address of the corresponding logical page address mapping. Establishing a management block, and writing a page mapping table index data to the management block; according to the page mapping table index data to load one of the page mapping tables, and according to the loaded page mapping Obtaining a corresponding physical memory block; and performing a data access operation on the corresponding physical memory block, wherein the memory controller further distinguishes the page mapping tables from being a plurality of page mapping table groups, the pages The mapping table groups are respectively stored in the physical memory blocks, and when at least one of the page mapping tables in each page mapping table group is updated, an updated page mapping table is written into the corresponding physical memory. In the block, the memory controller further copies the latest page mapping tables in the corresponding physical memory block into the replacement entity memory block, and releases the corresponding physical memory block. The flash memory of claim 5, wherein the memory controller obtains an access of the corresponding physical memory block according to the logical access address to transmit the loaded page mapping table. Physical address. A flash memory, comprising: a plurality of physical memory blocks, each of the physical memory blocks comprising a plurality of physical memory pages; and a memory controller coupled to the physical memory blocks, wherein the memory controller carried out: Establishing a full address mapping database, the full address mapping database includes a plurality of page mapping tables, each page mapping table is divided into a plurality of logical address regions, and each of the logical address regions includes a plurality of corresponding a plurality of storage fields of the logical page address, each of the storage fields is used to store a physical block address and a physical page address of the corresponding logical page address mapping; establishing a management block and managing the same The block writes a page mapping table index data; according to the page mapping table index data to load one of the page mapping tables, and obtain a corresponding entity memory block according to the loaded page mapping table; Performing a data access operation corresponding to the physical memory block; and setting at least one blank queue in the management block, wherein the at least one blank queue stores a blank physical memory block, and receives a write data and a corresponding one Writing a logical address, and writing the write data to the blank physical memory page of the blank physical memory block, and updating the corresponding page mapping table according to the write logical address and the blank physical memory block. A flash memory, comprising: a plurality of physical memory blocks, each of the physical memory blocks comprising a plurality of physical memory pages; and a memory controller coupled to the physical memory blocks, wherein the memory controller Execution: establishing a full address mapping database, the full address mapping database includes a plurality of page mapping tables, each page mapping table is divided into a plurality of logical address regions, and Each of the logical address regions includes a plurality of storage fields corresponding to a plurality of logical page addresses, each of the storage fields for storing a physical block address and a physical page address of the corresponding logical page address mapping. Establishing a management block, and writing a page mapping table index data to the management block; according to the page mapping table index data to load one of the page mapping tables, and according to the loaded page mapping Obtaining a corresponding physical memory block; performing a data access action on the corresponding physical memory block; and setting a valid count value field in the management block, wherein the valid count value field records the corresponding physical memory The number of valid memory pages of the block, and when the number of valid memory pages is less than a set value, the data of the valid memory page in the corresponding physical memory block is transferred to other physical memory blocks, and the corresponding entity is released. Memory block.