TWI568031B - Led package structure and chip carrier - Google Patents

Led package structure and chip carrier Download PDF

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Publication number
TWI568031B
TWI568031B TW104120938A TW104120938A TWI568031B TW I568031 B TWI568031 B TW I568031B TW 104120938 A TW104120938 A TW 104120938A TW 104120938 A TW104120938 A TW 104120938A TW I568031 B TWI568031 B TW I568031B
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TW
Taiwan
Prior art keywords
ceramic
line
ceramic substrate
plate
extension
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TW104120938A
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Chinese (zh)
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TW201701503A (en
Inventor
林貞秀
邱國銘
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光寶光電(常州)有限公司
光寶科技股份有限公司
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Priority to TW104120938A priority Critical patent/TWI568031B/en
Publication of TW201701503A publication Critical patent/TW201701503A/en
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Publication of TWI568031B publication Critical patent/TWI568031B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Led Device Packages (AREA)

Description

發光二極體封裝結構及晶片承載座 Light-emitting diode package structure and wafer carrier

本發明是有關一種封裝結構,且特別是有關於一種發光二極體封裝結構及晶片承載座。 The present invention relates to a package structure, and more particularly to a light emitting diode package structure and a wafer carrier.

習用高功率之發光二極體封裝結構對於技術要求較高,例如:波長、照度、與散熱之要求。習用高功率之發光二極體封裝結構大都採用高溫共燒多層陶瓷(High Temperature Co-fired Ceramic,HTCC),而上述高溫共燒技術之技術門檻與成本費用皆較高,進而阻礙高功率之發光二極體封裝結構之發展。 The conventional high-power LED package structure requires high technical requirements such as wavelength, illumination, and heat dissipation. Most of the high-power LED package structures use High Temperature Co-fired Ceramic (HTCC), and the high-temperature co-firing technology has high technical thresholds and high cost, which hinders high-power illumination. The development of the diode package structure.

於是,本發明人有感上述缺失之可改善,乃特潛心研究並配合學理之運用,終於提出一種設計合理且有效改善上述缺失之本發明。 Therefore, the present inventors have felt that the above-mentioned deficiencies can be improved, and they have devoted themselves to research and cooperated with the application of the theory, and finally proposed a present invention which is reasonable in design and effective in improving the above-mentioned defects.

本發明實施例在於提供一種發光二極體封裝結構及晶片承載座,其能有效地改善上述習用高功率之發光二極體封裝結構所產生之問題。 The embodiment of the invention provides a light emitting diode package structure and a wafer carrier, which can effectively improve the problems caused by the conventional high power LED package structure.

本發明實施例提供一種發光二極體封裝結構,包括:一晶片承載座,包含:一陶瓷基板,其具有一第一板面、位於該第一板面相反側的一第二板面、及位於該第一板面與該第二板面之間的一外側面;其中,該陶瓷基板形成有貫穿該第一板面與該第二板面的一容置孔;一線路層,其設置於該陶瓷基板的該第一板面;一金屬塊,包含:一本體部,其設置於該陶瓷基板的該容置孔, 該本體部凸伸出該第一板面大致10微米至30微米;其中,凸伸出該第一板面的該本體部區塊定義為一凸出塊;及一延伸部,其相連於該凸出塊的外緣,並且該延伸部表面以及該凸出塊表面大致呈共平面並共同定義為一固晶面;及一陶瓷反射板,其具有一第一表面、位於該第一表面相反側的一第二表面、及位於該第一表面與該第二表面之間的一側表面;其中,該陶瓷反射板設置於該陶瓷基板上並覆蓋部分的該線路層,並且該陶瓷反射板形成有貫穿該第一表面與該第二表面的一貫孔,該金屬塊的該固晶面經由該貫孔而顯露於該陶瓷反射板之外;以及一發光二極體晶片,其設置於該晶片承載座的該固晶面上,並且該發光二極體晶片電性連接於該線路層。 The embodiment of the invention provides a light emitting diode package structure, comprising: a wafer carrier, comprising: a ceramic substrate having a first plate surface, a second plate surface on the opposite side of the first plate surface, and An outer side surface between the first board surface and the second board surface; wherein the ceramic substrate is formed with a receiving hole penetrating the first board surface and the second board surface; a circuit layer is disposed The first plate surface of the ceramic substrate; a metal block comprising: a body portion disposed in the receiving hole of the ceramic substrate, The body portion protrudes from the first plate surface by approximately 10 micrometers to 30 micrometers; wherein the body portion block protruding from the first panel surface is defined as a protruding block; and an extension portion connected to the An outer edge of the protruding block, and the surface of the extending portion and the surface of the protruding block are substantially coplanar and collectively defined as a solid crystal surface; and a ceramic reflecting plate having a first surface opposite to the first surface a second surface of the side, and a side surface between the first surface and the second surface; wherein the ceramic reflector is disposed on the ceramic substrate and covers a portion of the circuit layer, and the ceramic reflector Forming a uniform hole penetrating the first surface and the second surface, the solid crystal surface of the metal block is exposed outside the ceramic reflector through the through hole; and a light emitting diode chip disposed on the The solid crystal plane of the wafer carrier, and the light emitting diode chip is electrically connected to the circuit layer.

本發明實施例另提供一種晶片承載座,包括:一陶瓷基板,其具有位於一第一板面、位於該第一板面相反側的一第二板面、及位於該第一板面與該第二板面之間的一外側面;其中,該陶瓷基板形成有貫穿該第一板面與該第二板面的一容置孔;一線路層,其設置於該陶瓷基板的該第一板面;一金屬塊,包含:一本體部,其設置於該陶瓷基板的該容置孔,該本體部凸伸出該第一板面大致10微米至30微米;其中,凸伸出該第一板面的該本體部區塊定義為一凸出塊;及一延伸部,其相連於該凸出塊的外緣,並且該延伸部表面與該凸出塊表面大致呈共平面並定義為一固晶面;以及一陶瓷反射板,其具有一第一表面、位於該第一表面相反側的一第二表面、及位於該第一表面與該第二表面之間的一側表面;其中,該陶瓷反射板設置於該陶瓷基板上並覆蓋部分的該線路層,並且該陶瓷反射板形成有貫穿該第一表面與該第二表面的一貫孔,該金屬塊的該固晶面經由該貫孔而顯露於該陶瓷反射板之外。 The embodiment of the present invention further provides a wafer carrier, comprising: a ceramic substrate having a second plate surface on a first plate surface opposite to the first plate surface, and the first plate surface and the first plate surface An outer side surface between the second board faces; wherein the ceramic substrate is formed with a receiving hole penetrating the first board surface and the second board surface; a circuit layer disposed on the first surface of the ceramic substrate a metal plate, comprising: a body portion disposed on the receiving hole of the ceramic substrate, the body portion protruding from the first plate surface by about 10 micrometers to 30 micrometers; wherein the protruding portion The body portion of a board surface is defined as a protruding block; and an extension portion is coupled to the outer edge of the protruding block, and the surface of the extending portion is substantially coplanar with the surface of the protruding block and is defined as a solid crystal surface; and a ceramic reflector having a first surface, a second surface on an opposite side of the first surface, and a side surface between the first surface and the second surface; The ceramic reflector is disposed on the ceramic substrate and covers a portion of the line a road layer, and the ceramic reflector is formed with a continuous hole penetrating the first surface and the second surface, the solid crystal surface of the metal block being exposed outside the ceramic reflector through the through hole.

綜上所述,本發明實施例所提供的發光二極體封裝結構及晶片承載座,其透過金屬塊的本體部凸出於容置孔,藉以避免曲面 狀之固晶面產生。再者,金屬塊透過延伸部之設置,能有效地提升金屬塊所具備的固晶面積,進而適用於更多尺寸之發光二極體晶片。 In summary, the LED package structure and the wafer carrier provided by the embodiments of the present invention protrude through the body portion of the metal block to accommodate the surface. The solid surface of the shape is produced. Furthermore, the arrangement of the metal block through the extension portion can effectively increase the solid crystal area of the metal block, and is suitable for a larger size of the LED chip.

為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,但是此等說明與所附圖式僅係用來說明本發明,而非對本發明的權利範圍作任何的限制。 The detailed description of the present invention and the accompanying drawings are to be understood by the claims The scope is subject to any restrictions.

1000‧‧‧發光二極體封裝結構 1000‧‧‧Light emitting diode package structure

100‧‧‧晶片承載座 100‧‧‧ wafer carrier

1‧‧‧陶瓷基板 1‧‧‧ceramic substrate

11‧‧‧第一板面 11‧‧‧ first board

12‧‧‧第二板面 12‧‧‧ second board

13‧‧‧外側面 13‧‧‧Outside

131‧‧‧缺角 131‧‧‧ corner

14‧‧‧容置孔 14‧‧‧ accommodating holes

15‧‧‧穿孔 15‧‧‧Perforation

2‧‧‧導電柱 2‧‧‧conductive column

3‧‧‧線路層 3‧‧‧Line layer

32‧‧‧第一線路 32‧‧‧First line

321‧‧‧長側部 321‧‧‧Long side

3211‧‧‧末端部位 3211‧‧‧End parts

3212‧‧‧缺口 3212‧‧‧ gap

3213‧‧‧第一打線區 3213‧‧‧First line area

322‧‧‧短側部 322‧‧‧Short side

3221‧‧‧齊納二極體固晶區 3221‧‧‧Zina diode solid crystal region

323‧‧‧轉角部位 323‧‧‧ corner parts

33‧‧‧第二線路 33‧‧‧second line

331‧‧‧長側部 331‧‧‧ long side

3311‧‧‧末端部位 3311‧‧‧ end parts

3312‧‧‧缺口 3312‧‧ ‧ gap

3313‧‧‧第二打線區 3313‧‧‧Second line area

332‧‧‧短側部 332‧‧‧ Short side

3321‧‧‧齊納二極體打線區 3321‧‧‧Zina diode wiring area

333‧‧‧轉角部位 333‧‧‧ corner parts

4‧‧‧延伸線路 4‧‧‧Extended lines

5‧‧‧金屬塊 5‧‧‧metal block

51‧‧‧本體部 51‧‧‧ Body Department

511‧‧‧凸出塊 511‧‧‧ protruding block

52‧‧‧延伸部 52‧‧‧Extension

521‧‧‧第一延伸部 521‧‧‧First Extension

522‧‧‧第二延伸部 522‧‧‧Second extension

53‧‧‧固晶面 53‧‧‧Solid surface

6‧‧‧焊墊層 6‧‧‧pad layer

61‧‧‧電極墊 61‧‧‧electrode pads

611‧‧‧末端部位 611‧‧‧ end parts

62‧‧‧導熱墊 62‧‧‧ Thermal pad

621‧‧‧切口 621‧‧‧ incision

63‧‧‧隔離墊 63‧‧‧Isolation pad

7‧‧‧陶瓷反射板 7‧‧‧Ceramic reflector

71‧‧‧第一表面 71‧‧‧ first surface

711‧‧‧膠槽 711‧‧‧ plastic tank

72‧‧‧第二表面 72‧‧‧ second surface

73‧‧‧側表面 73‧‧‧ side surface

731‧‧‧缺角 731‧‧‧Necked corner

74‧‧‧貫孔 74‧‧‧through holes

8、8’‧‧‧極性辨識墊(如:玻璃膠墊) 8, 8' ‧ ‧ polar identification pads (eg glass mat)

9‧‧‧陶瓷夾層 9‧‧‧Ceramic sandwich

91‧‧‧穿孔 91‧‧‧Perforation

10‧‧‧環型擋止層 10‧‧‧ring stop layer

80‧‧‧黏著膠體 80‧‧‧Adhesive colloid

200‧‧‧發光二極體晶片 200‧‧‧Light Diode Wafer

300‧‧‧齊納二極體晶片 300‧‧‧Zina diode chip

400‧‧‧封裝膠體 400‧‧‧Package colloid

500‧‧‧蓋板 500‧‧‧ cover

600‧‧‧間隔件 600‧‧‧ spacers

700‧‧‧反射膜 700‧‧‧Reflective film

H‧‧‧高度 H‧‧‧ Height

G‧‧‧間隙 G‧‧‧ gap

圖1為本發明發光二極體封裝結構第一實施例的立體示意圖。 1 is a perspective view of a first embodiment of a light emitting diode package structure according to the present invention.

圖2為圖1另一視角的立體示意圖。 2 is a perspective view of another perspective of FIG. 1.

圖3為圖1的局部分解示意圖。 Figure 3 is a partial exploded view of Figure 1.

圖4為圖3中的晶片承載座、發光二極體晶片、與齊納二極體晶片的分解示意圖。 4 is an exploded perspective view of the wafer carrier, the light emitting diode wafer, and the Zener diode wafer of FIG. 3.

圖5為圖4中的晶片承載座上視圖。 Figure 5 is a top plan view of the wafer carrier of Figure 4.

圖6為圖4中的晶片承載座之局部分解示意圖。 Figure 6 is a partially exploded perspective view of the wafer carrier of Figure 4;

圖7為圖6中的晶片承載座未包含陶瓷反射板與極性辨識墊時的分解示意圖。 FIG. 7 is an exploded perspective view showing the wafer carrier of FIG. 6 not including a ceramic reflector and a polarity identification pad.

圖8為圖7另一視角的分解示意圖。 FIG. 8 is an exploded perspective view of another perspective of FIG. 7. FIG.

圖9為圖1沿X1-X1剖線的剖視示意圖。 Figure 9 is a cross-sectional view taken along line X1-X1 of Figure 1.

圖10為圖9的局部放大示意圖。 Figure 10 is a partially enlarged schematic view of Figure 9.

圖11為圖1的發光二極體封裝結構加裝環型擋止層時的立體示意圖。 FIG. 11 is a perspective view showing the light-emitting diode package structure of FIG. 1 with a ring-shaped stop layer.

圖12為本發明發光二極體封裝結構第二實施例的立體示意圖。 FIG. 12 is a perspective view of a second embodiment of a light emitting diode package structure according to the present invention.

圖13為圖12的局部分解示意圖。 Figure 13 is a partially exploded perspective view of Figure 12 .

圖14為圖12沿Y-Y剖線的剖視示意圖。 Figure 14 is a cross-sectional view taken along line Y-Y of Figure 12;

圖15為圖14的局部放大示意圖。 Figure 15 is a partially enlarged schematic view of Figure 14.

圖16A為本發明發光二極體封裝結構第二實施例的變化態樣示意圖。 FIG. 16A is a schematic view showing a variation of the second embodiment of the LED package structure of the present invention.

圖16B為圖16A沿Z-Z剖線的剖視示意圖(一)。 Figure 16B is a cross-sectional view (I) of Figure 16A taken along the line Z-Z.

圖16C為圖16A沿Z-Z剖線的剖視示意圖(二)。 Figure 16C is a cross-sectional view (II) of Figure 16A taken along the line Z-Z.

圖17為本發明發光二極體封裝結構第二實施例的又一變化態樣示意圖。 FIG. 17 is a schematic view showing still another variation of the second embodiment of the LED package structure of the present invention.

圖18為本發明發光二極體封裝結構第三實施例的立體示意圖。 FIG. 18 is a perspective view of a third embodiment of a light emitting diode package structure according to the present invention.

圖19為圖18另一視角的立體示意圖。 Figure 19 is a perspective view of another perspective of Figure 18.

圖20為圖18中的晶片承載座之局部分解示意圖。 Figure 20 is a partially exploded perspective view of the wafer carrier of Figure 18.

圖21為圖18沿X2-X2剖線的剖視示意圖。 Figure 21 is a cross-sectional view taken along line X2-X2 of Figure 18.

圖22為本發明發光二極體封裝結構第四實施例的立體示意圖。 FIG. 22 is a perspective view of a fourth embodiment of a light emitting diode package structure according to the present invention.

圖23為圖22的局部分解示意圖。 Figure 23 is a partially exploded perspective view of Figure 22.

圖24為圖22沿X3-X3剖線的剖視示意圖。 Figure 24 is a cross-sectional view taken along line X3-X3 of Figure 22.

[第一實施例] [First Embodiment]

請參閱圖1至圖11,其為本發明的第一實施例,需先說明的是,本實施例對應圖式所提及之相關數量與外型,僅用以具體地說明本發明的實施方式,以便於了解其內容,而非用以侷限本發明的權利範圍。 Please refer to FIG. 1 to FIG. 11 , which are the first embodiment of the present invention. It should be noted that the related quantities and appearances mentioned in the embodiment are only used to specifically describe the implementation of the present invention. The manner in which the content is understood is not to be construed as limiting the scope of the invention.

如圖1和圖2所示,本實施例為一種發光二極體封裝結構1000,尤指一種高功率發光二極體封裝結構(如:紫外線發光二極體封裝結構),並適於採用低溫共燒多層陶瓷(Low Temperature Co-fired Ceramic,LTCC),但本發明於實際運用時,並不以上述的條件為限。 As shown in FIG. 1 and FIG. 2, the present embodiment is a light emitting diode package structure 1000, especially a high power light emitting diode package structure (such as an ultraviolet light emitting diode package structure), and is suitable for low temperature. Low Temperature Co-fired Ceramic (LTCC) is used, but the present invention is not limited to the above conditions in practical use.

請參閱圖3至圖5,所述發光二極體封裝結構1000包括一晶片承載座100、收容於上述晶片承載座100的一發光二極體晶片200與一齊納二極體晶片300、及設於晶片承載座100並密封上述發光二極體晶片200與齊納二極體晶片300的一封裝膠體400。本實施例於下述將先就晶片承載座100的構造作一說明,而後再介紹就晶片承載座100與其他元件之間的連接關係。 Referring to FIG. 3 to FIG. 5 , the LED package 1000 includes a wafer carrier 100 , a LED array 200 and a Zener diode 300 disposed in the wafer carrier 100 . The package carrier 100 is sealed with an encapsulant 400 of the LED array 200 and the Zener diode 300. In the present embodiment, the configuration of the wafer carrier 100 will be described first, and then the connection relationship between the wafer carrier 100 and other components will be described.

如圖6至圖8,並請於元件連接關係時適時參酌圖9和圖10,所述晶片承載座100包含一陶瓷基板1、設置於陶瓷基板1的兩導電柱2、一線路層3、四個延伸線路4、一金屬塊5、及一焊墊層6、堆疊於陶瓷基板1的一陶瓷反射板7、及設置於陶瓷反射板7的四個極性辨識墊8、8’。 As shown in FIG. 6 to FIG. 8 , when referring to FIG. 9 and FIG. 10 , the wafer carrier 100 includes a ceramic substrate 1 , two conductive pillars 2 disposed on the ceramic substrate 2 , and a circuit layer 3 . Four extension lines 4, a metal block 5, and a pad layer 6, a ceramic reflector 7 stacked on the ceramic substrate 1, and four polarity identification pads 8, 8' disposed on the ceramic reflector 7.

所述陶瓷基板1具有一第一板面11、位於第一板面11相反側的一第二板面12、及位於第一板面11與第二板面12之間的一外側面13。其中,上述陶瓷基板1為多邊形構造(於本實施例中是以方形為例),並且陶瓷基板1的外側面13於其各個角落處形成有一1/4圓弧狀之缺角131。藉此,陶瓷基板1透過在角落處形成有缺角131,以有效地避免角落產生崩裂之情事。 The ceramic substrate 1 has a first plate surface 11 , a second plate surface 12 on the opposite side of the first plate surface 11 , and an outer side surface 13 between the first plate surface 11 and the second plate surface 12 . The ceramic substrate 1 has a polygonal structure (in the embodiment, a square is taken as an example), and the outer side surface 13 of the ceramic substrate 1 has a 1/4 arc-shaped notch 131 at each corner thereof. Thereby, the ceramic substrate 1 is formed with the notch 131 at the corner to effectively prevent the corner from being cracked.

進一步地說,所述陶瓷基板1的大致中央處形成有貫穿第一板面11與第二板面12的一容置孔14,並且容置孔14的截面形狀於本實施例中大致呈邊長為1公厘至1.2公厘的正方形。而陶瓷基板1於上述容置孔14的相反兩側處各形成有貫穿第一板面11與第二板面12的一穿孔15,並且各個穿孔15的截面形狀於本實施例中大致呈圓形。 Further, a central portion of the ceramic substrate 1 is formed with a receiving hole 14 penetrating the first plate surface 11 and the second plate surface 12, and the cross-sectional shape of the receiving hole 14 is substantially edged in this embodiment. A square with a length of 1 mm to 1.2 mm. The ceramic substrate 1 is formed with a through hole 15 penetrating the first plate surface 11 and the second plate surface 12 at opposite sides of the accommodating hole 14 , and the cross-sectional shape of each of the through holes 15 is substantially round in this embodiment. shape.

所述兩導電柱2分別位於上述陶瓷基板1的兩穿孔15內,並且每個穿孔15被其所對應的導電柱2所布滿。其中,各個導電柱2的一端(如圖9中的導電柱2頂端)與陶瓷基板1的第一板面11呈共平面,而各個導電柱2的另一端(如圖9中的導電柱2底端)則與陶瓷基板1的第二板面12呈共平面。 The two conductive pillars 2 are respectively located in the two through holes 15 of the ceramic substrate 1, and each of the through holes 15 is filled by the corresponding conductive pillars 2. Wherein, one end of each conductive pillar 2 (such as the top end of the conductive pillar 2 in FIG. 9) is coplanar with the first plate surface 11 of the ceramic substrate 1, and the other end of each conductive pillar 2 (such as the conductive pillar 2 in FIG. 9) The bottom end is coplanar with the second plate surface 12 of the ceramic substrate 1.

所述線路層3於本實施例中是以銀線路層為例,並且線路層3設置於上述陶瓷基板1的第一板面11,並且線路層3具有一第一線路32及一第二線路33。其中,所述第一線路32與第二線路33分別位於第一板面11的兩側部位並且分別抵接於上述兩導電柱2。 In the embodiment, the circuit layer 3 is exemplified by a silver circuit layer, and the circuit layer 3 is disposed on the first board surface 11 of the ceramic substrate 1, and the circuit layer 3 has a first line 32 and a second line. 33. The first line 32 and the second line 33 are respectively located at two sides of the first board surface 11 and respectively abut against the two conductive posts 2 .

更詳細地說,所述第一線路32與第二線路33皆大致呈L型且各包含有垂直相連的一長側部321、331與一短側部322、332。 所述L型之第一線路32與第二線路33的轉角部位323、333以及長側部321、331的末端部位3211、3311分別鄰設於陶瓷基板1的缺角131。進一步來說,上述轉角部位323、333之部分端緣與末端部位3211、3311之部分端緣各呈1/4圓弧狀並且分別切齊於所述缺角131的端緣。 In more detail, the first line 32 and the second line 33 are both substantially L-shaped and each include a long side portion 321, 331 and a short side portion 322, 332 that are vertically connected. The L-shaped first line 32 and the corner portions 323 and 333 of the second line 33 and the end portions 3211 and 3311 of the long side portions 321 and 331 are respectively disposed adjacent to the notch 131 of the ceramic substrate 1. Further, a part of the end edges of the corner portions 323 and 333 and a part of the end edges of the end portions 3211 and 3311 are each formed in a quarter-arc shape and are respectively aligned with the end edges of the notch 131.

其中,上述第一線路32的長側部321與第二線路33的長側部331分別位於第一板面11的相反兩側部位且彼此平行,並且第一線路32的長側部321與第二線路33的長側部331分別覆蓋於陶瓷基板1第一板面11上的兩穿孔15,使上述兩導電柱2分別抵接於第一線路32的長側部321與第二線路33的長側部331(如圖9)。而上述第一線路32的短側部322與第二線路33的短側部332位於第一板面11的一側部位且彼此相向。 The long side portion 321 of the first line 32 and the long side portion 331 of the second line 33 are respectively located at opposite sides of the first board surface 11 and are parallel to each other, and the long side portion 321 of the first line 32 and the first line 32 The long side portions 331 of the two lines 33 respectively cover the two through holes 15 on the first plate surface 11 of the ceramic substrate 1, so that the two conductive posts 2 abut against the long side portion 321 and the second line 33 of the first line 32, respectively. Long side 331 (see Figure 9). The short side portion 322 of the first line 32 and the short side portion 332 of the second line 33 are located at one side of the first board surface 11 and face each other.

再者,所述第一線路32的長側部321與第二線路33的長側部331各於鄰接其短側部322、332的內緣處,凹設形成有一半圓狀的缺口3212、3312。 Furthermore, the long side portion 321 of the first line 32 and the long side portion 331 of the second line 33 are adjacent to the inner edges of the short side portions 322, 332, and are recessed to form a semicircular notch 3212, 3312. .

所述延伸線路4分別形成於上述陶瓷基板1外側面13上的缺角131,並且該些延伸線路4分別垂直地連接於該線路層3之第一線路32與第二線路33的外轉角部位323、333端緣及長側部321、331的末端部位3211、3311端緣。 The extension lines 4 are respectively formed on the outer corners 13 of the ceramic substrate 1 and the extension lines 4 are vertically connected to the outer corners of the first line 32 and the second line 33 of the circuit layer 3, respectively. 323, 333 end edge and end portions 3211, 3311 of the long side portions 321, 331 end edge.

所述金屬塊5於本實施例中是以銀塊為例,並且金屬塊5包含一本體部51及一延伸部52,所述本體部51設置於陶瓷基板1的容置孔14,並且容置孔14被本體部51所布滿。其中,上述本體部51截面於本實施例中呈正方形且邊長為1公厘至1.2公厘,但本體部51截面的形狀不以上述為限,也可以是長方形或圓形。本體部51的一端(如圖9中的本體部51底端)大致與陶瓷基板1的第二板面12呈共平面,而本體部51的另一端(如圖9中的本體部51頂端)凸伸出陶瓷基板1第一板面11大致10微米至30微米,並且上述凸伸出第一板面11的本體部51區塊定義為一凸出塊 511(如圖10)。換言之,上述凸出塊511凸伸出第一板面11的高度H大致為10微米至30微米。 In the present embodiment, the metal block 5 is exemplified by a silver block, and the metal block 5 includes a body portion 51 and an extending portion 52. The body portion 51 is disposed in the receiving hole 14 of the ceramic substrate 1 and is accommodated therein. The hole 14 is filled with the body portion 51. The main body portion 51 has a square shape in the present embodiment and a side length of 1 mm to 1.2 mm. However, the shape of the cross section of the main body portion 51 is not limited to the above, and may be rectangular or circular. One end of the body portion 51 (such as the bottom end of the body portion 51 in FIG. 9) is substantially coplanar with the second plate surface 12 of the ceramic substrate 1, and the other end of the body portion 51 (such as the top portion of the body portion 51 in FIG. 9). Projecting the first plate surface 11 of the ceramic substrate 1 by approximately 10 micrometers to 30 micrometers, and the block portion of the body portion 51 protruding from the first panel surface 11 is defined as a protruding block 511 (Figure 10). In other words, the height H of the protruding block 511 protruding from the first plate surface 11 is approximately 10 micrometers to 30 micrometers.

須說明的是,由於金屬塊5是透過網印方式於容置孔14內填充金屬膠(即金屬粉末混合膠體,如銀膠)而形成,所以當金屬粉末的量大致等同容置孔14的容積,使得燒結形成的金屬塊未能凸出容置孔時,使金屬塊的頂面因內聚力將呈現曲面狀,進而影響後續之發光二極體晶片的固晶作業。因此,本實施例的晶片承載座100透過金屬塊5的本體部51凸出於容置孔14,藉以避免上述曲面狀之固晶面產生。 It should be noted that, since the metal block 5 is formed by filling a metal glue (ie, a metal powder mixed colloid such as silver glue) in the receiving hole 14 by screen printing, the amount of the metal powder is substantially equivalent to that of the receiving hole 14. The volume is such that when the metal block formed by sintering fails to protrude from the receiving hole, the top surface of the metal block will be curved due to the cohesive force, thereby affecting the subsequent die bonding operation of the light emitting diode chip. Therefore, the wafer carrier 100 of the present embodiment protrudes through the body portion 51 of the metal block 5 from the receiving hole 14 to avoid the occurrence of the curved surface of the solid crystal surface.

所述延伸部52一體相連於凸出塊511的外緣(如圖10),進一步說,延伸部52於本實施例中呈方環型並圍繞於本體部51的凸出塊511,且延伸部52是位在陶瓷基板1的第一板面11上。延伸部52表面以及本體部51的凸出塊511表面大致呈共平面並共同定義為一固晶面53,而上述固晶面53大致呈正方形。其中,就上述陶瓷基板1與金屬塊5的頂面來看,所述固晶面53的面積大致占陶瓷基板1與金屬塊5頂面的5~15%,並且較佳為8.5%。再者,所述第一線路32的長側部321與第二線路33的長側部331分別位於固晶面53的相反兩側,上述第一線路32的短側部322與第二線路33的短側部332位於固晶面53的一側。 The extending portion 52 is integrally connected to the outer edge of the protruding block 511 (see FIG. 10). Further, the extending portion 52 is a square ring type in the present embodiment and surrounds the protruding block 511 of the body portion 51, and extends. The portion 52 is positioned on the first plate surface 11 of the ceramic substrate 1. The surface of the extending portion 52 and the surface of the protruding block 511 of the body portion 51 are substantially coplanar and are collectively defined as a solid crystal surface 53, and the above-mentioned solid crystal surface 53 is substantially square. In view of the top surface of the ceramic substrate 1 and the metal block 5, the area of the crystal-fixing surface 53 is approximately 5 to 15%, and preferably 8.5%, of the top surface of the ceramic substrate 1 and the metal block 5. Furthermore, the long side portion 321 of the first line 32 and the long side portion 331 of the second line 33 are respectively located on opposite sides of the fixed surface 53, the short side portion 322 and the second line 33 of the first line 32. The short side portion 332 is located on one side of the fixed surface 53.

更詳細地說,所述延伸部52包含有一第一延伸部521及設置在該第一延伸部521上的一第二延伸部522。其中,上述第一延伸部521與第二延伸部522各呈寬度為50~100微米的方環型,並且第一延伸部521與第二延伸部522皆圍繞在容置孔14的周緣,也就是說,所述第一延伸部521與第二延伸部522的內緣相互切齊,並切齊於容置孔14的端緣。換個角度來說,第一延伸部521與第二延伸部522皆圍繞且無縫隙地連接於本體部51的凸出塊511周緣。再者,所述第一延伸部521相接於第一線路32的長側部321,並且第一延伸部521與線路層3之第一線路32與第二線路33共 平面,而第二線路33分離於延伸部52與第一線路32。 In more detail, the extending portion 52 includes a first extending portion 521 and a second extending portion 522 disposed on the first extending portion 521 . The first extension portion 521 and the second extension portion 522 each have a square ring shape with a width of 50 to 100 micrometers, and the first extension portion 521 and the second extension portion 522 both surround the circumference of the accommodation hole 14 . That is, the inner edges of the first extending portion 521 and the second extending portion 522 are aligned with each other and are aligned with the end edge of the receiving hole 14. In other words, the first extending portion 521 and the second extending portion 522 are connected around the circumference of the protruding block 511 of the body portion 51 without gaps. Furthermore, the first extension portion 521 is in contact with the long side portion 321 of the first line 32, and the first extension portion 521 and the first line 32 of the circuit layer 3 are shared with the second line 33. The plane is separated while the second line 33 is separated from the extension 52 and the first line 32.

藉此,透過金屬塊5的延伸部52相接於第一線路32,以使金屬塊5能夠與第一線路32電性連接,因而令金屬塊5的固晶面53能夠適用於水平式或垂直式之發光二極體晶片200(具體實施於後詳述)。再者,金屬塊5透過延伸部52之設置,能有效地提升金屬塊5所具備的固晶面積,進而適用於更多尺寸之發光二極體晶片200。 Thereby, the extending portion 52 of the metal block 5 is connected to the first line 32, so that the metal block 5 can be electrically connected to the first line 32, thereby making the solid crystal surface 53 of the metal block 5 suitable for horizontal or A vertical LED array 200 (described in detail below). Furthermore, the arrangement of the metal block 5 through the extension portion 52 can effectively increase the solid crystal area of the metal block 5, and is suitable for the LED diode 200 of a larger size.

所述焊墊層6設置於陶瓷基板1的第二板面12,並且焊墊層6包含有長型的兩電極墊61及位於兩電極墊61之間的一長型導熱墊62,上述電極墊61與導熱墊62彼此呈間隔地設置並且長度方向大致彼此平行。其中,所述兩電極墊61大致位於線路層3之兩長側部321、331的正下方,並且該兩電極墊61的末端部位611之部分端緣各呈1/4圓弧狀並且分別切齊於所述缺角131的端緣,而位於缺角131的該些延伸線路4可分別連接或分離於上述焊墊層6的兩電極墊61的末端部位611。 The pad layer 6 is disposed on the second plate surface 12 of the ceramic substrate 1, and the pad layer 6 includes a long electrode pad 61 and an elongated thermal pad 62 between the electrode pads 61. The pad 61 and the thermal pad 62 are spaced apart from each other and the longitudinal directions are substantially parallel to each other. The two electrode pads 61 are located substantially directly below the long side portions 321 and 331 of the circuit layer 3, and the end edges of the end portions 611 of the two electrode pads 61 are each 1/4 arc shape and are respectively cut. The extension lines 4 at the corners 131 are respectively connected or separated from the end portions 611 of the two electrode pads 61 of the pad layer 6 respectively.

藉此,在該些延伸線路4分別連接於上述兩電極墊61的末端部位611的態樣中,該些電極墊61於焊接時,對應於各個電極墊61的焊料因受到內聚力的影響而傾向與可焊接材料相互鍵結,以使焊料沿著所述延伸線路4攀爬,進而有效地增加晶片承載座100的吃錫面積。 Therefore, in the case where the extension lines 4 are respectively connected to the end portions 611 of the two electrode pads 61, when the electrode pads 61 are soldered, the solder corresponding to the respective electrode pads 61 tends to be affected by the cohesive force. Bonding with the solderable material causes the solder to climb along the extension line 4, thereby effectively increasing the tin area of the wafer carrier 100.

再者,所述兩電極墊61分別覆蓋陶瓷基板1第二板面12上的兩穿孔15(如圖9),並且上述兩導電柱2分別抵接於該兩電極墊61,藉以使該兩電極墊61分別經由所述兩導電柱2而電性連接於第一線路32與第二線路33。 Furthermore, the two electrode pads 61 respectively cover the two through holes 15 on the second plate surface 12 of the ceramic substrate 1 (as shown in FIG. 9 ), and the two conductive posts 2 respectively abut against the two electrode pads 61 , thereby making the two The electrode pads 61 are electrically connected to the first line 32 and the second line 33 via the two conductive posts 2, respectively.

又,位於中央的該導熱墊62與金屬塊5的本體部51相接。進一步地說,上述位於中央的導熱墊62之長度與寬度皆大於本體部51的方形截面之邊長,以使本體部51能夠完全抵接於上述位於中央的導熱墊62。其中,上述抵接於本體部51之中央的導熱墊 62部位,其相反兩側各形成有一切口621,藉以避免導熱墊62的連續焊接之面積過大而產生翹曲。 Further, the thermally conductive pad 62 located at the center is in contact with the body portion 51 of the metal block 5. Further, the length and width of the centrally located thermal pad 62 are both longer than the sides of the square section of the body portion 51, so that the body portion 51 can completely abut the centrally located thermal pad 62. Wherein, the above-mentioned thermal pad abutting on the center of the body portion 51 At the 62 portion, a slit 621 is formed on each of the opposite sides to prevent warpage caused by excessively large area of the continuous soldering of the thermal pad 62.

此外,所述各個電極墊61與導熱墊62之間還可進一步設有一隔離墊63,如黑色玻璃膠,藉以透過玻璃膠使各個電極墊61與導熱墊62彼此間的電性相互隔絕。 In addition, a spacer 63, such as a black glass paste, may be further disposed between the electrode pads 61 and the thermal pad 62, so that the electrode pads 61 and the thermal pads 62 are electrically isolated from each other by the glass paste.

請參閱圖6和圖9,所述陶瓷反射板7具有一第一表面71、位於第一表面71相反側的一第二表面72、及位於第一表面71與第二表面72之間的一側表面73。其中,上述陶瓷反射板7為多邊形構造(於本實施例中是以方形為例),陶瓷反射板7的側表面73於其各個角落處形成有一1/4圓弧狀的缺角731。藉此,上述陶瓷反射板7透過在角落處形成有缺角731,以有效地避免角落產生崩裂之情事。再者,所述陶瓷反射板7的大致中央處形成有貫穿第一表面71與第二表面72的一圓形貫孔74,並且上述貫孔74的直徑大於所述固晶面53的對角線長度。此外,本實施例貫孔74雖為圓形,但貫孔74的具體形狀並不受限於此。舉例來說,貫孔74亦可以是方形。 Referring to FIGS. 6 and 9, the ceramic reflector 7 has a first surface 71, a second surface 72 on the opposite side of the first surface 71, and a first surface 71 and a second surface 72. Side surface 73. The ceramic reflector 7 has a polygonal structure (in the embodiment, a square is taken as an example), and the side surface 73 of the ceramic reflector 7 has a 1/4 arc-shaped notch 731 at each corner thereof. Thereby, the ceramic reflecting plate 7 is formed with a notch 731 at a corner to effectively prevent the corner from being cracked. Furthermore, a circular through hole 74 penetrating the first surface 71 and the second surface 72 is formed substantially at the center of the ceramic reflector 7, and the diameter of the through hole 74 is larger than the diagonal of the fixed surface 53. Line length. In addition, although the through hole 74 of the present embodiment is circular, the specific shape of the through hole 74 is not limited thereto. For example, the through hole 74 can also be square.

所述陶瓷反射板7的第二表面72設置於陶瓷基板1的第一板面11上並覆蓋部分的線路層3,而陶瓷反射板7的側表面73切齊於陶瓷基板1的外側面13。其中,上述未被陶瓷反射板7所覆蓋的線路層3部位,包含有鄰近環型線路31的第一線路32與第二線路33之部分長側部321、331與部分短側部322、332。 The second surface 72 of the ceramic reflector 7 is disposed on the first plate surface 11 of the ceramic substrate 1 and covers a portion of the wiring layer 3, and the side surface 73 of the ceramic reflector 7 is aligned with the outer surface 13 of the ceramic substrate 1. . Wherein, the portion of the circuit layer 3 not covered by the ceramic reflector 7 includes the partial long side portions 321 and 331 and the partial short side portions 322 and 332 of the first line 32 and the second line 33 adjacent to the loop line 31. .

如圖5所示,為便於本實施例之說明,上述未被陶瓷反射板7所覆蓋的第一線路32之部分長側部321定義為一第一打線區3213,未被陶瓷反射板7所覆蓋的第二線路33之部分長側部331定義為一第二打線區3313,上述未被陶瓷反射板7所覆蓋的第一線路32之部分短側部322定義為一齊納二極體固晶區3221,未被陶瓷反射板7所覆蓋的第二線路33之部分短側部332定義為一齊納二極體打線區3321。所述金屬塊5的固晶面53、第一打線區 3213、第二打線區3313、齊納二極體固晶區3221、齊納二極體打線區3321、及第一線路32與第二線路33之缺口3212、3312皆經由所述貫孔74而顯露於陶瓷反射板7之外。 As shown in FIG. 5, in order to facilitate the description of the embodiment, the partial long side portion 321 of the first line 32 not covered by the ceramic reflecting plate 7 is defined as a first bonding portion 3213, which is not provided by the ceramic reflecting plate 7. A portion of the long side portion 331 of the covered second line 33 is defined as a second line-bonding portion 3313, and a portion of the short side portion 322 of the first line 32 not covered by the ceramic reflector 7 is defined as a Zener diode solid crystal. The region 3221, a portion of the short side portion 332 of the second line 33 not covered by the ceramic reflector 7, is defined as a Zener diode wiring region 3321. The solid crystal surface 53 of the metal block 5 and the first bonding area 3213, a second bonding area 3313, a Zener diode solid crystal region 3221, a Zener diode wiring area 3321, and a gap 3212, 3312 of the first line 32 and the second line 33 are all via the through hole 74. It is exposed outside the ceramic reflector 7.

藉此,由於在對應相同波長之光線的前提下,陶瓷的光反射率大於銀的光反射率,所以陶瓷基板1的光反射率是大於上述銀線路層3的反射率,因而透過在上述第一線路32與第二線路33形成有缺口3212、3312,以使陶瓷基板1的第一板面11能夠有更多的面積經由貫孔74而顯露於陶瓷反射板7外,進而有效地提升發光二極體封裝結構1000的出光率。 Therefore, since the light reflectance of the ceramic is greater than the light reflectance of the silver under the premise of the light of the same wavelength, the light reflectance of the ceramic substrate 1 is greater than the reflectance of the silver wiring layer 3, and thus A line 32 and a second line 33 are formed with notches 3212, 3312, so that the first board surface 11 of the ceramic substrate 1 can have more area exposed through the through holes 74 outside the ceramic reflector 7, thereby effectively enhancing the illumination. The light extraction rate of the diode package structure 1000.

請參閱圖5和圖6,所述極性辨識墊8、8’的厚度大致為10微米至20微米,並且極性辨識墊8、8’可以是數個黑色的玻璃膠墊或是金屬墊。上述極性辨識墊8、8’分別間隔地設置於陶瓷反射板7的第一表面71之四個角落上,並且各個極性辨識墊8、8’的轉角內緣係面向陶瓷反射板7的貫孔74。進一步地說,所述極性辨識墊8、8’包含有兩種不同的外型,並且上述極性辨識墊8、8’於本實施例中是大致呈L型,其中兩個極性辨識墊8的轉角內緣呈直角狀且位於第一線路32的上方,而另外兩個極性辨識墊8’的轉角內緣則呈圓弧狀且位於第二線路33的上方。 Referring to Figures 5 and 6, the polarity identification pads 8, 8' have a thickness of approximately 10 microns to 20 microns, and the polarity identification pads 8, 8' can be a plurality of black glass pads or metal pads. The polarity identification pads 8, 8' are respectively disposed at four corners of the first surface 71 of the ceramic reflector 7, and the inner edges of the corners of the respective polarity identification pads 8, 8' face the through holes of the ceramic reflector 7. 74. Further, the polarity identification pads 8, 8' comprise two different shapes, and the polarity identification pads 8, 8' are substantially L-shaped in the embodiment, wherein the two polarity identification pads 8 The inner edge of the corner is at a right angle and is located above the first line 32, and the inner edges of the corners of the other two polarity-recognizing pads 8' are arc-shaped and located above the second line 33.

藉此,透過分別在第一線路32與第二線路33上方設置有不同外型的極性辨識墊8、8’,以使上述極性辨識墊8、8’能夠提供發光二極體封裝結構1000極性辨識之用。 Thereby, different polarity identification pads 8, 8' are disposed above the first line 32 and the second line 33 respectively, so that the polarity identification pads 8, 8' can provide the polarity of the LED package structure 1000. For identification purposes.

以上即為本實施例晶片承載座100的構造說明,本實施例於下述將接著說明上述發光二極體晶片200、齊納二極體晶片300、及封裝膠體400相對於晶片承載座100的連接關係。 The above is the configuration of the wafer carrier 100 of the present embodiment. This embodiment will be described below to describe the LED array 200, the Zener diode 300, and the encapsulant 400 relative to the wafer carrier 100. Connection relationship.

請參閱圖3至圖5,所述發光二極體晶片200於本實施例中是水平式晶片,但發光二極體晶片200的類型不受限於此。舉例來說,發光二極體晶片200亦可以是垂直式晶片。進一步地說,所述發光二極體晶片200於本實施例中為水平式晶片,其發光波長 可以介於255奈米至410奈米,例如:波長介於UVA波段(315nm-400nm)的發光二極體晶片、波長介於UVB波段(280nm-315nm)的發光二極體晶片、或波長介於UVC波段(100nm-280nm)的發光二極體晶片。 Referring to FIG. 3 to FIG. 5, the LED wafer 200 is a horizontal wafer in this embodiment, but the type of the LED wafer 200 is not limited thereto. For example, the LED wafer 200 can also be a vertical wafer. Further, the light emitting diode chip 200 is a horizontal wafer in this embodiment, and its light emitting wavelength It can range from 255 nm to 410 nm, for example, a light-emitting diode wafer with a wavelength between the UVA band (315 nm and 400 nm), a light-emitting diode chip with a wavelength between the UVB band (280 nm and 315 nm), or a wavelength medium. A light-emitting diode wafer in the UVC band (100 nm - 280 nm).

所述發光二極體晶片200安裝於晶片承載座100的固晶面53上,並且發光二極體晶片200電性連接於線路層3。進一步地說,當發光二極體晶片200為水平式晶片時(如圖3),位於發光二極體晶片200頂面的極性相反電極將分別經由打線而電性連接於第一線路32的第一打線區3213以及第二線路33的第二打線區3313。若當所述發光二極體晶片200為垂直式晶片時(圖略),位於上述發光二極體晶片200底面的電極將經由金屬塊5而電性連接於上述第一線路32,位於發光二極體晶片200頂面的電極則將經由打線而電性連接於上述第二線路33的第二打線區3313。 The LED chip 200 is mounted on the die plane 53 of the wafer carrier 100, and the LED chip 200 is electrically connected to the circuit layer 3. Further, when the LED wafer 200 is a horizontal wafer (as shown in FIG. 3), the opposite polarity electrodes on the top surface of the LED array 200 are electrically connected to the first line 32 via wire bonding, respectively. The one-line area 3213 and the second line area 3313 of the second line 33. If the LED chip 200 is a vertical wafer (not shown), the electrode on the bottom surface of the LED substrate 200 is electrically connected to the first line 32 via the metal block 5, and is located in the second light. The electrode on the top surface of the polar body wafer 200 is electrically connected to the second wire bonding region 3313 of the second line 33 via a wire.

此外,所述發光二極體封裝結構1000可進一步包括有一固晶膠體(圖略),發光二極體晶片200則經由固晶膠體而黏固於晶片承載座100的固晶面53上。其中,本實施例中的固晶膠體成分為一奈米銀膏,上述奈米銀膏較佳為未包含有任何環氧樹脂,並且所述固晶膠體所包含的銀粒子大致為85%至90%的體積百分比,藉以具備有較佳的熱阻且不易黃化。進一步地說,於奈米銀膏中,粒徑小於20nm的銀奈米粒子之重量百分比為20~35%,而粒徑介於20~100nm的銀奈米粒子之重量百分比為40~50%;奈米銀膏所使用的黏合劑為环己醇异冰片(Isobornyl Cyclohexanol、IBCH),其重量百分比為2~7%;奈米銀膏所使用的溶劑為1-decanol(1-癸醇),其重量百分比為5~15%。所述奈米銀膏的化學式為:nAg-m(AgOOCR-1(AgOR),R=[CH3(CH2)x],並且l、m、n、x皆為正整數。 In addition, the LED package 1000 may further include a solid crystal colloid (not shown), and the LED wafer 200 is adhered to the die attach surface 53 of the wafer carrier 100 via a solid crystal colloid. Wherein, the solid crystal colloid component in the embodiment is a nano silver paste, the nano silver paste preferably does not contain any epoxy resin, and the solid crystal colloid comprises silver particles substantially 85% to 90% by volume, so as to have better thermal resistance and not easy to yellow. Further, in the nano silver paste, the weight percentage of the silver nanoparticles having a particle diameter of less than 20 nm is 20 to 35%, and the weight percentage of the silver nanoparticles having a particle diameter of 20 to 100 nm is 40 to 50%. The adhesive used in nano silver paste is Isobornyl Cyclohexanol (IBCH), which is 2~7% by weight; the solvent used for nano silver paste is 1-decanol (1-nonanol) , its weight percentage is 5~15%. The chemical formula of the nano silver paste is: nAg-m (AgOOCR-1 (AgOR), R = [CH 3 (CH 2 ) x], and l, m, n, x are all positive integers.

所述齊納二極體晶片300固定在上述自貫孔74而顯露於陶瓷反射板7之外的第一線路32之部分短側部322,亦即,齊納二極 體晶片300固定且電性連接於第一線路32的齊納二極體固晶區3221。並且,齊納二極體晶片300透過打線而電性連接於第二線路33的齊納二極體打線區3321。 The Zener diode 300 is fixed to the short side portion 322 of the first line 32 exposed from the through-hole 74 and exposed outside the ceramic reflector 7, that is, the Zener diode The body wafer 300 is fixed and electrically connected to the Zener diode solid crystal region 3221 of the first line 32. Further, the Zener diode 300 is electrically connected to the Zener diode wiring area 3321 of the second line 33 by wire bonding.

如圖3和圖9,所述封裝膠體400於本實施例中為縮合型態的矽膠,上述縮合型態的矽膠是指其主鏈鍵結皆為具有大致452kj/mol鍵結能的Si-O鍵結,並且封裝膠體400位於陶瓷反射板7的貫孔74內。進一步地說,陶瓷反射板7的貫孔74內布滿封裝膠體400,並且發光二極體晶片200與齊納二極體晶片300皆埋置於上述封裝膠體400內。而所述封裝膠體400的頂面大致與上述陶瓷反射板7的第一表面71呈共平面。 As shown in FIG. 3 and FIG. 9, the encapsulant 400 is a condensed colloidal gel in the present embodiment, and the condensed colloidal gel refers to a Si-bond having a bond energy of approximately 452 kj/mol. The O bond is formed, and the encapsulant 400 is located in the through hole 74 of the ceramic reflector 7. Further, the through hole 74 of the ceramic reflector 7 is covered with the encapsulant 400, and the LED array 200 and the Zener diode 300 are embedded in the encapsulant 400. The top surface of the encapsulant 400 is substantially coplanar with the first surface 71 of the ceramic reflector 7.

此外,本實施例的晶片承載座100可進一步設有一環型擋止層10(如圖11所示),上述環型擋止層10的材質於本實施例中為透明玻璃膠。所述環型擋止層10設置於陶瓷反射板7的第一表面71,並且環型擋止層10圍繞於陶瓷反射板7的貫孔74,以限制封裝膠體400於灌注作業中向外延伸。 In addition, the wafer carrier 100 of the present embodiment may further be provided with a ring-shaped stopper layer 10 (as shown in FIG. 11). The material of the ring-shaped barrier layer 10 is a transparent glass glue in this embodiment. The annular stop layer 10 is disposed on the first surface 71 of the ceramic reflector 7, and the annular stop layer 10 surrounds the through hole 74 of the ceramic reflector 7 to limit the outward extension of the encapsulant 400 during the infusion operation. .

[第二實施例] [Second embodiment]

請參閱圖12至圖17所示,其為本發明的第二實施例,本實施例與第一實施例類似,兩者相同處則不再贅述,而兩者的差異主要在於:本實施例的發光二極體封裝結構1000進一步包括有一蓋板500且未包括第一實施例中的封裝膠體400。而有關本實施例與第一實施例的具體差異說明如下:如圖12和圖13所示,所述蓋板500經該些玻璃膠墊8、8’而黏固於晶片承載座100的陶瓷反射板7上,並且蓋板500與陶瓷反射板7第一表面71之間透過上述玻璃膠墊8、8’之設置而形成有數個間隙G(如圖14和圖15),藉以使晶片承載座100的貫孔74內氣體經由上述間隙G而能與外部空氣流通。 Referring to FIG. 12 to FIG. 17 , which is a second embodiment of the present invention, the present embodiment is similar to the first embodiment, and the two are not described again, and the difference between the two is mainly in the following embodiment. The LED package 1000 further includes a cover 500 and does not include the encapsulant 400 in the first embodiment. The specific differences between the present embodiment and the first embodiment are as follows: as shown in FIG. 12 and FIG. 13 , the cover plate 500 is adhered to the ceramic of the wafer carrier 100 via the glass pads 8 , 8 ′. On the reflecting plate 7, and between the cover plate 500 and the first surface 71 of the ceramic reflecting plate 7, through the arrangement of the glass pads 8, 8', a plurality of gaps G (such as FIG. 14 and FIG. 15) are formed, thereby carrying the wafer. The gas in the through hole 74 of the seat 100 can flow through the gap G to the outside air.

其中,所述蓋板500可為光學級的透鏡,於本實施例中是以平板狀為例,但蓋板500的構造並不以此為限。舉例來說,所述 蓋板500亦可於其表面形成有鍍層(圖略),藉以提升光線穿透率;或者,蓋板500亦可形成半球狀之構造(圖略),藉以調整光線行進路線。舉例來說,當採用UVA波段的發光二極體晶片200時,發光二極體封裝結構1000可採用一平板狀的蓋板500,蓋板500的材料為玻璃或石英。當採用UVA或UVC波段的發光二極體晶片200時,發光二極體封裝結構1000可採用一平板狀的蓋板500,蓋板500的材料為玻璃或石英,並於蓋板500兩面加上鍍層。當採用UVC波段的發光二極體晶片200時,蓋板500可採用一半球狀的透鏡,透鏡的材料為玻璃或石英,透鏡表面也可以加上鍍層或不加上鍍層。 The cover plate 500 can be an optical-grade lens. In the embodiment, the flat plate is taken as an example, but the configuration of the cover plate 500 is not limited thereto. For example, the The cover plate 500 may also be formed with a plating layer (not shown) on the surface thereof to enhance the light transmittance; or the cover plate 500 may also form a hemispherical structure (not shown) to adjust the light travel path. For example, when the LED array 200 of the UVA band is used, the LED package 1000 can adopt a flat cover 500. The cover 500 is made of glass or quartz. When the LED assembly 200 of the UVA or UVC band is used, the LED package 1000 can adopt a flat cover 500. The cover 500 is made of glass or quartz and is added on both sides of the cover 500. Plating. When the LED package 200 of the UVC band is used, the cover plate 500 may adopt a semi-spherical lens, the material of the lens is glass or quartz, and the surface of the lens may be coated or not.

此外,本實施例的發光二極體封裝結構1000亦可有其他變化態樣;如圖16A至圖16C所示意,其以黏著膠體80(如:UV膠體)替代上述玻璃膠墊8、8’。所述陶瓷反射板7的第一表面71凹設有數個膠槽711,並且上述黏著膠體80填設於該些膠槽711並有至少部分突伸出膠槽。而所述發光二極體封裝結構1000進一步包括有數個間隔件600,上述間隔件600夾設於陶瓷反射板7的第一表面71與蓋板500之間,並且任一間隔件600位於兩相鄰的膠槽711之間。藉此,透過間隔件600之設置,以使陶瓷反射板7與蓋板500之間的間隙G能夠被控制在所需的範圍之中。其中,上述膠槽711可以形成如圖16B所示的單層凹槽或是如圖16C所示的雙層凹槽(即凹槽有階梯結構),在此不對膠槽711外型加以限制。 In addition, the LED package structure 1000 of the present embodiment may have other variations; as shown in FIG. 16A to FIG. 16C, the adhesive pad 80 (eg, UV colloid) is substituted for the glass pad 8, 8'. . The first surface 71 of the ceramic reflector 7 is recessed with a plurality of glue grooves 711, and the adhesive body 80 is filled in the glue grooves 711 and at least partially protrudes from the glue groove. The light emitting diode package structure 1000 further includes a plurality of spacers 600 sandwiched between the first surface 71 of the ceramic reflector 7 and the cover plate 500, and any spacer 600 is located in two phases. Between adjacent glue grooves 711. Thereby, the spacer G is disposed through the spacer 600 so that the gap G between the ceramic reflecting plate 7 and the cap plate 500 can be controlled within a desired range. The glue groove 711 can form a single-layer groove as shown in FIG. 16B or a double-layer groove as shown in FIG. 16C (ie, the groove has a stepped structure), and the shape of the glue groove 711 is not limited herein.

或者,本實施例的發光二極體封裝結構1000亦可變化為圖17所示之態樣。具體來說,當發光二極體封裝結構1000內的發光二極體晶片200為紫外線發光二極體晶片時,所述發光二極體封裝結構1000較佳為包括有一反射膜700,並且所述反射膜700呈方環狀並設置於蓋板500上且對應該些黏著膠體80的位置(即對應數個膠槽711的位置),而反射膜700的設置方式可以是經由塗佈方式成型於蓋板500上。藉此,紫外線發光二極體晶片所發出的 紫外光線在蓋板500內傳導移動時,上述反射膜700可有效地遮蔽黏著膠體80,以避免紫外光線照射於上述黏著膠體80,而產生黏著膠體80劣化之情事。 Alternatively, the LED package structure 1000 of the present embodiment may also be changed to the aspect shown in FIG. Specifically, when the LED package 200 in the LED package 1000 is an ultraviolet LED chip, the LED package 1000 preferably includes a reflective film 700, and the The reflective film 700 is formed in a square ring shape and disposed on the cover plate 500 corresponding to the positions of the adhesive bodies 80 (ie, corresponding to the positions of the plurality of glue grooves 711), and the reflective film 700 may be disposed by coating. On the cover plate 500. Thereby, the ultraviolet light emitting diode chip emits When the ultraviolet light is conductively moved in the cover 500, the reflective film 700 can effectively shield the adhesive colloid 80 to prevent the ultraviolet light from being irradiated onto the adhesive colloid 80, thereby causing deterioration of the adhesive colloid 80.

[第三實施例] [Third embodiment]

請參閱圖18至圖21所示,其為本發明的第三實施例,本實施例與第一實施例類似,兩者相同處則不再贅述,而兩者的差異主要在於:本實施例發光二極體封裝結構1000的晶片承載座100進一步具有一陶瓷夾層9,並且本實施例的焊墊層6構造不同於第一實施例的焊墊層6構造。而有關本實施例與第一實施例的具體差異說明如下: 所述陶瓷夾層9的厚度約為50微米至100微米,並且陶瓷夾層9位於陶瓷基板1的第二板面12與焊墊層6之間。其中,對應於陶瓷基板1各個穿孔15的陶瓷夾層9部位各形成有一穿孔91,並且位於陶瓷基板1穿孔15的該兩導電柱2分別延伸穿設於陶瓷夾層9的兩穿孔91。而所述金屬塊5的本體部51則連接於上述陶瓷夾層9。 Referring to FIG. 18 to FIG. 21, which is a third embodiment of the present invention, the present embodiment is similar to the first embodiment, and the two are not described again, and the difference between the two is mainly in the following embodiment. The wafer carrier 100 of the light emitting diode package structure 1000 further has a ceramic interlayer 9, and the pad layer 6 of the present embodiment has a different configuration than the pad layer 6 of the first embodiment. The specific differences between the embodiment and the first embodiment are as follows: The ceramic interlayer 9 has a thickness of about 50 micrometers to 100 micrometers, and the ceramic interlayer 9 is located between the second plate surface 12 of the ceramic substrate 1 and the pad layer 6. A plurality of through holes 91 are formed in each of the ceramic interlayers 9 corresponding to the respective through holes 15 of the ceramic substrate 1. The two conductive posts 2 located in the through holes 15 of the ceramic substrate 1 respectively extend through the two through holes 91 of the ceramic interlayer 9. The body portion 51 of the metal block 5 is connected to the ceramic interlayer 9.

所述焊墊層6設置於陶瓷夾層9,並且焊墊層6包含有長型的兩電極墊61,上述兩電極墊61彼此呈間隔地設置並且長度方向大致彼此平行。其中,所述兩電極墊61大致位於線路層3之兩長側部321、331的下方(如圖21),並且該兩電極墊61的末端部位611之部分端緣各呈1/4圓弧狀並分別切齊於所述缺角131的端緣,而位於缺角131的該些延伸線路4可分別連接或分離於上述焊墊層6的兩電極墊61的末端部位611。 The pad layer 6 is disposed on the ceramic interlayer 9, and the pad layer 6 includes an elongated two-electrode pad 61 which is disposed at intervals from each other and whose longitudinal directions are substantially parallel to each other. The two electrode pads 61 are located substantially below the long side portions 321 and 331 of the circuit layer 3 (as shown in FIG. 21 ), and the end edges of the end portions 611 of the two electrode pads 61 are each a quarter arc. The extension lines 4 at the notch angles 131 are respectively connected or separated from the end portions 611 of the two electrode pads 61 of the pad layer 6 respectively.

藉此,在該些延伸線路4分別連接於上述兩電極墊61的末端部位611的態樣中,該些電極墊61於焊接時,對應於各個電極墊61的焊料因受到內聚力的影響而傾向與可焊接材料相互鍵結,以使焊料沿著所述延伸線路4攀爬,進而有效地增加晶片承載座100的吃錫面積。 Therefore, in the case where the extension lines 4 are respectively connected to the end portions 611 of the two electrode pads 61, when the electrode pads 61 are soldered, the solder corresponding to the respective electrode pads 61 tends to be affected by the cohesive force. Bonding with the solderable material causes the solder to climb along the extension line 4, thereby effectively increasing the tin area of the wafer carrier 100.

再者,所述兩電極墊61分別覆蓋陶瓷夾層9上的兩穿孔91,並且上述兩導電柱2分別抵接於該兩電極墊61,藉以使該兩電極墊61分別經由所述兩導電柱2而電性連接於第一線路32與第二線路33。 In addition, the two electrode pads 61 respectively cover the two through holes 91 on the ceramic interlayer 9, and the two conductive posts 2 respectively abut against the two electrode pads 61, so that the two electrode pads 61 respectively pass through the two conductive columns 2 is electrically connected to the first line 32 and the second line 33.

[第四實施例] [Fourth embodiment]

請參閱圖22至圖24所示,其為本發明的第四實施例,本實施例與第二實施例類似,兩者相同處則不再贅述,而兩者的差異主要在於:本實施例發光二極體封裝結構1000的晶片承載座100進一步具有一陶瓷夾層9,並且本實施例的焊墊層6構造不同於第二實施例的焊墊層6構造。進一步地說,本實施例的陶瓷夾層9與焊墊層6大致如同第三實施例中的陶瓷夾層9與焊墊層6,在此則不加以贅述。 Referring to FIG. 22 to FIG. 24, which is a fourth embodiment of the present invention, the present embodiment is similar to the second embodiment, and the two are not described again, and the difference between the two is mainly in the following embodiment. The wafer carrier 100 of the light emitting diode package 1000 further has a ceramic interlayer 9, and the pad layer 6 of the present embodiment has a different configuration than the pad layer 6 of the second embodiment. Further, the ceramic interlayer 9 and the pad layer 6 of the present embodiment are substantially the same as the ceramic interlayer 9 and the pad layer 6 in the third embodiment, and will not be described herein.

[本發明實施例的可能效果] [Possible effects of the embodiments of the present invention]

綜上所述,本發明實施例所提供的發光二極體封裝結構可具有如下之效果:所述晶片承載座透過金屬塊的本體部凸出於容置孔,藉以避免曲面狀之固晶面產生。再者,金屬塊透過延伸部之設置,能有效地提升金屬塊所具備的固晶面積,進而適用於更多尺寸之發光二極體晶片。另,本實施例透過金屬塊的延伸部與第一線路電性連接,因而令金屬塊的固晶面能夠適用於水平式或垂直式之發光二極體晶片。 In summary, the LED package structure provided by the embodiment of the present invention can have the following effects: the wafer carrier protrudes from the body portion of the metal block to the receiving hole, thereby avoiding the curved solid surface. produce. Furthermore, the arrangement of the metal block through the extension portion can effectively increase the solid crystal area of the metal block, and is suitable for a larger size of the LED chip. In addition, in this embodiment, the extension portion of the metal block is electrically connected to the first line, so that the solid crystal surface of the metal block can be applied to the horizontal or vertical light-emitting diode wafer.

本發明在該些延伸線路分別連接於上述兩電極墊的末端部位的態樣中,該些電極墊於焊接時,對應於各個電極墊的焊料因受到內聚力的影響而傾向與可焊接材料相互鍵結,以使焊料沿著所述延伸線路攀爬,進而有效地增加晶片承載座的吃錫面積。 In the aspect in which the extension lines are respectively connected to the end portions of the two electrode pads, when the electrode pads are soldered, the solder corresponding to the respective electrode pads tends to bond with the solderable materials due to the cohesive force. The junction is such that the solder climbs along the extended line, thereby effectively increasing the tin area of the wafer carrier.

所述陶瓷基板與陶瓷反射板透過在角落處形成有缺角,藉以有效地避免角落產生崩裂之情事。再者,陶瓷基板的光反射率是大於線路層的光反射率,因而透過在上述第一線路與第二線路形 成有缺口,以使陶瓷基板的第一板面能夠有更多的面積經由貫孔而顯露於陶瓷反射板外,進而有效地提升發光二極體封裝結構的出光率。 The ceramic substrate and the ceramic reflector are formed with a corner at the corner, thereby effectively preventing the corner from being cracked. Furthermore, the light reflectance of the ceramic substrate is greater than the light reflectance of the wiring layer, and thus is transmitted through the first line and the second line shape. The gap is formed so that more area of the first surface of the ceramic substrate can be exposed outside the ceramic reflector through the through hole, thereby effectively improving the light extraction rate of the LED package structure.

透過分別在第一線路與第二線路上方設置有不同外型的極性辨識墊,以使上述極性辨識墊能夠提供發光二極體封裝結構極性辨識之用。再者,蓋板可經黏著膠體而黏固於晶片承載座的陶瓷反射板上,而上述蓋板與陶瓷反射板第一表面之間透過上述黏著膠體之設置而形成有數個間隙,藉以使晶片承載座的貫孔內氣體可經由上述間隙而能與外部空氣流通。另,本發明可透過在蓋板與陶瓷反射板第一表面之間設置間隔件,以使陶瓷反射板與蓋板之間的間隙能夠被控制在所需的範圍之中。 The polarity identification pads of different shapes are disposed above the first line and the second line respectively, so that the polarity identification pad can provide polarity identification of the LED package structure. Furthermore, the cover plate can be adhered to the ceramic reflector on the wafer carrier via the adhesive, and the gap between the cover and the first surface of the ceramic reflector is formed through the adhesive layer to form a plurality of gaps. The gas in the through hole of the carrier can be circulated to the outside air via the gap. Further, the present invention can provide a spacer between the cover plate and the first surface of the ceramic reflector so that the gap between the ceramic reflector and the cover can be controlled within a desired range.

當發光二極體封裝結構內的發光二極體晶片為紫外線發光二極體晶片時,紫外線發光二極體晶片所發出的紫外光線在蓋板內傳導移動時,蓋板與陶瓷反射板之間透過設有反射膜來遮蔽黏著膠體,藉以避免紫外光線照射於上述黏著膠體,而產生黏著膠體劣化之情事。 When the light emitting diode chip in the light emitting diode package structure is an ultraviolet light emitting diode chip, when the ultraviolet light emitted by the ultraviolet light emitting diode chip is conductively moved in the cover plate, between the cover plate and the ceramic reflecting plate The adhesive film is shielded by a reflective film to prevent ultraviolet light from being irradiated onto the adhesive colloid, thereby causing deterioration of the adhesive colloid.

本發明於陶瓷反射板的第一表面設有圍繞於陶瓷反射板貫孔的環型擋止層,藉以限制封裝膠體於灌注作業中向外延伸。 The first surface of the ceramic reflector is provided with a ring-shaped stop layer surrounding the through hole of the ceramic reflector, thereby limiting the outward extension of the encapsulant in the filling operation.

以上所述僅為本發明之較佳可行實施例,其並非用以侷限本發明之專利範圍,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the invention, and the equivalent variations and modifications of the scope of the invention are intended to be within the scope of the invention.

1‧‧‧陶瓷基板 1‧‧‧ceramic substrate

11‧‧‧第一板面 11‧‧‧ first board

14‧‧‧容置孔 14‧‧‧ accommodating holes

3‧‧‧線路層 3‧‧‧Line layer

32‧‧‧第一線路 32‧‧‧First line

321‧‧‧長側部 321‧‧‧Long side

5‧‧‧金屬塊 5‧‧‧metal block

51‧‧‧本體部 51‧‧‧ Body Department

511‧‧‧凸出塊 511‧‧‧ protruding block

52‧‧‧延伸部 52‧‧‧Extension

521‧‧‧第一延伸部 521‧‧‧First Extension

522‧‧‧第二延伸部 522‧‧‧Second extension

53‧‧‧固晶面 53‧‧‧Solid surface

200‧‧‧發光二極體晶片 200‧‧‧Light Diode Wafer

400‧‧‧封裝膠體 400‧‧‧Package colloid

H‧‧‧高度 H‧‧‧ Height

Claims (12)

一種發光二極體封裝結構,包括:一晶片承載座,包含:一陶瓷基板,其具有一第一板面、位於該第一板面相反側的一第二板面、及位於該第一板面與該第二板面之間的一外側面;其中,該陶瓷基板形成有貫穿該第一板面與該第二板面的一容置孔;一線路層,其設置於該陶瓷基板的該第一板面;一金屬塊,包含:一本體部,其設置於該陶瓷基板的該容置孔,該本體部的凸伸出該第一板面大致10微米至30微米;其中,凸伸出該第一板面的該本體部區塊定義為一凸出塊;及一延伸部,其相連於該凸出塊的外緣,並且該延伸部表面以及該凸出塊表面大致呈共平面並共同定義為一固晶面;其中,該延伸部包含一第一延伸部及設置在該第一延伸部上的一第二延伸部,該第一延伸部與該第二延伸部呈環型並圍繞該本體部的該凸出塊;及一陶瓷反射板,其具有一第一表面、位於該第一表面相反側的一第二表面、及位於該第一表面與該第二表面之間的一側表面;其中,該陶瓷反射板設置於該陶瓷基板上並覆蓋部分的該線路層,並且該陶瓷反射板形成有貫穿該第一表面與該第二表面的一貫孔,該金屬塊的該固晶面經由該貫孔而顯露於該陶瓷反射板之外;以及一發光二極體晶片,其設置於該晶片承載座的該固晶面上,並且該發光二極體晶片電性連接於該線路層。 A light emitting diode package structure comprising: a wafer carrier, comprising: a ceramic substrate having a first plate surface, a second plate surface on the opposite side of the first plate surface, and the first plate An outer side surface between the surface and the second plate surface; wherein the ceramic substrate is formed with a receiving hole penetrating the first plate surface and the second plate surface; a circuit layer disposed on the ceramic substrate The first plate surface; a metal block, comprising: a body portion disposed on the receiving hole of the ceramic substrate, the body portion protruding from the first plate surface by about 10 micrometers to 30 micrometers; wherein, the convex portion The body portion extending from the first plate surface is defined as a protruding block; and an extending portion is coupled to the outer edge of the protruding block, and the surface of the extending portion and the surface of the protruding block are substantially Plane and collectively defined as a solid crystal surface; wherein the extension portion includes a first extension portion and a second extension portion disposed on the first extension portion, the first extension portion and the second extension portion are looped And the convex block surrounding the body portion; and a ceramic reflector having a first a surface, a second surface on the opposite side of the first surface, and a side surface between the first surface and the second surface; wherein the ceramic reflector is disposed on the ceramic substrate and covers a portion a circuit layer, and the ceramic reflector is formed with a continuous hole penetrating the first surface and the second surface, the solid crystal surface of the metal block is exposed outside the ceramic reflector through the through hole; and a light is emitted The diode chip is disposed on the solid crystal surface of the wafer carrier, and the LED chip is electrically connected to the circuit layer. 如請求項1所述之發光二極體封裝結構,其中,該線路層具有一第一線路及一第二線路,該第一線路與該第一延伸部相接,且該第一線路與該第一延伸部共平面,而該第二線路分離於該 延伸部與該第一線路。 The light emitting diode package structure of claim 1, wherein the circuit layer has a first line and a second line, the first line is in contact with the first extension, and the first line is The first extension is coplanar and the second line is separated from the An extension and the first line. 如請求項2所述之發光二極體封裝結構,其中,該第一線路與該第二線路皆大致呈L型且各包含有垂直相連的一長側部與一短側部,該第一線路的該長側部與該第二線路的該長側部分別位於該固晶面的相反兩側且彼此平行,該第一線路的該短側部與該第二線路的該短側部位於該固晶面的一側且彼此相向。 The light emitting diode package structure of claim 2, wherein the first line and the second line are both substantially L-shaped and each comprises a long side portion and a short side portion vertically connected, the first The long side portion of the line and the long side portion of the second line are respectively located on opposite sides of the fixed crystal plane and are parallel to each other, and the short side portion of the first line is located at the short side portion of the second line The solid crystal faces are on one side and face each other. 如請求項3所述之發光二極體封裝結構,其中,該第一線路的該長側部與該第二線路的該長側部各於鄰接其短側部的內緣處,凹設形成有一缺口。 The LED package structure of claim 3, wherein the long side portion of the first line and the long side portion of the second line are adjacent to an inner edge of the short side portion thereof, and are recessed There is a gap. 如請求項3所述之發光二極體封裝結構,其進一步包括有一齊納二極體晶片,該齊納二極體晶片固定在自該貫孔而顯露於該陶瓷反射板外的該第一線路之短側部。 The light emitting diode package structure of claim 3, further comprising a Zener diode wafer fixed to the first surface of the Zener diode wafer exposed from the through hole The short side of the line. 如請求項1所述之發光二極體封裝結構,其中,該陶瓷基板與該陶瓷反射板皆大致為多邊形構造,該陶瓷基板的該外側面切齊於該陶瓷反射板的該側表面,並且該陶瓷基板的該外側面及該陶瓷反射板的該側表面於其各個角落處形成有一圓弧狀之缺角,該晶片承載座具有數個延伸線路,該些延伸線路分別形成於該陶瓷基板之該外側面的該些缺角,並且該些延伸線路連接於該線路層;該晶片承載座具有一焊墊層,並且該焊墊層設置於該陶瓷基板的該第二板面,而該些延伸線路連接或分離於該焊墊層。 The light emitting diode package structure of claim 1, wherein the ceramic substrate and the ceramic reflector are both substantially polygonal in shape, the outer side of the ceramic substrate being aligned with the side surface of the ceramic reflector, and The outer side surface of the ceramic substrate and the side surface of the ceramic reflector are formed with arc-shaped corners at respective corners thereof, and the wafer carrier has a plurality of extension lines, and the extension lines are respectively formed on the ceramic substrate The corners of the outer side surface, and the extension lines are connected to the circuit layer; the wafer carrier has a pad layer, and the pad layer is disposed on the second board surface of the ceramic substrate, and the The extension lines are connected or separated from the pad layer. 如請求項1所述之發光二極體封裝結構,其中,該晶片承載座具有一焊墊層,並且該焊墊層設置於該陶瓷基板的該第二板面,而該金屬塊的該本體部連接於該焊墊層。 The light emitting diode package structure of claim 1, wherein the wafer carrier has a pad layer, and the pad layer is disposed on the second plate surface of the ceramic substrate, and the body of the metal block The portion is connected to the pad layer. 如請求項1所述之發光二極體封裝結構,其中,該晶片承載座具有數個極性辨識墊,並且該些極性辨識墊包含有兩種不同的外型,而該些極性辨識墊間隔地設置於該陶瓷反射板的該第一表面上。 The light emitting diode package structure of claim 1, wherein the wafer carrier has a plurality of polarity identification pads, and the polarity identification pads comprise two different shapes, and the polarity identification pads are spaced apart And disposed on the first surface of the ceramic reflector. 一種發光二極體封裝結構,包括:一晶片承載座,包含:一陶瓷基板,其具有一第一板面、位於該第一板面相反側的一第二板面、及位於該第一板面與該第二板面之間的一外側面;其中,該陶瓷基板形成有貫穿該第一板面與該第二板面的一容置孔;一線路層,其設置於該陶瓷基板的該第一板面;一金屬塊,包含:一本體部,其設置於該陶瓷基板的該容置孔,該本體部的凸伸出該第一板面大致10微米至30微米;其中,凸伸出該第一板面的該本體部區塊定義為一凸出塊;及一延伸部,其相連於該凸出塊的外緣,並且該延伸部表面以及該凸出塊表面大致呈共平面並共同定義為一固晶面;及一陶瓷反射板,其具有一第一表面、位於該第一表面相反側的一第二表面、及位於該第一表面與該第二表面之間的一側表面;其中,該陶瓷反射板設置於該陶瓷基板上並覆蓋部分的該線路層,並且該陶瓷反射板形成有貫穿該第一表面與該第二表面的一貫孔,該金屬塊的該固晶面經由該貫孔而顯露於該陶瓷反射板之外;一發光二極體晶片,其設置於該晶片承載座的該固晶面上,並且該發光二極體晶片電性連接於該線路層;以及一蓋板與數個黏著膠體,該蓋板經由該些黏著膠體而黏固於該陶瓷反射板的該第一表面上,該陶瓷反射板的該第一表面凹設有數個膠槽,並且該些黏著膠體填設於該些膠槽並有至少部分突伸出該些膠槽。 A light emitting diode package structure comprising: a wafer carrier, comprising: a ceramic substrate having a first plate surface, a second plate surface on the opposite side of the first plate surface, and the first plate An outer side surface between the surface and the second plate surface; wherein the ceramic substrate is formed with a receiving hole penetrating the first plate surface and the second plate surface; a circuit layer disposed on the ceramic substrate The first plate surface; a metal block, comprising: a body portion disposed on the receiving hole of the ceramic substrate, the body portion protruding from the first plate surface by about 10 micrometers to 30 micrometers; wherein, the convex portion The body portion extending from the first plate surface is defined as a protruding block; and an extending portion is coupled to the outer edge of the protruding block, and the surface of the extending portion and the surface of the protruding block are substantially Plane and collectively defined as a solid crystal surface; and a ceramic reflector having a first surface, a second surface on the opposite side of the first surface, and between the first surface and the second surface a side surface; wherein the ceramic reflector is disposed on the ceramic substrate and covered Covering the circuit layer of the portion, and the ceramic reflector is formed with a continuous hole penetrating the first surface and the second surface, the solid crystal surface of the metal block being exposed outside the ceramic reflector through the through hole; a light-emitting diode chip disposed on the solid crystal surface of the wafer carrier, and the light-emitting diode chip is electrically connected to the circuit layer; and a cover plate and a plurality of adhesive bodies, the cover plate via Adhesively adhered to the first surface of the ceramic reflector, the first surface of the ceramic reflector is recessed with a plurality of glue grooves, and the adhesive gels are filled in the glue grooves and have at least The protrusions protrude from the glue grooves. 如請求項9所述之發光二極體封裝結構,其進一步包括有數個間隔件,該些間隔件夾設於該陶瓷反射板的該第一表面以及該 蓋板之間,並且任一間隔件大致位於兩相鄰的該膠槽之間。 The light emitting diode package structure of claim 9, further comprising a plurality of spacers, the spacers being sandwiched on the first surface of the ceramic reflector and the Between the cover plates, and any spacer is located substantially between the two adjacent glue grooves. 如請求項9所述之發光二極體封裝結構,其進一步包括有一固晶膠體,該發光二極體晶片經由該固晶膠體而黏固於該晶片承載座的該固晶面上,並且該固晶膠體為一奈米銀膏,該奈米銀膏未包含有任何環氧樹脂。 The light emitting diode package structure of claim 9, further comprising a solid crystal colloid, the light emitting diode chip being adhered to the solid crystal surface of the wafer carrier via the solid crystal colloid, and The solid crystal colloid is a nano silver paste, and the nano silver paste does not contain any epoxy resin. 一種晶片承載座,包括:一陶瓷基板,其具有位於一第一板面、位於該第一板面相反側的一第二板面、及位於該第一板面與該第二板面之間的一外側面;其中,該陶瓷基板形成有貫穿該第一板面與該第二板面的一容置孔;一線路層,其設置於該陶瓷基板的該第一板面;一金屬塊,包含:一本體部,其設置於該陶瓷基板的該容置孔,該本體部凸伸出該第一板面大致10微米至30微米;其中,凸伸出該第一板面的該本體部區塊定義為一凸出塊;及一延伸部,其相連於該凸出塊的外緣,並且該延伸部表面與該凸出塊表面大致呈共平面並定義為一固晶面;其中,該延伸部包含一第一延伸部及設置在該第一延伸部上的一第二延伸部,該第一延伸部與該第二延伸部呈環型並圍繞該本體部的該凸出塊;以及一陶瓷反射板,其具有一第一表面、位於該第一表面相反側的一第二表面、及位於該第一表面與該第二表面之間的一側表面;其中,該陶瓷反射板設置於該陶瓷基板上並覆蓋部分的該線路層,並且該陶瓷反射板形成有貫穿該第一表面與該第二表面的一貫孔,該金屬塊的該固晶面經由該貫孔而顯露於該陶瓷反射板之外。 A wafer carrier includes: a ceramic substrate having a second plate surface on a first plate surface opposite to the first plate surface, and between the first plate surface and the second plate surface An outer side surface; wherein the ceramic substrate is formed with a receiving hole penetrating the first plate surface and the second plate surface; a circuit layer disposed on the first plate surface of the ceramic substrate; a metal block The body includes: a body portion disposed on the receiving hole of the ceramic substrate, the body portion protruding from the first plate surface by about 10 micrometers to 30 micrometers; wherein the body protruding from the first panel surface The block is defined as a protrusion; and an extension is connected to the outer edge of the protrusion, and the surface of the extension is substantially coplanar with the surface of the protrusion and is defined as a solid surface; The extension portion includes a first extension portion and a second extension portion disposed on the first extension portion, the first extension portion and the second extension portion are annular and surround the protruding portion of the body portion And a ceramic reflector having a first surface on the opposite side of the first surface a second surface, and a side surface between the first surface and the second surface; wherein the ceramic reflective plate is disposed on the ceramic substrate and covers a portion of the circuit layer, and the ceramic reflective plate is formed with Through the through hole of the first surface and the second surface, the solid crystal surface of the metal block is exposed outside the ceramic reflector through the through hole.
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Citations (4)

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US20030116769A1 (en) * 2001-12-24 2003-06-26 Samsung Electro-Mechanics Co., Ltd. Light emission diode package
US20080019133A1 (en) * 2005-07-15 2008-01-24 Korea Photonics Technology Institute High power light-emitting diode package comprising substrate having beacon
CN102194975A (en) * 2010-03-12 2011-09-21 松下电器产业株式会社 Optical semiconductor package and optical semiconductor device
CN102646779A (en) * 2012-04-20 2012-08-22 华南师范大学 Ceramic-based power type light-emitting diode and packaging method thereof

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US20030116769A1 (en) * 2001-12-24 2003-06-26 Samsung Electro-Mechanics Co., Ltd. Light emission diode package
US20080019133A1 (en) * 2005-07-15 2008-01-24 Korea Photonics Technology Institute High power light-emitting diode package comprising substrate having beacon
CN102194975A (en) * 2010-03-12 2011-09-21 松下电器产业株式会社 Optical semiconductor package and optical semiconductor device
CN102646779A (en) * 2012-04-20 2012-08-22 华南师范大学 Ceramic-based power type light-emitting diode and packaging method thereof

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