TWI567740B - Variable resistance type insulation layer having a composite material matching and its application in microelectronic component - Google Patents

Description

Variable resistance insulating layer with composite ratio and application of microelectronic components

The invention relates to a variable resistance insulating layer with a composite ratio and a microelectronic component application thereof, and particularly to a resistive memory structure (RRAM).

In the field of microelectronic components, non-volatile memory can save data when there is no current. Currently, the most widely used is NAND flash memory, but it has the disadvantages of high operating voltage, slow operation speed and low durability. And in the trend that the components are constantly shrinking, the reliability of the reliability is lowered because the gate oxide layer is thinned and the leakage current is increased. Resistive memory components have been proposed as a non-volatile memory of recent generations because resistive memory components have a simple structure, low operating voltage, fast operation time, multi-bit memory, excellent durability, and memory components. The advantages of area reduction, etc., in which a variety of known insulating layer materials have been developed in the metal-insulator-metal (MIM) structure of the resistive memory element, including polymer materials, perovskites, binary oxides and ternary An oxide or the like, wherein the binary oxide is specifically one of zinc oxide (ZnO), nickel oxide (NiO), titanium oxide (TiO ₂ ) or cerium oxide (SiO ₂ ), which are all formed by a thin film process such as physical vapor deposition. It is formed, so the manufacturing cost is high.

National Invention Patent No. I473209 discloses a A method of manufacturing a resistive memory device, wherein a substrate is placed in a sputtering chamber, the sputtering chamber includes at least a copper target and a cerium oxide target, or a mixture of copper and cerium oxide. a composite target having a lower electrode formed on the substrate; a sputtering process is performed by using the target material to deposit a copper-doped ceria mixed film layer on the surface of the lower electrode to serve as a resistive memory The variable resistance film layer, wherein the mixed film layer has a molar percentage of Cu/(Cu+Si) of 1% to 15%. An upper electrode is formed on the variable resistance film layer.

In order to solve the above problems, the main object of the present invention is to provide a variable resistance insulating layer with a composite material ratio and a microelectronic component application thereof. In addition to a resistive memory structure (RRAM), a composite material can also be used as a composite material. The electric layer and the passivation layer are applied in a transistor and can be made of a sol gel, and have the advantages of low film formation temperature and low manufacturing cost, and can be applied to a flexible device.

The object of the present invention and solving the technical problems thereof are achieved by the following technical solutions. A microelectronic component having a variable resistance insulating layer includes a substrate and a metal-insul The insulating layer of the metal structure is a sol-gel film-forming layer composed of an inorganic composite material having bipolar resistance conversion characteristics under positive and negative bias operation, and the metal-insulating layer- The metal structure exhibits a current switching ratio of more than one thousand in the operating voltage between -6 and 6 volts.

The object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures.

In the aforementioned microelectronic component, the composition of the sol-gel film-forming layer comprises magnesium titanate (MgTiO ₃ ) and calcium titanate (CaTiO ₃ ), wherein the molar volume ratio of magnesium titanate to calcium titanate is specific The ground is between 1:9 and 9:1.

In the aforementioned microelectronic component, the composition of the sol-gel film-forming layer comprises magnesium titanate and calcium titanate, wherein the molar volume ratio of magnesium titanate to calcium titanate is specifically between 3:7 and 7. Between 3 and the above current switch ratio is between 10,000 and 1 million.

In the aforementioned microelectronic device, wherein the composition of the sol-gel film-forming layer comprises magnesium titanate and calcium titanate, wherein a molar volume ratio of magnesium titanate to calcium titanate is equal, and the current switching ratio is Specifically, it is above the fifth power of ten.

In the aforementioned microelectronic device, the thickness of the sol-gel film-forming layer is specifically between 30 nm and 100 nm.

In the aforementioned microelectronic device, the thickness of the sol-gel film-forming layer is specifically between 50 nm and 70 nm.

In the aforementioned microelectronic element, wherein the sol-gel film-forming layer specifically has a characteristic of an operating temperature of between 20 and 85 degrees Celsius.

In the aforementioned microelectronic device, the sol-gel film-forming layer specifically has a characteristic of a high-resistance current of not more than 2.42 × 10 ^-7 amps.

In the aforementioned microelectronic component, the uncyr biasing operation of the sol-gel filming layer is specifically a voltage greater than plus 1.95 volts and less than minus 0.65 volts.

In the aforementioned microelectronic device, the sol-gel film-forming layer exhibits a bipolar resistance conversion characteristic, specifically a positive-negative bias operation between -6 and 6 volts, which may be in an electrically-on state. The on-state operating voltage does not overlap with the operating voltage in the off-state.

10‧‧‧Microelectronic components

11‧‧‧Substrate

20‧‧‧Metal-insulation-metal structure

21‧‧‧Solid gel film layer

22‧‧‧Upper conductive layer

23‧‧‧Under conductive layer

Figure 1: According to one embodiment of the present invention, a variable power A partial perspective view of a microelectronic component of a resistive insulating layer.

2 is a diagram showing the corresponding characteristics of the voltage and current of the MIM structure (MCTO) of the microelectronic component according to an embodiment of the present invention, wherein MTO (magnesium titanate MIM structure) and CTO (calcium titanate) MIM structure) is a control group.

FIG. 3 is a diagram showing electrical characteristics data of a MIM structure (MCTO) of the microelectronic component according to an embodiment of the present invention, wherein MTO (magnesium titanate MIM structure) and CTO (calcium titanate MIM structure) are In the control group, M10~M90 was the experimental group with a gradual increase in the percentage of magnesium titanate.

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. The components and combinations related to this case, the components shown in the figure are not drawn in proportion to the actual number, shape and size of the actual implementation. Some size ratios are proportional to other related sizes or have been exaggerated or simplified to provide clearer description of. The actual number, shape and size ratio of the implementation is an optional design, and the detailed component layout may be more complicated.

In accordance with an embodiment of the present invention, a microelectronic component 10 having a variable resistance insulating layer is illustrated in a partial perspective view of FIG. The microelectronic component 10 includes a substrate 11 and a metal-insulating layer-metal structure 20 (MIM) on the substrate 11. The substrate 11 can be a glass, such as a germanium semiconductor material or a flexible film.

As shown in FIG. 1 , the metal-insulating layer-metal structure 20 further includes an upper conductive layer 22 and a lower conductive layer 23, wherein the upper conductive layer 22 may be made of a metal such as aluminum (Al). Lower conductive layer 23 It may be a transparent conductive film such as Indium Tin Oxide (ITO). And the sol-gel film-forming layer 21 is interposed between the upper conductive layer 22 and the lower conductive layer 23. In addition, the shape of the upper conductive layer 22 can be a plurality of patterned spacers, such as rectangular pads, which can be connected to the circuit. The shape of the lower conductive layer 23 may be a one-piece type, and the formation position and area of the sol-gel film-forming layer 21 may be the same or slightly larger, or may be a line type. The barrier height between the upper conductive layer 22 and the lower conductive layer 23 depends on the thickness of the sol-gel film-forming layer 21. The sol-gel film-forming layer 21 can exhibit a high-resistance state and a low-resistance state, and the sol-gel film-forming layer 21 has a high dielectric property in a high-resistance state, and can effectively reduce the upper conductive layer. Leakage current between 22 and the lower conductive layer 23.

The insulating layer of the metal-insulating layer-metal structure 20 is a sol-gel film forming layer 21 composed of an inorganic composite material. The sol-gel film-forming layer 21 has bipolar resistance conversion characteristics under positive and negative bias operation, and the metal-insulating layer-metal structure 20 exhibits a ratio of one thousand in an operating voltage between -6 and 6 volts. The current switching ratio above. The composition of the sol-gel film-forming layer 21 comprises magnesium titanate (MgTiO3) and calcium titanate (CaTiO3), wherein the molar ratio of magnesium titanate to calcium titanate is between 1:9 and 9:1. between. The sol-gel film-forming layer 21 has a band gap which can be formed at a low temperature by a sol-gel method, and has a high-resistance current value lower than a single inorganic material layer, and can be between 10 ^-4 and 5 x 10 ^-8 amps. Preferably, the thickness of the sol-gel film-forming layer 21 is between 30 nm and 100 nm. More preferably, the thickness of the sol-gel film-forming layer 21 is between 50 nm and 70 nm.

More specifically, the molar volume ratio of magnesium titanate to calcium titanate is between 3:7 and 7:3, and the current switching ratio is between 10,000 and 1 million. In a preferred embodiment, the composition of the sol-gel film-forming layer 21 comprises magnesium titanate and calcium titanate, wherein the molar ratio of magnesium titanate to calcium titanate is equal (the test chart and the value can be See the pictures in Figures 2 and 3 MCTO or M50), and the above current switching ratio is above the fifth power of ten (>105). The high configuration current value of the sol-gel film-forming layer 21 can be reduced to approximately 5 x 10-8 amps.

FIG. 2 is a diagram showing the MIM structure of the microelectronic component 10 showing the corresponding characteristics of the voltage and current of the MIM structure (MCTO) of the microelectronic component, wherein MTO (magnesium titanate MIM structure) and CTO (calcium titanate) MIM structure) is a control group. Figure 3 is a graph showing the electrical characteristics of the MIM structure (MCTO) of the microelectronic device, wherein MTO (magnesium titanate MIM structure) and CTO (calcium titanate MIM structure) are used as a control group, and M10 to M90 are magnesium titanate. A trial group with a gradual increase in percentage. The present invention prepares the following control group and test group by the sol-gel method. There are two in the control group. When the insulating layer of the metal-insulating layer-metal structure is composed of a single inorganic material of calcium titanate, the sample code is marked as CTO; when it is composed of a single inorganic material of magnesium titanate, the sample code is Marked as MTO. There are five test groups. When the molar ratio of magnesium titanate to calcium titanate is 1:9, the sample code is labeled as M10; when the molar ratio of magnesium titanate to calcium titanate is 30:70, The sample code is labeled as M30; when the molar ratio of magnesium titanate to calcium titanate is 50:50, the sample code is labeled MCTO (or M50, which is the preferred embodiment); when magnesium titanate and calcium titanate are used When the molar volume ratio is 70:30, the sample code is labeled as M70; when the molar ratio of magnesium titanate to calcium titanate is 90:10, the sample code is labeled M90. The off-bias operation of the sol-gel film-forming layer 21 is such that the voltage is greater than plus 1.95 volts and less than minus 0.65 volts, that is, the set voltage (Vset) in FIGS. 2 and 3 is less than -0.65V. At this time, the sol-gel film-forming layer 21 can be jumped from a high-resistance state to a low-resistance state (changes from path 2 to path 3 in FIG. 2), and the upper and lower conductive layers exhibit an ON state in which current can pass; When the reset voltage (Vreset) is a positive bias voltage greater than +1.95V, the sol-gel film-forming layer 21 can be lowered from a low-resistance state to a high-resistance state (a change from path 4 to path 1 in FIG. 2). The upper and lower conductive layers behave as OFF (OFF) shapes that are not available for current to pass through. State, both states can be repeatable operations.

As shown in Figures 2 and 3, when the sample code is labeled MCTO, the best current switching ratio (>10 ⁵ , ie, more than 100,000), that is, high resistance state current (HRS current), can be exhibited. For the lowest, the larger the on/off current ratio, the more the power consumption of the non-volatile memory components is reduced. The current switching ratio is calculated as the low resistance state current value divided by the high resistance state current value. In Fig. 3, the high-resistance current value of MCTO in the best experimental group was 5.16×10 ^-8 amps, and the high-resistance current value of MTO in the control group was 1.38×10 ^-4 amps, and the high-resistance state of CTO in the control group. The current value is 4.32 x 10 ^-6 amps. It can be seen from the test results of FIGS. 2 and 3 that the decrease in the current value of the high resistance state can be adjusted by the band offset. As shown in Fig. 2, the MTO of the control group and the CTO of the best example test group have substantially the same low-resistance current (ie, the test data of path 3 and path 4 in Fig. 2); The CTO, the best case test group MCTO has a high-resistance current that is outstanding and unexpectedly expected to exhibit a significant decrease (ie, test data for path 1 and path 2 in Figure 2). In particular, as shown in Fig. 3, in the MCTO and M70 of the test group, the sol-gel film-forming layer 21 has a characteristic of a high-resistance current of not more than 2.42 × 10 ^-7 amps. Further, the sol-gel film-forming layer 21 has a characteristic that the operating temperature is between 20 and 85 degrees Celsius.

In Fig. 2, the sol-gel film-forming layer 21 exhibits a bipolar resistance conversion characteristic of a positive-negative bias operation between -6 and 6 volts, which may be in an electrically-on state (on- The operating voltage of the state does not overlap with the operating voltage of the off-state. For example, as shown in FIG. 2, in the best example test group MCTO, the on-state operating voltage of the sol-gel film-forming layer 21 is about -5.5V to +2.4V. The working voltage of the off-state of the sol-gel film-forming layer 21 is about -0.75V~+5.5V, which is not overlapped by the two. It can be determined that the set voltage (Vset) of the MCTO of the best example test group in Fig. 3 is -0.75V, and the reset voltage (Vreset) is +2.4V.

Therefore, the present invention provides a microelectronic component having a variable resistance insulating layer. In addition to being applied to a resistive memory structure, the composite material can also be used as a dielectric layer and a passivation layer in a transistor, and a sol gel can be utilized. The method has the advantages of low film formation temperature and low manufacturing cost, and can be applied to a flexible device. The sol-gel film-forming layer 21 has excellent device stability and low power consumption in addition to a good ON/OFF current ratio, and is particularly suitable for resistive random access memory (RRAM). Application. In special applications, the sol-gel film layer can also be used as a carrier layer for circuit or integrated circuits. Under repetitive bias operation, the high-impedance state can exhibit normal line performance, and the low configuration can make electricity. Sexual failure to hide its electrical function.

In addition, in more experimental investigations, the band gaps of the CTO and MTO of the control group were 2 eV and 5.5 eV, respectively. The conductive band (Ec) and the valence band (Ev) of the CTO of the control group were about 2 eV and 0 eV, respectively; the conductive band and the valence band of the MTO of the control group were about 1 eV and -4.8 eV, respectively. The sol-gel film-forming layer 21 of the present invention can obtain a smaller high-configuration current value because the sol-gel film-forming layer 21 is formed by a sol-gel method, and the inorganic composite material can be controlled in a low-temperature process. ratio and homogenized, for example, the mixing process in any ratio calcium titanate (CaTiO ₃₎ with a solution of magnesium titanate (MgTiO ₃₎ solution to obtain a suitable band offset (band offset). In the present embodiment, the sol-gel film-forming layer 21 is a magnesium titanate-calcium titanate (MgTiO3-CaTiO3) inorganic composite layer which is composed of a one-to-one mixture by a sol-gel method (ie, the best in the present invention). The test group MCTO) can control its band gap without high temperature baking. Further, a good filament effect was found in the current switching mechanism of the sol-gel film-forming layer 21.

The method of preparing the sol-gel film-forming layer 21 of the preferred embodiment MCTO will be further described below. Take 0.5M calcium titanate (CaTiO ₃₎ with a solution of magnesium titanate (MgTiO ₃₎ solution, for the synthesis of sol-gel method. The preparation of the calcium titanate solution is prepared by mixing deionized water, calcium acetate, ethylene glycol monomethyl ether, titanium isopropoxide and 2,4-pentanedione; the preparation of the magnesium titanate solution is mixed. The glacial acetic acid, magnesium acetate, ethylene glycol monomethyl ether, titanium isopropoxide, and 2,4-pentanedione are uniformly stirred. The calcium titanate-magnesium titanate mixture can be obtained by mixing the above calcium titanate solution with a magnesium titanate solution. The spin coating operation was performed at 8000 rpm using a spin coater which was formed on the substrate 11 having the lower conductive layer 23 by spin-coating. The substrate 11 having the lower conductive layer 23 may be a glass substrate having indium tin oxide (ITO). Next, it was baked at 100 degrees Celsius for 15 minutes to form a film-form sol-gel film-forming layer 21. Finally, an upper conductive layer 22 is formed on the sol-gel film-forming layer 21. The upper conductive layer 22 of the MIM structure may be a patterned thin aluminum layer having a thickness of 80 nm, using a shadow mask, and the upper conductive layer 22 in each pattern may have an area of 3 mm ² for power supply measurement. . The Agilent HP4156 Semiconductor Parameter Analyzer can be used for equipment that performs electrical measurements. In addition, the sol-gel film-forming layer 21 has a carbon signal by XPS analysis, so the sol-gel film-forming layer of the present invention can be composed of an inorganic composite material composition, a carbon residue, and a liquid coating (eg, spin coating) process. Infer it.

The AFM test of the sol-gel film formation layer was carried out by the CTO and MTO of the comparison group and the MCTO of the best test group. The root mean square roughness (Rrms) was 4.3 in the CTO and MTO of the comparison group, respectively. Nm and 2.5 nm; the best example test group MCTO is 2.1 nm. In order to more accurately compare the excellent electrical properties of the MCTO in the best case test group, the thickness of the CTO and MTO of the comparison group and the MCTO of the best case test group should be controlled at 60 nm to reduce the resistive memory insulation layer. Thickness effect. In addition, the best example test group MCTO sol gel film formation layer can be The elemental composition was analyzed using XPS spectrum. The elemental concentration ratios of oxygen (O), titanium (Ti), calcium (Ca), and magnesium (Mg) were 50%, 22.5%, 17%, and 10.5%, respectively.

As described above, the best example test group MCTO has the largest ON/OFF current ratio with respect to the comparison group CTO and the comparison group MTO, because the high resistance current is lowered, and the evaluation is optimal. The experimental group MCTO has an optimized performance of the band structure, which is different from the energy band structure of the comparison group CTO and the comparison group MTO, and has a higher conduction band and comparison group MTO of the comparison group CTO. The higher energy band gap.

In addition, the retention time of the best example test group MCTO was further tested. The test results showed that there was no obvious electrical deterioration at the normal temperature of 10,000 operations; the electrical properties of the data were maintained at 85 degrees Celsius. The characteristics remain stable.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. Any simple modifications, equivalent changes and modifications made without departing from the technical scope of the present invention are still within the technical scope of the present invention.

10‧‧‧Microelectronic components

11‧‧‧Substrate

20‧‧‧Metal-insulation-metal structure

21‧‧‧Solid gel film layer

22‧‧‧Upper conductive layer

23‧‧‧Under conductive layer

Claims (9)

A microelectronic component having a variable resistance insulating layer comprising a substrate and a metal-insulating layer-metal structure (MIM) on the substrate, wherein the metal-insulating layer-metal structure insulating layer is composed of inorganic composite a sol-gel film-forming layer composed of a material having a bipolar resistance conversion characteristic under positive and negative bias operation and a metal-insulating layer-metal structure between -6 and 6 volts The working voltage exhibits a current switching ratio of more than one thousand, wherein the composition of the sol-gel film layer comprises magnesium titanate and calcium titanate, wherein the molar ratio of magnesium titanate to calcium titanate is between Between 1:9 and 9:1. The microelectronic component having a variable resistance insulating layer according to claim 1, wherein the composition of the sol-gel film-forming layer comprises magnesium titanate and calcium titanate, wherein magnesium titanate and calcium titanate The molar volume ratio is between 3:7 and 7:3, and the current switching ratio is between 10,000 and 1 million. The microelectronic component having a variable resistance insulating layer according to claim 1, wherein the composition of the sol-gel film-forming layer comprises magnesium titanate and calcium titanate, wherein magnesium titanate and calcium titanate The molar volume ratio is equal, and the above current switching ratio is above the fifth power of ten. A microelectronic device having a variable resistance insulating layer according to claim 1, wherein the sol-gel film-forming layer has a thickness of between 30 nm and 100 nm. The microelectronic component having a variable resistance insulating layer according to claim 1, wherein the sol-gel film-forming layer has a thickness of between 50 nm and 70 nm. A microelectronic device having a variable resistance insulating layer according to claim 1, wherein the sol-gel film-forming layer has a high-resistance current of not more than 2.42 × 10 ^-7 amps. A microelectronic component having a variable resistance insulating layer according to claim 1, wherein the sol-gel film-forming layer is biased to operate at a voltage greater than plus 1.95 volts and less than minus 0.65 volts. The microelectronic component having a variable resistance insulating layer according to claim 1, wherein the sol-gel film layer exhibits a bipolar resistance conversion characteristic of a positive and negative bias voltage between -6 and 6 volts. The operation may be in a range that does not overlap between an operating voltage in an on-state and an operating voltage in an off-state. A microelectronic component of a variable resistance insulating layer comprising an insulating layer which is a sol-gel film-forming layer composed of an inorganic composite material on a substrate, the sol-gel film-forming layer having a positive and negative bias voltage The bipolar resistance switching characteristic under operation to provide a current switching ratio exhibiting a ratio of more than one thousand in an operating voltage, wherein the composition of the sol-gel film-forming layer comprises magnesium titanate and calcium titanate, wherein magnesium titanate The molar volume ratio to calcium titanate is between 1:9 and 9:1.