TWI566646B - A flexible printed circuit board, a connector assembly and an electronic device - Google Patents

Description

Flexible printed circuit board, connector assembly and electronic device

This creation relates to a printed circuit board, especially a multilayer flexible printed circuit board.

Flexible Printed Circuit Board (FPC) is a printed circuit made of a flexible insulating substrate that has many advantages that are not provided by rigid printed circuit boards. For example, it can be freely bent, wound, folded, can be arbitrarily arranged according to the spatial layout requirements, and can be arbitrarily moved and expanded in a three-dimensional space, thereby achieving integration of component assembly and wire connection. The use of flexible printed circuit boards can greatly reduce the size of electronic products, and is suitable for the development of electronic devices in the direction of high density, miniaturization, and high reliability. Therefore, flexible printed circuit boards are used in aerospace, military, mobile communications, laptop computers, and computer peripherals. , PDA, digital camera and other fields or products have been widely used.

Flexible printed circuit boards are available in single, double and multi-layer boards. The substrate used is mainly polyimide-copper-clad laminate. The material has high heat resistance and good dimensional stability, and is formed into a final product by pressing with a cover film having both mechanical protection and good electrical insulation properties. The polyimine resin is a general term for a heat-resistant resin having a penta-nine ring of an imine, represented by polyphenyltetramethylene imide produced by the reaction of an oxygen-containing layer and anhydrous pyromellitic acid. The conductors for flexible printed circuit boards are thin foil-like copper, which is a so-called copper foil. The preparation method can be divided into electrolytic copper foil and rolled copper foil, in which pressure is applied. Copper foil is the mainstream. In addition, the surface layer and the inner layer conductor of the double-sided, multilayer printed wiring board are electrically connected to each other by metallization.

A multilayer flexible printed circuit has been disclosed in the patent publication No. WO 2011/018862 A1. A method of manufacturing a road board, which can achieve fine circuitization of a surface wiring layer in a multilayer multilayer flexible printed circuit board, thereby preventing high-density mounting.

However, flexible printed circuit boards can be used in low performance, low operating frequency environments. It can also be used in high performance, high operating frequency environments. In order to be suitable for use in a higher operating frequency environment, the structural design and manufacturing process of a flexible printed circuit board is relatively difficult and costly. This is because the electromagnetic interference (EMI) between the signal lines on the same film layer and the signal lines on the adjacent film layers will become apparent, which will affect the signal transmission quality.

In view of this, the creator feels that the above-mentioned inconvenience is to study and cooperate with the use of theory and combine years of experience to conceive a creative design that can be effectively improved.

One of the purposes of this creation is that the flexible printed circuit board has fewer stacked layers, and can transmit various signals such as high-speed differential signals, low-speed differential signals, other signals, ground signals, and power signals, and between signal lines and stacking. Both the layer and the stacked layer have a good shielding effect to reduce electromagnetic interference.

To achieve the above object, the present invention provides a flexible printed circuit board comprising: a cable body, a first terminal portion at one end of the cable body, and a second terminal portion at the other end of the cable body, the first terminal portion having a width along the width a first other signal terminal, a first high speed differential signal terminal, a first ground terminal, and a second high speed differential signal terminal arranged in sequence a second grounding terminal, a third high speed differential signal terminal, a first power terminal, a fourth high speed differential signal terminal, a second power terminal, a second other signal terminal, and a first low speed difference a signal terminal, a third power terminal, a second low speed differential signal terminal, a third other signal terminal, a fourth power terminal, a fifth high speed differential signal terminal, a fifth power terminal, and a sixth a high speed differential signal terminal, a third ground terminal, a seventh high speed differential signal terminal, a fourth ground terminal, an eighth high speed differential signal terminal and a fourth other signal terminal.

In an embodiment, the cable body includes: a power layer, a signal line layer, and a ground layer, the signal line layer is between the power layer and the ground layer, the signal line layer includes a power line and a ground line, and the power line is electrically connected to the power layer, the ground line and the ground layer Electrical conduction is formed.

In an embodiment, the ground line of the signal line layer is a first ground line And a second grounding wire, the first grounding wire is electrically connected to the second grounding terminal of the first terminal portion, and the second grounding wire is electrically connected to the third grounding terminal of the first terminal portion.

In an embodiment, the power line of the signal line layer is a first power line And a second power line, one end of the first power line is electrically connected to the second power terminal of the first terminal portion, and one end of the second power line is electrically connected to the fourth power terminal of the first terminal portion.

In an embodiment, the ground line of the signal line layer is a first ground line And a second ground line, the first ground line and the second ground line are electrically connected to the ground layer and the first to fourth ground terminals of the first terminal portion at the same time.

In an embodiment, the power line of the signal line layer is a first power line And a second power line, the first power line and the second power line are electrically connected to the power layer and the first to fifth power terminals of the first terminal.

In an embodiment, the signal line layer further comprises four pairs of high speed differential signals. a line, a pair of low-speed differential signal lines, and four other signal lines, the adjacent two of the high-speed differential signal lines being separated by at least one of the ground lines, and on a side opposite to the at least one of the ground lines At least one of the power lines or at least one of the other signal lines is provided.

In an embodiment, wherein the four pairs of high speed differential signal lines have a first high speed difference a signal line, a second high-speed differential signal line, a third high-speed differential signal line, a fourth high-speed differential signal line, a fifth high-speed differential signal line, a sixth high-speed differential signal line, and a a seventh high speed differential signal line and an eighth high speed differential signal line, the pair of low speed differential signal lines being a first low speed differential signal line and a second low speed differential signal line, the four other signal lines a first other signal line, a second other signal line, a third other signal line, and a fourth other signal line, the signal line layer sequentially arranging the first other signal line along the width direction, the first a high speed differential signal line, the second high speed differential signal line, the first ground line, the third high speed differential signal line, the fourth high speed differential signal line, the first power line, and the second other signal a first low-speed differential signal line, the second low-speed differential signal line, the third other signal line, the second power line, the fifth high-speed differential signal line, and the sixth high-speed differential signal line The second ground line, the seventh high-speed differential signal line, and the eighth high Fourth differential signal lines and the other signal line.

The present invention further provides a connector assembly comprising: the aforementioned flexible printed circuit board; and a connector electrically connected to the flexible printed circuit board.

The present invention further provides a connector assembly, an electronic device comprising: a body having a motherboard, and the connector assembly, the connector assembly being mounted in the body and electrically connected to the motherboard.

This creation has the following beneficial effects:

1. The flexible printed circuit board has fewer stacking layers, and can transmit various signals such as high-speed differential signals, low-speed differential signals, other signals, grounding signals, and power signals, and between signal lines and stacked layers and stacked layers. Both have a good shielding effect to reduce electromagnetic interference (EMI).

2. The signal layer is covered by a first conductive isolation layer (or ground layer) located above the signal line layer and a second conductive isolation layer (or power layer) under the signal line layer to suppress the stacked layers. Electromagnetic interference with stacked layers. Furthermore, adjacent two pairs of high-speed differential signal lines in the signal layer are separated by a ground line, and a power line or at least one other signal line is disposed on a side opposite to the ground line to reduce the adjacent two The high-speed differential signal lines interfere with each other. In addition, each pair of high-speed differential signal lines or each pair of low-speed differential signal lines in the signal line layer is interposed between power lines, ground lines, other signal lines, or a combination thereof, and can also suppress high-speed differential signals or low-speed differentials. Electromagnetic interference during signal transmission.

The first to fourth ground terminals of the second terminal portion are electrically connected in parallel to the first ground line and the second ground line of the signal line layer, and the first to fourth ground terminals of the second terminal portion are also The electrical connection is electrically connected in parallel with the grounding layer, so that the suppression of electromagnetic interference can be solved by the grounding wire and the grounding layer of the signal layer at the same time, thereby improving the quality of the signal transmission.

4. The first to fourth power terminals of the second terminal portion are electrically connected in parallel to the first power line and the second power line of the signal line layer, and the first to fourth power terminals of the second terminal portion are also The power supply layer is electrically connected in parallel, and the power is transmitted by the principle of shunting to carry a large power source.

10‧‧‧Flexible printed circuit board

12‧‧‧ Cable body

1201‧‧‧ first surface

1202‧‧‧ second surface

1203‧‧‧Bend

1204‧‧‧flat

121‧‧‧Signal layer

1211‧‧‧High speed differential signal line

1211a~1211h‧‧‧1st to 8th high speed differential signal lines

1212‧‧‧Low speed differential signal line

1212a~1212b‧‧‧1st to 2nd low speed differential signal line

1213‧‧‧Other signal lines

1213a~1213d‧‧‧1st to 4th other signal lines

1214‧‧‧ Grounding wire

1214a~1214b‧‧‧first to second grounding wire

1215‧‧‧Power cord

1215a~1215b‧‧‧first to second power cords

122‧‧‧First Conductive Isolation Layer/Ground Layer

123‧‧‧Second conductive isolation layer / power layer

124‧‧‧First via hole

125‧‧‧Second via

126‧‧‧First perforation

127‧‧‧Second perforation

14‧‧‧First terminal section

141‧‧‧High speed differential signal terminal

141a~141h‧‧‧1st to 8th high speed differential signal terminals

142‧‧‧Low speed differential signal terminal

142a~142b‧‧‧1st to 2nd low speed differential signal terminals

143‧‧‧Other signal terminals

143a~143d‧‧‧First to fourth other signal terminals

144‧‧‧ Grounding terminal

144a~144d‧‧‧first to fourth grounding terminals

145‧‧‧Power terminal

145a~145e‧‧‧first to fifth power terminals

16‧‧‧Second terminal section

161‧‧‧High speed differential signal terminal

161a~161h‧‧‧1st to 8th high speed differential signal terminals

162‧‧‧Low speed differential signal terminal

162a~162d‧‧‧1st to 4th low speed differential signal terminals

163‧‧‧Other signal terminals

163a~163d‧‧‧First to fourth other signal terminals

164‧‧‧ Grounding terminal

164a~164d‧‧‧first to fourth grounding terminals

165‧‧‧Power terminal

165a~165d‧‧‧first to fourth power terminals

166‧‧‧First row of signal terminals

167‧‧‧Second row of signal terminals

168‧‧‧Terminal vias

20‧‧‧First connector

30‧‧‧Second connector

40‧‧‧Electronic devices

42‧‧‧Ontology

44‧‧‧ motherboard

The first figure is a perspective view of the authoring connector assembly.

The second figure is an exploded perspective view of the authoring connector assembly.

The third figure is an exploded perspective view of the flexible printed circuit board.

The fourth figure is an exploded view of the high-speed differential signal line, low-speed differential signal line, other signal lines, grounding lines and power lines of the creative signal line layer.

The fifth figure is a top view of each signal line and the first terminal portion of the creative signal line layer.

The sixth figure is a bottom view of the inventive flexible printed circuit board.

The seventh figure is a schematic diagram of each signal terminal and transmission signal of the first terminal part of the creation.

The eighth figure is a top view of the creative flexible printed circuit board.

The ninth figure is a schematic diagram of each signal terminal and transmission signal of the second terminal part of the creation.

The tenth figure is a schematic diagram of each signal terminal and transmission signal of another second terminal part.

The eleventh figure is a schematic diagram of the ground signal circuit of the flexible printed circuit board.

The twelfth figure is a schematic diagram of the power signal loop of the flexible printed circuit board.

The thirteenth diagram is a schematic diagram of the electrical connection between the authoring connector component and the electronic device.

Figure 14A is a top view of another flexible printed circuit board of the present invention.

Figure 14B is a bottom view of another flexible printed circuit board of the present invention.

FIG. 14C is a schematic view showing another flexible printed circuit board electrically connected to the first connector and the second connector.

Referring to the first, second and third figures, the authoring connector assembly comprises a flexible printed circuit board 10 and a first connector 20, the first connector 20 being in the form of a patch (SMT) or a plug-in board (DIP) The manner is electrically connected to the flexible printed circuit board 10 for transmitting electrical signals. In an embodiment, the first connector 20 is a USB Type-C connector.

The flexible printed circuit board 10 includes a cable body 12 at one end of the cable body 12 The second terminal portion 16 and the first terminal portion 14 at the other end of the cable body 12. The cable body 12 has a first surface 1201 and a second surface 1202 opposite to the first surface 1201. The first terminal portion 14 is exposed on the second surface 1202 of the cable body 12, and the second terminal portion 16 is exposed on the cable body 12. A surface 1201. Thereby, the first connector 20 is electrically connected to the second terminal portion 16 of the first surface 1201 of the cable body 12 in a patch-on-chip (SMT) or plug-in board (DIP) manner, and is exposed on the cable body 12 . The second surface 1202 and the first terminal portion 14 located at the other end of the cable body 12 with respect to the second terminal portion 16 may further be electrically connected to the electronic device 40 (see FIG. 13).

The cable body 12 includes a signal line layer 121, a first conductive isolation layer 122, and a second The conductive isolation layer 123 and the signal line layer 121 are interposed between the first conductive isolation layer 122 and the second conductive isolation layer 123. In other words, the first conductive isolation layer 122 located above the signal line layer 121 and the second conductive isolation layer 123 under the signal line layer 121 together wrap the signal line layer 121, thereby suppressing the between the stacked layer and the stacked layer. Electromagnetic interference. In one embodiment, the first conductive isolation layer 122 is a ground layer, and the second conductive isolation layer 123 is a power supply layer, which helps to reduce electromagnetic interference such as capacitive coupling and inductive coupling during signal transmission. The signal line layer 121 includes a high-speed differential signal line 1211, a low-speed differential signal line 1212, other signal lines 1213, a ground line 1214, and a power line 1215. The ground line 1214 is electrically connected to the ground layer 122, and the power line 1215 and the power source Layer 123 forms electrical conduction. The ground layer 122 includes a first via hole 124 and a first via hole 126. The position of the first via hole 124 corresponds to the position of the ground line 1214 of the signal line layer 121 (refer to FIG. 11) because the first via hole 124 is along The signal lines are arranged, so the ground line 1214 can be electrically connected to the ground layer 122 through the first via holes 124. The power supply layer 123 includes a second via hole 125 and a second via hole 127, and the bit of the second via hole 125 The position of the power line 1215 corresponding to the signal line layer 121 (refer to FIG. 11), because the second via hole 125 is arranged along the power line 1215, the power line 1215 can pass through the second via hole 125 and the power layer 123. Electrical conduction is formed. In addition, the first through holes 126 of the grounding layer 122 are arranged along the power line 1215 of the signal line layer 121, and the first through holes 126 are in a one-to-one correspondence with the second conductive holes 125 of the power supply layer 123, so that the power lines When the power supply layer 123 is electrically connected to the power supply layer 123 through the second via hole 125, the power supply line 1215 does not electrically conduct with the ground layer 122. The second through holes 127 are disposed along the ground line 1214 of the signal line layer 121, and the second through holes 127 are in a one-to-one correspondence with the first via holes 124 of the ground layer 122, so that the ground lines 1214 and The ground layer 122 is electrically conductive by the first via hole 124, and the ground line 1214 is not electrically connected to the power source layer 123. Furthermore, one end of the high-speed differential signal line 1211, the low-speed differential signal line 1212, the other signal line 1213, the ground line 1214, and the power line 1215 of the signal line layer 121 is formed with the first terminal portion 14 also located in the signal line layer 121. Electrical conduction, such as but not limited to, a high speed differential signal line 1211, a low speed differential signal line 1212, other signal lines 1213, a ground line 1214, and one end of the power line 1215 are continuously extended to form the first terminal portion 14. Electrically conductive. The other ends of the high-speed differential signal line 1211, the low-speed differential signal line 1212, the other signal line 1213, the ground line 1214, and the power line 1215 of the signal line layer 121 are electrically connected to the second terminal portion 16 of the ground layer 122. For example, but not limited to, the high-speed differential signal line 1211, the low-speed differential signal line 1212, the other signal line 1213, the ground line 1214, and the other end of the power line 1215 of the signal line layer 121 are in the manner of the terminal via 168 and the second terminal. The portion 16 is electrically conductive.

In an embodiment, the signal line layer 121 and the ground layer 122 in the cable body 12 And the stacking order and the number of stacks of the power layer 123 may be appropriately changed, for example, but not limited to, sequentially stacking the ground layer 122, the signal line layer 121, and the power layer 123 from bottom to top; or The power layer 123, the ground layer 122, the signal line layer 121, and the ground layer 122 are stacked in sequence; or the power layer 123, the signal line layer 121, the power layer 123, and the ground layer 122 are sequentially stacked from bottom to top. That is, one or more combinations of the signal line layer 121, the ground layer 122, or the power layer 123 are allowed to be added between the stack of the signal line layer 121, the ground layer 122, and the power layer 123, and substantially remain the same. Covered by the concept. In addition, one or more of the signal line layer 121, the ground layer 122, and the power layer 123 are allowed to be extended into a new stacked layer, which is substantially covered by the concept of the creation, for example, The power layer 123, the signal line layer 121, the signal line layer 121, and the ground layer 122 are not limited to being stacked from bottom to top.

In an embodiment, the signal line layer 121, the first conductive isolation layer 122, and the second guide Electrical isolation layer 123 may also be referred to as a film layer. The signal line layer 121 is used to transmit the conductive layer of the signal of the flexible printed circuit board 10. The signal lines in the signal line layer 121 can transmit the same or different signals. The signal line layer 121 can also be referred to as a circuit layer. Each signal line can also be called a line. It is known to those skilled in the art that the film layer may also include an insulating layer which may be sandwiched between the film layer and the film layer for insulation purposes or may be applied to the outermost film layer for protection purposes. . Therefore, the cable body 12 includes at least the signal line layer 121, the first conductive isolation layer 122, and the second conductive isolation layer 123, and the insulating layer for different purposes can be appropriately added to form the cable body 12 having more film layers.

Referring to the fourth and fifth figures, in an embodiment, the signal line layer 121 includes Four pairs of high speed differential signal lines 1211, a pair of low speed differential signal lines 1212, four other signal lines 1213, two ground lines 1214 and two power lines 1215. The four pairs of high speed differential signal lines 1211 are composed of a first high speed differential signal line 1211a, a second high speed differential signal line 1211b, a third high speed differential signal line 1211c, a fourth high speed differential signal line 1211d, and a fifth high speed difference. Motion signal line 1211e, sixth high The speed difference signal line 1211f, the seventh high speed differential signal line 1211g and the eighth high speed differential signal line 1211h are formed. A pair of low speed differential signal lines 1212 are formed by a first low speed differential signal line 1212a and a second low speed differential signal line 1212b. The four other signal lines 1213 are composed of a first other signal line 1213a, a second other signal line 1213b, a third other signal line 1213c, and a fourth other signal line 1213d. The two ground lines 1214 are composed of a first ground line 1214a and a second ground line 1214b. The two power lines 1215 are composed of a first power line 1215a and a second power line 1215b. Therefore, the signal line layer 121 sequentially arranges the first other signal line 1213a, the first high-speed differential signal line 1211a, the second high-speed differential signal line 1211b, the first ground line 1214a, and the third high-speed differential signal in the width direction. Line 1211c, fourth high speed differential signal line 1211d, first power line 1215a, second other signal line 1213b, first low speed differential signal line 1212a, second low speed differential signal line 1212b, third other signal line 1213c, The second power line 1215b, the fifth high speed differential signal line 1211e, the sixth high speed differential signal line 1211f, the second ground line 1214b, the seventh high speed differential signal line 1211g, the eighth high speed differential signal line 1211h, and the fourth It has a signal line 1213d. Therefore, the arrangement relationship between the signal lines of the signal layer suppresses electromagnetic interference (EMI). The two adjacent pairs of high-speed differential signal lines 1211 in the signal line layer 121 are separated by a ground line 1214, and a power line 1215 or at least one other signal line 1213 is disposed on a side opposite to the ground line 1214. To reduce the mutual interference between the adjacent two pairs of high-speed differential signal lines 1211. Furthermore, each pair of high-speed differential signal lines 1211 or each pair of low-speed differential signal lines 1212 of the signal line layer 121 are interposed between the power line 1215, the ground line 1214, the other signal lines 1213, or a combination thereof, and can also suppress high speed. Electromagnetic interference when differential signals or low-speed differential signals are transmitted.

Please refer to the fifth, sixth and seventh figures. In an embodiment, it is exposed to electricity. The first terminal portion 14 of the second surface 1202 of the cable body 12 includes eight high speed differential signal terminals 141. Two low-speed differential signal terminals 142, four other signal terminals 143, four ground terminals 144, and five power terminals 145. The eight high-speed differential signal terminals 141 are composed of a first high-speed differential signal terminal 141a, a second high-speed differential signal terminal 141b, a third high-speed differential signal terminal 141c, a fourth high-speed differential signal terminal 141d, and a fifth high-speed difference. The signal terminal 141e, the sixth high-speed differential signal terminal 141f, the seventh high-speed differential signal terminal 141g, and the eighth high-speed differential signal terminal 141h are formed. The two low speed differential signal terminals 142 are composed of a first low speed differential signal terminal 142a and a second low speed differential signal terminal 142b. The four other signal terminals 143 are composed of a first other signal terminal 143a, a second other signal terminal 143b, a third other signal terminal 143c, and a fourth other signal terminal 143d. The four ground terminals 144 are composed of a first ground terminal 144a, a second ground terminal 144b, a third ground terminal 144c, and a fourth ground terminal 144d. The five power supply terminals 145 are composed of a first power supply terminal 145a, a second power supply terminal 145b, a third power supply terminal 145c, a fourth power supply terminal 145d, and a fifth power supply terminal 145e. Therefore, as shown in the seventh figure, when the cable body 12 is located below the first terminal portion 14 in the drawing, the first terminal portion 14 has twenty-three terminals arranged in the width direction from right to left, twenty-three. The root terminal is respectively the first other signal terminal 143a, the first high speed differential signal terminal 141a, the first ground terminal 144a, the second high speed differential signal terminal 141b, the second ground terminal 144b, and the third high speed differential signal terminal. 141c, first power terminal 145a, fourth high speed differential signal terminal 141d, second power terminal 145b, second other signal terminal 143b, first low speed differential signal terminal 142a, third power terminal 145c, second low speed differential The signal terminal 142b, the third other signal terminal 143c, the fourth power terminal 145d, the fifth high speed differential signal terminal 141e, the fifth power terminal 145e, the sixth high speed differential signal terminal 141f, the third ground terminal 144c, and the seventh high speed The differential signal terminal 141g, the fourth ground terminal 144d, the eighth high speed differential signal terminal 141h, and the fourth other signal terminal 143d. Furthermore, one end of the flexible printed circuit board 10 provided with the first terminal portion 14 can be inserted. Connected to the second connector 30 (refer to the thirteenth figure) to form an electrical connection, the twenty-three terminals of the first terminal portion 14 are sequentially transmitted (refer to the seventh figure) SBU2, RX1+, GND, RX1 -, GND, TX1+, VBUS, TX1-, VBS, VBS, CC1, D1+, VBUS, D1-, SBU1, VBUS, VBUS, RX2-, VBUS, RX2+, GND, TX2-, GND, TX2+, and VCONN signals (previously For the definition of each signal type, please refer to the association specification "Universal Serial Bus Type-C Cable and Connector Specification Release 1.1". In an embodiment, the second connector 30 is an FPC connector.

In addition, the high-speed differential signal line of the first terminal portion 14 and the signal line layer 121 1211. The low-speed differential signal line 1212, the other signal line 1213, the ground line 1214, and the power line 1215 are electrically connected. Referring to FIG. 5, the first other signal line 1213a is electrically connected to the first terminal portion 14 at one end. The signal terminal 143a has one end of the first high-speed differential signal line 1211a electrically connected to the first high-speed differential signal terminal 141a of the first terminal portion 14, and one end of the second high-speed differential signal line 1211b is electrically connected to the second high-speed of the first terminal portion 14. The differential signal terminal 141b has one end of the first grounding wire 1214a electrically connected to the second grounding terminal 144b of the first terminal portion 14, and one end of the third high-speed differential signal wire 1211c is electrically connected to the third high-speed differential signal terminal of the first terminal portion 14. 141c, a fourth high-speed differential signal line 1211d is electrically connected to a fourth high-speed differential signal terminal 141d of the first terminal portion 14, and one end of the first power supply line 1215a is electrically connected to the second power terminal 145b of the first terminal portion 14, and the second The other signal line 1213b is electrically connected to the second other signal terminal 143b of the first terminal portion 14. The first low speed differential signal line 1212a is electrically connected to the first low speed differential signal terminal 142a of the first terminal portion 14, and the second One end of the differential signal line 1212b is electrically connected to the second low-speed differential signal terminal 142b of the first terminal portion 14, and one end of the third other signal line 1213c is electrically connected to the third other signal terminal 143c of the first terminal portion 14, and the second power line One end of 1215b is electrically connected to the fourth power terminal 145d of the first terminal portion 14, The fifth high-speed differential signal line 1211e is electrically connected to the fifth high-speed differential signal terminal 141e of the first terminal portion 14, and the sixth high-speed differential signal line 1211f is electrically connected to the sixth high-speed differential signal terminal 141f of the first terminal portion 14. The first grounding wire 1214b is electrically connected to the third grounding terminal 144c of the first terminal portion 14, and the seventh high-speed differential signal wire 1211g is electrically connected to the seventh high-speed differential signal terminal 141g of the first terminal portion 14. One end of the differential signal line 1211h is electrically connected to the eighth high-speed differential signal terminal 141h of the first terminal portion 14, and one end of the fourth other signal line 1213d is electrically connected to the fourth other signal terminal 143d of the first terminal portion 14.

Referring to the fifth, eighth and ninth figures, in one embodiment, exposed to the cable The second terminal portion 16 of the first surface 1201 of the body 12 includes eight high-speed differential signal terminals 161, four low-speed differential signal terminals 162, four other signal terminals 163, four ground terminals 164, and four power terminals 165. . The eight high-speed differential signal terminals 161 are composed of a first high-speed differential signal terminal 161a, a second high-speed differential signal terminal 161b, a third high-speed differential signal terminal 161c, a fourth high-speed differential signal terminal 161d, and a fifth high-speed difference. The signal terminal 161e, the sixth high-speed differential signal terminal 161f, the seventh high-speed differential signal terminal 161g, and the eighth high-speed differential signal terminal 161h are configured. The four low-speed differential signal terminals 162 are composed of a first low-speed differential signal terminal 162a, a second low-speed differential signal terminal 162b, a third low-speed differential signal terminal 162c, and a fourth low-speed differential signal terminal 162d. The four other signal terminals 163 are composed of a first other signal terminal 163a, a second other signal terminal 163b, a third other signal terminal 163c, and a fourth other signal terminal 163d. The four ground terminals 164 are composed of a first ground terminal 164a, a second ground terminal 164b, a third ground terminal 164c, and a fourth ground terminal 164d. The four power supply terminals 165 are composed of a first power supply terminal 165a, a second power supply terminal 165b, a third power supply terminal 165c, and a fourth power supply terminal 165d. Therefore, as shown in the ninth figure, when the cable body 12 is located above the second terminal portion 16 in the drawing, the second terminal portion 16 includes the A row of signal terminals 166 and a second row of signal terminals 167, the first row of signal terminals 166 are arranged in the width direction, from left to right, twelve terminals are arranged in order, and the twelve terminals of the first row of signal terminals 166 are sequentially The first ground terminal 164a, the first high speed differential signal terminal 161a, the second high speed differential signal terminal 161b, the first power terminal 165a, the first other signal terminal 163a, the first low speed differential signal terminal 162a, and the second low speed The differential signal terminal 162b, the second other signal terminal 163b, the second power terminal 165b, the third high speed differential signal terminal 161c, the fourth high speed differential signal terminal 161d, and the second ground terminal 164b. The second row of signal terminals 167 are arranged in the width direction, and there are twelve terminals arranged in order from right to left. The twelve terminals of the second row of signal terminals 167 are respectively the third ground terminal 164c and the fifth high speed differential signal. The terminal 161e, the sixth high-speed differential signal terminal 161f, the third power supply terminal 165c, the third other signal terminal 163c, the third low-speed differential signal terminal 162c, the fourth low-speed differential signal terminal 162d, and the fourth other signal terminal 163d, The fourth power supply terminal 165d, the seventh high speed differential signal terminal 161g, the eighth high speed differential signal terminal 161h, and the fourth ground terminal 164d. Furthermore, when the second terminal portion 16 can be electrically connected to the first connector 20, for example, but not limited to, the first row of signal terminals 166 and the second row of signal terminals 167 are both in a patch (SMT) and a second connection. The device 30 is electrically connected (refer to FIG. 9), or the first row of signal terminals 166 is in a chip type (SMT) and the second row of signal terminals 167 is electrically connected to the second connector 30 in a plug-in type (DIP) ( Please refer to the tenth figure). The twelve terminals of the first row of signal terminals 166 sequentially transmit GND, TX1+, TX1-, VBUS, CC1, D1+, D1-, SBU1, VBUS, RX2-, RX2+, and GND signals in the width direction from left to right. And the twelve terminals of the second row of signal terminals 167 sequentially transmit GND, TX2+, TX2-, VBUS, VCONN, D2+, D2-, SBU2, VBUS, RX1-, RX1+, and GND signals in the width direction from right to left. .

In addition, the high-speed differential signal line of the second terminal portion 16 and the signal line layer 121 1211. The low-speed differential signal line 1212, the other signal line 1213, the ground line 1214, and the power line 1215 are electrically connected. Referring to the fifth and eighth figures, the first other signal line 1213a is electrically connected to the second terminal portion 16. The third high-speed differential signal line 171c, the first high-speed differential signal line 1211a is electrically connected to the fifth high-speed differential signal terminal 161e of the second terminal portion 16, and the second high-speed differential signal line 1211b is electrically connected to the sixth of the second terminal portion 16. The high-speed differential signal terminal 161f, the first grounding wire 1214a is electrically connected to the first grounding terminal 164a, the second grounding terminal 164b, the third grounding terminal 164c, and the fourth grounding terminal 164d of the second terminal portion 16, and the third high-speed differential The signal line 1211c is electrically connected to the fourth high-speed differential signal terminal 161d of the second terminal portion 16, and the fourth high-speed differential signal line 1211d is electrically connected to the third high-speed differential signal terminal 161c of the second terminal portion 16, the first power line 1215a. The second power supply terminal 165b of the second terminal portion 16 is electrically connected, and the second other signal line 1213b is electrically connected to the second other signal terminal 163b of the second terminal portion 16. The first low-speed differential signal line 1212a is electrically connected to the second terminal portion. 16 The second low-speed differential signal terminal 162b and the fourth low-speed differential signal terminal 162d, and the second low-speed differential signal line 1212b are electrically connected to the first low-speed differential signal terminal 162a and the third low-speed differential signal of the second terminal portion 16 at the same time. The terminal 162c, the third other signal line 1213c is electrically connected to the first other signal terminal 163a of the second terminal portion 16, and the second power line 1215b is electrically connected to the first power terminal 165a of the second terminal portion 16, and the fifth high-speed differential signal line. 1211e is electrically connected to the second high-speed differential signal terminal 161b of the second terminal portion 16, and the sixth high-speed differential signal line 1211f is electrically connected to the first high-speed differential signal terminal 161a of the second terminal portion 16, and the second grounding wire 1214b is simultaneously charged. The first ground terminal 164a, the second ground terminal 164b, the third ground terminal 164c, and the fourth ground terminal 164d of the second terminal portion 16 are connected, and the seventh high-speed differential signal line 1211g is electrically connected to the seventh high speed of the second terminal portion 16. The differential signal terminal 161g, the eighth high-speed differential signal line 1211h is electrically connected to the eighth high-speed differential signal terminal 161h of the second terminal portion 16, and the fourth other signal line 1213d is electrically connected to the fourth other signal terminal of the second terminal portion 16. 163d. Thereby, the first low-speed differential signal terminal 162a of the second terminal portion 16 and the third low-speed differential signal terminal 162c are electrically connected in series, and the second low-speed differential signal terminal 162b and the fourth terminal portion 16 are connected to the fourth low-speed differential signal terminal 162b. The low-speed differential signal terminals 162d are also electrically connected in series, so that the first to fourth low-speed differential signal terminals 162a-162d of the second terminal portion 16 (that is, two pairs of low-speed differential signal terminals) are further connected to the signal line. The first low-speed differential signal line 1212a and the second low-speed differential signal line 1212b (ie, a pair of low-speed differential signal lines) of the layer 121 are electrically connected in parallel to reduce the number of signal lines.

Please refer to the eleventh figure for explaining the grounding of the flexible printed circuit board 10 of the present invention. Signal loop. One end of the grounding wire 1214 of the signal line layer 121 is electrically connected to the grounding terminal 144 of the first terminal portion 14, and the other end is electrically connected to the grounding terminal 164 of the second terminal portion 16, and the grounding wire 1214 of the signal line layer 121 is grounded. The first via 124 of the 122 (or the first conductive isolation layer) is electrically connected to the ground layer 122 at the same time. Thereby, the electromagnetic interference (EMI) suppression can be simultaneously solved by the ground layer 1214 of the signal layer and the ground layer 122, thereby improving the quality of the signal transmission. In one embodiment, the grounding wire 1214 of the signal line layer 121 is composed of a first grounding wire 1214a and a second grounding wire 1214b. The first grounding wire 1214a and the second grounding wire 1214b are electrically connected to the grounding layer 122 at the same time. The first to fourth ground terminals 144a to 144d of the terminal portion 14 and the first to fourth ground terminals 164a to 164d of the second terminal portion 16. Therefore, the first to fourth ground terminals 164a-164d of the second terminal portion 16 are electrically connected in parallel to the first ground line 1214a and the second ground line 1214b of the signal line layer 121, while the second terminal portion 16 is The first to fourth ground terminals 164a-164d are also electrically connected to the ground layer 122 in parallel. Similarly, the first to fourth ground terminals 144a to 144d of the first terminal portion 14 are connected in parallel with the first ground line 1214a and the second ground line 1214b of the signal line layer 121, and are also connected in parallel with the ground layer 122.

Please refer to the eleventh and twelfth drawings for explaining the flexible printed circuit of the present invention. The power signal loop of board 10. One end of the power line 1215 of the signal line layer 121 is electrically connected to the power terminal 145 of the first terminal portion 14, the other end is electrically connected to the power terminal 165 of the second terminal portion 16, and the power line 1215 of the signal line layer 121 is provided by the power layer. The second via 125 of the 123 (or the second conductive isolation layer) is electrically connected to the power layer 123 at the same time. Thereby, the suppression of electromagnetic interference (EMI) can be simultaneously solved by the power line 1215 of the signal layer and the power layer 123, thereby improving the quality of the signal transmission. In addition, the power layer 123 having a large transmission area can also carry a large power source. In one embodiment, the power line 1215 of the signal line layer 121 is composed of a first power line 1215a and a second power line 1215b. The first power line 1215a and the second power line 1215b are electrically connected to the power layer 123 at the same time. The first to fifth power supply terminals 145a to 145e of the terminal portion 14 and the first to fourth power supply terminals 165a to 165d of the second terminal portion 16. Therefore, the first to fourth power terminals 165a to 165d of the second terminal portion 16 are electrically connected in parallel to the first power line 1215a and the second power line 1215b of the signal line layer 121 while the second terminal portion 16 is The first to fourth power supply terminals 165a to 165d are also electrically connected to the power supply layer 123 in parallel, and the power is transmitted by the principle of shunting. Similarly, the first to fifth power supply terminals 145a-145e of the first terminal portion 14 are connected in parallel with the first power supply line 1215a and the second power supply line 1215b of the signal line layer 121, and are also connected in parallel with the power supply layer 123, according to the principle of shunting. Transmission power.

Referring to the thirteenth figure, the authoring connector assembly can be electrically connected to the electronic device 40. The electronic device 40 includes a body 42 having a motherboard 44. The motherboard 44 is provided with a second connector 30. The connector assembly is mounted in the body 42 to insert the first terminal portion 14 of the flexible printed circuit board 10. Connected to the second connector 30 to form an electrical connection.

Please refer to Figure 14A, Figure 14B and Figure 14C for the creation cable. The configuration of the body 12 can be designed in different variations, the difference being that the cable body 12 includes a bend In the portion 1203 and the flat portion 1204 , the flat portions 1204 are respectively formed at both ends of the bent portion 1203 , and are electrically connected to the first terminal portion 14 and the second terminal portion 16 , respectively. Thereby, the first terminal portion 14 can be electrically connected to the second connector 30 of the electronic device 40, and the second terminal portion 16 can be used to be electrically connected to the first connector 20.

In summary, this creation has the following beneficial effects:

1. The flexible printed circuit board 10 has fewer stacked layers, and can transmit various signals such as high-speed differential signals, low-speed differential signals, other signals, ground signals, and power signals, and between signal lines and stacked layers and stacked layers. There is good shielding between them to reduce electromagnetic interference (EMI).

2. The signal line layer 121 is coated by the first conductive isolation layer 122 (or the ground layer) located above the signal line layer 121 and the second conductive isolation layer 123 (or the power layer) under the signal line layer 121. To suppress electromagnetic interference between the stacked layer and the stacked layer. Furthermore, the adjacent two pairs of high-speed differential signal lines 1211 in the signal layer are separated by a ground line 1214, and a power line 1215 or at least one other signal line 1213 is disposed on a side opposite to the ground line 1214 to The adjacent two pairs of high speed differential signal lines 1211 are reduced from each other. In addition, each pair of high-speed differential signal lines 1211 or each pair of low-speed differential signal lines 1212 of the signal line layer 121 are interposed between the power line 1215, the ground line 1214, the other signal lines 1213, or a combination thereof, and the high speed difference can also be suppressed. Electromagnetic interference when transmitting a signal or low-speed differential signal.

The first to fourth ground terminals 164a-164d of the second terminal portion 16 are electrically connected in parallel to the first ground line 1214a and the second ground line 1214b of the signal line layer 121, while the second terminal portion 16 is The first to fourth ground terminals 164a-164d are also electrically connected to the ground layer 122 in a parallel manner, so that the electromagnetic interference is suppressed by the ground line 1214 of the signal layer. The ground layer 122 is used to solve the problem of improving the quality of the signal transmission.

The first to fourth power terminals 165a-165d of the second terminal portion 16 are electrically connected in parallel to the first power line 1215a and the second power line 1215b of the signal line layer 121, while the second terminal portion 16 is The first to fourth power terminals 165a-165d are also electrically connected to the power layer 123 in a parallel manner, and the power is transmitted by the principle of shunting to carry a large power source.

5. The first low-speed differential signal terminal 162a of the second terminal portion 16 and the third low-speed differential signal terminal 162c are electrically connected in series, and the second low-speed differential signal terminal 162b of the second terminal portion 16 and the fourth low-speed The differential signal terminals 162d are also electrically connected in series, and the first to fourth low-speed differential signal terminals 162a-162d of the second terminal portion 16 (that is, two pairs of low-speed differential signal terminals) are further connected to the signal line layer. The first low-speed differential signal line 1212a and the second low-speed differential signal line 1212b (that is, a pair of low-speed differential signal lines) of 121 are electrically connected in parallel to reduce the number of signal lines.

However, the above description is only a detailed description and a drawing of a specific embodiment of the present invention, but the features of the present invention are not limited thereto, and are not intended to limit the creation, and all the scope of the creation should be The scope of the patent application shall prevail. The embodiments of the spirit of the patent application scope and similar changes shall be included in the scope of this creation. Anyone familiar with the art may easily think of it in the field of this creation. Any changes or modifications may be covered by the patent in this case.

12‧‧‧ Cable body

14‧‧‧First terminal section

141a~141h‧‧‧1st to 8th high speed differential signal terminals

142a~142b‧‧‧1st to 2nd low speed differential signal terminals

143a~143d‧‧‧First to fourth other signal terminals

144a~144d‧‧‧first to fourth grounding terminals

145a~145e‧‧‧first to fourth power terminals

Claims (10)

A flexible printed circuit board comprising: a cable body; a first terminal portion at one end of the cable body; and a second terminal portion at the other end of the cable body, the first terminal portion having a first order in the width direction Other signal terminals, a first high speed differential signal terminal, a first ground terminal, a second high speed differential signal terminal, a second ground terminal, a third high speed differential signal terminal, a first power terminal, and a a fourth high speed differential signal terminal, a second power supply terminal, a second other signal terminal, a first low speed differential signal terminal, a third power terminal, a second low speed differential signal terminal, and a third other signal a terminal, a fourth power terminal, a fifth high-speed differential signal terminal, a fifth power terminal, a sixth high-speed differential signal terminal, a third ground terminal, a seventh high-speed differential signal terminal, and a fourth The grounding terminal, an eighth high speed differential signal terminal and a fourth other signal terminal. The flexible printed circuit board of claim 1, wherein the cable body comprises: a power layer, a signal line layer and a ground layer, the signal line layer being interposed between the power layer and the ground layer, the signal line The layer includes a power line and a ground line, and the power line is electrically connected to the power layer, and the ground line is electrically connected to the ground layer. The flexible printed circuit board of claim 2, wherein the grounding wire of the signal line layer is a first grounding wire and a second grounding wire, and one end of the first grounding wire is electrically connected to the first terminal portion. The second ground terminal is electrically connected to the third ground terminal of the first terminal portion. The flexible printed circuit board of claim 3, wherein the power line of the signal line layer is a first power line and a second power line, and one end of the first power line is electrically connected to the first terminal portion. The second power terminal, the one end of the second power line is electrically connected to the first portion of the first terminal portion Four power terminals. The flexible printed circuit board of claim 2, wherein the ground line of the signal line layer is a first ground line and a second ground line, and the first ground line and the second ground line are simultaneously The ground layer and the first to fourth ground terminals of the first terminal portion are connected. The flexible printed circuit board of claim 5, wherein the power line of the signal line layer is a first power line and a second power line, and the first power line and the second power line are simultaneously powered. The power supply layer and the first to fifth power supply terminals of the first terminal portion are connected. The flexible printed circuit board of claim 4, wherein the signal line layer further comprises four pairs of high speed differential signal lines, a pair of low speed differential signal lines and four other signal lines adjacent to each other. The two high-speed differential signal lines are separated by at least one of the ground lines, and at least one of the power lines or at least one of the other signal lines are disposed on a side opposite to the at least one of the ground lines. The flexible printed circuit board of claim 7, wherein the four pairs of high speed differential signal lines are a first high speed differential signal line, a second high speed differential signal line, and a third high speed differential signal. a line, a fourth high speed differential signal line, a fifth high speed differential signal line, a sixth high speed differential signal line, a seventh high speed differential signal line and an eighth high speed differential signal line, the pair The low-speed differential signal line is a first low-speed differential signal line and a second low-speed differential signal line, and the four other signal lines are a first other signal line, a second other signal line, and a third other signal. And a fourth other signal line, the signal line layer sequentially arranging the first other signal line, the first high speed differential signal line, the second high speed differential signal line, and the first ground line in a width direction The third high speed differential signal line, the fourth high speed differential signal line, the first power line, the second other signal line, the first low speed differential signal line, and the second low speed differential signal a line, the third other signal line, the second power line, the fifth high speed differential signal line, the sixth high speed differential signal line, the second ground line, the seventh high speed differential signal line, the first Eight high speed differential signal lines and the fourth other signal line. A connector assembly comprising: a flexible printed circuit board as claimed in any one of claims 1 to 8; and a connector electrically connected to the flexible printed circuit board. An electronic device comprising: a body having a motherboard, and a connector assembly as claimed in claim 9, wherein the connector assembly is mounted in the body and electrically connected to the motherboard.