TWI564691B - Method and circuit for minimizing body effect - Google Patents

Description

Method and circuit for reducing body effect

The present invention relates to techniques for reducing body effects, and more particularly to a method for imparting different bulk voltages to different MOS transistors (eg, P-type MOS transistors) in a circuit to reduce body effects. With the circuit.

When a MOS transistor is used as the switch, the voltage of the source and the drain (that is, the turn-on voltage) will be the same, however, the voltage difference between the source terminal and the substrate terminal will cause a body effect, and The body effect causes the required turn-on voltage to become large, resulting in poor conduction between the source and the drain.

Therefore, in order to eliminate the body effect, it is necessary to give the same voltage as the source voltage of the substrate, so that the required turn-on voltage does not become larger, thereby improving the conduction capability of the MOS transistor, that is, the conventional method will be for each The individual source-to-drain voltage of a MOS transistor is applied to the substrate to reduce the bulk effect. However, for circuit layout, since each MOS transistor needs to be processed individually, a complicated voltage dividing circuit (for example, a large number of voltage dividing resistors) is required to provide an optimum required substrate voltage, thereby causing a circuit. The increase in area. So you need a circuit design that uses the right amount of area and reduces body effects.

Accordingly, it is an object of the present invention to provide a method and circuit that can effectively reduce body effects without consuming area.

One embodiment of the present invention discloses a method of reducing body effects, comprising: imparting a first substrate voltage to at least one first MOS transistor in a circuit; and at least one second MOS transistor in the circuit A second substrate voltage is applied, wherein a turn-on voltage to be turned on by the first MOS transistor is different from a turn-on voltage to be turned on by the second MOS transistor, and the first substrate voltage is different from the second substrate voltage.

Another embodiment of the present invention discloses a circuit capable of reducing body effects, comprising: at least a first MOS transistor, at least a second MOS transistor, and a voltage generator; wherein the voltage generator Is coupled to the first MOS transistor and the first MOS transistor to provide a first substrate voltage to the first MOS transistor and provide a second substrate voltage to the second MOS transistor, The turn-on voltage to be turned on by the first MOS transistor is different from the turn-on voltage to be turned on by the second MOS transistor, and the first substrate voltage is different from the second substrate voltage.

Based on the above-described embodiments, the present invention provides a method and circuit for imparting different substrate voltages to different MOS transistors in a circuit to reduce body effects, and to avoid the use of excess area.

200‧‧‧ circuit

202_1~202_4, 204_1~204_4‧‧‧first MOS transistor

206_1~206_4, 208_1~208_4‧‧‧Second MOS transistor

210‧‧‧Voltage generator

212‧‧‧voltage circuit

1 is a schematic view showing the partial pressure of a MOS transistor according to an embodiment of the present invention.

2 is a schematic diagram of a circuit that can reduce body effects in accordance with an embodiment of the present invention.

Certain terms are used throughout the description and following claims to refer to particular elements. Those of ordinary skill in the art should understand that a manufacturer may refer to the same component by a different noun. The scope of this specification and subsequent patent applications are not based on differences in names. In order to distinguish the components, the difference in characteristics of the components is used as a criterion for differentiation. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term "coupled" is used herein to include any direct and indirect electrical connection. Therefore, if a first device is described as being coupled to a second device, it is meant that the first device can be directly electrically connected to the second device or indirectly electrically connected to the second device by other means or connection means.

1 is a schematic view showing the partial pressure of a MOS transistor according to an embodiment of the present invention. As shown in Figure 1, the high base voltage VDDA (for example, the supply voltage of 18V) is divided to produce (3/4)*VDDA, (1/2)*VDDA, (1/4)*VDDA, etc. Voltage, therefore, between the high substrate voltage VDDA and the low substrate voltage VSSA, different voltage division areas Area_1~ can be divided by (3/4)*VDDA, (1/2)*VDDA, (1/4)*VDDA. Area_4. In general, the optimum substrate voltage required for a MOS transistor having the same turn-on voltage will be the same, and the optimum substrate voltage required for a MOS transistor having a different turn-on voltage will be different. Determining the substrate voltage actually applied to the MOS transistor according to which voltage dividing region the optimum substrate voltage required for each MOS transistor to reduce the bulk effect is determined, for example, if plural The individual optimum substrate voltage required for a MOS transistor to reduce the bulk effect falls within the voltage dividing region Area_1 (in other words, the turn-on voltage of the plurality of first MOS transistors falls at a first turn-on voltage) Scope), the present invention will give the same substrate voltage (such as VDDA) to the first MOS transistors; if the plurality of second MOS transistors originally reduce the body effect, the individual optimum substrate voltage is required Falling in the voltage dividing area Area_2 (in other words, the turn-on voltage of the plurality of second MOS transistors may fall in a second conduction different from the first one of the first conducting voltage ranges Pressure range), the substrate of the present invention will be given the same voltage (e.g., (3/4) * VDDA) to the plurality of second metal-oxide-semiconductor transistor. In accordance with conventional practice, an optimum voltage is applied to the substrate for the individual source-to-drain voltage of each MOS transistor, and the present invention classifies the MOS transistor according to the voltage division region. And for a plurality of golden oxygen half of the same substrate voltage falling in the same partial pressure region In the case of a conductor transistor, the present invention applies the same substrate voltage (rather than the individual desired optimum substrate voltage) to the substrate of the MOS transistors, thus requiring only a simple voltage divider circuit (eg, a small amount The voltage divider resistor) provides the desired substrate voltage, thereby reducing the circuit area. The technical features of the present invention will be further described below by taking a circuit as an example.

Please refer to FIG. 2, which is a schematic diagram of a circuit capable of reducing body effects according to an embodiment of the present invention. The circuit 200 includes a plurality of first MOS transistors 202_1~202_4, 204_1~204_4, and a plurality of second MOS transistors 206_1~206_4, 208_1~208~4, wherein each of the first MOS transistors A gold-oxide semiconductor transistor of the same channel type as each of the second MOS transistors, as shown in FIG. 2, in the present embodiment, the first MOS transistors 202_1~202_4, 204_1~204_4 and The second MOS transistors 206_1~206_4, 208_1~208~4 are all P-type MOS transistors (however, this is only an example, and the invention is not limited thereto).

Each of the first oxynitride transistors 202_1~202_4 has a same on-voltage VC1 for each of the MOS transistors (that is, the optimum substrate voltage Vbulk_1 required to reduce the body effect is the same), and the first gold Each of the oxynitride transistors 204_1~204_4 has a same on-voltage VC2 for each of the MOS transistors (that is, the optimum substrate voltage Vbulk_2 required to reduce the body effect is the same), wherein VC1 is different from VC2, Vbulk_1 Unlike Vbulk_2, (3/4)*VDDA<Vbulk_1≦VDDA, and (3/4)*VDDA<Vbulk_2≦VDDA, therefore, the first MOS transistors 202_1~202_4, 204_1~204_4 are classified as corresponding To the voltage division area Area_1, and both VC1 and VC2 will fall in the first conduction voltage range VR1.

Each of the second oxynitride transistors 206_1~206_4 has a same on-voltage VC3 for each of the MOS transistors (ie, the optimum substrate voltage Vbulk_3 required to reduce the body effect is the same), and the second gold Each of the oxygen semiconductor transistors 208_1~208_4 The turn-on voltage VC4 of the semiconductor transistor to be turned on is the same (that is, the optimum substrate voltage Vbulk_4 required to reduce the body effect is the same), wherein VC3 is different from VC4, Vbulk_3 is different from Vbulk_3, (1/2)*VDDA< Vbulk_3≦(3/4)*VDDA, and (1/2)*VDDA<Vbulk_4≦(3/4)*VDDA, therefore, the second MOS transistors 206_1~206_4, 208_1~208_4 are classified as corresponding To the voltage division area Area_2, and both VC3 and VC4 will fall in the second conduction voltage range VR2 different from the first conduction voltage range VR1.

The circuit 200 further includes a voltage generator 210 for generating a first substrate voltage (for example, VDDA) and a second substrate voltage (for example, (3/4)*VDDA). In this embodiment, the voltage generator 210 can utilize one point. The voltage circuit 212 divides the first substrate voltage to generate a second substrate voltage. All the MOS transistors (for example, the first MOS transistors 202_1~202_4, 204_1~204_4) corresponding to the same voltage dividing area Area_1 are given the same first substrate voltage, and corresponding to the same voltage dividing area Area_2. The MOS transistors (eg, the second MOS transistors 206_1~206_4, 208_1~208_4) are given the same second substrate voltage (3/4)*VDDA.

Based on the above embodiments, the circuit 200 of the present invention can be applied to a digital analog converter or a multiplexer, and the substrate voltage is distributed to the MOS transistors of different voltage division regions by a voltage division method to reduce the body effect, since the same point is The MOS transistors in the nip region share the same substrate voltage, so that the use of a voltage dividing circuit (for example, a voltage dividing resistor) can be reduced, so that the problem of excessive use of the area is not caused.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

200‧‧‧ circuit

202_1~202_4, 204_1~204_4‧‧‧first MOS transistor

206_1~206_4, 208_1~208_4‧‧‧Second MOS transistor

210‧‧‧Voltage generator

212‧‧‧voltage circuit

Claims (10)

A method for reducing a body effect, comprising: applying a first bulk voltage to at least one first MOS transistor in a circuit; and at least one second MOS semiconductor in the circuit The transistor is configured to apply a second substrate voltage, wherein the first MOS transistor has a conduction voltage that is different from a conduction voltage of the second MOS transistor, and the first substrate voltage is different. The second substrate voltage; wherein the step of applying the first substrate voltage to the at least one first MOS transistor in the circuit comprises: assigning the first MOS transistor to the first MOS transistor in the circuit a substrate voltage, wherein a first on-voltage of each of the first MOS transistors is to be in a first on-voltage range; and the second substrate voltage is applied to the at least one second MOS transistor in the circuit The step of: providing the second substrate voltage to the plurality of second MOS transistors in the circuit, wherein each of the second gold oxide semiconductors One of the on-voltages of the bulk transistor to be turned on falls within a second on-voltage range different from the first on-voltage range. The method of claim 1, further comprising: dividing the first substrate voltage to generate the second substrate voltage. The method of claim 1, wherein each of the first oxynitride transistors and each of the second oxynitride transistors are of the same channel type of oxynitride transistors. The method of claim 3, wherein each of the first oxy-oxide semiconductor transistors and each A second MOS transistor is a P-type MOS transistor, and an optimum substrate voltage required for the plurality of first MOS transistors is between a supply voltage of the circuit and the supply voltage Between the voltage values of /4, the optimum substrate voltage required for the plurality of second MOS transistors is between a voltage value of 3/4 of the supply voltage and a voltage value of 1/2 of the supply voltage. The first substrate voltage is equal to the supply voltage, and the second substrate voltage is equal to a voltage value of 3/4 of the supply voltage. The method of claim 1, wherein the circuit is a digital analog converter or a multiplexer. A circuit capable of reducing a body effect, comprising: at least a first MOS transistor; at least a second MOS transistor; and a voltage generator coupled to the first MOS device And a second oxynitride transistor for providing a first bulk voltage to the first oxynitride transistor and providing a second substrate voltage to the second MOS transistor, wherein The first MOS transistor has a conduction voltage different from that of the second MOS transistor, and the first substrate voltage is different from the second substrate voltage; wherein the circuit The method includes a plurality of first MOS transistors and a plurality of second MOS transistors; each of the first MOS transistors is turned on by a first on-voltage range; each a turn-on voltage that is to be turned on by the MOS transistor is different from a second turn-on voltage range different from the first turn-on voltage range; and the voltage generator is A substrate voltage is supplied to the plurality of first oxynitride transistors, respectively, and the second substrate voltage is supplied to the plurality of second MOS transistors, respectively. The circuit of claim 6, wherein the voltage generator comprises: a voltage dividing circuit for dividing the first substrate voltage to generate the second substrate voltage. The circuit of claim 6, wherein each of the first oxynitride transistors and each of the second oxynitride transistors are MOS transistors of the same channel type. The circuit of claim 8, wherein each of the first MOS transistors and each of the second MOS transistors are P-type MOS transistors, and the plurality of first MOS transistors The optimum substrate voltage required for the transistor is between the supply voltage of one of the circuits and the voltage value of 3/4 of the supply voltage, and the optimum substrate voltage required for the plurality of second MOS transistors Between a voltage value of 3/4 of the supply voltage and a voltage value of 1/2 of the supply voltage, the first substrate voltage is equal to the supply voltage, and the second substrate voltage is equal to 3/4 of the supply voltage. Voltage value. The circuit of claim 6, wherein the circuit is a digital analog converter or a multiplexer.