TWI559319B - Memory device detection device and detection method thereof - Google Patents

Description

Memory element detecting device and detecting method thereof

The present invention relates to a detecting device and a detecting method thereof, and more particularly to a detecting device for a memory element and a detecting method thereof.

The memory cell needs to be tested for quality before it becomes a product to ensure the reliability and productivity of the memory device. Generally speaking, the detection method of the memory component is to first write the detection data to the memory component to be detected, and then read the written detection data after the writing is completed, and compare the written detection data with the read detection. Whether the data is the same, if the two materials are different, it is judged that the memory element has a defect, that is, the data cannot be completely accessed.

However, the conventional detection method of the steps of writing, reading and comparing the detection data is controlled by the host, that is, when the detection data is written to a memory component, the detection data is written by the host controlling the storage controller to A memory component, when reading the detection data, reads the detection data stored by the memory component by the host controlling the storage controller, and compares the written detection data with the read detection data, The host compares.

Furthermore, when the memory device is actually used as a memory device, it is required to manage the recording unit in the memory element (memory unit management mechanism) with the logic realized by the internal memory through the firmware to perform logical position and physical position conversion, Even write and other functions. Simply detecting the memory component in the manner described above cannot achieve the confirmation product. The purpose of functional correctness.

It can be seen from the above that since the detection method of the conventional memory element detects (writes, reads, and compares) each memory element, it must be controlled by the host, so if it is necessary to connect to the multiple storage controller at the same time, When the complex memory component is detected, the host must control multiple storage controllers at the same time and continuously, so the conventional detection method occupies too much resources connected between the host and the storage controllers, and the conventional detection method is extremely time consuming.

Accordingly, the present invention has been made in view of the above problems, and provides a memory element detecting apparatus and a detecting method thereof, which can solve the above problems.

One of the objectives of the present invention is to provide a memory device detection apparatus and a detection method thereof, wherein a host outputs a detection command to at least one storage controller, and the storage controller is coupled based on its memory unit management mechanism. The plurality of memory elements perform writing, reading and comparison of the detection data to reduce the occupation resources of the line between the host and the storage controllers and to detect the functional correctness of the memory unit management mechanism for the memory elements.

One of the objectives of the present invention is to provide a memory device detection apparatus and a detection method thereof, wherein a host outputs a detection command to at least one storage controller to control the storage controller to be coupled through its memory unit management mechanism The plurality of memory elements perform writing, reading and comparison of the detection data to increase the detection efficiency.

In order to achieve the above-mentioned various purposes and effects, the present invention discloses a method for detecting a memory component, the method comprising: outputting a detection command by a host; receiving a detection command by a storage controller, and according to the detection command Write one first in order Detecting data to a plurality of memory elements corresponding to a logical position, and updating a memory unit management data, after writing, querying physical positions of the memory elements through a memory unit management mechanism, and reading the memory elements corresponding to the physical positions The stored first detection data is a second detection data, and compares whether the first detection data and the second detection data are the same to generate a detection result; and the detection result is transmitted to the host by the storage controller.

The invention further discloses a detecting device for a memory component, comprising: a host, outputting a detection command; and a storage controller, sequentially writing a first detection data to a complex memory corresponding to a logical position according to the detection command The component simultaneously updates a memory unit management data, and after writing, queries a physical location corresponding to the physical location by a memory unit management mechanism, and reads the first detection data stored by the memory components of the physical location as a second Detecting the data, and comparing whether the first detection data and the second detection data are the same, to generate a detection result, and returning the detection result to the host.

The invention further discloses a detecting device for a memory component, comprising: a host, outputting a detection command to a storage controller, wherein the storage controller sequentially writes a first detection data to a logical position according to the detection command. a plurality of memory elements, and after writing, converting the logical position into a physical position by a memory unit management mechanism, and reading the first detected data stored by the memory elements corresponding to the physical position as a second detection data, and comparing Whether the first detection data and the second detection data are the same to generate a detection result, and return the detection result to the host.

10, 40‧‧‧ host

20, 22, 24, 500, 520, 540 ‧ ‧ storage controller

30, 32, 34, 502, 522, 542 ‧ ‧ memory components

50, 52, 54‧‧‧ memory devices

1 is a circuit block diagram of a detecting device for a memory device according to a preferred embodiment of the present invention; and FIG. 2 is a flow chart showing a method for detecting a memory device according to a preferred embodiment of the present invention; FIG. 3 is a flow chart of writing, reading, and comparing detection data according to a preferred embodiment of the present invention; FIG. 4 is a diagram of writing, reading, and comparing detection according to another preferred embodiment of the present invention; A flowchart of the data; and FIG. 5 is a circuit block diagram of a detecting device for a memory element according to another preferred embodiment of the present invention.

Certain terms are used throughout the description and following claims to refer to particular elements. Those of ordinary skill in the art should understand that a hardware manufacturer may refer to the same component by a different noun. The scope of this specification and the subsequent patent application do not use the difference of the names as the means for distinguishing the elements, but the difference in function of the elements as the criterion for distinguishing. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term "coupled" is used herein to include any direct and indirect electrical connection. Therefore, if a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device or indirectly electrically connected to the second device through other devices or connection means.

In order to provide a better understanding and understanding of the features and the efficacies of the present invention, the preferred embodiment and the detailed description are as follows:

Please refer to FIG. 1 , which is a circuit block diagram of a detecting device for a memory element according to a preferred embodiment of the present invention. As shown in the figure, the detecting device of the memory component of the embodiment includes a host 10 and a storage controller 20. The host 10 is configured to output a detection command to the storage The controller 20 is stored. The storage controller 20 sequentially writes a first detection data to a plurality of memory elements 30 corresponding to a logical position of a logic detection range according to the detection command, and writes a memory unit management data (required for the memory unit management mechanism) Data) to the memory elements 30, and after the writing, the logical position is converted into a physical position according to the memory unit management mechanism, and then the first detection data stored by the memory element 30 corresponding to the physical positions is read as a first Second, the detection data is compared, and the first detection data and the second detection data are compared to generate a detection result, and the detection result is returned to the host 10.

The first detection data written by the storage controller 20 can be built in the storage controller 20. When the host 10 transmits the detection command including the logic detection range to the storage controller 20, the storage controller 20 outputs the first The data is detected, and the logical position within the logical detection range is converted into a physical position by its memory unit management mechanism, and written to the memory elements 30 corresponding to the physical location. Alternatively, the storage controller 20 may internally include a detection data table (not shown), and output the first detection data corresponding to the detection command according to the detection command output by the host 10.

Please refer to FIG. 2, which is a flowchart of a method for detecting a memory element according to a preferred embodiment of the present invention. As shown in the figure, step S10 is first executed, and the detection is started. Then, in step S20, the host 10 outputs a detection command to the storage controller 20 to set the logical detection range of the memory device 30 by the storage controller 20. The logical detection range is Corresponding to the logical position interval of the memory elements 30 to be detected. Then, in step S30, the storage controller 20 converts the logical position into a physical location through the memory unit management mechanism according to the detection command, and sequentially writes the first detection data to the memory elements 30 corresponding to the physical location, and simultaneously stores the memory elements 30 according to the memory. The unit management mechanism needs to write a memory unit management data (the data required for management) to the memory unit for updating, and then, after writing, again obtain the entity corresponding to the logical position through the memory unit management mechanism. The first detection data stored by the memory elements 30 read at the physical location is the second detection data, and the first detection data and the second detection data are compared to generate a detection result. Next, in step S40, the storage controller 20 transmits the detection result back to the host 10. Next, step S50 is performed, and the detection ends.

Please refer to FIG. 3, which is a flow chart of writing, reading and comparing detection data according to a preferred embodiment of the present invention. As shown in the figure, after the storage controller 20 receives the detection command outputted by the host 10, step S301 is executed, and the storage controller 20 converts the logical position into a physical location through the memory unit management mechanism according to the detection command and writes the first The data is detected to one of the memory elements 30 corresponding to the physical location, and the memory unit management data is written into the memory element 30 for updating. Then, in step S303, the storage controller 20 determines whether the first detection data is successfully written. If the writing is unsuccessful (if the memory unit management data update fails, the writing is unsuccessful), indicating that the memory component 30 is defective. And skipping directly to step S40, the detection result is transmitted back to the host 10, and if the writing is successful, step S305 is performed. Step S305, after the storage controller 20 converts the logical position into the physical location through the memory unit management mechanism, the physical position of the first detection data is written in step S301, and is written into the memory component 30 of the first detection data. The data is read, that is, the written first detection data is read (the first detection data read by the present invention is represented as the second detection data).

Next, in step S307, the storage controller 20 compares whether the written first detection data and the read second detection data are the same. If the two are different, the memory element 30 is defective, and directly jumps to step S40. To return the detection result to the host 10, if the two are the same, the memory element 30 is normal, and step S309 is performed. In step S309, the storage controller 20 determines whether all the detected data has been written (first detection data), read (second detection data), and the comparison is completed, that is, the storage controller 20 Determining whether the memory elements 30 within the logic detection range have been written, read, and compared by the detection data, if the memory elements 30 within the logic detection range are not written, read, and compared When yes, the process returns to step S301, and the storage controller 20 writes to the memory component 30 that has not written the first detection data. If it is determined in step S309, the memory elements 30 in the logic detection range are written and read. After the comparison is completed, step S40 is executed, and the storage controller 20 returns the detection result to the host 10.

As can be seen from the above, the storage controller 20 of the present embodiment first writes, reads, and compares one of the memory elements 30 within the logic detection range according to the detection command, and writes and reads the memory element 30. After the comparison is completed, the writing, reading and comparison of the next memory element 30 are performed until the memory elements 30 within the logic detection range are all written, read and compared to complete the detection.

Please refer to FIG. 4, which is a flow chart of writing, reading and comparing detection data according to another preferred embodiment of the present invention. As shown in the figure, after the storage controller 20 receives the detection command output by the host 10, step S302 is executed, and the storage controller 20 converts the logical position into a physical position through the memory unit management mechanism according to the detection command, and writes the first The data is detected to one of the memory elements 30 corresponding to the physical location, and the memory unit management data is written to the memory element 30 for updating. Next, in step S304, the storage controller 20 determines whether the first detection data and the memory unit management data are successfully written. If the writing is unsuccessful, it indicates that the memory element 30 is defective, and directly jumps to step S40 to The detection result is transmitted back to the host 10, and if the writing is successful, step S306 is performed. Step S306: The storage controller determines whether the memory elements 30 in the logic detection range are all written into the first detection data. If not, the process returns to step S301, and the storage controller 20 writes the first detection data. The memory component 30 corresponding to the logical position writes the first detection data, and if the logic detection is determined in step S306 After the memory elements 30 in the range have been written, step S308 is performed. Step S308, the storage controller 20 reads the detection data from the memory elements 30 corresponding to the logical position of the first detection data, respectively (this action includes the behavior of querying the physical position by the memory unit management mechanism with the logical position), that is, The first detected data written is read out (the first detected data read by the present invention is represented as the second detected data).

Next, in step S310, the storage controller 20 compares whether the written first detection data and the read second detection data are the same. If the two are different, the memory element 30 is defective, and directly jumps to step S40. To return the detection result to the host 10, if the two are the same, the memory element 30 is normal, and step S312 is performed. In step S312, the storage controller 20 determines whether all the detected data have been read and compared, that is, the storage controller 20 determines whether the memory elements 30 within the logical detection range have been read by the second detection data. After the comparison is completed, if the memory elements 30 in the logic detection range are not read and compared, the process returns to step S308, and the storage controller 20 performs the memory element 30 on which the second detection data has not been read. If it is determined in step S312 that the memory elements 30 in the logic detection range have been read and compared, step S40 is executed, and the storage controller 20 returns the detection result to the host 10.

Compared with the embodiment of FIG. 3, the storage controller 20 of the embodiment first writes the first detection data to the memory elements 30 corresponding to the physical position corresponding to the logical detection range according to the detection command. After the memory elements 30 corresponding to the physical position corresponding to the logic detection range are all written, the memory elements 30 corresponding to the physical position corresponding to the logic detection range are sequentially read and compared until the logic detection range is completed. The memory elements 30 in the physical location corresponding to the internal reading are completed, and the comparison is completed. Detection.

Referring to FIG. 1 , the detecting device of the memory device of the present invention may further include a plurality of storage controllers 22 and 24, and the storage controllers 22 and 24 are respectively coupled to the plurality of memory elements 32 and 34, and the host 10 may be in accordance with the second to fourth embodiments. The detection method of the figure, and the memory elements 30, 32, 34 coupled to the storage controllers 20, 22, 24 are detected separately and simultaneously, and the detection mode is as described in FIG. Let me repeat.

Please refer to FIG. 5, which is a circuit block diagram of a detecting device for a memory element according to another preferred embodiment of the present invention. As shown in the figure, the detecting device of the memory component of the embodiment includes only a host 40. The host 40 outputs a detection command to a storage controller 500 of a memory device 50. The storage controller 500 sequentially writes according to the detection command. The first detection data is to the complex memory component 502 corresponding to the logic detection range, and after reading, the first detection data stored by the memory component 502 corresponding to the logic detection ranges is read as the second detection data, and the first detection is compared. The data and the second detection data are used to generate a detection result, and the detection result is returned to the host 40.

The difference between the embodiment and the embodiment of FIG. 1 is that the detecting device of the memory component of the embodiment only includes the host 40, and the storage controller 500 and the memory components 502 are disposed on the memory device 50. 50 can be, for example, a flash drive. When the memory device 50 needs to be detected, the memory device 50 only needs to be connected to the host device 40. The storage controller 500 performs the detection of the memory component 502 according to the detection command transmitted by the host 40, and the detection method is the same. This is illustrated in the above Figures 1-4 and will not be described again.

In addition, in this embodiment, the plurality of memory devices can be simultaneously detected. For example, when the plurality of memory devices 50, 52, and 54 are simultaneously connected to the host computer 40, the memory controllers 50, 52, and 54 are stored in the memory controllers 500, 520, and 540. At the same time, according to the detection transmitted by the host 40 The memory elements 502, 522, and 542 are detected by commands, and the detection mode is also as described in FIG. 2-4, and details are not described herein.

In summary, the detecting device of the memory component of the present invention and the detecting method thereof, by a host outputting a detection command to at least one storage controller, to control the storage controller to be coupled to the plurality of storage unit management mechanism pairs thereof The memory component performs the comparison of the writing, reading and detecting data of the detection data and the memory unit management data. In this way, the present invention does not need to be controlled by the host when detecting each memory component, thereby reducing the resources occupied by the line between the host and the storage controllers, increasing the detection efficiency, and detecting the correctness.

10‧‧‧Host

20, 22, 24‧‧‧ storage controller

30, 32, 34‧‧‧ memory components

Claims (11)

A method for detecting a memory component, the method comprising: outputting a detection command by a host, the host system is connected to a plurality of storage controllers; and each of the storage controllers receives the detection command, and according to the detection command And sequentially writing a first detection data to a plurality of memory elements corresponding to a logical position, and updating a memory unit management data, and after searching, querying physical positions of the memory elements through a memory unit management mechanism, and reading The first detection data stored by the memory elements corresponding to the physical location is a second detection data, and is different from the first detection data and the second detection data to generate a detection result respectively; The storage controllers transmit the detection results to the host. The detection method of claim 1, wherein the detection command is received by each of the storage controllers, and the first detection data is sequentially written according to the detection command to the logical position. And the step of: reading, by the memory device, the first detection data stored in the memory component corresponding to the physical location as the second data comprises: detecting, by each of the storage controllers The first detection data is sequentially written to the memory elements corresponding to the logical position, and the first detection data stored by the memory elements is sequentially read as the second detection data. The detection method of claim 2, wherein, when the first detection data stored in the memory elements is sequentially read as the second detection data, each of the storage controllers is sequentially Reading the second detection data after comparing the first detection Whether the data is identical to the second test data to generate the test results. The detection method of claim 1, wherein the storage controllers respectively build the first detection data. The detection method of claim 1, wherein the detection command sets a logic detection range of each of the memory controllers for the memory elements, the logic detection range corresponding to the memory elements to be detected Quantity. A detecting device for a memory component, comprising: a host, outputting a detection command; and a plurality of storage controllers connected to the host, and each of the storage controllers sequentially writes a first according to the detection command Detecting data to a plurality of memory elements corresponding to a logical position and updating a memory unit management data, and after writing, querying a physical position corresponding to the logical position by a memory unit management mechanism, and reading the memory elements of the physical position The stored first detection data is a second detection data, and is different from the first detection data and the second detection data to generate a detection result, and the storage controllers return the detection results. To the host. The detecting device of claim 6, wherein each of the storage controllers sequentially writes the first detection data to the memory elements corresponding to the logical position according to the detection command, and sequentially The first detection data stored in the memory elements is read as the second detection data. The detecting device of claim 6, wherein each of the storage controllers sequentially writes the first detection data to the memory elements corresponding to the logical position according to the detection command, and After the writing of the memory component is completed, each of the storage controllers sequentially reads the first detection data stored by the memory components as the second detection data. The detecting device according to claim 6, wherein each of the storage controls The first detection data is built in separately. The detecting device of claim 6, wherein the detecting command sets a logical detection range of each of the memory controllers for the memory components, wherein the logic detecting range corresponds to the memory components to be detected. Quantity. A detecting device for a memory component, comprising: a host, outputting a detection command to a plurality of storage controllers, each of the storage controllers sequentially writing a first detection data to a logical position according to the detection command a plurality of memory elements, and after the writing, convert the logical position into a physical position by using a memory unit management mechanism, and reading the first detection data stored by the memory elements corresponding to the physical position as a second detection data, and Whether the first detection data and the second detection data are the same to generate a detection result respectively, and return the detection results to the host.