TWI558099B - Automatic quadrature network with phase and amplitude detection - Google Patents

Automatic quadrature network with phase and amplitude detection Download PDF

Info

Publication number
TWI558099B
TWI558099B TW102143020A TW102143020A TWI558099B TW I558099 B TWI558099 B TW I558099B TW 102143020 A TW102143020 A TW 102143020A TW 102143020 A TW102143020 A TW 102143020A TW I558099 B TWI558099 B TW I558099B
Authority
TW
Taiwan
Prior art keywords
orthogonal
signal
control signal
amplitude
phase
Prior art date
Application number
TW102143020A
Other languages
Chinese (zh)
Other versions
TW201521357A (en
Inventor
凱莉 嘉瑞森
雷蒙德 維斯
高爾登 歐森
傑弗瑞 鄂爾斯
Original Assignee
泰克特洛尼克斯公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 泰克特洛尼克斯公司 filed Critical 泰克特洛尼克斯公司
Priority to TW102143020A priority Critical patent/TWI558099B/en
Publication of TW201521357A publication Critical patent/TW201521357A/en
Application granted granted Critical
Publication of TWI558099B publication Critical patent/TWI558099B/en

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

具有相位及振幅偵測之自動正交網路 Auto-orthogonal network with phase and amplitude detection

本發明係有關正交頻率轉換器,且更特別是有關具有相位及振幅偵測之自動正交網路,以同時消除頻率轉換器輸出中之相位及振幅的誤差。 The present invention relates to orthogonal frequency converters, and more particularly to automatic quadrature networks having phase and amplitude detection to simultaneously eliminate phase and amplitude errors in the output of the frequency converter.

正交(I/Q)頻率轉換器依靠具有一對混波器,其被正交本地振盪器訊號(亦即,相同頻率,但是相位相差90度的兩個訊號)所驅動。達成此想要的結果之較簡單的方法中之其中一個方法係要將單一頻率輸入至具有兩條相移路徑(其中一條路徑為串聯電阻器,之後並聯電容器(RC)的路徑;及另一條路徑為串聯電容器,之後並聯電阻器(CR)的路徑)的正交網路。若此等電阻為相等的,且此等電容為相等的,則對於所輸入的單一頻率而言,具有特定的頻率,其中,此兩條路徑的輸出為相等振幅及正交相位。在此特定的頻率之外,雖然保持其相位關係,但是振幅會變化。 The quadrature (I/Q) frequency converter relies on having a pair of mixers that are driven by quadrature local oscillator signals (i.e., two signals of the same frequency but 90 degrees out of phase). One of the simpler ways to achieve this desired result is to input a single frequency into a path with two phase shift paths (one of which is a series resistor followed by a parallel capacitor (RC); and the other The path is an orthogonal network of series capacitors followed by a path of parallel resistors (CR). If the resistances are equal and the capacitances are equal, then for a single frequency input, there is a particular frequency, wherein the outputs of the two paths are equal amplitude and quadrature. Outside of this particular frequency, although the phase relationship is maintained, the amplitude changes.

產生來自本地振盪器(LO)的正交訊號之一種方法 使用振幅偵測器,及回授控制迴路,此回授控制迴路調整RC及CR路徑中的電阻或電容值,直到此等正交訊號的振幅相匹配為止。此方法係藉由美國專利第5644260號(DaSilva)及英國專利第1345274號(Ratzel)來予以舉例說明。然而,當此網路的不變組件並不匹配時、當可變組件並不準確地追蹤時、或當寄生組件存在時,此方法並不能夠產生完美的相位正交及相等的振幅。例如,因為某些非理想元件(R與其他元件相較,為太大或太小,或者C也有相同的問題等),所以一個正交訊號路徑中的RC電路之頻率為太低,而另一個正交訊號路徑中的CR電路之頻率為太高。圖1為DaSilva實施的圖示表示,其顯示在指定的頻率(100MHz(百萬赫茲)),正交訊號的振幅為相等的,但是此兩個正交訊號之間的相位差在整個頻譜上改變,在此範例中,在100MHz的LO頻率,相位差為100°,而非90°。為了達成適當的相位關係,靜態Vcal訊號結合所偵測出的振幅一起被使用,此Vcal訊號係選自特定的本地振盪器訊號輸入之頻率表。然而,由於時間及溫度,所以此Vcal訊號不能導致此網路的動態改變,因而此網路需要頻繁的校正,或總是有某些相位誤差存在。 A method of generating an orthogonal signal from a local oscillator (LO) Using an amplitude detector and a feedback control loop, the feedback control loop adjusts the resistance or capacitance values in the RC and CR paths until the amplitudes of the orthogonal signals match. This method is exemplified by U.S. Patent No. 5,644,260 (DaSilva) and British Patent No. 1,345,274 (Ratzel). However, this approach does not produce perfect phase quadrature and equal amplitude when the invariant components of the network do not match, when the variable components are not accurately tracked, or when parasitic components are present. For example, because some non-ideal components (R is too large or too small compared to other components, or C has the same problem, etc.), the frequency of the RC circuit in an orthogonal signal path is too low, and The frequency of the CR circuit in an orthogonal signal path is too high. Figure 1 is a graphical representation of the DaSilva implementation showing that at the specified frequency (100 MHz (million Hz)), the amplitudes of the orthogonal signals are equal, but the phase difference between the two orthogonal signals is over the entire spectrum. Change, in this example, at an LO frequency of 100 MHz, the phase difference is 100° instead of 90°. In order to achieve an appropriate phase relationship, the static Vcal signal is used in conjunction with the detected amplitude, which is selected from the frequency table of the particular local oscillator signal input. However, due to time and temperature, this Vcal signal does not cause dynamic changes to the network, so the network requires frequent corrections or there is always some phase error present.

若振幅匹配不存在,則替代方法使用相位偵測器及回授迴路,以調整一個正交(RC)路徑或另一正交(CR)路徑,直到達成完美的相位正交為止,如同藉由美國專利第4908532號(Chadwick)所舉例說明者。然而,雖然此 訊號通過限定級(stages),但是忽略振幅匹配會致使振幅誤差。因為在寬廣範圍的振幅差期間,相位差會是90°,所以一側或另一側會是如此急需訊號,而使得限制放大器誤不能限制。因為在此等混波器的輸入處,本地振盪器準位不相同,所以這致使此兩個混波器之間的匹配差。 If the amplitude match does not exist, the alternative method uses a phase detector and a feedback loop to adjust one quadrature (RC) path or another orthogonal (CR) path until a perfect phase is orthogonal, as if U.S. Patent No. 4,908,532 (Chadwick) is exemplified. However, although this The signal passes through the stages, but ignoring the amplitude match causes the amplitude error. Since the phase difference will be 90° during a wide range of amplitude differences, one side or the other side will be so in urgent need of the signal that the limiting amplifier cannot be limited. Since the local oscillator levels are not the same at the input of these mixers, this results in a poor match between the two mixers.

想要的是正交頻率轉換器的自動正交網路,其為自本地振盪器所得到的正交訊號提供相等的振幅及理想的正交相位。 What is desired is an auto-orthogonal network of orthogonal frequency converters that provides equal amplitude and ideal quadrature phase for the quadrature signals derived from the local oscillator.

因此,本發明提供一種具有相位及振幅偵測的自動正交網路,其為自本地振盪器所得到的正交訊號提供相等的振幅及理想的正交相位。RC電路提供一個正交路徑,而CR電路提供另一個正交路徑。來自RC/CR電路的輸出被偵測振幅,以產生振幅控制訊號。此等輸出還被限制振幅,且偵測限制器輸出處的輸出之間的相位,以產生相位控制訊號。振幅控制訊號與相位控制訊號被組合,以產生RC/CR電路之各自的控制訊號,而使RC/CR電路自動校準,而使得此等正交訊號為相等的振幅及理想的正交相位。 Accordingly, the present invention provides an automatic quadrature network with phase and amplitude detection that provides equal amplitude and ideal quadrature phase for the quadrature signals derived from the local oscillator. The RC circuit provides one orthogonal path and the CR circuit provides another orthogonal path. The output from the RC/CR circuit is sensed to generate an amplitude control signal. These outputs are also limited in amplitude and detect the phase between the outputs at the limiter output to produce a phase control signal. The amplitude control signal and the phase control signal are combined to generate respective control signals of the RC/CR circuit, and the RC/CR circuit is automatically calibrated such that the orthogonal signals are of equal amplitude and ideal quadrature phase.

當結合附圖的圖式及申請專利範圍而研讀時,本發明之目的、優點、及其他的新穎性係自下面詳細的說明而顯然可知。 The objects, advantages, and other novel features of the invention are apparent from the description and appended claims.

12‧‧‧第一可變電阻器 12‧‧‧First variable resistor

14‧‧‧第一電容器 14‧‧‧First capacitor

16‧‧‧第二電容器 16‧‧‧second capacitor

18‧‧‧第二可變電阻器 18‧‧‧Second variable resistor

20‧‧‧緩衝線性放大器級 20‧‧‧buffered linear amplifier stage

22‧‧‧緩衝線性放大器級 22‧‧‧Buffered linear amplifier stage

24‧‧‧二極體峰值偵測器 24‧‧‧Bridge Peak Detector

26‧‧‧二極體峰值偵測器 26‧‧‧Bridge peak detector

28‧‧‧第一差動直流(d.c.)放大器 28‧‧‧First Differential DC (d.c.) Amplifier

30‧‧‧限制放大器級 30‧‧‧Restricted amplifier stage

32‧‧‧限制放大器級 32‧‧‧Restricted amplifier stage

34‧‧‧相位偵測器 34‧‧‧ phase detector

36‧‧‧第二差動直流放大器 36‧‧‧Second differential DC amplifier

38‧‧‧總和網路 38‧‧‧Total network

40‧‧‧總和網路 40‧‧‧Total network

圖1係假設輸入本地振盪器訊號的相等振幅正交訊號,但不是理想相位正交之一種習知技術方法的圖示說明。 Figure 1 is an illustration of a conventional technique for assuming equal amplitude quadrature signals of a local oscillator signal, but not ideal phase quadrature.

圖2係依據本發明之自動正交網路的方塊圖。 2 is a block diagram of an auto-orthogonal network in accordance with the present invention.

圖3係依據本發明之來自自動正交網路的正交輸出之圖示說明。 3 is an illustration of an orthogonal output from an auto-orthogonal network in accordance with the present invention.

現在參照圖2,本地振盪器訊號被輸入至一對路徑(具有第一可變電阻器12與接地的第一電容器14串聯之一個路徑(RC),及有第二電容器16與接地的第二可變電阻器18串聯之另一個路徑(CR))。此等各自的路徑之電阻器/電容器接合點(junction)被耦接至各自的緩衝線性放大器級20,22的輸入。來自放大器級20,22的輸出被輸入至各自的二極體峰值偵測器24,26,以偵測自此等放大器級所輸出的訊號之各自的振幅。來自二極體峰值偵測器24,26的振幅訊號被輸入至第一差動直流(d.c.)放大器28,在此輸出的差值為直流振幅控制訊號(若此等振幅為相等,則此直流振幅控制訊號為零,或此直流振幅控制訊號依據哪一個振幅訊號是較大的,而為正的此差值,或負的此差值)。 Referring now to Figure 2, the local oscillator signal is input to a pair of paths (a path (RC) having a first variable resistor 12 in series with a grounded first capacitor 14, and a second capacitor 16 and a second grounded The other path (CR) of the variable resistor 18 is connected in series. The resistor/capacitor junctions of these respective paths are coupled to the inputs of the respective buffered linear amplifier stages 20, 22. The outputs from amplifier stages 20, 22 are input to respective diode peak detectors 24, 26 to detect the respective amplitudes of the signals output from the amplifier stages. The amplitude signals from the diode peak detectors 24, 26 are input to a first differential direct current (dc) amplifier 28 where the difference is a DC amplitude control signal (if the amplitudes are equal, then the DC The amplitude control signal is zero, or the DC amplitude control signal is based on which amplitude signal is larger, and is positive or negative.

在各自的放大器級24,26之後,此等路徑驅動各自 的限制放大器級30,32,其輸出為LO輸入訊號之想要的正交分量(LO-I及LO-Q),其輸出還被輸入至相位偵測器34。來自相位偵測器34的輸出被輸入至第二差動直流放大器36,其第二輸入被連接至地,以提供直流相位控制訊號(若此等相位是理想相位正交,則此直流相位控制訊號為零,或若此等相位不是理想相位正交,則此直流相位控制訊號為非零)。 After the respective amplifier stages 24, 26, these paths drive each The limiting amplifier stages 30, 32, whose outputs are the desired quadrature components (LO-I and LO-Q) of the LO input signal, are also input to the phase detector 34. The output from phase detector 34 is input to a second differential DC amplifier 36, the second input of which is coupled to ground to provide a DC phase control signal (if such phases are ideal phase quadrature, then the DC phase control The signal is zero, or if the phases are not ideal phase quadrature, the DC phase control signal is non-zero).

來自各自的差動直流放大器28,36之直流控制訊號被輸入至各自的總和網路38,40,一個用作為加法器,而另一個用作為減法器。來自加法器38的輸出控制第一路徑的輸入處之第一可變電阻器12,而來自減法器40的輸出控制第二路徑中之被連接至地的第二可變電阻器。當LO-I及LO-Q為相等振幅及理想相位正交時,在差動直流放大器28,36的輸入處之各自的直流誤差訊號被降低至零,而此等直流控制訊號保持其值。 The DC control signals from the respective differential DC amplifiers 28, 36 are input to respective summing networks 38, 40, one for the adder and the other for the subtractor. The output from adder 38 controls the first variable resistor 12 at the input of the first path, and the output from subtractor 40 controls the second variable resistor in the second path that is connected to ground. When LO-I and LO-Q are equal amplitude and the ideal phase is orthogonal, the respective DC error signals at the inputs of the differential DC amplifiers 28, 36 are reduced to zero, and the DC control signals maintain their values.

在「真實世界」環境中,各自的正交路徑之RC及CR電路不是理想的,且限制放大器30,32引入其本身的相位誤差,作為輸入振幅的函數。習知的參考案(DaSilva或Chadwick)皆未完全回答這些問題。僅使用Chadwick偵測器34,無法集中在試圖保持固定相位,而RC/CR電路自調整範圍的一端飄移(wander)至另一端。最後,RC/CR電路被驅動至其範圍的一端,其中,其不太可能能夠恢復。DaSilva因為振幅僅在單一頻率處保持平衡,所以使RC/CR電路鎖定到某部分上。然而,即使這 樣,但是會有破壞理想相位正交的大相位誤差,此等誤差不能被自動地修正。 In a "real world" environment, the RC and CR circuits of the respective orthogonal paths are not ideal, and the limiting amplifiers 30, 32 introduce their own phase errors as a function of the input amplitude. None of the familiar references (DaSilva or Chadwick) fully answer these questions. With only the Chadwick detector 34, it is not possible to concentrate on trying to maintain a fixed phase, while the RC/CR circuit wanders from one end of the adjustment range to the other. Finally, the RC/CR circuit is driven to one end of its range where it is unlikely to be recoverable. DaSilva locks the RC/CR circuit to a certain part because the amplitude is only balanced at a single frequency. However, even this However, there will be large phase errors that destroy the ideal phase quadrature, and these errors cannot be automatically corrected.

圖3圖示地顯示圖2的網路之結果,其同時使用振幅及相位偵測,以當任何相位/振幅誤差在此兩條正交訊號路徑中上升時,自動修正任何相位/振幅誤差。由於RC及CR電路自動地被修正地校準,所以在LO頻率(在此範例中,100MHz),此結果為相等振幅;及在遍及整個頻率範圍,此結果為固定的90°相位關係。 Figure 3 graphically shows the results of the network of Figure 2, which uses both amplitude and phase detection to automatically correct for any phase/amplitude error when any phase/amplitude error rises in the two orthogonal signal paths. Since the RC and CR circuits are automatically calibrated to be corrected, at the LO frequency (100 MHz in this example), the result is equal amplitude; and throughout the entire frequency range, the result is a fixed 90° phase relationship.

因此,本發明藉由將來自RC/CR電路之偵測出的振幅差,以及來自正交輸出訊號之間的理想相位正交之偵測出的變化回授(此等差值及變化一起提供校準RC/CR電路的自動控制訊號,以為此等正交輸出訊號產生相等的振幅及理想的相位正交),而提供具有同時振幅及相位偵測的自動正交網路。 Accordingly, the present invention provides feedback by detecting the amplitude difference from the RC/CR circuit and the detected change from the ideal phase orthogonal between the orthogonal output signals (these differences and variations are provided together) The auto-control signal of the RC/CR circuit is calibrated to produce equal amplitude and ideal phase quadrature for the quadrature output signals, and an auto-orthogonal network with simultaneous amplitude and phase detection is provided.

12‧‧‧第一可變電阻器 12‧‧‧First variable resistor

14‧‧‧第一電容器 14‧‧‧First capacitor

16‧‧‧第二電容器 16‧‧‧second capacitor

20‧‧‧緩衝線性放大器級 20‧‧‧buffered linear amplifier stage

22‧‧‧緩衝線性放大器級 22‧‧‧Buffered linear amplifier stage

24、26‧‧‧二極體峰值偵測器 24, 26‧ ‧ diode peak detector

28‧‧‧第一差動直流(d.c.)放大器 28‧‧‧First Differential DC (d.c.) Amplifier

30‧‧‧限制放大器級 30‧‧‧Restricted amplifier stage

32‧‧‧限制放大器級 32‧‧‧Restricted amplifier stage

34‧‧‧相位偵測器 34‧‧‧ phase detector

36‧‧‧第二差動直流放大器 36‧‧‧Second differential DC amplifier

38‧‧‧總和網路 38‧‧‧Total network

40‧‧‧總和網路 40‧‧‧Total network

Claims (8)

一種自動正交網路,用以為想要的頻率訊號產生具有相等振幅及理想相位正交的輸出正交訊號,該自動正交網路包含:一對正交訊號路徑,具有作為輸入之該想要的頻率訊號,用以在各自的輸出產生一對臨時正交訊號,該對正交訊號路徑包含:RC電路,具有作為輸入之該想要的頻率訊號,及具有輸出;以及CR電路,具有作為輸入之該想要的頻率訊號,及具有輸出;振幅偵測機構,用以偵測該等臨時正交訊號之各自的振幅,以產生振幅控制訊號;相位差偵測機構,用以偵測該等臨時正交訊號之間的相位差,以產生相位控制訊號;以及組合機構,用以組合該振幅控制訊號與該相位控制訊號,以自動產生校準該對正交路徑之各自的正交控制訊號,而使得該等輸出正交訊號具有相等振幅及理想相位正交,該組合機構包含:該振幅控制訊號與該相位控制訊號的相加機構,用以產生該RC電路的第一控制訊號;以及該振幅控制訊號與該相位控制訊號的相減機構,用以產生該CR電路的第二控制訊號;藉此,該RC電路與該CR電路被自動校準,而 使得該等輸出正交訊號具有相等振幅及理想相位正交。 An automatic orthogonal network for generating an output quadrature signal having equal amplitude and ideal phase quadrature for a desired frequency signal, the auto-orthogonal network comprising: a pair of orthogonal signal paths having the input as an input The desired frequency signal is used to generate a pair of temporary orthogonal signals at respective outputs, the pair of orthogonal signal paths comprising: an RC circuit having the desired frequency signal as an input, and having an output; and a CR circuit having The desired frequency signal is input and has an output; the amplitude detecting mechanism is configured to detect respective amplitudes of the temporary orthogonal signals to generate an amplitude control signal; and the phase difference detecting mechanism is configured to detect a phase difference between the temporary orthogonal signals to generate a phase control signal; and an combining mechanism for combining the amplitude control signal and the phase control signal to automatically generate respective orthogonal controls for calibrating the pair of orthogonal paths a signal such that the output orthogonal signals have equal amplitude and ideal phase orthogonality, and the combining mechanism includes: the amplitude control signal and the phase control signal An adding mechanism, configured to generate a first control signal of the RC circuit; and a subtracting mechanism of the amplitude control signal and the phase control signal for generating a second control signal of the CR circuit; thereby, the RC circuit and The CR circuit is automatically calibrated, and The output quadrature signals are of equal amplitude and ideal phase orthogonal. 如申請專利範圍第1項之自動正交網路,其中,該對正交訊號路徑包含:該RC電路及該CR電路各自的線性放大器,具有被耦接至該RC電路及該CR電路之各自的輸出之輸入,用以在該等線性放大器之各自的輸出提供該等臨時正交訊號。 The automatic orthogonal network of claim 1, wherein the pair of orthogonal signal paths comprises: the RC circuit and the respective linear amplifier of the CR circuit, having respective ones coupled to the RC circuit and the CR circuit The inputs of the outputs are used to provide the temporary orthogonal signals at respective outputs of the linear amplifiers. 如申請專利範圍第2項之自動正交網路,其中,該振幅偵測機構包含:第一二極體偵測器,具有作為輸入之該等臨時正交訊號的其中一者,用以產生第一振幅訊號;第二二極體偵測器,具有作為輸入之該等臨時正交訊號的另一者,用以產生第二振幅訊號;以及該第一振幅訊號與該第二振幅訊號的組合機構,用以在輸出產生該振幅控制訊號,該振幅控制訊號為該第一振幅訊號與該第二振幅訊號之間的差值。 The automatic orthogonal network of claim 2, wherein the amplitude detecting mechanism comprises: a first diode detector having one of the temporary orthogonal signals as an input for generating a first amplitude signal; a second diode detector having the other one of the temporary orthogonal signals as an input for generating a second amplitude signal; and the first amplitude signal and the second amplitude signal The combination mechanism is configured to generate the amplitude control signal at the output, where the amplitude control signal is a difference between the first amplitude signal and the second amplitude signal. 如申請專利範圍第3項之自動正交網路,其中,該相位差偵測機構包含:各自的限制放大器,具有被耦接來接收該等臨時正交訊號的各自臨時正交訊號之輸入,用以在各自的輸出產生該等輸出正交訊號;相位偵測器,具有被耦接至該等限制放大器的輸出之輸入,及具有用以產生相位差訊號的輸出;以及比較器,具有作為第一輸入的該相位差訊號,及具有 作為第二輸入的接地訊號,用以在輸出產生該相位控制訊號。 The automatic orthogonal network of claim 3, wherein the phase difference detecting mechanism comprises: respective limiting amplifiers having inputs of respective temporary orthogonal signals coupled to receive the temporary orthogonal signals, For generating the output orthogonal signals at respective outputs; a phase detector having an input coupled to an output of the limiting amplifiers and having an output for generating a phase difference signal; and a comparator having The phase difference signal of the first input, and having The ground signal as the second input is used to generate the phase control signal at the output. 一種改進的正交網路,該型式具有RC正交路徑及CR正交路徑,用以為輸入至該等各自的路徑之頻率訊號產生正交輸出訊號;及具有來自該等各自的路徑之該等正交輸出訊號的振幅偵測機構,用以產生調整該等各自的路徑之振幅控制訊號,以確保特定頻率的該頻率訊號之該等正交輸出訊號的相等振幅,該改進包含:限制機構,用以限制該等正交輸出訊號的振幅,以產生作為該等正交輸出訊號之限制的正交輸出訊號,該限制機構包含:第一限制放大器,被耦接來接收來自該RC路徑的輸出作為輸入,以在被耦接至該相位偵測器的輸入之其中一者的輸出處,提供第一限制的正交輸出訊號;以及第二限制放大器,被耦接來接收來自該CR路徑的輸出作為輸入,以在被耦接至該相位偵測器的輸入之另一者的輸出處,提供第二限制的正交輸出訊號,該第一限制的正交輸出訊號及該第二限制的正交輸出訊號成為該等限制的正交輸出訊號;相位差偵測機構,用以偵測該等限制的正交輸出訊號之間的相位差,以產生相位控制訊號,其包含相位偵測器,該相位偵測器具有作為輸入之該等限制的正交輸出訊號,及作為輸出的該相位控制訊號;以及組合機構,用以組合該振幅控制訊號與該相位控制訊 號,以產生自動調整該等各自的路徑之組合的控制訊號,以確保該等限制的正交輸出訊號之相等振幅,及在該頻率訊號的任何頻率之該等限制的正交輸出訊號之間的理想相位正交。 An improved orthogonal network having RC orthogonal paths and CR orthogonal paths for generating quadrature output signals for frequency signals input to the respective paths; and having such paths from the respective paths An amplitude detecting mechanism for the orthogonal output signals for generating amplitude control signals for adjusting the respective paths to ensure equal amplitudes of the orthogonal output signals of the frequency signals of a specific frequency, the improvement comprising: a limiting mechanism, And limiting the amplitude of the orthogonal output signals to generate a quadrature output signal as a limit of the orthogonal output signals, the limiting mechanism comprising: a first limiting amplifier coupled to receive an output from the RC path Providing, as an input, a first limited quadrature output signal at an output of one of the inputs coupled to the phase detector; and a second limiting amplifier coupled to receive the CR path Outputting as an input to provide a second limited quadrature output signal at an output coupled to the other of the inputs of the phase detector, the first limited orthogonal The output signal and the second limited orthogonal output signal become the limited orthogonal output signals; the phase difference detecting mechanism is configured to detect a phase difference between the limited orthogonal output signals to generate phase control a signal, comprising a phase detector having the quadrature output signal as the input, and the phase control signal as an output; and an combining mechanism for combining the amplitude control signal and the phase Control Number to generate a control signal that automatically adjusts the combination of the respective paths to ensure equal amplitude of the quadrature output signals of the limits, and between the quadrature output signals of any of the frequencies of the frequency signal The ideal phase is orthogonal. 如申請專利範圍第5項之改進的正交網路,其中,該組合機構包含:第一組合器,具有作為輸入之來自該振幅偵測機構的該振幅控制訊號及該相位偵測器的該相位控制訊號,及作為輸出之第一組合的控制訊號,該第一組合的控制訊號為該振幅控制訊號與該相位控制訊號的總和,用以調整該RC正交路徑;以及第二組合器,具有作為輸入之來自該振幅偵測機構的該振幅控制訊號及該相位偵測器的該相位控制訊號,及作為輸出之第二組合的控制訊號,該第二組合的控制訊號為該振幅控制訊號與該相位控制訊號之間的差值,用以調整該CR正交路徑,該第一組合的控制訊號與該第二組合的控制訊號成為該組合的控制訊號,以確保該等限制的正交輸出訊號之相等振幅及理想相位正交。 An improved orthogonal network according to claim 5, wherein the combining mechanism comprises: a first combiner having the amplitude control signal from the amplitude detecting mechanism as input and the phase detector a phase control signal, and a control signal as a first combination of outputs, wherein the control signal of the first combination is a sum of the amplitude control signal and the phase control signal for adjusting the RC orthogonal path; and the second combiner, Having the amplitude control signal from the amplitude detecting mechanism as input and the phase control signal of the phase detector, and a control signal as a second combination of outputs, the control signal of the second combination is the amplitude control signal The difference between the control signal and the second combined control signal becomes the combined control signal to ensure the orthogonality of the constraints. The equal amplitude and ideal phase of the output signal are orthogonal. 一種為頻率訊號自動產生正交訊號之方法,該正交訊號為相等振幅及理想相位正交,該方法包含下列步驟:將該頻率訊號輸入至一對正交訊號路徑,以在該等正交訊號路徑之各自的輸出產生一對臨時正交訊號,其中該對正交訊號路徑包含: RC電路,具有作為輸入之該想要的頻率訊號,及具有輸出;以及CR電路,具有作為輸入之該想要的頻率訊號,及具有輸出;偵測該等臨時正交訊號之各自的振幅,以產生振幅控制訊號;偵測該等臨時正交訊號之間的相位差,以產生相位控制訊號;以及將該振幅控制訊號與該相位控制訊號組合,以自動產生校準該對正交路徑之各自的正交控制訊號,而使得該等輸出正交訊號具有相等振幅及理想相位正交,其中,該將該振幅控制訊號與該相位控制訊號組合的步驟包含:將該振幅控制訊號與該相位控制訊號相加,以產生該RC電路的第一控制訊號;以及將該振幅控制訊號與該相位控制訊號相減,以產生該CR電路的第二控制訊號;藉此,該RC電路與該CR電路被自動校準,而使得該等輸出正交訊號具有相等振幅及理想相位正交。 A method for automatically generating an orthogonal signal for a frequency signal, the orthogonal signal being equal amplitude and ideal phase orthogonal, the method comprising the steps of: inputting the frequency signal to a pair of orthogonal signal paths to be orthogonal thereto The respective outputs of the signal paths generate a pair of temporary orthogonal signals, wherein the pair of orthogonal signal paths includes: An RC circuit having the desired frequency signal as an input, and having an output; and a CR circuit having the desired frequency signal as an input, and having an output; detecting respective amplitudes of the temporary orthogonal signals, Generating an amplitude control signal; detecting a phase difference between the temporary orthogonal signals to generate a phase control signal; and combining the amplitude control signal with the phase control signal to automatically generate a calibration of the pair of orthogonal paths Orthogonal control signals, such that the output orthogonal signals have equal amplitude and ideal phase orthogonality, wherein the step of combining the amplitude control signal with the phase control signal comprises: the amplitude control signal and the phase control Adding signals to generate a first control signal of the RC circuit; and subtracting the amplitude control signal from the phase control signal to generate a second control signal of the CR circuit; thereby, the RC circuit and the CR circuit They are automatically calibrated such that the output quadrature signals have equal amplitude and ideal phase quadrature. 如申請專利範圍第7項之方法,另包含限制該等臨時正交訊號的振幅之步驟,以產生作為該等臨時正交訊號之限制的正交訊號,以供該相位差偵測步驟的輸入使用。 The method of claim 7, further comprising the step of limiting the amplitude of the temporary orthogonal signals to generate an orthogonal signal as a limit of the temporary orthogonal signals for inputting the phase difference detecting step use.
TW102143020A 2013-11-26 2013-11-26 Automatic quadrature network with phase and amplitude detection TWI558099B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW102143020A TWI558099B (en) 2013-11-26 2013-11-26 Automatic quadrature network with phase and amplitude detection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW102143020A TWI558099B (en) 2013-11-26 2013-11-26 Automatic quadrature network with phase and amplitude detection

Publications (2)

Publication Number Publication Date
TW201521357A TW201521357A (en) 2015-06-01
TWI558099B true TWI558099B (en) 2016-11-11

Family

ID=53935167

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102143020A TWI558099B (en) 2013-11-26 2013-11-26 Automatic quadrature network with phase and amplitude detection

Country Status (1)

Country Link
TW (1) TWI558099B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5644260A (en) * 1993-09-22 1997-07-01 Hewlett-Packard Company RC/CR automatic quadrature network
WO2001043295A2 (en) * 1999-12-09 2001-06-14 Telefonaktiebolaget Lm Ericsson Receiver circuit
US6313680B1 (en) * 2000-01-28 2001-11-06 Agere Systems Guardian Corp. Phase splitter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5644260A (en) * 1993-09-22 1997-07-01 Hewlett-Packard Company RC/CR automatic quadrature network
WO2001043295A2 (en) * 1999-12-09 2001-06-14 Telefonaktiebolaget Lm Ericsson Receiver circuit
US6313680B1 (en) * 2000-01-28 2001-11-06 Agere Systems Guardian Corp. Phase splitter

Also Published As

Publication number Publication date
TW201521357A (en) 2015-06-01

Similar Documents

Publication Publication Date Title
JPH07105775B2 (en) Vector modulator calibration method
US20130173196A1 (en) Physical quantity sensor
KR102150503B1 (en) Fully differential signal system including common mode feedback circuit
JP6401902B2 (en) Orthogonal network and orthogonal signal generation method
JP5346079B2 (en) Passive mixer power detection method and apparatus
JP2006086857A (en) Phase-shifting device
TW202223584A (en) Wideband quadrature phase generation using tunable polyphase filter
JP2002198788A (en) Phase detector with high accuracy
JP2014068116A (en) Compensation device and radio communication device
TWI558099B (en) Automatic quadrature network with phase and amplitude detection
CN104022834A (en) Measurement of DC offsets in IQ modulator
EP3297160A1 (en) Method for calibrating an input circuit and system for calibrating an input circuit
US6931089B2 (en) Phase-locked loop with analog phase rotator
JP5354583B2 (en) High frequency power supply device and high frequency power detection device for high frequency power supply device
KR20150061322A (en) Automatic quadrature network with phase and amplitude detection
US9479142B1 (en) Phase error compensation circuit
US7631030B2 (en) Sine wave multiplication circuit and sine wave multiplication method
US10924309B2 (en) Phase error reduction in a receiver
US12063139B1 (en) Closed-loop quadrature converter
US9660583B2 (en) Signal generator and associated phase shift apparatus and method
Valdes-Garcia et al. An on-chip transfer function characterization system for analog built-in testing
JP4518576B2 (en) Equal amplitude addition circuit
WO2018180111A1 (en) Noise removal circuit
JPH0590841A (en) Modulator
JP3863097B2 (en) Carrier leak measurement method for double balanced mixer

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees