TWI551353B - Nozzle device - Google Patents

Nozzle device Download PDF

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TWI551353B
TWI551353B TW103123415A TW103123415A TWI551353B TW I551353 B TWI551353 B TW I551353B TW 103123415 A TW103123415 A TW 103123415A TW 103123415 A TW103123415 A TW 103123415A TW I551353 B TWI551353 B TW I551353B
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module
plug
head device
piezoelectric
cover module
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TW103123415A
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Chinese (zh)
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TW201601847A (en
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林君明
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中華大學
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Description

陣列式噴頭裝置Array nozzle device

本揭露係關於一種陣列式噴頭裝置。 The present disclosure relates to an array head device.

傳統的液滴噴出設備包含加壓裝置、加壓室、噴嘴及注入孔。噴嘴連通加壓室。注入孔用於填充液體至加壓室。加壓裝置施壓於加壓室的側壁,以噴出液滴。 A conventional droplet discharge apparatus includes a pressurizing device, a pressurizing chamber, a nozzle, and an injection hole. The nozzle communicates with the pressurized chamber. The injection hole is used to fill the liquid to the pressurized chamber. The pressurizing device applies pressure to the side wall of the pressurizing chamber to eject the liquid droplets.

通常液滴噴出設備在設計後,噴出液滴大小已固定,無法改變,使用上毫無彈性。 Usually, after the droplet discharge device is designed, the droplet size is fixed and cannot be changed, and the use is inelastic.

有鑑於上述問題,本專利諸實施例分別揭示新的陣列式噴頭裝置。 In view of the above problems, the embodiments of the present patent disclose new array nozzle devices, respectively.

本發明一實施例的陣列式噴頭裝置包含一上蓋板模組、複數壓電片模組、一插塞模組及一下蓋板模組。複數個壓電片模組是相疊而設於上蓋板模組與插塞模組之間。插塞模組是位在複數個壓電片模組與下蓋板模組之間。上蓋板模組界定一複數個空腔或凹槽,凹槽用於收容一液體或膠體。各壓電片模組包含一基材、一複數個壓電材料、一複數個電性連接件、一複數個上電極及一複數個下電極。基材包含一上表面、一下表面和複數個第一通孔。複數個第一通孔對應上蓋板模組的複數個凹槽設置。壓電材料設置在基材的上表面。電性連接件從基材的下表面,穿過基材至壓電材料的下面。上電極至少可在壓電材料上延伸。下電極形成於基材的下表面,並連接電性連接件。插塞模組包含一向下凸出的複數個插塞部,及對應複數個第一通孔設置的一複數個第二通孔。下蓋板模組包含一開孔,其中下蓋板模組的開孔,是對應插塞模組的插塞部設置。 The array nozzle device according to an embodiment of the invention comprises an upper cover module, a plurality of piezoelectric modules, a plug module and a lower cover module. A plurality of piezoelectric chip modules are stacked and disposed between the upper cover module and the plug module. The plug module is located between the plurality of piezoelectric module and the lower cover module. The upper cover module defines a plurality of cavities or grooves for receiving a liquid or a gel. Each piezoelectric module comprises a substrate, a plurality of piezoelectric materials, a plurality of electrical connectors, a plurality of upper electrodes, and a plurality of lower electrodes. The substrate includes an upper surface, a lower surface, and a plurality of first through holes. A plurality of first through holes are provided corresponding to the plurality of grooves of the upper cover module. The piezoelectric material is disposed on the upper surface of the substrate. The electrical connector extends from the lower surface of the substrate through the substrate to the underside of the piezoelectric material. The upper electrode can extend over at least the piezoelectric material. The lower electrode is formed on the lower surface of the substrate and is connected to the electrical connector. The plug module includes a plurality of plug portions protruding downward, and a plurality of second through holes disposed corresponding to the plurality of first through holes. The lower cover module includes an opening, wherein the opening of the lower cover module is disposed corresponding to the plug portion of the plug module.

本揭露實施例的陣列式噴頭裝置,使用多個類似的壓電片模 組,如此可任意改變壓電片模組的數量,調整液體或膠體的噴出量。 The array head device of the embodiment of the present disclosure uses a plurality of similar piezoelectric sheet molds Therefore, the number of the piezoelectric sheet modules can be arbitrarily changed, and the discharge amount of the liquid or the gel can be adjusted.

1、1a‧‧‧陣列式噴頭裝置 1, 1a‧‧‧Array nozzle device

11‧‧‧石英或玻璃上蓋板模組 11‧‧‧Quartz or glass upper cover module

11a‧‧‧石英或玻璃蓋子 11a‧‧‧Quartz or glass cover

11b‧‧‧石英或玻璃基底 11b‧‧‧Quartz or glass substrate

12‧‧‧壓電片模組 12‧‧‧ Piezoelectric Module

13‧‧‧矽或石英或玻璃插塞模組 13‧‧‧矽 or quartz or glass plug module

14‧‧‧石英或玻璃下蓋板模組 14‧‧‧Quartz or glass lower cover module

15‧‧‧壓電片模組 15‧‧‧ Piezoelectric module

110‧‧‧矽或玻璃基材 110‧‧‧矽 or glass substrate

111‧‧‧凹槽 111‧‧‧ Groove

112‧‧‧凸塊 112‧‧‧Bumps

113‧‧‧第一通孔 113‧‧‧First through hole

114‧‧‧電性連接結構 114‧‧‧Electrical connection structure

120‧‧‧白金電極層 120‧‧‧Platinum electrode layer

121‧‧‧矽或玻璃基材 121‧‧‧矽 or glass substrate

122‧‧‧壓電材料 122‧‧‧Piezoelectric materials

123‧‧‧電性連接件 123‧‧‧Electrical connectors

124‧‧‧上電極 124‧‧‧Upper electrode

125‧‧‧下電極、白金電極層 125‧‧‧lower electrode, platinum electrode layer

126‧‧‧絕緣材料 126‧‧‧Insulation materials

131‧‧‧矽或石英或玻璃插塞部 131‧‧‧矽 or quartz or glass plug

132‧‧‧第二通孔 132‧‧‧Second through hole

141‧‧‧開孔、噴口 141‧‧‧ openings, spouts

142‧‧‧凹槽 142‧‧‧ Groove

151‧‧‧石英基材 151‧‧‧Quartz substrate

152‧‧‧電極 152‧‧‧electrode

153‧‧‧絕緣材料 153‧‧‧Insulation materials

1141‧‧‧連接件 1141‧‧‧Connecting parts

1211‧‧‧上表面 1211‧‧‧ upper surface

1212‧‧‧下表面 1212‧‧‧ lower surface

1141‧‧‧連接件 1141‧‧‧Connecting parts

1412‧‧‧上電極 1412‧‧‧Upper electrode

1413‧‧‧下電極 1413‧‧‧ lower electrode

1414‧‧‧上絕緣層 1414‧‧‧Upper insulation

1415‧‧‧下絕緣層 1415‧‧‧lower insulation

1511‧‧‧壓電材料第一部分 1511‧‧‧Part 1 of Piezoelectric Materials

1512‧‧‧壓電材料第二部分 1512‧‧‧ Piezoelectric material part two

1513‧‧‧通孔 1513‧‧‧through hole

圖1為本發明一實施例之陣列式噴頭裝置之示意圖。 1 is a schematic view of an array type head device according to an embodiment of the present invention.

圖2為本發明一實施例之上蓋板模組之示意圖。 2 is a schematic view of a cover module according to an embodiment of the present invention.

圖3為本發明一實施例之上蓋板模組之蓋子之示意圖。 3 is a schematic view of a cover of a cover plate module according to an embodiment of the present invention.

圖4為本發明一實施例之上蓋板模組之基底之示意圖。 4 is a schematic view of a base of a cover plate module according to an embodiment of the present invention.

圖5為本發明一實施例之壓電片模組之示意圖。 FIG. 5 is a schematic view of a piezoelectric sheet module according to an embodiment of the present invention.

圖6為本發明一實施例之插塞模組之示意圖。 FIG. 6 is a schematic diagram of a plug module according to an embodiment of the present invention.

圖7為本發明一實施例之下蓋板模組之示意圖。 FIG. 7 is a schematic view of a cover module according to an embodiment of the present invention.

圖8為本發明另一實施例之陣列式噴頭裝置之示意圖。 FIG. 8 is a schematic diagram of an array type head device according to another embodiment of the present invention.

圖9為本發明另一實施例之壓電片模組之示意圖。 FIG. 9 is a schematic view of a piezoelectric sheet module according to another embodiment of the present invention.

參照圖1所示,在至少一些實施例中,一種陣列式噴頭裝置1包含一上蓋板模組11、複數壓電片模組12、一插塞模組13及一下蓋板模組14。複數壓電片模組12是相疊而設於上蓋板模組11與插塞模組13之間。插塞模組13是位於複數壓電片模組12與下蓋板模組14之間。複數壓電片模組12在加電壓後,會移動插塞模組13,插塞模組13會將儲存在下蓋板模組14內的液體或膠體經由下蓋板模組14的開孔141送出。上蓋板模組11具有複數個空腔或凹槽111,凹槽111儲存補充的液體或膠體。凹槽111可另外透過單向閥外接儲槽(未繪示),以連續補充液體或膠體。複數壓電片模組12可彼此類似。調整複數壓電片模組12的數量可調整噴出液滴或膠體的體積大小。 Referring to FIG. 1 , in at least some embodiments, an array head device 1 includes an upper cover module 11 , a plurality of piezoelectric modules 12 , a plug module 13 , and a lower cover module 14 . The plurality of piezoelectric module 12 are stacked and disposed between the upper cover module 11 and the plug module 13. The plug module 13 is located between the plurality of piezoelectric module 12 and the lower cover module 14. After the voltage is applied, the plurality of piezoelectric module 12 moves the plug module 13 , and the plug module 13 passes the liquid or colloid stored in the lower cover module 14 through the opening 141 of the lower cover module 14 . Send it out. The upper cover module 11 has a plurality of cavities or grooves 111 for storing a supplemental liquid or gel. The groove 111 can additionally be externally connected to the storage tank (not shown) through the one-way valve to continuously replenish the liquid or the colloid. The plurality of piezoelectric sheet modules 12 can be similar to each other. Adjusting the number of the plurality of piezoelectric sheet modules 12 can adjust the volume of the discharged droplets or colloids.

參照圖2與圖3所示,上蓋板模組11包含一蓋子11a與一基底11b。蓋子11a包含至少一凹槽111及至少一凸塊112。凹槽111可儲存液體或膠體,例如高分子導電膠。或是石膏與水的混合物。或是熱固性塑膠(Thermal Setting Plastic)。或是矽半導體與三價的硼(Boron)或五價的磷 (Phosphorous)等參雜雜質(Doping Impurity)和去離子水(De-ionized Water)的混合物。或是金屬粉末與去離子水的混合物。蓋子11a可設置複數個第一通孔,第一通孔用於從陣列式噴頭裝置1外,補充液體或膠體至凹槽111。在一些實施例中,蓋子11a是以鑄造方法製作。在一些實施例中,蓋子11a的厚度介於1~2公分(本創作並不以此為限),如此較不易變形。在一些實施例中,蓋子11a是用石英或玻璃製作,其好處有兩方面:一則石英或玻璃都是透明材料,由外部可看到內部填充的內容物,是否有氣泡而影響噴塗的效果。另一則是這種材料,可運用陽極焊接製程,和複數壓電片模組12、插塞模組13及下蓋板模組14壓合而成。 Referring to Figures 2 and 3, the upper cover module 11 includes a cover 11a and a base 11b. The cover 11a includes at least one groove 111 and at least one protrusion 112. The groove 111 can store a liquid or a gel, such as a polymer conductive paste. Or a mixture of gypsum and water. Or Thermosetting Plastic (Thermal Setting Plastic). Or germanium semiconductors with trivalent boron (boron) or pentavalent phosphorus (Phosphorous) and other mixtures of Doping Impurity and De-ionized Water. Or a mixture of metal powder and deionized water. The cover 11a may be provided with a plurality of first through holes for replenishing liquid or colloid to the groove 111 from outside the array head device 1. In some embodiments, the cover 11a is fabricated in a casting process. In some embodiments, the thickness of the cover 11a is between 1 and 2 cm (not limited to this creation), so that it is less susceptible to deformation. In some embodiments, the cover 11a is made of quartz or glass, and the advantages thereof are two aspects: one quartz or glass is a transparent material, and the contents of the inner filling can be seen from the outside, and whether there are bubbles or not affects the spraying effect. The other is a material which can be formed by pressing an anode welding process and a plurality of piezoelectric module 12, plug module 13 and lower cover module 14.

參照圖4所示,在一些實施例中,基底11b包含至少一第一通孔113。至少一第一通孔113對應至少一凹槽111設置,以使凹槽111內的液體或膠體,可受壓電材料的膨脹變形擠壓後流出。在一些實施例中,基底11b包含至少一電性連接結構114及一基材110。至少一電性連接結構114對應蓋子11a的至少一凸塊112。電性連接結構114包含一電性連接件1141、上電極1412、下電極1413、上絕緣層1414及下絕緣層1415。電性連接件1141穿透基材110,並有部分在基材110的上表面及下表面延伸。上電極1412覆蓋電性連接件1141,位在基材110上表面的部分。下電極1413覆蓋電性連接件1141,位在基材110下表面的部分。上絕緣層1414覆蓋上電極1412及部分基材110的上表面。下絕緣層1415不僅覆蓋下電極1413(位在電性連接件1141於基材110下表面)邊緣的部分,也覆蓋基材110下表面的部分。在一些實施例中,基材110包含矽或玻璃。在一些實施例中,電性連接件1141包含銅,而上電極1412與下電極1413包含白金,如此上電極1412與下電極1413可防止電性連接件1141因接觸空氣或其他物質而被氧化。另一方面,白金材料有利於後續將複數壓電片,以陽極接合法相疊,焊接而成為一個壓電片模組12。在一些實施例中,上絕緣層1414與下絕緣層1415包含二氧化矽或氮化矽。 Referring to FIG. 4, in some embodiments, the substrate 11b includes at least one first through hole 113. The at least one first through hole 113 is disposed corresponding to the at least one groove 111, so that the liquid or the colloid in the groove 111 can be squeezed out by the expansion deformation of the piezoelectric material. In some embodiments, the substrate 11b includes at least one electrical connection structure 114 and a substrate 110. The at least one electrical connection structure 114 corresponds to at least one of the bumps 112 of the cover 11a. The electrical connection structure 114 includes an electrical connection member 1141, an upper electrode 1412, a lower electrode 1413, an upper insulating layer 1414, and a lower insulating layer 1415. The electrical connector 1141 penetrates the substrate 110 and has portions extending over the upper and lower surfaces of the substrate 110. The upper electrode 1412 covers the electrical connector 1141, a portion of the upper surface of the substrate 110. The lower electrode 1413 covers the electrical connector 1141 and is located on a portion of the lower surface of the substrate 110. The upper insulating layer 1414 covers the upper surface of the upper electrode 1412 and a portion of the substrate 110. The lower insulating layer 1415 covers not only the portion of the lower electrode 1413 (located on the lower surface of the electrical connection member 1141 on the lower surface of the substrate 110) but also the portion of the lower surface of the substrate 110. In some embodiments, substrate 110 comprises tantalum or glass. In some embodiments, the electrical connector 1141 comprises copper, and the upper electrode 1412 and the lower electrode 1413 comprise platinum, such that the upper electrode 1412 and the lower electrode 1413 prevent the electrical connector 1141 from being oxidized by exposure to air or other substances. On the other hand, the platinum material is advantageous for subsequently stacking the plurality of piezoelectric sheets by anodic bonding and soldering them into a piezoelectric sheet module 12. In some embodiments, the upper insulating layer 1414 and the lower insulating layer 1415 comprise hafnium oxide or tantalum nitride.

在一些實施例中,蓋子11a與基底11b是以陽極接合法接合,以獲得具大體上密封的凹槽111。 In some embodiments, the cover 11a and the base 11b are joined by anodic bonding to obtain a generally sealed groove 111.

在至少一些實施例中,基底11b的製造方法包含:運用微影技術,以及深式離子蝕刻製程、電感式電漿蝕刻或Bosch深反應離子蝕刻, 在基材110上蝕刻出50~100微米的深孔(但本創作並不以此為限)。利用黃光製程及濺鍍製程,在部分的深孔及其開口附近,鍍上一層銅作為種晶層。然後,電鍍銅直到銅在基材110表面上的厚度至10~50微米為止(但本創作並不以此為限)。之後,利用化學機械研磨(CMP)方法研磨基材110的底面,直到露出部分深孔內的銅。另外部分的深孔在CMP後則會形成為可讓液體或流體流過的通孔。接著,在每一露出銅末端及其附近鍍上另一層銅作為種晶層。然後,鍍銅至1至5微米(但本創作並不以此為限),形成電性連接件1141。之後,在基材110上的銅表面,形成白金電極層。白金電極層可作為電極,並可防止銅氧化,有利後續接合。在一些實施例中,在各電性連接件1141上的白金電極層,可分別連接外界不同電壓電源的正極與負極(未繪示),並分別以邏輯開關電路,加以控制其導通的電壓及波型,以便噴出不同體積的液體或膠體。而若與承載工件的載台配合進行相對運動,則更可以在每層工件上,形成不同厚度及圖案的液體或膠體,重複上述動作進行各層的噴塗,即可在工件上完成不同的三度空間立體圖案。 In at least some embodiments, the method of fabricating the substrate 11b includes: using lithography techniques, as well as deep ion etching processes, inductive plasma etching, or Bosch deep reactive ion etching, A deep hole of 50 to 100 microns is etched into the substrate 110 (but this is not limited to this creation). Using a yellow light process and a sputtering process, a layer of copper is plated as a seed layer near a portion of the deep hole and its opening. Then, the copper is electroplated until the thickness of the copper on the surface of the substrate 110 is 10 to 50 μm (but this is not limited thereto). Thereafter, the bottom surface of the substrate 110 is polished by a chemical mechanical polishing (CMP) method until the copper in a portion of the deep holes is exposed. The other part of the deep hole is formed as a through hole through which the liquid or fluid can flow after the CMP. Next, another layer of copper is plated as a seed layer at and around each exposed copper end. Then, copper plating is performed to 1 to 5 micrometers (but not limited to this creation) to form an electrical connection member 1141. Thereafter, a platinum electrode layer is formed on the copper surface on the substrate 110. The platinum electrode layer acts as an electrode and prevents oxidation of the copper, facilitating subsequent bonding. In some embodiments, the platinum electrode layer on each of the electrical connectors 1141 can be respectively connected to the positive and negative electrodes (not shown) of different external voltage sources, and respectively controlled by the logic switching circuit. Wave shape to spray different volumes of liquid or colloid. If the relative movement is carried out in conjunction with the stage carrying the workpiece, liquid or colloid of different thicknesses and patterns can be formed on each layer of the workpiece, and the above actions can be repeated to spray the layers, and different third degrees can be completed on the workpiece. Spatial three-dimensional pattern.

參照圖5所示,壓電片模組12包含一基材121、一壓電材料122、一電性連接件123、一上電極124及一下電極125。基材121包含一上表面1211、一下表面1212及一通孔113。通孔113對應上蓋板模組11的凹槽111設置,以讓凹槽111的液體或膠體可從其中流過。壓電材料122設置在基材121的上表面1211。電性連接件123從基材121的下表面1212,穿過基材121至壓電材料122的下面。上電極124至少在壓電材料122上延伸。下電極125形成於基材121的下表面1212,並電性連接電性連接件123。上電極124與下電極125沿基材121的上、下表面方向上設置。上電極124可連接外界不同電壓電源的正極,下電極125可連接外界不同電壓電源的負極,並分別以邏輯開關電路,加以控制其導通的電壓及波型(未繪示),利用上電極124與下電極125可施加電場於壓電材料122上,使其沿電場方向(在本實施例中即垂直基材121表面的向下方向)伸長。在一些實施例中,基材121包含矽或玻璃。在一些實施例中,上電極124包含白金。在一些實施例中,下電極125包含白金。在一些實施例中,電性連接件123包含垂直貫通矽或玻璃通道(Through Silicon(Glass)Via,TSV(TGV))。在一些實施例中,電性連接件123包含銅。 Referring to FIG. 5, the piezoelectric module 12 includes a substrate 121, a piezoelectric material 122, an electrical connector 123, an upper electrode 124, and a lower electrode 125. The substrate 121 includes an upper surface 1211, a lower surface 1212, and a through hole 113. The through hole 113 is disposed corresponding to the groove 111 of the upper cover module 11 so that the liquid or colloid of the groove 111 can flow therethrough. The piezoelectric material 122 is disposed on the upper surface 1211 of the substrate 121. The electrical connector 123 passes from the lower surface 1212 of the substrate 121 through the substrate 121 to the underside of the piezoelectric material 122. The upper electrode 124 extends at least over the piezoelectric material 122. The lower electrode 125 is formed on the lower surface 1212 of the substrate 121 and electrically connected to the electrical connector 123. The upper electrode 124 and the lower electrode 125 are disposed along the upper and lower surfaces of the substrate 121. The upper electrode 124 can be connected to the positive pole of the external voltage power supply, and the lower electrode 125 can be connected to the negative pole of the external voltage power supply, and the voltage and mode (not shown) of the conduction voltage are controlled by the logic switch circuit respectively, and the upper electrode 124 is utilized. An electric field can be applied to the piezoelectric material 122 with the lower electrode 125 to be elongated in the direction of the electric field (in the present embodiment, the downward direction of the surface of the vertical substrate 121). In some embodiments, substrate 121 comprises tantalum or glass. In some embodiments, the upper electrode 124 comprises platinum. In some embodiments, the lower electrode 125 comprises platinum. In some embodiments, the electrical connector 123 includes a vertical through glass or a glass channel (Through Silicon (Glass) Via, TSV (TGV)). In some embodiments, the electrical connector 123 comprises copper.

參照圖5所示,在一些實施例中,電性連接件123的部分,在基材121的上表面1211上延伸。在一些實施例中,電性連接件123在基材121上表面1211上延伸的部分,為壓電材料122所覆蓋。在一些實施例中,上電極124覆蓋壓電材料122。在一些實施例中,電性連接件123的另一部分,在基材121的下表面1212上延伸。 Referring to FIG. 5, in some embodiments, portions of the electrical connector 123 extend over the upper surface 1211 of the substrate 121. In some embodiments, the portion of the electrical connector 123 that extends over the upper surface 1211 of the substrate 121 is covered by the piezoelectric material 122. In some embodiments, the upper electrode 124 covers the piezoelectric material 122. In some embodiments, another portion of the electrical connector 123 extends over the lower surface 1212 of the substrate 121.

參照圖5所示,壓電片模組12包含一絕緣材料126。絕緣材料126覆蓋基材121的上表面1211和下表面1212,而僅露出上電極124的一部份與下電極125的一部份。絕緣材料126包含二氧化矽或氮化矽。 Referring to FIG. 5, the piezoelectric sheet module 12 includes an insulating material 126. The insulating material 126 covers the upper surface 1211 and the lower surface 1212 of the substrate 121, and exposes only a portion of the upper electrode 124 and a portion of the lower electrode 125. The insulating material 126 comprises hafnium oxide or tantalum nitride.

在一些實施例中,上電極124的厚度介於10~50奈米(但本創作並不以此為限)。在一些實施例中,下電極125的厚度介於10~50奈米(但本創作並不以此為限)。 In some embodiments, the thickness of the upper electrode 124 is between 10 and 50 nanometers (but not limited to this creation). In some embodiments, the thickness of the lower electrode 125 is between 10 and 50 nanometers (but not limited to this creation).

在一些實施例中,壓電材料122包含鋯鈦酸鉛壓電膜(Lead Zirconate Titanate;PZT)。在一些實施例中,壓電材料122包含聚偏二氟乙烯(PVDF)。 In some embodiments, piezoelectric material 122 comprises a lead zirconate Titanate (PZT). In some embodiments, piezoelectric material 122 comprises polyvinylidene fluoride (PVDF).

參照圖3與圖5所示,在一些實施例中,壓電片模組12包含複數壓電材料122,上蓋板模組11設置複數凸塊112,其中複數凸塊112對應複數壓電材料122設置。 Referring to FIG. 3 and FIG. 5, in some embodiments, the piezoelectric module 12 includes a plurality of piezoelectric materials 122, and the upper cover module 11 is provided with a plurality of bumps 112, wherein the plurality of bumps 112 correspond to a plurality of piezoelectric materials. 122 settings.

參照圖1所示,在一些實施例中,壓電片模組12可利用陽極接合製程,壓合在上蓋板模組11上。在一些實施例中,複數壓電片模組12可逐一壓合,而疊置在上蓋板模組11上,其中各壓電片模組12分別連接外界不同電壓電源的正、負電極,並分別以邏輯開關電路,加以控制其導通的電壓及波型(未繪示)。 Referring to FIG. 1, in some embodiments, the piezoelectric sheet module 12 can be pressed onto the upper cover module 11 by an anodic bonding process. In some embodiments, the plurality of piezoelectric module 12 can be pressed one by one and stacked on the upper cover module 11, wherein each piezoelectric module 12 is connected to the positive and negative electrodes of different voltage sources respectively. And the logic switching circuit is used to control the voltage and mode (not shown) of the conduction.

參照圖5所示,壓電片模組12的製造方法包含:運用微影技術,以及深式離子蝕刻製程、電感式電漿蝕刻或Bosch深反應離子蝕刻,在基材121蝕刻出50~100微米的深孔(但本創作並不以此為限)。利用黃光製程及濺鍍製程,在部分的深孔及其開口附近鍍上一層銅種晶層。然後,電鍍銅直到銅在基材121表面上的厚度為10~50微米(但本創作並不以此為限)。之後,利用化學機械研磨方法研磨基材121的底面,直到露出部分深孔內的銅。另外部分的深孔在CMP後則會形成為可讓液體或流體流過的通孔。接著,在每一露出銅末端及其附近,鍍上一銅種晶層。然後,鍍銅至 10至50微米(但本創作並不以此為限),形成電性連接件123。之後,在基材121上銅的表面,形成白金電極層120和125(厚度10~50奈米,但本創作並不以此為限)。之後,利用溶膠-凝膠法在基材121製作壓電材料122。其次,在壓電材料122上表面形成上電極124。接著,在基材121的兩面蒸鍍二氧化矽,或氮化矽等的絕緣材料126。然後,用黃光製程去掉部分的絕緣材料126,以露出通孔113及部分的下電極125及部分的上電極124。 Referring to FIG. 5, the manufacturing method of the piezoelectric chip module 12 includes: etching 50 to 100 on the substrate 121 by using a lithography technique, a deep ion etching process, an inductive plasma etching, or a Bosch deep reactive ion etching. Micron deep holes (but this creation is not limited to this). A layer of copper seed layer is applied to a portion of the deep hole and its opening by a yellow light process and a sputtering process. Then, the copper is electroplated until the thickness of the copper on the surface of the substrate 121 is 10 to 50 μm (but this is not limited thereto). Thereafter, the bottom surface of the substrate 121 is polished by a chemical mechanical polishing method until the copper in a part of the deep holes is exposed. The other part of the deep hole is formed as a through hole through which the liquid or fluid can flow after the CMP. Next, a copper seed layer is plated at and around each exposed copper end. Then, copper plating to 10 to 50 microns (but not limited to this creation), forming an electrical connector 123. Thereafter, on the surface of the copper on the substrate 121, platinum electrode layers 120 and 125 are formed (thickness 10 to 50 nm, but this creation is not limited thereto). Thereafter, the piezoelectric material 122 is formed on the substrate 121 by a sol-gel method. Next, an upper electrode 124 is formed on the upper surface of the piezoelectric material 122. Next, an insulating material 126 such as hafnium oxide or tantalum nitride is deposited on both surfaces of the substrate 121. Then, a portion of the insulating material 126 is removed by a yellow light process to expose the via 113 and a portion of the lower electrode 125 and a portion of the upper electrode 124.

參照圖6所示,插塞模組13包含至少一向下凸出的插塞部131,及至少一第二通孔132。至少一第二通孔132對應上蓋板模組11的第一通孔113或對應壓電片模組12的通孔113。第二通孔132可讓儲存在凹槽111內的液體流過。插塞模組13包含矽或石英或玻璃。在一些實施例中,插塞部131包含二氧化矽。在一些實施例中,插塞部131包含氮化矽。 Referring to FIG. 6 , the plug module 13 includes at least one plug portion 131 protruding downward, and at least one second through hole 132 . The at least one second through hole 132 corresponds to the first through hole 113 of the upper cover module 11 or the through hole 113 of the corresponding piezoelectric piece module 12 . The second through hole 132 allows the liquid stored in the groove 111 to flow therethrough. The plug module 13 comprises crucible or quartz or glass. In some embodiments, the plug portion 131 comprises hafnium oxide. In some embodiments, the plug portion 131 comprises tantalum nitride.

插塞模組13的製造方法包含:以矽或石英或玻璃為基材,塗佈SU-8厚光阻(400~500微米,但本創作並不以此為限),然後烤乾。在欲形成第二通孔132處顯影出一開孔。接著利用深式離子蝕刻製程、電感式電漿蝕刻或Bosch深反應離子蝕刻,在基材上蝕刻出50~100微米的深孔(但本創作並不以此為限)。之後除去光阻。接著在基材背面塗佈SU-8厚光阻(400~500微米,但本創作並不以此為限),然後烤乾。然後利用黃光製程露出要形成插塞部131的位置。之後沈積二氧化矽或氮化矽(厚度250~350微米,但本創作並不以此為限)。接著將SU-8厚光阻去除。 The manufacturing method of the plug module 13 includes: applying SU-8 thick photoresist (400-500 micrometers, but not limited to this creation) with ruthenium or quartz or glass as a substrate, and then baking. An opening is developed at the second through hole 132 to be formed. Subsequent deep ion etching processes, inductive plasma etching, or Bosch deep reactive ion etching are used to etch deep holes of 50 to 100 microns on the substrate (but this is not limited to this). The photoresist is then removed. SU-8 thick photoresist (400~500 microns, but not limited to this creation) is applied to the back side of the substrate and then baked. Then, the position where the plug portion 131 is to be formed is exposed by the yellow light process. Thereafter, ruthenium dioxide or tantalum nitride is deposited (thickness 250-350 microns, but this creation is not limited to this). The SU-8 thick photoresist is then removed.

參照圖7所示,下蓋板模組14包含至少一開孔或噴口141,其中至少一開孔141對應插塞模組13的至少一插塞部131設置。下蓋板模組14包含一凹槽142,凹槽142可儲存液體或膠體,且插塞部131位在凹槽142內。上蓋板模組11與下蓋板模組14可固定,而當施加電場於壓電片模組12上時,壓電材料122會膨脹變形,使插塞部131向對應的開孔141移動,擠壓位在凹槽142內的部分液體或膠體,推送出陣列式噴頭裝置1。在一些實施例中,插塞部131的面積較小於開孔141的面積,要控制加到壓電材料兩端的電壓大小,使插塞部131會進入開孔141,但插塞部131不會碰到開孔141。在一些實施例中,插塞部131的面積較大於開孔141的面積,所以要控制加到壓電材料兩端的電壓大小,使插塞部131不會碰到開孔141。在一些實施例中,下蓋板模組14包含石英或玻璃。在一些實施例 中,下蓋板模組14的厚度介於0.5~2公分(但本創作並不以此為限)。 Referring to FIG. 7 , the lower cover module 14 includes at least one opening or nozzle 141 , wherein at least one opening 141 is disposed corresponding to at least one plug portion 131 of the plug module 13 . The lower cover module 14 includes a recess 142 for storing a liquid or a gel, and the plug portion 131 is positioned within the recess 142. The upper cover module 11 and the lower cover module 14 are fixed, and when an electric field is applied to the piezoelectric module 12, the piezoelectric material 122 is expanded and deformed, and the plug portion 131 is moved toward the corresponding opening 141. The portion of the liquid or gel located in the recess 142 is pressed to push the array head unit 1. In some embodiments, the area of the plug portion 131 is smaller than the area of the opening 141. To control the magnitude of the voltage applied to the ends of the piezoelectric material, the plug portion 131 will enter the opening 141, but the plug portion 131 does not. Will encounter the opening 141. In some embodiments, the area of the plug portion 131 is larger than the area of the opening 141, so that the magnitude of the voltage applied to both ends of the piezoelectric material is controlled so that the plug portion 131 does not hit the opening 141. In some embodiments, the lower cover module 14 comprises quartz or glass. In some embodiments The thickness of the middle and lower cover modules 14 is between 0.5 and 2 cm (but this is not limited to this creation).

在一些實施例中,下蓋板模組14的製造方法包含:運用鑄造方法,製作具有凹槽的石英或玻璃容器。然後,運用微影技術,以及深式離子蝕刻製程、電感式電漿蝕刻或Bosch深反應離子蝕刻,蝕刻出50~100微米的深孔(但本創作並不以此為限)。之後,利用化學機械研磨方法,研磨深孔下方的材料,讓深孔變成垂直貫穿的開孔141。 In some embodiments, the method of manufacturing the lower deck module 14 includes using a casting method to make a quartz or glass container having a recess. Then, using lithography, deep ion etching, inductive plasma etching, or Bosch deep reactive ion etching, deep holes of 50 to 100 microns are etched (but not limited to this creation). Thereafter, the material under the deep hole is ground by a chemical mechanical polishing method to make the deep hole become the vertical through hole 141.

在一些實施例中,將插塞模組13組入下蓋板模組14內,周圍加以密封即完成陣列式噴頭裝置1的組合。 In some embodiments, the plug module 13 is assembled into the lower cover module 14 and sealed around to complete the combination of the array head devices 1.

參照圖8所示,本發明另一些實施例之陣列式噴頭裝置1a類似上述陣列式噴頭裝置1,主要是兩者的壓電片模組12與壓電片模組15不同。 Referring to FIG. 8, the array head device 1a of another embodiment of the present invention is similar to the array head device 1 described above, and mainly the piezoelectric sheet module 12 of the two is different from the piezoelectric sheet module 15.

參照圖9所示,壓電片模組15包含一石英基材151及兩電極152。石英基材151包含至少一第一部分1511、至少一第二部分1512及至少一通孔1513。第一部分1511較第二部分1512為厚。通孔1513形成在第二部分1512,且對應上蓋板模組11的凹槽111設置。第一部分1511位於兩電極152之間。在一些實施例中,電極152覆蓋第一部分1511。在一些實施例中,各電極152從第一部分1511延伸到第二部分1512。 Referring to FIG. 9, the piezoelectric sheet module 15 includes a quartz substrate 151 and two electrodes 152. The quartz substrate 151 includes at least a first portion 1511, at least a second portion 1512, and at least one through hole 1513. The first portion 1511 is thicker than the second portion 1512. The through hole 1513 is formed in the second portion 1512 and is disposed corresponding to the groove 111 of the upper cover module 11. The first portion 1511 is located between the two electrodes 152. In some embodiments, the electrode 152 covers the first portion 1511. In some embodiments, each electrode 152 extends from the first portion 1511 to the second portion 1512.

參照圖8所示,在一些實施例中,壓電片模組15包含絕緣材料153,其中絕緣材料153覆蓋第二部分1512及第一部分1511的側緣。在一些實施例中,壓電片模組15包含絕緣材料153,其中絕緣材料153覆蓋第二部分1512、第一部分1511的側緣及第一部分1511的頂面的邊緣,如此壓電片模組15是利用絕緣材料153壓合在上蓋板模組11、插塞模組13或另一壓電片模組15。 Referring to FIG. 8, in some embodiments, the piezoelectric sheet module 15 includes an insulating material 153, wherein the insulating material 153 covers the second portion 1512 and the side edges of the first portion 1511. In some embodiments, the piezoelectric sheet module 15 includes an insulating material 153, wherein the insulating material 153 covers the second portion 1512, the side edge of the first portion 1511, and the edge of the top surface of the first portion 1511, such that the piezoelectric sheet module 15 The upper cover module 11, the plug module 13 or the other piezoelectric module 15 is pressed by the insulating material 153.

壓電片模組15的製作方法包含:以鑄造方式製作石英壓電片。利用黃光製程及蝕刻製程(例如:深式離子蝕刻製程、電感式電漿蝕刻或Bosch深反應離子蝕刻)形成第二部分1512及通孔1513。然後,在較厚的第一部分1511的兩面上,分別鍍一白金電極152(厚度10~50奈米,但本創作並不以此為限)。之後,在石英壓電片的兩面,蒸鍍絕緣材料153(如二氧化矽或氮化矽)。最後,運用黃光製程,使在第一部分1511的兩面上的電極152部分露出,其餘被絕緣材料153包覆。 The manufacturing method of the piezoelectric sheet module 15 includes: forming a quartz piezoelectric sheet by casting. The second portion 1512 and the vias 1513 are formed using a yellow light process and an etching process (eg, deep ion etching process, inductive plasma etching, or Bosch deep reactive ion etching). Then, on both sides of the thicker first portion 1511, a platinum electrode 152 (thickness 10 to 50 nm) is plated, but this creation is not limited thereto. Thereafter, an insulating material 153 (such as hafnium oxide or tantalum nitride) is vapor-deposited on both sides of the quartz piezoelectric sheet. Finally, a portion of the electrode 152 on both sides of the first portion 1511 is exposed by a yellow light process, and the rest is covered with an insulating material 153.

參照圖8所示,在上蓋板模組11上,利用陽極接合製程,重複壓合多片的壓電片模組15。然後,將插塞模組13壓合在最外(或下)側的壓電片模組15。最後,將插塞模組13組入下蓋板模組14內,周圍加以密封即完成陣列式噴頭裝置1a的組合。 Referring to Fig. 8, on the upper cover module 11, a plurality of piezoelectric sheet modules 15 are repeatedly pressed by an anodic bonding process. Then, the plug module 13 is pressed against the piezoelectric sheet module 15 on the outermost (or lower) side. Finally, the plug module 13 is assembled into the lower cover module 14, and the combination is sealed to complete the combination of the array head devices 1a.

在至少一些實施例中,陣列式噴頭裝置使用多個類似的壓電片模組,如此可任意改變壓電片模組的數量,調整液體或膠體擠壓後噴出量。 In at least some embodiments, the array head device uses a plurality of similar piezoelectric sheet modules such that the number of piezoelectric sheet modules can be arbitrarily changed to adjust the amount of liquid or colloid squeezed.

本揭露之技術內容及技術特點已揭示如上,然而熟悉本項技術之人士仍可能基於本揭露之教示及揭示而作種種不背離本揭露精神之替換及修飾。因此,本揭露之保護範圍應不限於實施範例所揭示者,而應包括各種不背離本揭露之替換及修飾,並為以下之申請專利範圍所涵蓋。 The technical content and technical features of the present disclosure have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the disclosure. Therefore, the scope of the present disclosure is not to be construed as being limited by the scope of

1‧‧‧陣列式噴頭裝置 1‧‧‧Array nozzle device

11‧‧‧上蓋板模組 11‧‧‧Upper cover module

11a‧‧‧石英或玻璃蓋子 11a‧‧‧Quartz or glass cover

11b‧‧‧基底 11b‧‧‧Base

12‧‧‧壓電片模組 12‧‧‧ Piezoelectric Module

13‧‧‧插塞模組 13‧‧‧ plug module

14‧‧‧下蓋板模組 14‧‧‧Under cover module

111‧‧‧凹槽 111‧‧‧ Groove

112‧‧‧凸塊 112‧‧‧Bumps

113‧‧‧第一通孔 113‧‧‧First through hole

141‧‧‧開孔、噴口 141‧‧‧ openings, spouts

Claims (19)

一種陣列式噴頭裝置,包含:一上蓋板模組,界定一凹槽,該凹槽用於收容一液體;複數壓電片模組,各該壓電片模組包含:一基材,包含一上表面、一下表面和一第一通孔,其中該第一通孔對應該凹槽設置;一壓電材料,設置在該上表面;一電性連接件,從該下表面穿過該基材至該壓電材料的下表面;一上電極,至少在該壓電材料上延伸;及一下電極,形成於該下表面之上,並電性連接該電性連接件;一插塞模組,包含一向下凸出的插塞部及對應該第一通孔設置的一第二通孔;以及一下蓋板模組,包含一開孔,其中該開孔對應該插塞部設置;其中該複數壓電片模組是於該上蓋板模組與該插塞模組之間相疊而設;該插塞模組位在該複數壓電片模組與該下蓋板模組之間。 An array head device includes: an upper cover module defining a recess for receiving a liquid; and a plurality of piezoelectric modules, each of the piezoelectric modules comprising: a substrate, including An upper surface, a lower surface, and a first through hole, wherein the first through hole is disposed corresponding to the groove; a piezoelectric material is disposed on the upper surface; and an electrical connection member passes through the base from the lower surface a material to the lower surface of the piezoelectric material; an upper electrode extending at least on the piezoelectric material; and a lower electrode formed on the lower surface and electrically connected to the electrical connector; a plug module a plug portion protruding downwardly and a second through hole corresponding to the first through hole; and a lower cover module comprising an opening, wherein the opening is disposed corresponding to the plug portion; The plurality of piezoelectric module is disposed between the upper cover module and the plug module; the plug module is located between the plurality of piezoelectric modules and the lower cover module . 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該上電極覆蓋該壓電材料。 The array head device of claim 1, wherein the upper electrode covers the piezoelectric material. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該壓電材料覆蓋該電性連接件上於在該基材的該上表面上延伸的部分。 The array head device of claim 1, wherein the piezoelectric material covers the portion of the electrical connector that extends over the upper surface of the substrate. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該 基材包含矽或玻璃。 The array type head device according to claim 1, wherein the The substrate comprises tantalum or glass. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該壓電片模組包含一絕緣材料,其中該絕緣材料覆蓋該基材的該上表面與該下表面,僅讓該上電極的一部份與該下電極的一部份露出。 The array head device of claim 1, wherein the piezoelectric chip module comprises an insulating material, wherein the insulating material covers the upper surface and the lower surface of the substrate, and only the upper electrode is A portion is exposed to a portion of the lower electrode. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該上電極或該下電極包含白金。 The array head device of claim 1, wherein the upper electrode or the lower electrode comprises platinum. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該上蓋板模組包含一石英或玻璃蓋子,其中該石英或玻璃蓋子的厚度介於1~2公分。 The array head device of claim 1, wherein the upper cover module comprises a quartz or glass cover, wherein the quartz or glass cover has a thickness of 1 to 2 cm. 根據申請專利範圍第7項所述之陣列式噴頭裝置,其中該上蓋板模組包含一基底,該基底包含對應該上蓋板模組的該凹槽一通孔,其中該基底固定在該石英或玻璃蓋子上。 The array head device of claim 7, wherein the upper cover module comprises a base, the base includes a through hole corresponding to the groove of the upper cover module, wherein the base is fixed to the quartz Or on the glass cover. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中該下蓋板模組包含石英或玻璃,且該下蓋板模組的厚度介於0.5~2公分。 The array head device according to claim 1, wherein the lower cover module comprises quartz or glass, and the thickness of the lower cover module is 0.5 to 2 cm. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中當該插塞模組的該插塞部小於該下蓋板模組的該開孔。 The array nozzle device according to claim 1, wherein the plug portion of the plug module is smaller than the opening of the lower cover module. 根據申請專利範圍第1項所述之陣列式噴頭裝置,其中當該插塞模組的該插塞部大於該下蓋板模組的該開孔。 The array nozzle device according to claim 1, wherein the plug portion of the plug module is larger than the opening of the lower cover module. 一種陣列式噴頭裝置,包含:一上蓋板模組,界定一凹槽,該凹槽用於收容一液體;複數壓電片模組,各該壓電片模組包含:一石英基材,包含一第一部分、一第二部分和一第 一通孔,其中該第一部分較該第二部分為厚;該第一通孔位在該第二部分,且對應該凹槽設置;及兩電極,其中該第一部份位在該兩電極之間;一插塞模組,包含一向下凸出的插塞部及對應該第一通孔設置的一第二通孔;以及一下蓋板模組,包含一開孔,其中該開孔對應該插塞部設置;其中該複數壓電片模組位於該上蓋板模組與該插塞模組之間;該插塞模組位在該複數壓電片模組與該下蓋板模組之間。 An array head device includes: an upper cover module defining a recess for receiving a liquid; and a plurality of piezoelectric modules, each of the piezoelectric modules comprising: a quartz substrate Containing a first part, a second part, and a first a through hole, wherein the first portion is thicker than the second portion; the first through hole is located in the second portion and corresponds to the groove; and the two electrodes, wherein the first portion is located at the two electrodes a plug module comprising a downwardly projecting plug portion and a second through hole corresponding to the first through hole; and a lower cover module comprising an opening, wherein the opening corresponds to the opening The plug portion is disposed between the upper cover module and the plug module; the plug module is located in the plurality of piezoelectric modules and the lower cover module between. 根據申請專利範圍第12項所述之陣列式噴頭裝置,其中各該電極從該第一部分延伸至該第二部分。 The array head device of claim 12, wherein each of the electrodes extends from the first portion to the second portion. 根據申請專利範圍第12項所述之噴頭裝置,其中各該電極包含白金。 The head device of claim 12, wherein each of the electrodes comprises platinum. 根據申請專利範圍第12項所述之陣列式噴頭裝置,其中該上蓋板模組包含一石英或玻璃蓋子,其中該石英蓋子或玻璃的厚度介於1~2公分。 The array head device of claim 12, wherein the upper cover module comprises a quartz or glass cover, wherein the quartz cover or glass has a thickness of 1 to 2 cm. 根據申請專利範圍第15項所述之陣列式噴頭裝置,其中該上蓋板模組包含一基底,該基底包含對應該上蓋板模組的該凹槽一通孔,其中該基底固定在該石英或玻璃蓋子上。 The array head device of claim 15, wherein the upper cover module comprises a base, the base includes a through hole corresponding to the groove of the upper cover module, wherein the base is fixed to the quartz Or on the glass cover. 根據申請專利範圍第12項所述之陣列式噴頭裝置,其中該下蓋板模組包含石英或玻璃,且該下蓋板模組的厚度介於0.5~2公分。 The array head device according to claim 12, wherein the lower cover module comprises quartz or glass, and the thickness of the lower cover module is 0.5 to 2 cm. 根據申請專利範圍第12項所述之陣列式噴頭裝置,其中 當該插塞模組的該插塞部小於該下蓋板模組的該開孔。 The array type head device according to claim 12, wherein The plug portion of the plug module is smaller than the opening of the lower cover module. 根據申請專利範圍第12項所述之陣列式噴頭裝置,其中當該插塞模組的該插塞部大於該下蓋板模組的該開孔。 The array head device of claim 12, wherein the plug portion of the plug module is larger than the opening of the lower cover module.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI258392B (en) * 2005-11-30 2006-07-21 Benq Corp Droplet generators
US20060209139A1 (en) * 2005-03-15 2006-09-21 Fuji Xerox Co., Ltd. Electrical connection substrate, droplet discharge head, and droplet discharge apparatus
CN103112253A (en) * 2011-11-10 2013-05-22 施乐公司 Bonded silicon structure for high density print head

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060209139A1 (en) * 2005-03-15 2006-09-21 Fuji Xerox Co., Ltd. Electrical connection substrate, droplet discharge head, and droplet discharge apparatus
TWI258392B (en) * 2005-11-30 2006-07-21 Benq Corp Droplet generators
CN103112253A (en) * 2011-11-10 2013-05-22 施乐公司 Bonded silicon structure for high density print head

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