TWI547961B - Dielectric ceramics and laminated ceramic capacitors - Google Patents

Dielectric ceramics and laminated ceramic capacitors Download PDF

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TWI547961B
TWI547961B TW097131753A TW97131753A TWI547961B TW I547961 B TWI547961 B TW I547961B TW 097131753 A TW097131753 A TW 097131753A TW 97131753 A TW97131753 A TW 97131753A TW I547961 B TWI547961 B TW I547961B
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crystal grains
ceramic
dielectric ceramic
bias
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TW200917300A (en
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Masahiro Otsuka
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Murata Manufacturing Co
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    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
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Description

介電質陶瓷及積層陶瓷電容Dielectric ceramics and multilayer ceramic capacitors

本發明係關於一種介電質陶瓷及積層電容。更詳細而言,本發明係關於在施加有DC(直流)偏壓之環境下所使用之介電質陶瓷。The present invention relates to a dielectric ceramic and a laminated capacitor. More specifically, the present invention relates to a dielectric ceramic used in an environment in which a DC (direct current) bias is applied.

作為本發明之主要用途的積層陶瓷電容,一般以如下方法製造。The laminated ceramic capacitor which is the main use of the present invention is generally produced by the following method.

首先,準備包含介電質陶瓷原料之陶瓷生片,於其表面上具有所需之圖案,且付與作為內部電極之導電材料。First, a ceramic green sheet containing a dielectric ceramic raw material is prepared, which has a desired pattern on its surface and is supplied with a conductive material as an internal electrode.

其次,將包含已付與上述導電材料之陶瓷生片的複數個陶瓷生片進行積層、熱壓接,藉此製作一體化的未加工的積層體。Next, a plurality of ceramic green sheets including ceramic green sheets having the above-mentioned conductive materials are laminated and thermocompression bonded to form an integrated unprocessed laminate.

再次,將該未加工的積層體煅燒,藉此獲得燒結後之積層體。於該積層體之內部,形成有以上述導電材料所構成之內部電極。Again, the unprocessed laminate is calcined, whereby a laminated body after sintering is obtained. An internal electrode made of the above-mentioned conductive material is formed inside the laminated body.

然後,於積層體之外表面上形成外部電極,使其電性連接於內部電極之特定者。外部電極例如係藉由在積層體之外表面上付與包含導電性金屬粉末及玻璃粉之導電膏並進行燒結而形成。以此方式完成積層陶瓷電容。Then, an external electrode is formed on the outer surface of the laminated body to be electrically connected to a specific one of the internal electrodes. The external electrode is formed, for example, by applying a conductive paste containing a conductive metal powder and a glass frit to the outer surface of the laminate and sintering it. The laminated ceramic capacitor is completed in this way.

近年來,對於積層陶瓷電容之小型化、大容量化之要求日益苛刻,由此促進介電質陶瓷層之薄層化。隨著介電質陶瓷層之薄層化之發展,對介電質陶瓷層所施加之使用電場相對變高,從而高施加電場下之絕緣性、可靠性變得重 要。In recent years, the demand for miniaturization and large capacity of laminated ceramic capacitors has become increasingly demanding, thereby promoting thinning of the dielectric ceramic layer. With the development of the thinning of the dielectric ceramic layer, the electric field applied to the dielectric ceramic layer is relatively high, so that the insulation and reliability under high applied electric field become heavy. Want.

於專利文獻1中揭示有一種積層陶瓷電容,其係介電常數為3000以上,以2 kV/mm及20 kV/mm時之室溫以及125℃時之CR(capacitor resistor,電容電阻)乘積所表示之絕緣電阻(MΩ.μF)較高,分別為6000在2000以上、以及為2000在500以上,且靜電容量之溫度特性滿足各標準,耐候性能優異,低成本、小型且大容量,並且揭示有一種適於以上所述之介電質陶瓷,其係相對於由通式(1-α-β-γ)[BaO]m .TiO2 +αM2 O3 +βRe2 O3 +γ(Mn1-x-y Nix Coy )O(其中,M2 O3 為選自Sc2 O3 、Y2 O3 中之至少1種以上,Re2 O3 為選自Sm2 O3 、Eu2 O3 中之至少1種以上,α、β、γ、m、x、y為0.0025≦α+β≦0.025、0<β≦0.0075、0.0025≦γ≦0.05、γ/(α+β)≦4、0≦x<1.0、0≦y<1.0、0≦x+y<1.0、1.000<m≦1.035)Patent Document 1 discloses a laminated ceramic capacitor having a dielectric constant of 3,000 or more, a room temperature of 2 kV/mm and 20 kV/mm, and a CR (capacitor resistor) product at 125 ° C. The insulation resistance (MΩ.μF) is high, 6000 is 2000 or more, and 2000 is 500 or more, and the temperature characteristics of the electrostatic capacity satisfy each standard, and the weather resistance is excellent, low cost, small size, large capacity, and reveal There is a dielectric ceramic suitable for the above, which is relative to the general formula (1-α-β-γ) [BaO] m . TiO 2 +αM 2 O 3 +βRe 2 O 3 +γ(Mn 1-x-y Ni x Co y )O (wherein M 2 O 3 is at least one selected from the group consisting of Sc 2 O 3 and Y 2 O 3 , Re 2 O 3 is at least one selected from the group consisting of Sm 2 O 3 and Eu 2 O 3 , and α, β, γ, m, x, y are 0.0025 ≦ α + β ≦ 0.025, 0 < β ≦ 0.0075, 0.0025 ≦ γ ≦0.05, γ/(α+β)≦4, 0≦x<1.0, 0≦y<1.0, 0≦x+y<1.0, 1.000<m≦1.035)

所表示之主成分100莫耳,將作為副成分之氧化鎂換算成Mg0並添加0.5~5.0莫耳,進而將作為副成分之氧化矽換算成SiO2 並添加0.2~5.0莫耳。The main component is 100 mol, and the magnesium oxide as a subcomponent is converted into Mg0 and added in an amount of 0.5 to 5.0 m. Further, cerium oxide as a subcomponent is converted into SiO 2 and 0.2 to 5.0 mol is added.

[專利文獻1]日本專利特開平10-199748號公報[Patent Document 1] Japanese Patent Laid-Open No. Hei 10-199748

根據積層電容之用途,有時積層電容上總是被施加有固定之DC偏壓。近年來,因介電質陶瓷層之薄層化,該DC偏壓之電場強度相對變大,由此產生介電質陶瓷之介電常數降低之問題。即使對於上述專利文獻1中之積層陶瓷電 容,在薄層化有所發展之情況下,施加有DC偏壓時之積層陶瓷電容之靜電容量值相較無偏壓時亦會降低。Depending on the application of the multilayer capacitor, a fixed DC bias is always applied to the build-up capacitor. In recent years, due to the thinning of the dielectric ceramic layer, the electric field strength of the DC bias is relatively large, thereby causing a problem that the dielectric constant of the dielectric ceramic is lowered. Even for the laminated ceramic electric battery in the above Patent Document 1. In the case where the thinning is developed, the electrostatic capacitance value of the multilayer ceramic capacitor when the DC bias is applied is also lower than that without the bias voltage.

本發明係鑒於如上所述之問題研製而成者,其目的在於提供一種即使於較大之DC偏壓下,亦顯示充分之介電常數的介電質陶瓷及使用其之積層陶瓷電容。The present invention has been made in view of the above problems, and an object thereof is to provide a dielectric ceramic which exhibits a sufficient dielectric constant even under a large DC bias and a laminated ceramic capacitor using the same.

即,本發明之介電質陶瓷係具有如下組成:將由通式ABO3 所表示之鈣鈦礦型化合物(A必含有Ba,且含有選自Ba、Ca、Sr中之至少1種;B必含有Ti,且含有選自Ti、Zr、Hf中之至少1種)作為主成分,作為副成分含有R1(R1為選自La、Nd、Sm、Gd、Dy中之至少1種)及R2(R2為選自Y、Ho、Er、Yb中之至少1種),且該介電質陶瓷具備晶粒與晶界,其特徵在於:在將相對於100莫耳份上述ABO3 的R1之總含量設為α莫耳份,且R2之總含量設為β莫耳份時,對上述晶粒之截面進行觀察時,在從晶粒之表面朝向晶粒內部相距10 nm以上之點中,R1之濃度為α/2以上且R2之濃度未達β/5(包含0)之晶粒為全體之60%以上。That is, the dielectric ceramic of the present invention has a composition in which a perovskite compound represented by the general formula ABO 3 (A must contain Ba and contains at least one selected from the group consisting of Ba, Ca, and Sr; It contains Ti and contains at least one selected from the group consisting of Ti, Zr, and Hf as a main component, and contains R1 as a subcomponent (R1 is at least one selected from the group consisting of La, Nd, Sm, Gd, and Dy) and R2 ( R2 is at least one selected from the group consisting of Y, Ho, Er, and Yb, and the dielectric ceramic has crystal grains and grain boundaries, and is characterized in that it is a total of R1 of the above ABO 3 with respect to 100 moles. When the content is set to α mol parts, and the total content of R2 is set to β mol parts, when the cross section of the crystal grains is observed, R1 is at a distance of 10 nm or more from the surface of the crystal grains toward the inside of the crystal grains. The crystal grains having a concentration of α/2 or more and a concentration of R2 of less than β/5 (including 0) are 60% or more of the total.

又,在對上述晶粒之截面進行觀察時,較好的是,在從晶粒之表面朝向晶粒內部相距10 nm以上之點中,實質上不存在R2,且R2僅存在於晶界中。Further, when observing the cross section of the crystal grain, it is preferable that R2 is substantially absent from a surface of the crystal grain toward a distance of 10 nm or more from the inside of the crystal grain, and R2 exists only in the grain boundary. .

進而好的是,上述ABO3 為通式:(Ba1-x Cax )m (Ti1-y Zry )O3 ,且作為副成分進而含有M1(M1為選自V、Cr、Mn中之至少1種)、M2(M2為選自Mg、Ni、Mo、W中之至少1)及Si,該M1、M2及Si相對於100莫耳份ABO3 分別為a莫耳 份、b莫耳份、c莫耳份,上述x、y、m、α、β、a、b、c滿足0≦x≦0.05、0≦y≦0.02、0.99≦m≦1.03、0.2≦α≦3.0、0.2≦β≦3.0、0.01≦a≦0.5、0.5≦b≦2.0、0.5≦c≦3.0。Further preferably, the above ABO 3 is of the formula: (Ba 1-x Ca x ) m (Ti 1-y Zr y )O 3 , and further contains M1 as a subcomponent (M1 is selected from the group consisting of V, Cr, and Mn). At least one of the types), M2 (M2 is at least 1 selected from the group consisting of Mg, Ni, Mo, and W) and Si, and the M1, M2, and Si are a moles, b, respectively, with respect to 100 moles of ABO 3 Ears, c moles, the above x, y, m, α, β, a, b, c satisfy 0≦x≦0.05, 0≦y≦0.02, 0.99≦m≦1.03, 0.2≦α≦3.0, 0.2 ≦β≦3.0, 0.01≦a≦0.5, 0.5≦b≦2.0, 0.5≦c≦3.0.

又,本發明亦適於一種積層陶瓷電容,其具備所積層之複數個介電質陶瓷層、配置於該等介電質陶瓷層間之內部電極、以及電性連接於該等內部電極之外部電極,該積層陶瓷電容之特徵在於:上述介電質陶瓷層係藉由本發明之介電質陶瓷組成物所形成。Furthermore, the present invention is also applicable to a multilayer ceramic capacitor comprising a plurality of laminated dielectric ceramic layers, internal electrodes disposed between the dielectric ceramic layers, and external electrodes electrically connected to the internal electrodes The multilayer ceramic capacitor is characterized in that the dielectric ceramic layer is formed by the dielectric ceramic composition of the present invention.

根據本發明之介電質陶瓷,由於取得滿足以下關係之狀態:稀土類元素R1充分固溶於晶粒內,另一方面,稀土類元素R2幾乎不固溶於晶粒內,因此,即使施加有高的DC偏壓,介電常數亦不會降低,從而可保持高介電常數。According to the dielectric ceramic of the present invention, since the rare earth element R1 is sufficiently dissolved in the crystal grains, the rare earth element R1 is hardly dissolved in the crystal grains, and therefore, even if it is applied, the rare earth element R1 is sufficiently dissolved in the crystal grains. With a high DC bias, the dielectric constant does not decrease, thereby maintaining a high dielectric constant.

又,於本發明之介電質陶瓷之較佳組成範圍內,進而可獲得良好的靜電容量之溫度變化率與高溫負載可靠性。Further, in the preferred composition range of the dielectric ceramic of the present invention, a temperature change rate of a good electrostatic capacity and a high-temperature load reliability can be obtained.

進而,根據使用有本發明之介電質陶瓷之積層陶瓷電容,即使於高的DC偏壓下,亦可保持高靜電容量。Further, according to the laminated ceramic capacitor using the dielectric ceramic of the present invention, a high electrostatic capacity can be maintained even under a high DC bias.

首先,對作為本發明之介電質陶瓷之主要用途的積層陶瓷電容加以說明。圖1係表示一般的積層陶瓷電容1之剖面圖。First, a laminated ceramic capacitor which is a main application of the dielectric ceramic of the present invention will be described. Fig. 1 is a cross-sectional view showing a general laminated ceramic capacitor 1.

積層陶瓷電容1具備長方體狀之陶瓷積層體2。陶瓷積層體2具備所積層之複數個介電質陶瓷層3、以及沿著複數個 介電質陶瓷層3間之界面所形成之複數個內部電極4及5。內部電極4及5形成為一直到達陶瓷積層體2之外表面為止,而引出至陶瓷積層體2之一方之端面6的內部電極4與引出至他方之端面7的內部電極5係於陶瓷積層體2之內部交替配置,以便可經由介電質陶瓷層3而取得靜電容量。The multilayer ceramic capacitor 1 has a ceramic laminate 2 having a rectangular parallelepiped shape. The ceramic laminate 2 is provided with a plurality of dielectric ceramic layers 3 stacked, and along a plurality of A plurality of internal electrodes 4 and 5 formed by the interface between the dielectric ceramic layers 3. The internal electrodes 4 and 5 are formed so as to reach the outer surface of the ceramic laminate 2, and the internal electrode 4 led to the end face 6 of one of the ceramic laminates 2 and the internal electrode 5 led to the other end face 7 are attached to the ceramic laminate. The internals of 2 are alternately arranged so that the electrostatic capacitance can be obtained via the dielectric ceramic layer 3.

內部電極4及5之導電材料較好的是低成本之鎳或鎳合金。The conductive material of the internal electrodes 4 and 5 is preferably a low-cost nickel or nickel alloy.

為取得上述靜電容量,於陶瓷積層體2之外表面上,在端面6及7上,分別形成有外部電極8及9,使其電性連接於內部電極4及5之任一特定者。作為外部電極8及9中所含之導電材料,可使用與內部電極4及5之情況相同之導電材料,進而亦可使用銀、鈀、銀-鈀合金等。外部電極8及9係藉由給予向如上所述之金屬粉末中添加玻璃粉而獲得之導電膏並進行燒結而形成。In order to obtain the above electrostatic capacitance, external electrodes 8 and 9 are formed on the outer surfaces of the ceramic laminate 2 on the end faces 6 and 7, respectively, and are electrically connected to any one of the internal electrodes 4 and 5. As the conductive material contained in the external electrodes 8 and 9, a conductive material similar to the case of the internal electrodes 4 and 5 can be used, and silver, palladium, a silver-palladium alloy or the like can be used. The external electrodes 8 and 9 are formed by giving a conductive paste obtained by adding a glass frit to the metal powder as described above and sintering it.

又,於外部電極8及9上,視需要分別形成由鎳、銅等組成之第1電鍍層10及11,進而於其上,分別形成由焊錫、錫等組成之第2電鍍層12及13。Further, on the external electrodes 8 and 9, the first plating layers 10 and 11 made of nickel, copper, or the like are formed as needed, and the second plating layers 12 and 13 made of solder, tin, or the like are formed thereon. .

其次,對本發明之介電質陶瓷之詳細內容加以說明。Next, the details of the dielectric ceramic of the present invention will be described.

本發明之介電質陶瓷具備晶粒與晶界。此處所謂晶粒主要係指包含主成分組成之晶粒,並不相當於析出有異相成分之粒子,又,此處所謂晶界亦包含三相點。The dielectric ceramic of the present invention has crystal grains and grain boundaries. Here, the term "grain" mainly means a crystal grain containing a main component composition, and does not correspond to a particle in which a heterophase component is precipitated. Here, the grain boundary also includes a triple point.

本發明之介電質陶瓷之組成中的主成分包含由ABO3 所表示之鈣鈦礦型化合物,A之明細中,Ba處於支配地位,B之明細中,Ti處於支配地位,因此可列舉BaTiO3 作為代 表例。該Ba視需要可由Sr、Ca等元素所取代,Ti亦可由Zr、Hf等之元素所取代。The main component in the composition of the dielectric ceramic of the present invention contains a perovskite compound represented by ABO 3 , and in the detail of A, Ba is in a dominant position, and in the detail of B, Ti is in a dominant position, so BaTiO is exemplified. 3 as a representative example. The Ba may be replaced by an element such as Sr or Ca as needed, and Ti may be substituted by an element such as Zr or Hf.

作為副成分,其特徵在於,同時含有2種稀土類元素,即R1(R1為選自La、Nd、Sm、Gd、Dy中之至少1種)與R2(R2為選自Y、Ho、Er、Yb中之至少1種)。R1固溶於晶粒中,且其濃度為α/2以上。若以該濃度存在於晶粒內,則R1亦可存在於晶界中。另一方面,R2幾乎不存在於晶粒內,其主要存在於晶界中。當晶粒內之濃度未達β/5時,所謂「幾乎不存在」則很充分。若滿足以上情況,則相對於主成分而添加之R2成分大部分存在於晶界中,且幾乎不固溶於晶粒內。當R1與R2同時具有上述關係時,可發揮DC偏壓下之介電常數變高之效果。The subcomponent is characterized in that it contains two kinds of rare earth elements, that is, R1 (R1 is at least one selected from the group consisting of La, Nd, Sm, Gd, and Dy) and R2 (R2 is selected from Y, Ho, and Er). At least one of Yb). R1 is solid-solubilized in the crystal grains and has a concentration of α/2 or more. If it exists in the crystal grain at this concentration, R1 may exist in a grain boundary. On the other hand, R2 is hardly present in the crystal grains, and it mainly exists in the grain boundaries. When the concentration in the crystal grains does not reach β/5, the so-called "almost non-existent" is sufficient. If the above is satisfied, most of the R2 component added to the main component exists in the grain boundary and hardly dissolves in the crystal grains. When R1 and R2 have the above relationship at the same time, the effect of increasing the dielectric constant under the DC bias can be exhibited.

再者,在晶粒內之R2成分之濃度實質上變為零時,會進一步抑制施加DC偏壓所導致的介電常數降低,因而更佳。Further, when the concentration of the R2 component in the crystal grains becomes substantially zero, the decrease in the dielectric constant due to the application of the DC bias is further suppressed, which is more preferable.

其次,對用以有效獲得上述介電質陶瓷之製造方法之一例加以說明。Next, an example of a manufacturing method for efficiently obtaining the above dielectric ceramics will be described.

首先,合成主成分之原料。當假設主成分為BaTiO3 時,此時較好的方法是,使BaCO3 等之Ba源、TiO2 等之Ti源混合,除此之外,同時使Sm2 O3 等之R1源混合,且對其進行熱處理合成,生成由R1所改質的BaTiO3 粉末。作為此時之起始原料及混合方法,一般為通常之固相法,但亦可為濕式合成法。First, the raw material of the main component is synthesized. When it is assumed that the main component is BaTiO 3 , a preferred method at this time is to mix a Ba source such as BaCO 3 or a Ti source such as TiO 2 , and to simultaneously mix the R 1 source such as Sm 2 O 3 . This was heat-treated and synthesized to form a BaTiO 3 powder modified by R1. As a starting material and a mixing method at this time, it is generally a usual solid phase method, but it may be a wet synthesis method.

對由該R1所改質的BaTiO3 粉末中加入Y2 O3 等之R2源及 視需要之其他副成分並混合,將此作為陶瓷原料。To the BaTiO 3 powder modified by the R1, an R2 source such as Y 2 O 3 or the like and other auxiliary components are added and mixed, and this is used as a ceramic raw material.

使用該陶瓷原料,以與先前相同之方法製作陶瓷漿料,並進行薄片成形,獲得陶瓷生片。將該陶瓷生片與金屬膜交替積層,獲得成形體。再者,該金屬膜可為塗佈有金屬漿料者,亦可為以真空薄膜形成法所形成者,故其形態並無特別限制。然後,於大氣或者氮氣環境等之加熱環境中,自所獲得之成形體中去除黏合劑後,將成形體以1000~1250℃左右之溫度進行煅燒。此時,當內部電極之成分為賤金屬時,於還原環境中進行煅燒。Using this ceramic raw material, a ceramic slurry was produced in the same manner as before, and sheet forming was carried out to obtain a ceramic green sheet. The ceramic green sheet and the metal film were alternately laminated to obtain a molded body. Further, the metal film may be formed by coating a metal paste or may be formed by a vacuum film forming method, and thus the form thereof is not particularly limited. Then, after removing the binder from the obtained molded body in a heated environment such as the atmosphere or a nitrogen atmosphere, the molded body is fired at a temperature of about 1,000 to 1,250 °C. At this time, when the composition of the internal electrode is a base metal, it is calcined in a reducing atmosphere.

於上述煅燒時,由於R1成分已存在於含有BaTiO3 之晶粒中,因此之後所添加的R2成分幾乎不固溶於晶粒中,且於燒結完成後亦主要存在於晶界中。已存在於晶粒中之R1成分經煅燒會於晶界中析出少許,但於燒結完成後仍主要殘留於晶粒之內部。In the above calcination, since the R1 component is already present in the crystal grains containing BaTiO 3 , the R 2 component added thereafter is hardly dissolved in the crystal grains, and is mainly present in the grain boundaries after the completion of the sintering. The R1 component already present in the crystal grains is calcined to precipitate a little in the grain boundary, but remains mainly inside the crystal grains after the completion of the sintering.

其次,對本發明之介電質陶瓷之組成中之更佳的條件加以說明。Next, better conditions in the composition of the dielectric ceramic of the present invention will be described.

首先,主成分為(Ba1-x Cax )m (Ti1-y Zry )O3 ,且作為副成分進而含有M1(M1為選自V、Cr、Mn中之至少1種)、M2(M2為選自Mg、Ni、Mo、W中之至少1種)及Si,該M1、M2及Si相對於100莫耳份ABO3 分別為a莫耳份、b莫耳份、c莫耳份,且上述x、y、m、α、β、a、b、c滿足0≦x≦0.05、0≦y≦0.02、0.99≦m≦1.03、0.2≦α≦3.0、0.2≦β≦3.0、0.01≦a≦0.5、0.5≦b≦2.0、0.5≦c≦3.0。於該範圍內,DC偏壓電場下之介電常數更高,且靜電容量之溫度變化 率亦良好,進而高溫負載可靠性亦變高。First, the main component is (Ba 1-x Ca x ) m (Ti 1-y Zr y )O 3 , and further contains M1 as a subcomponent (M1 is at least one selected from the group consisting of V, Cr, and Mn), M2. (M2 is at least one selected from the group consisting of Mg, Ni, Mo, and W) and Si, and the M1, M2, and Si are a moles, b moles, and c moles, respectively, relative to 100 moles of ABO 3 . And x, y, m, α, β, a, b, c satisfy 0≦x≦0.05, 0≦y≦0.02, 0.99≦m≦1.03, 0.2≦α≦3.0, 0.2≦β≦3.0, 0.01≦a≦0.5, 0.5≦b≦2.0, 0.5≦c≦3.0. Within this range, the dielectric constant under the DC bias electric field is higher, and the temperature change rate of the electrostatic capacity is also good, and the high-temperature load reliability is also high.

構成主成分之A位的Ba於滿足0≦x≦0.05之範圍內可由Ca所取代。然而,若x超過0.05,則於DC偏壓下之介電常數較低。The Ba constituting the A site of the main component may be substituted by Ca within a range satisfying 0 ≦ x ≦ 0.05. However, if x exceeds 0.05, the dielectric constant at DC bias is low.

構成主成分之B位的Ti於滿足0≦y≦0.02之範圍內可由Zr所取代。例如,在起始原料攪拌時使用有氧化鋯球之情況下,即使因氧化鋯球之磨損而混入有Zr成分,但只要在0≦y≦0.02之範圍內,則不會有特別問題。The Ti constituting the B site of the main component may be substituted by Zr within a range satisfying 0 ≦ y 0.02. For example, when a zirconia ball is used for stirring the starting material, even if the Zr component is mixed by abrasion of the zirconia ball, there is no particular problem as long as it is within the range of 0 ≦ y 0.02.

再者,主成分之A位總量相對於B位總量之莫耳比m較好的是0.99~1.03。若m之值為該範圍外,則靜電容量之溫度變化率大。Further, the molar ratio m of the total amount of the A component of the main component to the total amount of the B site is preferably 0.99 to 1.03. If the value of m is outside the range, the temperature change rate of the electrostatic capacity is large.

稀土類元素R1之總含量α較好的是,相對於100莫耳份ABO3 滿足0.2≦α≦3.0。若α為該範圍外,則DC偏壓下之介電常數稍低。The total content α of the rare earth element R1 is preferably 0.2 ≦ α ≦ 3.0 with respect to 100 mol parts of ABO 3 . If α is outside this range, the dielectric constant under DC bias is slightly lower.

另一方面,稀土類元素R2之總含量β較好的是,相對於100莫耳份ABO3 滿足0.2≦β≦3.0。若β為該範圍外,則DC偏壓下之介電常數稍低。On the other hand, the total content β of the rare earth element R2 is preferably 0.2 ≦β≦3.0 with respect to 100 mol parts of ABO 3 . If β is outside this range, the dielectric constant under DC bias is slightly lower.

M1相對於100莫耳份ABO3 之含量a較好的是滿足0.01≦a≦0.5。若a未達0.01,則介電質陶瓷之耐還原性能低。又,若a超過0.5,則靜電容量之溫度變化率大。The content a of M1 relative to 100 moles of ABO 3 is preferably 0.01 ≦ a ≦ 0.5. If a is less than 0.01, the dielectric ceramic has low reduction resistance. Further, when a exceeds 0.5, the temperature change rate of the electrostatic capacitance is large.

M2相對於100莫耳份ABO3 之含量b較好的是滿足0.5≦b≦2.0。若b未達0.5,則高溫負載可靠性低。又,若b超過2.0,則DC偏壓下之介電常數稍低。The content b of M2 relative to 100 moles of ABO 3 preferably satisfies 0.5 ≦b ≦ 2.0. If b does not reach 0.5, the high temperature load reliability is low. Further, if b exceeds 2.0, the dielectric constant under DC bias is slightly lower.

又,Si相對於100莫耳份ABO3 之含量c較好的是滿足0.5 ≦c≦3.0。若c未達0.5,則介電質陶瓷之燒結不充分。又,若c超過3.0,則DC偏壓下之介電常數稍低。Further, it is preferable that the content c of Si with respect to 100 mol parts of ABO 3 satisfies 0.5 ≦c ≦ 3.0. If c is less than 0.5, the sintering of the dielectric ceramic is insufficient. Further, if c exceeds 3.0, the dielectric constant under DC bias is slightly lower.

[實施例][Examples]

[實驗例1] 本實驗例係以某特定之組成製作積層陶瓷電容,且可作為係R1與R2之晶粒固溶狀態對DC偏壓下之介電常數所造成之影響。實驗組成為100Ba1.00 TiO3 +0.5Sm+1.0Y+0.1Mn+1.2Mg+1.2Si。試料為試料編號1~4該4上。[Experimental Example 1] This experimental example is to produce a laminated ceramic capacitor with a specific composition, and can be used as a dielectric constant state of the crystal grains of R1 and R2 to affect the dielectric constant under DC bias. The experimental composition was 100 Ba 1.00 TiO 3 + 0.5 Sm + 1.0 Y + 0.1 Mn + 1.2 Mg + 1.2 Si. The sample is sample number 1 to 4 and 4 on it.

首先,呈現試料編號1之試料之製作方法。秤量BaCO3 、TiO2 、Sm2 O3 作為起始原料,並於使用有水系溶劑之球磨機中進行充分混合,獲得混合粉末。將該混合粉末於大氣中以1050℃之溫度進行煅燒,獲得主成分粉末。First, a method of producing a sample of sample No. 1 is presented. BaCO 3 , TiO 2 , and Sm 2 O 3 were weighed as a starting material, and thoroughly mixed in a ball mill using an aqueous solvent to obtain a mixed powder. The mixed powder was calcined in the air at a temperature of 1050 ° C to obtain a main component powder.

相對於所獲得之主成分粉末,秤量Y2 O3 、MnCO3 、MgCO3 、SiO2 ,並同樣於球磨機中進行混合,獲得陶瓷原料粉末。Y 2 O 3 , MnCO 3 , MgCO 3 , and SiO 2 were weighed in comparison with the obtained main component powder, and were similarly mixed in a ball mill to obtain a ceramic raw material powder.

對該陶瓷原料粉末中加入乙醇系有機溶劑及聚乙烯醇縮丁醛系黏合劑,並進行濕式混合,獲得陶瓷漿料。An ethanol-based organic solvent and a polyvinyl butyral-based adhesive were added to the ceramic raw material powder, and wet-mixed to obtain a ceramic slurry.

將所得之陶瓷漿料以刮刀成形法進行薄片成形,獲得陶瓷生片。The obtained ceramic slurry was subjected to sheet forming by a doctor blade forming method to obtain a ceramic green sheet.

將所獲得之陶瓷生片切割成特定之矩形形狀,並於其表面上塗佈包含Ni金屬粉末之導電膏,以成為特定之圖案狀。將塗佈有該導電膏之陶瓷生片以使引出側相互不同之方式積層複數塊,且進行壓接,由此獲得積層體。The obtained ceramic green sheet is cut into a specific rectangular shape, and a conductive paste containing Ni metal powder is coated on the surface thereof to have a specific pattern. The ceramic green sheets coated with the conductive paste are laminated in a plurality of pieces so that the lead-out sides are different from each other, and pressure-bonded, thereby obtaining a laminated body.

對於所獲得之積層體,於氮氣環境中以300℃之溫度加熱以進行脫黏處理後,於氧分壓為10-9 ~10-12 MPa之由H2 - N2 -H2 O氣體所組成之還原環境中以1200℃煅燒2小時,獲得陶瓷積層體。The obtained laminate is heated at a temperature of 300 ° C in a nitrogen atmosphere for debonding treatment, and is subjected to H 2 -N 2 -H 2 O gas at a partial pressure of oxygen of 10 -9 to 10 -12 MPa. The composition was reduced in a reducing atmosphere at 1200 ° C for 2 hours to obtain a ceramic laminate.

其後,於陶瓷積層體之兩端面上分別塗佈含有B2 O3 -SiO2 -BaO系之玻璃粉之Ag漿料,且於N2 氣體環境中以600℃之溫度進行燒結,形成與內部電極電性連接之外部電極。Thereafter, an Ag paste containing a B 2 O 3 —SiO 2 —BaO-based glass powder is applied to both end faces of the ceramic laminate, and sintered at a temperature of 600° C. in an N 2 gas atmosphere to form a The external electrode is electrically connected to the external electrode.

對於以如上述方法所獲得之試料編號1之積層陶瓷電容,其外形尺寸為長2.0 mm、寬1.2 mm、厚1.0 mm,介電質陶瓷層之每1層厚度為1.5 μm,有助於形成靜電容量之內部電極之對向的部分中,平均每1層之面積為1.8×10-6 m2 ,且有助於形成靜電容量之介電質陶瓷層之層數為100。For the multilayer ceramic capacitor of the sample No. 1 obtained by the above method, the outer dimension is 2.0 mm in length, 1.2 mm in width, and 1.0 mm in thickness, and the thickness of each layer of the dielectric ceramic layer is 1.5 μm, which contributes to formation. In the portion where the internal electrodes of the electrostatic capacitance are opposed, the average area per layer is 1.8 × 10 -6 m 2 , and the number of layers of the dielectric ceramic layer contributing to the formation of the electrostatic capacity is 100.

其次,對試料編號2~4之試料之製作方法加以說明。Next, a method of producing the sample of sample numbers 2 to 4 will be described.

於試料編號2之試料中,使將混合粉末煅燒而獲得主成分粉末時之煅燒溫度設為1000℃。除此之外,使用與試料編號1相同之製造方法。In the sample of sample No. 2, the calcination temperature at the time of obtaining the main component powder by calcining the mixed powder was set to 1000 °C. Except for this, the same manufacturing method as that of sample No. 1 was used.

於試料編號3之試料中,在秤量起始原料時不使Sm2 O3 混合到其中,而在使Y2 O3 、MnCO3 、MgCO3 、SiO2 混合到含有Ba1.00 TiO3 之主成分粉末中時同時混合Sm2 O3 。除此之外,使用與試料編號1相同之製造方法。In the sample of sample No. 3, Sm 2 O 3 was not mixed therein when the starting material was weighed, and Y 2 O 3 , MnCO 3 , MgCO 3 , and SiO 2 were mixed to a main component containing Ba 1.00 TiO 3 . Simultaneously mixing Sm 2 O 3 in the powder. Except for this, the same manufacturing method as that of sample No. 1 was used.

於試料編號4之試料中,在秤量起始原料時使Y2 O3 與Sm2 O3 同時混合到其中,而在使MnCO3 、MgCO3 、SiO2 混合到含有Ba1.00 TiO3 之主成分粉末中時不進行上述混合。除此之外,使用與試料編號1相同之製造方法。In the sample of sample No. 4, Y 2 O 3 and Sm 2 O 3 were simultaneously mixed therein while weighing the starting material, and MnCO 3 , MgCO 3 , and SiO 2 were mixed to a main component containing Ba 1.00 TiO 3 . The above mixing is not carried out in the powder. Except for this, the same manufacturing method as that of sample No. 1 was used.

對於所獲得之試料編號1~4之積層陶瓷電容之試料,測 定DC偏壓下之介電常數及高溫負載可靠性,並將其結果顯示於表1。再者,介電常數之測定條件為:DC偏壓為1.25 kV/mm,交流(AC)電場為0.1 kVrms /mm(在頻率為1 kHz時)。進而,高溫負載可靠性之指標設為溫度150℃、施加AC電場8 kVrms /mm時之平均故障時間(h)。The dielectric constant and high-temperature load reliability under DC bias were measured for the samples of the multilayer ceramic capacitors of the sample numbers 1 to 4 obtained, and the results are shown in Table 1. Further, the dielectric constant was measured under the conditions of a DC bias of 1.25 kV/mm and an alternating current (AC) electric field of 0.1 kV rms / mm (at a frequency of 1 kHz). Further, the index of the high-temperature load reliability is an average failure time (h) at a temperature of 150 ° C and an AC electric field of 8 kV rms / mm.

然後,對試料編號1~4之積層陶瓷電容之試料之截面進行鏡面研磨。於該截面中,選擇任意晶粒,對於該晶粒中之從晶界朝向晶粒內部相距10 nm之任意5點,使用TEM-EDX(使用有穿透式電子顯微鏡之能量分散式X射線微量分析儀)對Sm及Y進行定量分析。此處,當5點之測定點中的Sm相對於100莫耳份BaTiO3 之平均濃度為總含量α之1/2以上時,即本實驗例中為0.25莫耳份以上時,且當5點之測定點中的Y相對於100莫耳份BaTiO3 之平均濃度未達總含量β之1/5(包含0)時,即本實驗例中未達0.2莫耳份時,將該晶粒作為「有效晶粒」。在對試料截面中5個晶粒進行上述測定時,當有效晶粒為3個以上,即數量上而言為60%以上時,認為此試料包含於本發明之範圍內。以下表1中顯示結果。Then, the cross section of the sample of the multilayer ceramic capacitor of sample numbers 1 to 4 was mirror-polished. In this section, any crystal grain is selected, and TEM-EDX (using an energy-dispersive X-ray trace with a transmission electron microscope) is used for any 5 points from the grain boundary to the inside of the grain at a distance of 10 nm. Analyzer) quantitative analysis of Sm and Y. Here, when the average concentration of Sm at the measurement point of 5 points with respect to 100 moles of BaTiO 3 is 1/2 or more of the total content α, that is, 0.25 moles or more in the present experimental example, and when 5 when the point of the measurement points in the Y relative to 100 molar parts of BaTiO 3 average concentration of less than 1/5 of the total content of β (including 0), i.e., the present experimental example less than 0.2 mole parts, the grains As "effective grain." When the above-described measurement is performed on five crystal grains in the cross section of the sample, when the number of effective crystal grains is three or more, that is, 60% or more in terms of the number, it is considered that the sample is included in the range of the present invention. The results are shown in Table 1 below.

試料編號1之試料中,5個晶粒全部為有效晶粒,故於DC偏壓下之介電常數遠超過3000。In the sample of sample No. 1, all of the five crystal grains were effective crystal grains, so the dielectric constant under DC bias was far more than 3,000.

試料編號2之試料中,Sm於晶粒內之固溶相較試料編號1稍劣,但即便如此,仍有60%之晶粒為有效晶粒,故於DC偏壓下之介電常數超過3000。In the sample No. 2, the solid solution phase of Sm in the crystal grains was slightly inferior to that of sample No. 1, but even so, 60% of the crystal grains were effective crystal grains, so the dielectric constant under DC bias exceeded 3000. .

試料編號3之試料中,Sm未充分存在於晶粒內,有效晶粒僅為20%,故於DC偏壓下之介電常數甚至未達2500。In the sample No. 3, Sm was not sufficiently present in the crystal grains, and the effective crystal grains were only 20%, so the dielectric constant under DC bias was not even 2,500.

試料編號4之試料中,Sm充分存在於晶粒內,但Y於晶粒內之固溶推進,使得有效晶粒僅為20%,故於DC偏壓下之介電常數甚至未達2500。In the sample No. 4, Sm was sufficiently present in the crystal grains, but the solid solution promotion of Y in the crystal grains made the effective crystal grains only 20%, so the dielectric constant under DC bias was not even 2,500.

[實驗例2] 於本實驗例中,當介電質陶瓷之主成分及副成分之元素的種類、數量產生各種變化時,此係可作為對特性所造成之影響。再者,對於所有試料,試料之製造步驟設為與實驗例1中的試料編號1相同。[Experimental Example 2] In the present experimental example, when the types and the number of elements of the main component and the subcomponent of the dielectric ceramic are variously changed, this can affect the characteristics. In addition, the manufacturing steps of the sample were the same as the sample No. 1 in Experimental Example 1 for all the samples.

首先,秤量BaCO3 、CaCO3 、TiO2 、ZrO2 、Sm2 O3 、La2 O3 、Nd2 O3 、Gd2 O3 、Dy2 O3 作為起始原料,使其滿足組 成100(Ba1-x Cax )m (Ti1-y Zry )O3 +αR1中之表2所示之x、y、m、α,並於使用有水系溶劑之球磨機中進行充分混合,獲得混合粉末。將該混合粉末於大氣中以1050℃之溫度進行煅燒,獲得主成分粉末。First, weigh BaCO 3 , CaCO 3 , TiO 2 , ZrO 2 , Sm 2 O 3 , La 2 O 3 , Nd 2 O 3 , Gd 2 O 3 , Dy 2 O 3 as starting materials to satisfy the composition of 100 ( Ba 1-x Ca x ) m (Ti 1-y Zr y )O 3 +αR1, x, y, m, α shown in Table 2, and thoroughly mixed in a ball mill using an aqueous solvent to obtain a mixed powder . The mixed powder was calcined in the air at a temperature of 1050 ° C to obtain a main component powder.

相對於所獲得之主成分粉末,秤量Y2 O3 、Ho2 O3 、Er2 O3 、Yb2 O3 、MnCO3 、Cr2 O3 、V2 O3 、MgCO3 、NiO、MoO3 、WO3 、SiO2 ,使其滿足100(Ba1-x Cax )m (Ti1-y Zry )O3 +αR1+βR2+aM1+bM2+cSi中之表2所示之β、a、b、c,並同樣地於球磨機中進行混合,獲得陶瓷原料粉未。Weighing Y 2 O 3 , Ho 2 O 3 , Er 2 O 3 , Yb 2 O 3 , MnCO 3 , Cr 2 O 3 , V 2 O 3 , MgCO 3 , NiO, MoO 3 with respect to the obtained main component powder , WO 3 , SiO 2 such that it satisfies β, a, b, c shown in Table 2 of 100(Ba 1-x Ca x ) m (Ti 1-y Zr y )O 3 +αR1+βR2+aM1+bM2+cSi, and is similarly The ball mill was mixed to obtain a ceramic raw material powder.

使用該陶瓷原料粉末,藉由與實驗例1之試料編號1之試料相同之製造方法獲得積層陶瓷電容之試料101~153。Using the ceramic raw material powder, samples 101 to 153 of the laminated ceramic capacitor were obtained by the same production method as the sample of the sample No. 1 of Experimental Example 1.

對於所獲得之試料編號101~153之積層陶瓷電容之試料,測定DC偏壓下之介電常數、靜電容量之溫度變化率及高溫負載可靠性,並將其結果顯示於表1。再者,介電常數與高溫負載可靠性之條件係與實驗例1相同。DC偏壓為1.25 kV/mm,AC電場為0.1 kVrms /mm(在頻率為1 kHz時)。靜電容量之溫度變化率設為,以20℃時之DC偏壓下的靜電容量為基準的-25℃及85℃時之DC偏壓下的靜電容量之變化率。將該等結果顯示於表3。With respect to the samples of the multilayer ceramic capacitors of the sample numbers 101 to 153 obtained, the dielectric constant under DC bias, the temperature change rate of the electrostatic capacitance, and the high-temperature load reliability were measured, and the results are shown in Table 1. Further, the conditions of the dielectric constant and the high-temperature load reliability were the same as in Experimental Example 1. The DC bias is 1.25 kV/mm and the AC electric field is 0.1 kV rms /mm (at a frequency of 1 kHz). The temperature change rate of the electrostatic capacity is a rate of change in electrostatic capacitance at a DC bias at -25 ° C and 85 ° C based on the electrostatic capacity at a DC bias at 20 ° C. These results are shown in Table 3.

又,於試料編號101~153之積層陶瓷電容之試料之截面中,與實驗例1相同,使用TEM-EDX對R1與R2之晶粒內部之濃度進行定量分析。有效晶粒之比例與實驗例1之試料編號1相同,為100%。Further, in the cross section of the sample of the multilayer ceramic capacitor of Sample Nos. 101 to 153, the concentration inside the crystal grains of R1 and R2 was quantitatively analyzed by TEM-EDX in the same manner as in Experimental Example 1. The ratio of the effective crystal grains was the same as that of the sample No. 1 of Experimental Example 1, and was 100%.

試料編號101之試料中,m未達0.99,故靜電容量之溫度變化率為±30%以上,且平均故障時間未達50 h,因而不理想。又,試料編號105之試料中,m超過1.03,故靜電容量之溫度變化率為±30%以上,因而不理想。In the sample No. 101, m was less than 0.99, so the temperature change rate of the electrostatic capacity was ±30% or more, and the average failure time was less than 50 h, which was not preferable. Further, in the sample of sample No. 105, since m exceeds 1.03, the temperature change rate of the electrostatic capacitance is ±30% or more, which is not preferable.

試料編號108及109之試料中,Ca之取代量x超過0.05,故DC偏壓下之介電常數雖為2500以上但未達3000,因而不佳。In the samples of sample numbers 108 and 109, the substitution amount x of Ca exceeded 0.05, so the dielectric constant under DC bias was 2500 or more but less than 3,000, which was not preferable.

試料編號124~126之試料中不含有稀土類元素R1,故DC偏壓下之介電常數未達2500。試料編號119之試料中,上述α超過3.0,故DC偏壓下之介電常數雖為2500以上但未達3000,因而不佳。Samples Nos. 124 to 126 do not contain the rare earth element R1, so the dielectric constant under DC bias is less than 2,500. In the sample of sample No. 119, since the above α exceeded 3.0, the dielectric constant under DC bias was 2,500 or more but less than 3,000, which was not preferable.

試料編號127~128之試料中,稀土類元素R2之總含量β未達0.2,故DC偏壓下之介電常數未達2500。試料編號131之試料中,上述β超過3.0,故DC偏壓下之介電常數雖為2500以上但未達3000,因而不佳。In the sample Nos. 127 to 128, the total content β of the rare earth element R2 was less than 0.2, so the dielectric constant under DC bias was less than 2,500. In the sample of sample No. 131, since the above β exceeded 3.0, the dielectric constant under DC bias was 2,500 or more but less than 3,000, which was not preferable.

試料編號136之試料中,M1之含量a超過0.5,故靜電容量之溫度變化率為±30%以上,因而不佳。In the sample of sample No. 136, since the content a of M1 exceeded 0.5, the temperature change rate of the electrostatic capacity was ±30% or more, which was not preferable.

試料編號142之試料中,M2之含量b未達0.5,故平均故障時間未達50 h,因而不佳。試料編號146之試料中,M2之含量b超過2.0,故DC偏壓下之介電常數雖為2500以上但未達3000,因而不佳。In the sample No. 142, the content b of M2 did not reach 0.5, so the average failure time was less than 50 h, which was not preferable. In the sample of sample No. 146, since the content b of M2 exceeded 2.0, the dielectric constant under DC bias was 2,500 or more but less than 3,000, which was not preferable.

試料編號153之試料中,Si之含量c超過3.0,故DC偏壓下之介電常數雖為2500以上但未達3000,因而不佳。In the sample of sample No. 153, since the content c of Si exceeded 3.0, the dielectric constant under DC bias was 2,500 or more but less than 3,000, which was not preferable.

以上,試料編號102~104、106、107、110~118、 120~123、129、130、132~135、137~141、143~145以及147~152之試料顯示DC偏壓下之介電常數為3000以上,靜電容量之溫度變化率未達±30%,且於高溫負載試驗中之平均故障時間為50 h以上,因而較佳。Above, sample numbers 102~104, 106, 107, 110~118, The samples of 120~123, 129, 130, 132~135, 137~141, 143~145 and 147~152 show that the dielectric constant under DC bias is more than 3000, and the temperature change rate of electrostatic capacitance is less than ±30%. Moreover, the average failure time in the high temperature load test is 50 h or more, which is preferable.

1‧‧‧積層陶瓷電容1‧‧‧Laminated ceramic capacitors

2‧‧‧陶瓷積層體2‧‧‧Ceramic laminate

3‧‧‧介電質陶瓷層3‧‧‧Dielectric ceramic layer

4、5‧‧‧內部電極4, 5‧‧‧ internal electrodes

8、9‧‧‧外部電極8, 9‧‧‧ external electrodes

圖1係圖解表示本發明之一實施形態的積層陶瓷電容1之剖面圖。Fig. 1 is a cross-sectional view showing a multilayer ceramic capacitor 1 according to an embodiment of the present invention.

1‧‧‧積層陶瓷電容1‧‧‧Laminated ceramic capacitors

2‧‧‧陶瓷積層體2‧‧‧Ceramic laminate

3‧‧‧介電質陶瓷層3‧‧‧Dielectric ceramic layer

4、5‧‧‧內部電極4, 5‧‧‧ internal electrodes

6、7‧‧‧端面6, 7‧‧‧ end face

8、9‧‧‧外部電極8, 9‧‧‧ external electrodes

10、11‧‧‧第1電鍍層10, 11‧‧‧1st plating

12、13‧‧‧第2電鍍層12, 13‧‧‧2nd plating

Claims (3)

一種介電質陶瓷,其係具有如下組成:將由通式ABO3所表示之鈣鈦礦型化合物(A必含有Ba,且含有選自Ba、Ca、Sr中之至少1種;B必含有Ti,且含有選自Ti、Zr、Hf中之至少1種)作為主成分,作為副成分含有R1(R1為選自La、Nd、Sm、Gd、Dy中之至少1種)及R2(R2為選自Y、Ho、Er、Yb中之至少1種);且該介電質陶瓷具備晶粒與晶界;其特徵在於:在將相對於100莫耳份上述ABO3的R1之總含量設為α莫耳份,且R2之總含量設為β莫耳份時,對上述晶粒之截面進行觀察時,在從晶粒之表面朝向晶粒內部相距10nm以上之點中之R1之濃度為α/2以上且R2之濃度未達β/5(包含0)之晶粒為全體之60%以上,其中上述ABO3為通式:(Ba1-xCax)m(Ti1-yZry)O3,且作為該介電質陶瓷之副成分進而含有M1(M1為選自V、Cr、Mn中之至少1種)、M2(M2為選自Mg、Ni、Mo、W中之至少1種)及Si,該M1、M2及Si相對於100莫耳份ABO3分別為a莫耳份、b莫耳份、c莫耳份,且上述x、y、m、α、β、a、b及c滿足0≦x≦0.05、0≦y≦0.02、0.99≦m≦1.03、0.2≦α≦3.0、0.2≦β≦3.0、 0.01≦a≦0.5、0.5≦b≦2.0、及0.5≦c≦3.0。 A dielectric ceramic having a composition of a perovskite compound represented by the general formula ABO 3 (A must contain Ba and contain at least one selected from the group consisting of Ba, Ca, and Sr; B must contain Ti And containing at least one selected from the group consisting of Ti, Zr, and Hf as a main component, and R1 (wherein R1 is at least one selected from the group consisting of La, Nd, Sm, Gd, and Dy) and R2 (R2 is And at least one selected from the group consisting of Y, Ho, Er, and Yb; and the dielectric ceramic has crystal grains and grain boundaries; and is characterized in that a total content of R1 of the above ABO 3 is set relative to 100 moles When the total content of R2 is β molar, when the cross section of the crystal grains is observed, the concentration of R1 in the point from the surface of the crystal grains to the inside of the crystal grains at a distance of 10 nm or more is The crystal grains of α/2 or more and the concentration of R2 not exceeding β/5 (including 0) are 60% or more of the total, wherein the above ABO 3 is of the formula: (Ba 1-x Ca x ) m (Ti 1-y Zr y )O 3 and further comprising M1 (M1 is at least one selected from the group consisting of V, Cr, and Mn) and M2 (M2 is selected from the group consisting of Mg, Ni, Mo, and W) as a subcomponent of the dielectric ceramic. At least 1) and Si, the M1, M2 and Si are relative to 100 moles AB O 3 is a molar, b molar, c molar, and the above x, y, m, α, β, a, b, and c satisfy 0≦x≦0.05, 0≦y≦0.02, 0.99. ≦m≦1.03, 0.2≦α≦3.0, 0.2≦β≦3.0, 0.01≦a≦0.5, 0.5≦b≦2.0, and 0.5≦c≦3.0. 如請求項1之介電質陶瓷,其中在對上述晶粒之截面進行觀察時,在從晶粒之表面朝向晶粒內部相距10nm以上之點中,實質上不存在R2,且R2僅存在於晶界。 The dielectric ceramic of claim 1, wherein, when the cross section of the crystal grain is observed, substantially no R2 exists in a point from the surface of the crystal grain to the inside of the crystal grain at a distance of 10 nm or more, and R2 exists only in Grain boundaries. 一種積層陶瓷電容,其係具備積層之複數個介電質陶瓷層、配置於該等介電質陶瓷層間之內部電極、以及電性連接於該等內部電極之外部電極者,其特徵在於:上述介電質陶瓷層係藉由如請求項1或2之介電質陶瓷所形成。 A multilayer ceramic capacitor comprising a plurality of laminated dielectric ceramic layers, internal electrodes disposed between the dielectric ceramic layers, and external electrodes electrically connected to the internal electrodes, wherein: The dielectric ceramic layer is formed by the dielectric ceramic of claim 1 or 2.
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