TWI545417B - Control Method of Bulk and Its Control Circuit - Google Patents

Control Method of Bulk and Its Control Circuit Download PDF

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TWI545417B
TWI545417B TW104120135A TW104120135A TWI545417B TW I545417 B TWI545417 B TW I545417B TW 104120135 A TW104120135 A TW 104120135A TW 104120135 A TW104120135 A TW 104120135A TW I545417 B TWI545417 B TW I545417B
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voltage
switching transistor
voltage level
control
circuit
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TW104120135A
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TW201701099A (en
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jing-wei Bi
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Description

基體(Bulk)的控制方法及其控制電路 Bulk control method and control circuit thereof

本發明係關於一種控制方法及控制電路,更特別的是關於一種基體(Bulk)的控制方法及其控制電路。 The invention relates to a control method and a control circuit, and more particularly to a control method of a base (Bulk) and a control circuit thereof.

開關二極體是現今各種控制電路中常用的電子元件。但由於無論MNOS或PMOS的開關電晶體,基於其本身結構的特性,都會固有寄生二極體(inherent parasite diode),即於該電晶體之汲極以及源極之間形成的一個pn接面二極體。這樣的寄生二極體往往在電源充電電路或升壓電路的應用上產生一些困擾。 Switching diodes are commonly used electronic components in various control circuits today. However, regardless of the switching transistor of MNOS or PMOS, based on its own structural characteristics, there will be an inherent parasite diode, that is, a pn junction formed between the drain and the source of the transistor. Polar body. Such parasitic diodes tend to cause some problems in the application of a power charging circuit or a boosting circuit.

如圖1所示,係為一習知非同步電源升壓電路,在電壓源側的Vin剛輸入而輸出端Vout的電路系統尚未需要電壓時,其電晶體會因其基體(Bulk)與源極接同電位的情況下使源極端到汲極端間產生一個寄生二極體10,造成電壓輸出端Vout無法為零電位輸出,而輸出一個Vin-Diode的電位,然而後端的系統並不希望此Vin-Diode電位的產生。 As shown in FIG. 1 , it is a conventional non-synchronous power supply boost circuit. When the voltage on the voltage source side is just input and the circuit of the output terminal Vout does not require a voltage, the transistor is due to its base (Bulk) and source. When the pole is connected to the same potential, a parasitic diode 10 is generated between the source terminal and the drain terminal, so that the voltage output terminal Vout cannot output to a zero potential and outputs a potential of a Vin-Diode, but the system of the back end does not want this. Generation of Vin-Diode potential.

如圖2所示,係為一習知同步電源升壓電路,同樣地,在偶接輸出端Vout的電晶體同樣會在電壓源側的Vin剛輸入時就因寄生二極體10的效應而讓電壓輸出端Vout無法為零電位輸出。 As shown in FIG. 2, it is a conventional synchronous power supply boosting circuit. Similarly, the transistor connected to the output terminal Vout is also caused by the effect of the parasitic diode 10 when the voltage on the voltage source side is just input. The voltage output terminal Vout cannot be output at zero potential.

因此,當後端系統有真正零電位需求時,目前的電路因存在有無法達到零電位輸出的問題而無法滿足後端系統的需求,也無法達到省電的功效。 Therefore, when the back-end system has a true zero potential demand, the current circuit cannot meet the requirements of the back-end system due to the problem that the zero-potential output cannot be achieved, and the power saving effect cannot be achieved.

本發明之一目的在於使電源供應側具有零電位的輸出能力。 One of the objects of the present invention is to provide an output capability of zero potential on the power supply side.

本發明之另一目的在於使電源供應側透過具有零電位輸出的能力而達到省電的功效。 Another object of the present invention is to enable the power supply side to achieve power saving by transmitting the ability to have a zero potential output.

為達上述目的及其他目的,本發明提出一種基體(Bulk)的控制方法,係於一電壓供應電路中,對耦接其電壓輸出端之一開關電晶體的控制,以控制該電壓輸出端之電壓位準,該控制方法包含:一電壓位準取得步驟,係取得來自該電壓供應電路之一電壓源側的電壓並定義為第一電壓位準,以及取得該開關電晶體於該電壓輸出端側的電壓並定義為第二電壓位準;及一接面二極體極向轉換步驟,係控制該開關電晶體之接面二極體之極向,其中於該第一電壓位準大於該第二電壓位準時,對該開關電晶體的基體端施加對應於該電壓供應電路之電壓源側的電壓值,以使該開關電晶體之接面二極體之極向相反於該開關電晶體之源極至汲極的方向,使該電壓輸出端之電壓位準為零電位,其中於該第二電壓位準大於該第一電壓位準時,對該開關電晶體的基體端施加對應於該開關電晶體於該電壓輸出端側的電壓值,以使該開關電晶體之接面二極體之極向相同於該開關電晶體之源極至汲極的方向。 To achieve the above and other objects, the present invention provides a method for controlling a bulk (Bulk) in a voltage supply circuit for controlling a switching transistor coupled to a voltage output terminal thereof to control the voltage output terminal. The voltage level, the control method includes: a voltage level obtaining step of obtaining a voltage from a voltage source side of the voltage supply circuit and defining the first voltage level, and obtaining the switching transistor at the voltage output end The voltage on the side is defined as a second voltage level; and a junction diode polarity conversion step is to control the pole direction of the junction diode of the switch transistor, wherein the first voltage level is greater than the When the second voltage level is applied, a voltage value corresponding to the voltage source side of the voltage supply circuit is applied to the base end of the switching transistor, so that the pole of the junction diode of the switching transistor is opposite to the switching transistor a direction from the source to the drain such that the voltage level of the voltage output terminal is zero potential, wherein when the second voltage level is greater than the first voltage level, a corresponding correspondence is applied to the base end of the switching transistor The switching transistor to a voltage value of the voltage of the output end side, so that the electrode junction diode of the switching transistor in the same direction of the source of the switching transistor to the drain of the extreme.

為達上述目的及其他目的,本發明復提出一種基體(Bulk)的控制電路,係於一電壓供應電路中,對耦接其電壓輸出端之一開關電晶體的控制,以控制該電壓輸出端之電壓位準,該控制電路包含:一電壓位準處理電路,係取得來自該電壓供應電路之一電壓源側的電壓並定義為第一電壓位準,以及取得該開關電晶體於該電壓輸出端側的電壓並定義為第二電壓位準,並比較該第一電壓位準及該第二電壓位準而輸出一比較結果;及一開關電晶體調整電路,係耦接該電壓位準處理電路,以接收該比較結果,該開關電晶體調整電路並根 據該比較結果控制該開關電晶體之接面二極體之極向,於該第一電壓位準大於該第二電壓位準時,對該開關電晶體的基體端施加對應於該電壓供應電路之電壓源側的電壓值,以使該開關電晶體之接面二極體之極向相反於該開關電晶體之源極至汲極的方向,此外,於該第二電壓位準大於該第一電壓位準時,對該開關電晶體的基體端施加對應於該開關電晶體於該電壓輸出端側的電壓值,以使該開關電晶體之接面二極體之極向相同於該開關電晶體之源極至汲極的方向。 To achieve the above and other objects, the present invention provides a control circuit for a bulk (Bulk) in a voltage supply circuit for controlling a switching transistor coupled to a voltage output terminal thereof to control the voltage output terminal. The voltage level, the control circuit includes: a voltage level processing circuit for obtaining a voltage from a voltage source side of the voltage supply circuit and defining the first voltage level, and obtaining the switching transistor at the voltage output The voltage on the terminal side is defined as a second voltage level, and the first voltage level and the second voltage level are compared to output a comparison result; and a switching transistor adjustment circuit is coupled to the voltage level processing a circuit to receive the comparison result, the switch transistor adjustment circuit is rooted Controlling the pole direction of the junction diode of the switching transistor according to the comparison result, when the first voltage level is greater than the second voltage level, applying a voltage corresponding to the voltage supply circuit to the base end of the switching transistor a voltage value on the voltage source side such that a pole of the junction diode of the switching transistor is opposite to a source to a drain of the switching transistor, and further, the second voltage level is greater than the first When the voltage level is applied, a voltage value corresponding to the switching transistor on the voltage output end side is applied to the base end of the switching transistor, so that the pole of the junction transistor of the switching transistor is the same as the switching transistor The source is in the direction of the bungee.

於本發明之一實施例中,該開關電晶體調整電路包含:一電壓位準調整單元,係耦接該電壓位準處理電路並具有一控制端,係根據該比較結果及該控制端的輸入產生第一控制訊號對以及第二控制訊號對;一第一控制單元,係耦接該電壓位準調整單元、該電壓供應電路之電壓源側、該開關電晶體的基體端及該電壓輸出端,回應該第一控制訊號對,輸出該電壓供應電路之電壓源側的電壓至該開關電晶體的基體端或輸出該電壓輸出端的電壓至該開關電晶體的基體端;及一第二控制單元,係耦接該電壓位準調整單元、該電壓供應電路之電壓源側及該電壓輸出端,回應該第二控制訊號對,輸出該電壓供應電路之電壓源側的電壓或輸出該電壓輸出端的電壓至該電壓位準調整單元的控制端,其中,於該第一電壓位準大於該第二電壓位準時,該第一控制訊號對係使該第一控制單元輸出該電壓供應電路之電壓源側的電壓至該開關電晶體的基體端,該第二控制訊號對係使該第二控制單元輸出該電壓輸出端的電壓至該電壓位準調整單元的控制端,其中,於該第一電壓位準大於該第二電壓位準時,該第一控制訊號對係使該第一控制單元輸出該電壓輸出端的電壓至該開關電晶體 的基體端,該第二控制訊號對係使該第二控制單元該電壓供應電路之電壓源側的電壓至該電壓位準調整單元的控制端。 In an embodiment of the present invention, the switching transistor adjustment circuit includes: a voltage level adjusting unit coupled to the voltage level processing circuit and having a control end, which is generated according to the comparison result and the input of the control end a first control signal pair and a second control signal pair; a first control unit coupled to the voltage level adjustment unit, a voltage source side of the voltage supply circuit, a base end of the switch transistor, and the voltage output end, Retrieving the first control signal pair, outputting the voltage on the voltage source side of the voltage supply circuit to the base end of the switch transistor or outputting the voltage at the voltage output terminal to the base end of the switch transistor; and a second control unit, The voltage level adjustment unit, the voltage source side of the voltage supply circuit, and the voltage output end are coupled to the second control signal pair, output the voltage on the voltage source side of the voltage supply circuit, or output the voltage at the voltage output end. And the control terminal of the voltage level adjusting unit, wherein the first control signal pair is caused when the first voltage level is greater than the second voltage level The first control unit outputs a voltage on the voltage source side of the voltage supply circuit to the base end of the switch transistor, and the second control signal pair causes the second control unit to output the voltage of the voltage output terminal to the voltage level adjustment unit a control terminal, wherein the first control signal pair causes the first control unit to output a voltage of the voltage output terminal to the switch transistor when the first voltage level is greater than the second voltage level The second control signal pair causes the voltage on the voltage source side of the voltage supply circuit of the second control unit to be the control end of the voltage level adjustment unit.

於本發明之一實施例中,該第一控制單元包含串接的二個P通道增強型MOSFET及與該二P通道增強型MOSFET並聯的一N通道增強型MOSFET,該二P通道增強型MOSFET及該N通道增強型MOSFET的閘極端係受控於該第一控制訊號對。 In an embodiment of the invention, the first control unit comprises two P-channel enhancement MOSFETs connected in series and an N-channel enhancement MOSFET connected in parallel with the two P-channel enhancement MOSFETs, the two P-channel enhancement MOSFETs And the gate terminal of the N-channel enhancement type MOSFET is controlled by the first control signal pair.

於本發明之一實施例中,該第二控制單元包含串接的二個P通道增強型MOSFET及與該二P通道增強型MOSFET並聯的一N通道增強型MOSFET,該二P通道增強型MOSFET及該N通道增強型MOSFET的閘極端係受控於該第二控制訊號對。 In an embodiment of the invention, the second control unit comprises two P-channel enhancement MOSFETs connected in series and an N-channel enhancement MOSFET connected in parallel with the two P-channel enhancement MOSFETs, the two P-channel enhancement MOSFETs And the gate terminal of the N-channel enhancement type MOSFET is controlled by the second control signal pair.

於本發明之一實施例中,該電壓位準調整單元係包含輸出該第一控制訊號對的第一電壓位準移位器及輸出該第二控制訊號對的第二電壓位準移位器。 In an embodiment of the invention, the voltage level adjusting unit includes a first voltage level shifter that outputs the first control signal pair and a second voltage level shifter that outputs the second control signal pair. .

藉此,本發明透過對電晶體之基體-閘極間之額外電壓的施加,即可控制該開關電晶體之接面二極體(寄生二極體)之極向,當其極向相反於該開關電晶體之源極至汲極的方向時,即可阻擋寄生電位(Vin-diode)的產生,進而達到零電位輸出以及省電的功效。 Therefore, the present invention can control the polar direction of the junction diode (parasitic diode) of the switching transistor by applying an additional voltage between the base and the gate of the transistor, when the pole is opposite to When the source of the switching transistor is in the direction of the drain, the parasitic potential (Vin-diode) can be blocked, thereby achieving zero potential output and power saving.

10‧‧‧寄生二極體 10‧‧‧ Parasitic diode

100‧‧‧開關電晶體 100‧‧‧Switching transistor

200‧‧‧零電位控制電路 200‧‧‧zero potential control circuit

210‧‧‧電壓位準處理電路 210‧‧‧Voltage level processing circuit

220‧‧‧開關電晶體調整電路 220‧‧‧Switching transistor adjustment circuit

221‧‧‧電壓位準調整單元 221‧‧‧Voltage level adjustment unit

2212‧‧‧第一電壓位準移位器 2212‧‧‧First voltage level shifter

2214‧‧‧第二電壓位準移位器 2214‧‧‧Second voltage level shifter

222‧‧‧第一控制單元 222‧‧‧First Control Unit

223‧‧‧第二控制單元 223‧‧‧Second Control Unit

X1、Y1‧‧‧第一控制訊號對 X1, Y1‧‧‧ first control signal pair

X2、Y2‧‧‧第二控制訊號對 X2, Y2‧‧‧ second control signal pair

Va‧‧‧電位 Va‧‧‧ potential

Vb‧‧‧電位 Vb‧‧‧ potential

Vin‧‧‧電壓輸入端 Vin‧‧‧ voltage input

Vout‧‧‧電壓輸出端 Vout‧‧‧voltage output

VPH‧‧‧電位點 VPH‧‧‧ potential point

VPL‧‧‧電位點 VPL‧‧‧ potential point

Vfn1‧‧‧電壓源側的電壓 Vfn1‧‧‧ voltage on the voltage source side

Vout1‧‧‧電壓輸出端側的電壓 Vout1‧‧‧ voltage on the voltage output side

〔圖1〕係為習知非同步電源升壓電路的示意圖。 FIG. 1 is a schematic diagram of a conventional asynchronous power supply boosting circuit.

〔圖2〕係為習知同步電源升壓電路的示意圖。 [Fig. 2] is a schematic diagram of a conventional synchronous power supply boosting circuit.

〔圖3〕係為本發明一實施例中之基體(Bulk)的控制電路示意圖。 FIG. 3 is a schematic diagram of a control circuit of a base (Bulk) according to an embodiment of the present invention.

〔圖4〕係為本發明一實施例中之基體(Bulk)控制電路的具體電路圖。 FIG. 4 is a specific circuit diagram of a Bulk control circuit in an embodiment of the present invention.

為充分瞭解本發明之目的、特徵及功效,茲藉由下述具體之實施例,並配合所附之圖式,對本發明做一詳細說明,說明如後:本發明係於一電壓供應電路中,對耦接該電壓供應電路之電壓輸出端的一開關電晶體進行額外的控制,以使該電壓供應電路之電壓輸出端的電壓位準能達到零電位的輸出。本發明係透過對該開關電晶體之基體與閘極間之額外電壓的施加來達到控制的目的,該額外電壓的施加係可使該開關電晶體之接面二極體的極向產生改變,一旦改變成背向於電壓輸出端的方向時,該開關電晶體就可藉由此反向的接面二極體阻擋電壓供應電路中寄生電位(Vin-diode)的產生生成,或者是阻擋電壓供應電路中其他寄生電位(Vin-diode)的輸出。 In order to fully understand the object, features and advantages of the present invention, the present invention will be described in detail by the following specific embodiments and the accompanying drawings. And additionally controlling a switching transistor coupled to the voltage output end of the voltage supply circuit to enable the voltage level of the voltage output terminal of the voltage supply circuit to reach a zero potential output. The invention achieves the purpose of control by applying an additional voltage between the substrate and the gate of the switching transistor, and the application of the additional voltage causes a change in the polar orientation of the junction diode of the switching transistor. Once changed to a direction facing away from the voltage output terminal, the switching transistor can be generated by the generation of a parasitic potential (Vin-diode) in the reverse junction diode blocking voltage supply circuit, or a blocking voltage supply. The output of other parasitic potentials (Vin-diode) in the circuit.

基於此機制,本發明之基體(Bulk)的控制方法係包含:一電壓位準取得步驟及一接面二極體極向轉換步驟。 Based on this mechanism, the control method of the substrate (Bulk) of the present invention comprises: a voltage level obtaining step and a junction diode polar switching step.

於該電壓位準取得步驟中,係取得來自該電壓供應電路之一電壓源側的電壓並定義為第一電壓位準,以及取得該開關電晶體於該電壓輸出端側的電壓並定義為第二電壓位準。由於電壓源側的Vin剛輸入時,電壓源側的電壓會高於輸出側(此時輸出側尚無電壓),而當耦接該電壓輸出端的系統需要電位時,該電壓輸出端側的電壓就會升高,因此藉由此二電壓的比較,即可用來作為接面二極體極向轉換的依據。 In the voltage level obtaining step, a voltage from a voltage source side of the voltage supply circuit is obtained and defined as a first voltage level, and a voltage of the switching transistor on the voltage output end side is obtained and defined as Two voltage levels. Since the voltage on the voltage source side is just input, the voltage on the voltage source side is higher than the output side (there is no voltage on the output side), and when the system coupled to the voltage output terminal requires a potential, the voltage on the output side of the voltage It will rise, so the comparison of the two voltages can be used as the basis for the polar transition of the junction diode.

於該接面二極體極向轉換步驟中,係控制該開關電晶體之接面二極體之極向。其中於該第一電壓位準大於該第二電壓位準時,對該開關電晶體的基體端施加對應於該電壓供應電路之電壓源側的電壓值,以使該開關電晶體之接面二極體之極向相反於該開關電晶體之源極至汲極的方向,而阻擋電壓供應電路中寄生電位(Vin-diode)的產生,使該電壓輸出端之電壓位準為零電位;另一方面,於該第二電壓位準大於該第一電壓位準時,對該開關電晶體的基體端施加對應於該開關電晶體於該電壓輸出端側的電壓值,以使該開關電晶體之接面二極體之極向相同於該開關電晶體之源極至汲極的方向,進而讓該電壓輸出端的輸出正常。 In the junction diode polarity conversion step, the pole direction of the junction diode of the switching transistor is controlled. When the first voltage level is greater than the second voltage level, applying a voltage value corresponding to the voltage source side of the voltage supply circuit to the base end of the switching transistor to connect the junction diode of the switching transistor The pole of the body is opposite to the source to the drain of the switching transistor, and the generation of a parasitic potential (Vin-diode) in the voltage supply circuit causes the voltage level of the voltage output terminal to be zero potential; In one aspect, when the second voltage level is greater than the first voltage level, a voltage value corresponding to the switching transistor on the voltage output end side is applied to the base end of the switching transistor, so that the switching transistor is connected The pole of the surface diode is the same as the source to the drain of the switching transistor, so that the output of the voltage output is normal.

接著請參閱圖3,係本發明一實施例中之基體(Bulk)的控制電路示意圖。於此實施例中,本發明係透過一零電位控制電路200來對耦接至電壓輸出端之開關電晶體100進行控制,透過對該開關電晶體100之基體-閘極間之額外電壓VPH的施加,即可控制該開關電晶體100之接面二極體(寄生二極體)的極向,可在電壓源剛輸入時阻擋寄生電位(Vin-diode)的產生,而達到零電位輸出以及省電的功效。 Next, please refer to FIG. 3, which is a schematic diagram of a control circuit of a base (Bulk) in an embodiment of the present invention. In this embodiment, the present invention controls the switching transistor 100 coupled to the voltage output terminal through a zero potential control circuit 200 through the extra voltage VPH between the base and the gate of the switching transistor 100. By applying, the pole of the junction diode (parasitic diode) of the switching transistor 100 can be controlled, and the generation of the parasitic potential (Vin-diode) can be blocked when the voltage source is input, and the zero potential output is achieved. Power saving effect.

透過對該開關電晶體100之基體-閘極(Bulk-gate)間之額外電壓VPH的施加係可使該開關電晶體100之基體-閘極間的電位相同於源極-基體端(Va)或汲極-基體端間(Vb)的電位,進而控制該開關電晶體100之接面二極體(寄生二極體)之極向。其中該開關電晶體100係可為各種電晶體如:P型MOS、N型MOS、各種場效應電晶體等。 The potential between the base and the gate of the switching transistor 100 can be made the same as the source-base terminal (Va) by applying an additional voltage VPH between the base and the gate of the switching transistor 100. Or the potential of the drain-substrate end (Vb), thereby controlling the polarity of the junction diode (parasitic diode) of the switching transistor 100. The switching transistor 100 can be various transistors such as P-type MOS, N-type MOS, various field effect transistors, and the like.

接著請參閱圖4,係本發明一實施例中之基體(Bulk)控制電路的具體電路圖。該零電位控制電路200包含:電壓位準處理電路210及開關電晶體 調整電路220。電壓位準處理電路210係取得來自該電壓供應電路之一電壓源側的電壓Vin1並定義為第一電壓位準,以及取得該開關電晶體100於該電壓輸出端側的電壓Vout1並定義為第二電壓位準,並比較該第一電壓位準及該第二電壓位準而輸出一比較結果,其中該電壓位準處理電路210舉例來說(但不限於此,任何可達到比較效果而對應輸出比較結果的電路皆可適用本發明):可透過比較器與電阻的配置來設定該第一電壓位準及該第二電壓位準的比較模式,以使該比較結果能正確驅動後續之電壓位準調整單元221的運作。 Next, please refer to FIG. 4, which is a specific circuit diagram of a Bulk control circuit in an embodiment of the present invention. The zero potential control circuit 200 includes: a voltage level processing circuit 210 and a switching transistor The circuit 220 is adjusted. The voltage level processing circuit 210 obtains the voltage Vin1 from the voltage source side of the voltage supply circuit and defines it as the first voltage level, and obtains the voltage Vout1 of the switching transistor 100 on the voltage output end side and defines it as the first And comparing the first voltage level and the second voltage level to output a comparison result, wherein the voltage level processing circuit 210 is exemplified by, but not limited to, any corresponding effect can be achieved. The circuit for outputting the comparison result can be applied to the invention: the comparison mode of the first voltage level and the second voltage level can be set through the configuration of the comparator and the resistor, so that the comparison result can correctly drive the subsequent voltage. The operation of the level adjustment unit 221.

開關電晶體調整電路220係耦接該電壓位準處理電路210,以接收該比較結果。該開關電晶體調整電路220並根據該比較結果控制該開關電晶體100之接面二極體之極向,於該第一電壓位準大於該第二電壓位準時,對該開關電晶體100的基體端施加對應於該電壓供應電路之電壓源側的電壓值Vin1,以使該開關電晶體100之接面二極體之極向相反於該開關電晶體100之源極至汲極的方向。此外,於該第二電壓位準大於該第一電壓位準時,對該開關電晶體100的基體端施加對應於該開關電晶體100於該電壓輸出端側的電壓值Vout1,以使該開關電晶體100之接面二極體之極向相同於該開關電晶體100之源極至汲極的方向。 The switching transistor adjustment circuit 220 is coupled to the voltage level processing circuit 210 to receive the comparison result. The switching transistor adjustment circuit 220 controls the pole direction of the junction diode of the switching transistor 100 according to the comparison result. When the first voltage level is greater than the second voltage level, the switching transistor 100 is A voltage value Vin1 corresponding to the voltage source side of the voltage supply circuit is applied to the base end such that the pole of the junction diode of the switching transistor 100 is opposite to the source to the drain of the switching transistor 100. In addition, when the second voltage level is greater than the first voltage level, a voltage value Vout1 corresponding to the switching transistor 100 on the voltage output end side is applied to the base end of the switching transistor 100, so that the switch is electrically The poles of the junction diodes of the crystal 100 are oriented in the same direction as the source to the drain of the switching transistor 100.

進一步地,以第4圖所示之具體電路圖來做說明,然該具體電路圖僅為一種示例,並非為本發明僅能以該電路來實施的限制。該開關電晶體調整電路220包含:電壓位準調整單元221、第一控制單元222及第二控制單元223。 Further, the specific circuit diagram shown in FIG. 4 is described. However, the specific circuit diagram is only an example, and is not a limitation that the invention can be implemented only by the circuit. The switch transistor adjustment circuit 220 includes a voltage level adjustment unit 221 , a first control unit 222 , and a second control unit 223 .

電壓位準調整單元221係耦接該電壓位準處理電路210並具有一控制端(與VPL端同電位),該電壓位準調整單元221根據該電壓位準處理電路210的比較結果及該控制端的輸入產生第一控制訊號對(X1、Y1)以及第二控制訊號 對(X2、Y2)。其中,該第一控制訊號對(X1、Y1)及該第二控制訊號對(X2、Y2)會對應於電壓源側的Vin剛輸入之狀態下及電壓輸出端的系統需要電位時之狀態下而有對應的控制訊號,以控制第一控制單元222及第二控制單元223內之電晶體的開與關。其中,該電壓位準調整單元221係包含輸出該第一控制訊號對(X1、Y1)的第一電壓位準移位器2212及輸出該第二控制訊號對(X2、Y2)的第二電壓位準移位器2214。該電壓位準調整單元221係用以在控制端有電位輸入時可確保絕對值信號的準位高於該控制端輸入之電壓的一下限電位,以確保該電壓輸出端的系統需要電位時可正確調控接面二極體極向的轉換。 The voltage level adjusting unit 221 is coupled to the voltage level processing circuit 210 and has a control end (same potential as the VPL terminal). The voltage level adjusting unit 221 compares the result according to the voltage level processing circuit 210 and the control. The input of the terminal generates a first control signal pair (X1, Y1) and a second control signal Yes (X2, Y2). The first control signal pair (X1, Y1) and the second control signal pair (X2, Y2) correspond to a state in which the voltage source side is just input and the voltage output terminal system needs a potential state. There is a corresponding control signal to control the opening and closing of the transistors in the first control unit 222 and the second control unit 223. The voltage level adjusting unit 221 includes a first voltage level shifter 2212 that outputs the first control signal pair (X1, Y1) and a second voltage that outputs the second control signal pair (X2, Y2). Level shifter 2214. The voltage level adjusting unit 221 is configured to ensure that the level of the absolute value signal is higher than a lower limit potential of the voltage input by the control terminal when the control terminal has a potential input, so as to ensure that the system at the voltage output terminal needs the potential correctly. Regulate the transition of the junction diode polarity.

第一控制單元222耦接該電壓位準調整單元221、該電壓供應電路之電壓源側Vin1、該開關電晶體100的基體端(經由電位點VPH)及該電壓輸出端側的電壓Vout1。該第一控制單元222回應該第一控制訊號對(X1、Y1),對該第一控制單元222內的電晶體進行調控以輸出該電壓供應電路之電壓源側的電壓(VPH端的電位此時相同於Vin1)至該開關電晶體100的基體端,進而生成相反於該開關電晶體100之源極至汲極方向的接面二極體極向;或者是在該電壓輸出端的系統需要電位時,輸出該電壓輸出端的電壓(VPH端的電位此時相同於Vout1)至該開關電晶體100的基體端,進而生成相同於該開關電晶體100之源極至汲極方向的接面二極體極向。其中,該第一控制單元222包含串接的二個P通道增強型MOSFET,以及該第一控制單元222更包含與該二P通道增強型MOSFET並聯的一N通道增強型MOSFET,該二P通道增強型MOSFET及該N通道增強型MOSFET的閘極端係受控於該第一控制訊號對(X1、Y1)。 The first control unit 222 is coupled to the voltage level adjusting unit 221, the voltage source side Vin1 of the voltage supply circuit, the base end of the switching transistor 100 (via the potential point VPH), and the voltage Vout1 of the voltage output end side. The first control unit 222 responds to the first control signal pair (X1, Y1), and regulates the transistor in the first control unit 222 to output the voltage on the voltage source side of the voltage supply circuit (the potential of the VPH terminal at this time) The same as Vin1) to the base end of the switching transistor 100, thereby generating a junction diode polarity opposite to the source-drain direction of the switching transistor 100; or when the system at the voltage output requires a potential And outputting the voltage at the voltage output terminal (the potential of the VPH terminal is the same as Vout1) to the base end of the switching transistor 100, thereby generating a junction diode pole similar to the source-drain direction of the switching transistor 100. to. The first control unit 222 includes two P-channel enhancement type MOSFETs connected in series, and the first control unit 222 further includes an N-channel enhancement type MOSFET connected in parallel with the two P-channel enhancement type MOSFETs, the two P channels. The gate terminals of the enhancement MOSFET and the N-channel enhancement MOSFET are controlled by the first control signal pair (X1, Y1).

第二控制單元223係耦接該電壓位準調整單元221、該電壓供應電路之電壓源側的電壓Vin1及該電壓輸出端側的電壓Vout1。第二控制單元223回 應該第二控制訊號對(X2、Y2),輸出該電壓供應電路之電壓源側的電壓(VPL端的電位此時相同於Vin1)至該電壓位準調整單元221的控制端或輸出該電壓輸出端的電壓(VPL端的電位此時相同於Vout1)至該電壓位準調整單元221的控制端。其中,該第二控制單元223包含串接的二個P通道增強型MOSFET,以及該第二控制單元223更與該二P通道增強型MOSFET並聯的一N通道增強型MOSFET,該二P通道增強型MOSFET及該N通道增強型MOSFET的閘極端係受控於該第二控制訊號對(X2、Y2)。 The second control unit 223 is coupled to the voltage level adjusting unit 221, the voltage Vin1 of the voltage source side of the voltage supply circuit, and the voltage Vout1 of the voltage output end. The second control unit 223 returns The second control signal pair (X2, Y2) should output the voltage on the voltage source side of the voltage supply circuit (the potential of the VPL terminal is the same as Vin1 at this time) to the control terminal of the voltage level adjustment unit 221 or output the voltage output terminal. The voltage (the potential at the VPL terminal is now the same as Vout1) to the control terminal of the voltage level adjusting unit 221. The second control unit 223 includes two P-channel enhancement type MOSFETs connected in series, and an N-channel enhancement type MOSFET in which the second control unit 223 is further connected in parallel with the two P-channel enhancement type MOSFETs. The gate MOSFET of the MOSFET and the N-channel enhancement MOSFET is controlled by the second control signal pair (X2, Y2).

本發明在上文中已以較佳實施例揭露,然熟習本項技術者應理解的是,該實施例僅用於描繪本發明,而不應解讀為限制本發明之範圍。應注意的是,舉凡與該實施例等效之變化與置換,均應設為涵蓋於本發明之範疇內。因此,本發明之保護範圍當以申請專利範圍所界定者為準。 The invention has been described above in terms of the preferred embodiments, and it should be understood by those skilled in the art that the present invention is not intended to limit the scope of the invention. It should be noted that variations and permutations equivalent to those of the embodiments are intended to be included within the scope of the present invention. Therefore, the scope of protection of the present invention is defined by the scope of the patent application.

100‧‧‧開關電晶體 100‧‧‧Switching transistor

200‧‧‧零電位控制電路 200‧‧‧zero potential control circuit

Va‧‧‧電位 Va‧‧‧ potential

Vb‧‧‧電位 Vb‧‧‧ potential

Vin‧‧‧電壓輸入端 Vin‧‧‧ voltage input

Vout‧‧‧電壓輸出端 Vout‧‧‧voltage output

VPH‧‧‧電位點 VPH‧‧‧ potential point

Vin1‧‧‧電壓源側的電壓 Vin1‧‧‧ voltage on the voltage source side

Vout1‧‧‧電壓輸出端側的電壓 Vout1‧‧‧ voltage on the voltage output side

Claims (5)

一種基體(Bulk)的控制電路,係於一電壓供應電路中,對耦接其電壓輸出端之一開關電晶體的控制,以控制該電壓輸出端之電壓位準,該控制電路包含:一電壓位準處理電路,係取得來自該電壓供應電路之一電壓源側的電壓並定義為第一電壓位準,以及取得該開關電晶體於該電壓輸出端側的電壓並定義為第二電壓位準,並比較該第一電壓位準及該第二電壓位準而輸出一比較結果;及一開關電晶體調整電路,係耦接該電壓位準處理電路,以接收該比較結果,該開關電晶體調整電路並根據該比較結果控制該開關電晶體之接面二極體之極向,於該第一電壓位準大於該第二電壓位準時,對該開關電晶體的基體端施加對應於該電壓供應電路之電壓源側的電壓值,以使該開關電晶體之接面二極體之極向相反於該開關電晶體之源極至汲極的方向,此外,於該第二電壓位準大於該第一電壓位準時,對該開關電晶體的基體端施加對應於該開關電晶體於該電壓輸出端側的電壓值,以使該開關電晶體之接面二極體之極向相同於該開關電晶體之源極至汲極的方向,其中,該開關電晶體調整電路包含:一電壓位準調整單元,係耦接該電壓位準處理電路並具有一控制端,係根據該比較結果及該控制端的輸入產生第一控制訊號對以及第二控制訊號對; 一第一控制單元,係耦接該電壓位準調整單元、該電壓供應電路之電壓源側、該開關電晶體的基體端及該電壓輸出端,回應該第一控制訊號對,輸出該電壓供應電路之電壓源側的電壓至該開關電晶體的基體端或輸出該電壓輸出端的電壓至該開關電晶體的基體端;及一第二控制單元,係耦接該電壓位準調整單元、該電壓供應電路之電壓源側及該電壓輸出端,回應該第二控制訊號對,輸出該電壓供應電路之電壓源側的電壓或輸出該電壓輸出端的電壓至該電壓位準調整單元的控制端,其中,於該第一電壓位準大於該第二電壓位準時,該第一控制訊號對係使該第一控制單元輸出該電壓供應電路之電壓源側的電壓至該開關電晶體的基體端,該第二控制訊號對係使該第二控制單元輸出該電壓輸出端的電壓至該電壓位準調整單元的控制端,其中,於該第一電壓位準大於該第二電壓位準時,該第一控制訊號對係使該第一控制單元輸出該電壓輸出端的電壓至該開關電晶體的基體端,該第二控制訊號對係使該第二控制單元該電壓供應電路之電壓源側的電壓至該電壓位準調整單元的控制端,其中,該第一控制單元包含串接的二個P通道增強型MOSFET及與該二P通道增強型MOSFET並聯的一N通道增強型MOSFET,該二P通道增強型MOSFET及該N通道增強型MOSFET的閘極端係受控於該第一控制訊號對。 A control circuit of a Bulk is connected to a voltage supply circuit for controlling a switching transistor of a voltage output end thereof to control a voltage level of the voltage output terminal, the control circuit comprising: a voltage The level processing circuit obtains a voltage from a voltage source side of the voltage supply circuit and defines it as a first voltage level, and obtains a voltage of the switching transistor on the voltage output end side and defines it as a second voltage level. And comparing the first voltage level and the second voltage level to output a comparison result; and a switching transistor adjusting circuit coupled to the voltage level processing circuit to receive the comparison result, the switching transistor Adjusting the circuit and controlling the pole direction of the junction diode of the switch transistor according to the comparison result. When the first voltage level is greater than the second voltage level, applying a voltage corresponding to the voltage to the base end of the switch transistor Supplying a voltage value on a voltage source side of the circuit such that a pole of the junction diode of the switching transistor is opposite to a source to a drain of the switching transistor, and further, the second When the level is greater than the first voltage level, a voltage value corresponding to the switching transistor on the voltage output end side is applied to the base end of the switching transistor to make the pole of the junction transistor of the switching transistor The switching transistor transistor adjustment circuit includes: a voltage level adjusting unit coupled to the voltage level processing circuit and having a control end, according to the direction of the source to the drain of the switching transistor The comparison result and the input of the control terminal generate a first control signal pair and a second control signal pair; a first control unit is coupled to the voltage level adjusting unit, the voltage source side of the voltage supply circuit, the base end of the switching transistor, and the voltage output end, and corresponds to the first control signal pair, and outputs the voltage supply a voltage on the voltage source side of the circuit to the base end of the switching transistor or a voltage outputting the voltage output terminal to the base end of the switching transistor; and a second control unit coupled to the voltage level adjusting unit, the voltage a voltage source side of the supply circuit and the voltage output end, corresponding to the second control signal pair, outputting the voltage on the voltage source side of the voltage supply circuit or outputting the voltage of the voltage output terminal to the control end of the voltage level adjustment unit, wherein When the first voltage level is greater than the second voltage level, the first control signal pair causes the first control unit to output a voltage on a voltage source side of the voltage supply circuit to a base end of the switch transistor, The second control signal pair causes the second control unit to output the voltage of the voltage output terminal to the control end of the voltage level adjustment unit, wherein the first voltage level When the second voltage level is greater than the second voltage level, the first control signal causes the first control unit to output the voltage of the voltage output terminal to the base end of the switch transistor, and the second control signal pair causes the second control unit to a voltage source side voltage of the voltage supply circuit to a control end of the voltage level adjustment unit, wherein the first control unit comprises two P-channel enhancement type MOSFETs connected in series and one parallel with the two P-channel enhancement type MOSFETs An N-channel enhancement MOSFET, the gate of the two P-channel enhancement MOSFET and the N-channel enhancement MOSFET are controlled by the first control signal pair. 如請求項1所述之控制電路,其中該第二控制單元包含串接的二個P通道增強型MOSFET及與該二P通道增強型MOSFET並聯的一N通道增強型MOSFET,該二P通道增強型MOSFET及該N通道增強型MOSFET的閘極端係受控於該第二控制訊號對。 The control circuit of claim 1, wherein the second control unit comprises two P-channel enhancement MOSFETs connected in series and an N-channel enhancement MOSFET connected in parallel with the two P-channel enhancement MOSFETs, the two P-channel enhancements The MOSFET and the gate terminal of the N-channel enhancement MOSFET are controlled by the second control signal pair. 如請求項1或2所述之控制電路,其中該電壓位準調整單元係包含輸出該第一控制訊號對的第一電壓位準移位器及輸出該第二控制訊號對的第二電壓位準移位器。 The control circuit of claim 1 or 2, wherein the voltage level adjusting unit comprises a first voltage level shifter outputting the first control signal pair and a second voltage bit outputting the second control signal pair Quasi-shifter. 一種基體(Bulk)的控制方法,係於一電壓供應電路中,使用如請求項1至3中任一項所述之控制電路,對耦接該電壓供應電路之電壓輸出端之一開關電晶體進行控制,以控制該電壓輸出端之電壓位準,該控制方法包含:一電壓位準取得步驟,係取得來自該電壓供應電路之一電壓源側的電壓並定義為第一電壓位準,以及取得該開關電晶體於該電壓輸出端側的電壓並定義為第二電壓位準;及一接面二極體極向轉換步驟,係控制該開關電晶體之接面二極體之極向,其中於該第一電壓位準大於該第二電壓位準時,對該開關電晶體的基體端施加對應於該電壓供應電路之電壓源側的電壓值,以使該開關電晶體之接面二極體之極向相反於該開關電晶體之源極至汲極的方向,使該電壓輸出端之電壓位準為零電位,其中於該第二電壓位準大於該第一電壓位準時,對該開關電晶體的基體端施加對應於該開關電晶體於該電壓輸出端側的電壓 值,以使該開關電晶體之接面二極體之極向相同於該開關電晶體之源極至汲極的方向。 A method for controlling a bulk (Bulk), in a voltage supply circuit, using a control circuit according to any one of claims 1 to 3, a switching transistor coupled to a voltage output terminal of the voltage supply circuit Controlling to control the voltage level of the voltage output terminal, the control method includes: a voltage level obtaining step of obtaining a voltage from a voltage source side of the voltage supply circuit and defining the first voltage level, and Obtaining a voltage of the switching transistor on the voltage output end side and defining the second voltage level; and a junction diode polarity conversion step of controlling the polarity of the junction diode of the switching transistor, When the first voltage level is greater than the second voltage level, applying a voltage value corresponding to the voltage source side of the voltage supply circuit to the base end of the switching transistor to connect the junction diode of the switching transistor The pole of the body is opposite to the source to the drain of the switching transistor, so that the voltage level of the voltage output terminal is zero potential, wherein when the second voltage level is greater than the first voltage level, switch End of the crystal substrate is applied to a voltage corresponding to the switching transistor to the voltage of the output terminal side The value is such that the pole of the junction diode of the switching transistor is in the same direction as the source to the drain of the switching transistor. 如請求項4所述之控制方法,其中於該電壓位準取得步驟中,該第一電壓位準係取自該開關電晶體之源極側的電壓。 The control method of claim 4, wherein in the voltage level obtaining step, the first voltage level is taken from a voltage on a source side of the switching transistor.
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